WO2020155330A1 - Synchronous rectification control circuit - Google Patents

Synchronous rectification control circuit Download PDF

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Publication number
WO2020155330A1
WO2020155330A1 PCT/CN2019/078497 CN2019078497W WO2020155330A1 WO 2020155330 A1 WO2020155330 A1 WO 2020155330A1 CN 2019078497 W CN2019078497 W CN 2019078497W WO 2020155330 A1 WO2020155330 A1 WO 2020155330A1
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circuit
turn
voltage
logic
terminal
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PCT/CN2019/078497
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French (fr)
Chinese (zh)
Inventor
林新春
朱敏
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苏州力生美半导体有限公司
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Publication of WO2020155330A1 publication Critical patent/WO2020155330A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the utility model relates to a synchronous rectification control circuit, which is used for controlling a flyback switching power supply and belongs to the field of rectification circuits.
  • Tons is the turn-on time of the secondary diode. Due to the high voltage drop of the diode, the energy loss generated by it will greatly reduce the conversion efficiency of the flyback switching power supply.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • its on-state voltage drop Can be reduced to below 0.1V.
  • the MOS tube is a gate control device and needs to be matched with a synchronous rectification control circuit to meet working requirements. Therefore, whether the synchronous rectification control circuit can accurately control the synchronous rectifier tube directly determines the advantages and disadvantages of the switching power supply.
  • the synchronous rectifier control circuit can determine the switch of the synchronous rectifier according to the drain-source voltage or drain current.
  • the secondary side synchronous rectifier control circuit detects that the synchronous rectifier drain-source voltage VS decreases or appears from the source.
  • the GATE drive signal to turn on the synchronous rectifier Q2 is output;
  • the synchronous rectification control circuit detects the synchronous rectifier drain-source voltage VS or the voltage flowing from the source to the drain
  • the GATE signal that turns off the synchronous rectifier Q2 is output.
  • the VS voltage slope detection can prevent the synchronous rectifier from turning on by mistake caused by the voltage resonance, in light load, no-load mode or other situations, the synchronous rectifier drain-source voltage VS will have a waveform when it drops. The sudden change of slope affects the response time of the system and the detection result. The synchronous rectifier is very prone to leak open, and the continuity and stability of the system are affected. Although the control for turning off the synchronous rectifier is also accomplished by detecting the drain-source voltage, as the gate voltage of the synchronous rectifier changes, the difficulty of turning off will also change.
  • the purpose of the utility model is to provide a synchronous rectifier control circuit that can ensure the precise switching of the synchronous rectifier in the heavy load mode and the light load or no-load mode, and avoids the wrong turn-on and leakage turn-on of the synchronous rectifier tube.
  • a synchronous rectification control circuit includes a power supply circuit, a maximum frequency limit circuit, a voltage amplitude detection circuit, a circuit for preventing false opening, a circuit for preventing leakage, a circuit for shutting off threshold compensation, Logic circuit, drive circuit and other control circuits.
  • the power supply circuit is connected to the output terminal of the flyback switching power supply to generate the voltage and reference voltage for circuit operation, the voltage amplitude detection circuit, the circuit for preventing false opening, and the shutdown threshold
  • the input terminals of the compensation circuit and the drive circuit are connected to the drain of the synchronous rectifier, and the input terminal of the turn-off threshold compensation circuit is also connected to the gate of the synchronous rectifier to prevent the leakage of the open circuit and the input terminal of the maximum frequency limit circuit with logic
  • the output terminal of the circuit is connected, the input terminal of the leakage prevention circuit is also connected with the output terminal of the voltage amplitude detection circuit, the maximum frequency limit circuit, the voltage amplitude detection circuit, the false opening prevention circuit, the leakage prevention circuit, and the shutdown threshold compensation
  • the output terminals of the circuit and other control circuits are connected to the input terminal of the logic circuit, the logic circuit outputs a control signal as the input of the drive circuit, and the output terminal of the drive circuit is connected to the gate of the synchronous rectifier to control its switching.
  • the logic circuit includes a first logic “OR” circuit, a first logic “AND” circuit, a second logic “AND” circuit, and an RS flip-flop circuit.
  • the first logic “OR” circuit The input terminals of the first logic “AND” circuit are connected to the maximum frequency limit circuit and the voltage amplitude respectively.
  • the output terminals of the detection circuit, the first logic “OR” circuit and other turn-on control circuits are connected, and the input terminals of the second logic “AND” circuit are respectively connected to the turn-off threshold compensation circuit and other turn-off control circuits.
  • the output terminal of the control circuit is connected, the output terminal of the first logic AND gate is connected to the set input terminal of the RS flip-flop, and the output terminal of the second logic AND gate is connected to the RS flip-flop
  • the reset input terminal is connected, and the output terminal of the RS flip-flop is connected to the input terminal of the driving circuit.
  • the circuit for preventing accidental activation includes a first resistor, a first capacitor, and a Schmitt trigger.
  • One end of the first resistor is connected to the power circuit, and the other end of the first resistor is connected to the first resistor.
  • the anode of the capacitor is connected to the input terminal of the Schmitt trigger, and the cathode of the first capacitor is connected to the drain of the synchronous rectifier.
  • the leakage prevention circuit includes a second logic "OR" circuit, a first switch, a second capacitor, a first constant current source and a second comparator, and the input terminals of the logic "OR” circuit are respectively Connected to the output terminal of the voltage amplitude detection and the output terminal of the RS flip-flop, the output terminal of the logical OR circuit is connected to the control terminal of the first switch, and the first constant current source
  • the input terminal of the first constant current source is connected to the power supply circuit
  • the output terminal of the first constant current source is connected to the anode of the second capacitor
  • the first constant current source is used to charge the second capacitor
  • the first switch is used to To discharge the second capacitor
  • the positive pole of the second capacitor is connected to the non-inverting terminal of the second comparator
  • the inverting terminal of the second comparator is connected to the power circuit for receiving data from the power circuit The first reference voltage.
  • the turn-off threshold compensation circuit includes a second resistor, a third resistor, and a second comparator, the input of the second resistor is connected to the drain of the synchronous rectifier, and the input of the third resistor is The terminal is connected to the gate of the synchronous rectifier, the output terminal of the second resistor and the output terminal of the third resistor are simultaneously connected to the non-inverting terminal of the second comparator, and the inverting terminal of the second comparator It is connected to the power circuit for receiving the second reference voltage from the power circuit.
  • the drive circuit includes a pulse delay circuit, a logic “NOT” circuit, a logic “exclusive OR” circuit, a weak drive circuit and an N-type MOS tube and a P-type MOS tube.
  • the pulse delay circuit, logic The input terminals of the "NOT” circuit and the logic “XOR” circuit are both connected to the output terminal of the logic circuit, and the input of the logic “XOR” circuit is also connected to the output terminal of the pulse delay circuit,
  • the output terminal of the pulse delay circuit is also connected to the gate control terminal of the P-type MOS transistor, and the output terminal of the logic "NOT” circuit is connected to the gate control terminal of the N-type MOS transistor.
  • the source terminal of the N-type MOS transistor is connected to the power terminal, and the drain terminal is connected to the drain terminal of the N-type MOS transistor.
  • the source terminal of the N-type MOS transistor is grounded.
  • the output terminal of the logic "exclusive OR" circuit is The third reference voltage and the drain of the synchronous rectifier tube are both inputs of a weak drive circuit, and the output terminal of the weak drive circuit is connected to the drain terminals of the P-type MOS tube and the N-type MOS tube.
  • the false turn-on prevention circuit adopts a Schmitt trigger as a voltage comparison circuit to improve response speed, the switching voltage v1 of the Schmitt trigger is less than one third of the power supply voltage, and the switching voltage v2 is greater than the power supply voltage Two-thirds of it.
  • the resistance value of the first resistor and the capacitance value of the first capacitor in the circuit for preventing accidental turn-on can be changed according to the change of the drain-source voltage slope, and the magnitude of the RC constant obtained therefrom should reach the nanosecond level .
  • the false turn-on prevention circuit is used to avoid false turn-on of the synchronous rectifier tube when the drain-source voltage oscillates or a false voltage occurs.
  • the resistance value of the first resistor and the capacitance value of the first capacitor in the circuit for preventing accidental turn-on can be changed according to the change of the drain-source voltage slope, and the RC time constant ranges from 20 nanoseconds to 2000 nanoseconds. between.
  • the leakage prevention circuit can prevent the synchronous rectifier from being leaked on when the slope of the drain-source voltage is not correctly detected.
  • the non-inverting terminal voltage of the turn-off threshold compensation circuit can reduce the drain voltage required to turn off the synchronous rectifier when the output voltage of the drive circuit is high; when the output voltage of the drive circuit is low, increase the turn-off of the synchronous rectifier. Required drain voltage.
  • the turn-off threshold compensation circuit can avoid the early turn-off or delayed turn-off of the synchronous rectifier, thereby playing the role of a protection circuit.
  • the drive circuit adopts a strong drive circuit and a weak drive circuit to control the synchronous rectifier in parallel, the strong drive circuit performs a fixed-time turn-on control through a pulse delay circuit, and the weak drive circuit performs a fixed-time turn-on control during the remaining turn-on time.
  • the synchronous rectifier is controlled, and the pulse width of the pulse delay circuit is typically 500 nanoseconds.
  • the weak drive circuit in the drive circuit compares the drain voltage of the synchronous rectifier with a third reference voltage, and keeps the drain voltage lower than the third reference voltage, and the drive voltage increases with the drain voltage As it increases and decreases, the typical value of the third reference voltage is -80 to -60 mV.
  • the maximum frequency limit circuit limits the minimum period during which the synchronous rectifier tube is turned on, during which the synchronous rectifier tube is not allowed to be turned on for the second time.
  • the maximum frequency limit circuit can ensure that the circuit operates at a normal frequency without being affected by interference signals.
  • the beneficial effect of the utility model is that the utility model can ensure the accurate switching of the synchronous rectifier in the heavy load mode, light load or no-load mode, avoids the wrong opening and leakage opening of the synchronous rectifier tube, and realizes the flyback switch High-efficiency conversion of the power supply improves the safety and reliability of the system.
  • Figure 1 is a schematic diagram of a power supply circuit using diodes.
  • Figure 2 is a schematic diagram of a power circuit using a MOS tube.
  • Figure 3 is a schematic diagram of the overall structure of the synchronous rectification control circuit of the present invention.
  • Figure 4 is a schematic diagram of the specific structure of the circuit for preventing false opening.
  • Figure 5 is a schematic diagram of the specific structure of the leakage prevention circuit.
  • Figure 6 is a schematic diagram of the specific structure of the turn-off threshold compensation circuit.
  • Figure 7 is a schematic diagram of the specific structure of the drive circuit
  • Figure 8 is a schematic diagram of relevant signal waveforms in the drive circuit
  • Figure 9 is a schematic diagram of the relevant signal waveforms when the flyback switching power supply is not light-loaded.
  • Figure 10 is a schematic diagram of the relevant signal waveforms of the flyback switching power supply at light load.
  • a synchronous rectification control circuit in a preferred embodiment of the present utility model includes a power supply circuit, a maximum frequency limit circuit, a voltage amplitude detection circuit, a false turn-on prevention circuit, a leakage turn-on prevention circuit, and turn-off threshold compensation Circuits, logic circuits, driving circuits and other control circuits.
  • the power supply circuit is connected to the output end of the flyback switching power supply to generate the working voltage and reference voltage of the circuit, the voltage amplitude detection circuit, the circuit to prevent accidental opening, and the shutdown
  • the input terminals of the off-threshold compensation circuit and the drive circuit are connected to the drain of the synchronous rectifier, and the input terminal of the off-threshold compensation circuit is also connected to the gate of the synchronous rectifier to prevent leakage of the input terminal of the circuit and the maximum frequency limit circuit
  • the input terminal of the leakage prevention circuit is also connected to the output terminal of the voltage amplitude detection circuit, the maximum frequency limit circuit, the voltage amplitude detection circuit, the false opening prevention circuit, the leakage prevention circuit, and the shutdown
  • the output terminals of the threshold compensation circuit and other control circuits are connected to the input terminal of the logic circuit, the logic circuit outputs a control signal as the input of the drive circuit, and the output terminal of the drive circuit is connected to the gate of the synchronous rectifier to control its switching .
  • the logic circuit includes a first logic “OR” circuit, a first logic “AND” circuit, a second logic “AND” circuit and an RS flip-flop circuit, the first logic “OR” circuit
  • the input terminals of the “gate” circuit are respectively connected to the output terminals of the circuit for preventing false opening and the circuit for preventing leakage from opening.
  • the input terminals of the first logic “AND” circuit are connected to the maximum frequency limit circuit, the voltage amplitude detection circuit, and the first logic “
  • the output terminals of the “OR gate” circuit are connected to the output terminals of other turn-on control circuits.
  • the input terminals of the second logic “AND gate” circuit are respectively connected to the output terminals of the turn-off threshold compensation circuit and other turn-off control circuits.
  • the first logic “AND gate” The output terminal of "" is connected with the set input terminal of the RS flip-flop, the output terminal of the second logic AND gate is connected with the reset input terminal of the RS flip-flop, and the output terminal of the RS flip-flop is connected with the input terminal of the drive circuit.
  • the false turn-on prevention circuit prevents false turn-on of the synchronous rectifier tube when the drain-source voltage oscillates or a false voltage occurs. It includes a first resistor, a first capacitor and a Schmitt trigger. One end of the first resistor is connected to the power supply circuit, the other end of the first resistor is respectively connected to the positive electrode of the first capacitor and the input end of the Schmitt trigger, and the negative electrode of the first capacitor is connected to the drain of the synchronous rectifier. To prevent the circuit from turning on by mistake, the Schmitt trigger is used as the voltage comparison circuit to improve the response speed.
  • the switching voltage v1 of the Schmitt trigger is less than one-third of the power supply voltage, and the switching voltage v2 is greater than two-thirds of the power supply voltage to prevent
  • the resistance value of the first resistor and the capacitance value of the first capacitor in the wrong turn-on circuit can be changed according to the change of the drain-source voltage slope.
  • the RC time constant ranges from 20 nanoseconds to 2000 nanoseconds, which is typical in practical applications. The value is 200 nanoseconds.
  • the leakage prevention circuit includes a second logic "OR” circuit, a first switch, a second capacitor, a first constant current source and a second comparator, and the input terminals of the logic "OR” circuit are connected to
  • the output terminal of the voltage amplitude detection is connected to the output terminal of the RS flip-flop
  • the output terminal of the logic "OR” circuit is connected to the control terminal of the first switch
  • the input terminal of the first constant current source is connected to the power circuit
  • the first constant current source is connected to the power supply circuit.
  • the output terminal of the current source is connected to the positive terminal of the second capacitor.
  • the first constant current source is used to charge the second capacitor
  • the first switch is used to discharge the second capacitor
  • the positive terminal of the second capacitor is in phase with the second comparator.
  • the leakage prevention circuit can charge the second capacitor when the synchronous rectifier is turned off, and when the drain-source voltage When the voltage is lower than 0V, the charging is restarted, and the typical time for the charging voltage to reach the first reference voltage is 5 microseconds.
  • the leakage prevention circuit can avoid the leakage opening of the synchronous rectifier when the drain-source voltage slope is not correctly detected.
  • the turn-off threshold compensation circuit includes a second resistor, a third resistor, and a second comparator.
  • the input of the second resistor is connected to the drain of the synchronous rectifier, and the input of the third resistor is connected to the synchronous rectifier.
  • the gate of the tube, the output terminal of the second resistor and the output terminal of the third resistor are simultaneously connected to the non-inverting terminal of the second comparator, and the inverting terminal of the second comparator is connected to the power supply circuit for receiving the first output from the power supply circuit. 2. Reference voltage.
  • the drive circuit includes a pulse delay circuit, a logic "NOT” circuit, a logic “exclusive OR” circuit, a weak drive circuit and an N-type MOS tube, a P-type MOS tube, a pulse delay circuit, and a logic"
  • the input terminals of the NOT circuit and the logic XOR circuit are connected to the output terminal of the logic circuit, and the input terminal of the logic XOR circuit is also connected to the output terminal of the pulse delay circuit.
  • the output terminal is also connected with the gate control terminal of the P-type MOS tube, the output terminal of the logic “NOT” circuit is connected with the gate control terminal of the N-type MOS tube, the source terminal of the P-type MOS tube is connected with the power terminal, and its drain The terminal is connected to the drain terminal of the N-type MOS tube, and the source terminal of the N-type MOS tube is grounded.
  • the output terminal of the logic "exclusive OR" circuit, the third reference voltage, and the drain of the synchronous rectifier tube are all inputs of the weak drive circuit.
  • the output terminal of the weak drive circuit is connected to the drain terminal of the P-type MOS tube and the N-type MOS tube.
  • the non-inverting terminal voltage of the turn-off threshold compensation circuit can reduce the drain voltage required to turn off the synchronous rectifier when the output voltage of the drive circuit is high; when the output voltage of the drive circuit is low, increase the turn-off of the synchronous rectifier The required drain voltage of the tube.
  • the turn-off threshold compensation circuit can avoid the early or delayed turn-off of the synchronous rectifier, thereby playing the role of a protection circuit.
  • the driving circuit adopts a strong driving circuit and a weak driving circuit to control the synchronous rectifier, the strong driving circuit performs a fixed time turn-on control through the pulse delay circuit, and the weak driving circuit controls the synchronous rectifier during the remaining turn-on time.
  • the pulse width of the pulse delay circuit is typically 500 nanoseconds.
  • the weak drive circuit in the drive circuit compares the drain voltage of the synchronous rectifier with the third reference voltage, and keeps the drain voltage lower than the third reference voltage, and the drive voltage decreases as the drain voltage increases,
  • the typical value of the third reference voltage is -80 to -60 millivolts.
  • the maximum frequency limit circuit limits the minimum period during which the synchronous rectifier is turned on, during which the synchronous rectifier is not allowed to be turned on a second time.
  • the maximum frequency limit circuit can ensure that the circuit works at a normal frequency without being affected by interference signals.
  • the drain voltage VS of the synchronous rectifier tube drops rapidly from a positive voltage.
  • the waveform of the drain voltage VS and the waveform of the RS trigger output signal SW are as follows Shown in Figure 7.
  • the voltage amplitude detection circuit tracks the voltage of the synchronous rectifier drain voltage VS in real time, and at the same time detects the falling speed of VS by preventing the circuit from turning on by mistake.
  • the output terminal of the detection circuit S1 outputs a high level signal, and the output terminal of the prevention circuit S2 also outputs a high level signal.
  • the other opening control circuits and the maximum frequency limit circuit output high level signals at the same time, and the first logic "AND" circuit outputs
  • the trigger signal is sent to the RS trigger, the RS trigger outputs the SW signal to the drive circuit, and the drive circuit outputs the GATE signal to turn on the synchronous rectifier.
  • the RS trigger will not be triggered and the synchronous rectifier cannot be turned on.
  • the schematic diagram of the circuit for preventing accidental turn-on is shown in Figure 4, including a first resistor, a first capacitor and a Schmitt trigger.
  • One end of the first resistor is connected to the power circuit, and the other end of the first resistor is connected to the positive and
  • the input terminal of the Schmitt trigger is connected, and the negative pole of the first capacitor is connected to the drain of the synchronous rectifier.
  • the switching voltage v1 of the Schmitt trigger is less than one-fourth of the power supply voltage, and the switching voltage v2 is greater than one-fourth of the power supply voltage.
  • the pulse signal is reshaped by the Schmitt trigger, which can effectively prevent the synchronous rectifier from turning on by mistake.
  • the drain-source voltage VS waveform of the synchronous rectifier tube and the RS trigger output signal SW waveform are shown in Figure 10. Due to the low operating frequency of the switching power supply in light load or no-load mode, it will cause the energy of the primary side coil to be reversed, so that the drain-source voltage VS of the secondary side synchronous rectifier tube will slow down and affect the circuit to prevent false start Judgment. At this time, the leakage prevention circuit works. It is forced to output a high level after waiting for a certain period of time at the falling edge of the SW signal in the previous cycle.
  • the logic "AND" circuit outputs a trigger signal To the RS trigger, the RS trigger outputs the SW signal to the driving circuit, and the driving circuit outputs the GATE signal to turn on the synchronous rectifier.
  • the schematic diagram of the leakage prevention circuit is shown in Figure 5.
  • the switch K1 When the RS trigger output signal SW outputs a high level, the switch K1 is closed, and the capacitor C1 quickly discharges.
  • the switch K1 When the SW outputs a low level, the switch K1 is opened, and the capacitor C1 passes through the constant current source.
  • the SW signal is still low after Td_eff time, the voltage on the second capacitor C2 is greater than the reference voltage VREF, and the second comparator output terminal S3 outputs a high level signal.
  • the turn-off threshold compensation circuit is shown in Figure 6, and the relationship between the voltage VC and GATE can be obtained:
  • the utility model can ensure the accurate switching of the synchronous rectifier in the heavy-load mode, light-load or no-load mode, avoid the erroneous opening and leakage opening of the synchronous rectifier, and realize the high-efficiency conversion of the flyback switching power supply , Improve the safety and reliability of the system.

Abstract

The present invention relates to a synchronous rectification control circuit based on a flyback switching power supply. The synchronous rectification control circuit comprises a power supply circuit, a maximum frequency limiting circuit, a voltage amplitude detection circuit, a mistaken turn-on prevention circuit, a missing turn-on prevention circuit, a turn-off threshold compensation circuit, a logical circuit, a driving circuit and other control circuits, wherein input ends of the voltage amplitude detection circuit, the mistaken turn-on prevention circuit, the turn-off threshold compensation circuit and the driving circuit are all connected to a drain electrode of a synchronous rectification tube, and input ends of the missing turn-on prevention circuit and the maximum frequency limiting circuit are connected to an output end of the logical circuit. The present invention can ensure the precise turn-on and turn-off of a synchronous rectification tube in a heavy-load mode and a light-load mode, so that the mistaken turn-on and missing turn-on of the synchronous rectification tube are prevented, the high-efficiency conversion of a switching power supply is realized, and the safety and reliability of a system are improved.

Description

同步整流控制电路Synchronous rectification control circuit 技术领域Technical field
本实用新型涉及一种同步整流控制电路,用于控制反激式开关电源,属于整流电路领域。The utility model relates to a synchronous rectification control circuit, which is used for controlling a flyback switching power supply and belongs to the field of rectification circuits.
背景技术Background technique
低压大电流电源系统的需求不断增加,反激式开关电源由于其高效的控制与精准的输出,被广泛应用于该电源系统中。然而,若继续在输出端采用二极管整流,如图1所示,在副边线圈导通的时间内,二极管产生的能量损耗占副边线圈总能量的比值为:The demand for low-voltage and high-current power supply systems continues to increase. Because of its efficient control and precise output, flyback switching power supplies are widely used in this power supply system. However, if you continue to use diode rectification at the output, as shown in Figure 1, during the time that the secondary coil is turned on, the ratio of the energy loss generated by the diode to the total energy of the secondary coil is:
Figure PCTCN2019078497-appb-000001
Figure PCTCN2019078497-appb-000001
其中Tons为副边二极管导通的时间,由于二极管压降较高,其产生的能量损耗会大大降低反激式开关电源的转换效率。采用低导通电阻的MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor,金属-氧化物-半导体场效应晶体管)替代整流二极管则可以较好解决上述问题,如图2所示,其导通压降可降至0.1V以下。然而,MOS管为栅极控制器件,需配合同步整流控制电路才能满足工作需求,因此同步整流控制电路能否精确控制同步整流管直接决定着开关电源的优劣。Among them, Tons is the turn-on time of the secondary diode. Due to the high voltage drop of the diode, the energy loss generated by it will greatly reduce the conversion efficiency of the flyback switching power supply. Using low on-resistance MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) to replace the rectifier diode can better solve the above problems, as shown in Figure 2, its on-state voltage drop Can be reduced to below 0.1V. However, the MOS tube is a gate control device and needs to be matched with a synchronous rectification control circuit to meet working requirements. Therefore, whether the synchronous rectification control circuit can accurately control the synchronous rectifier tube directly determines the advantages and disadvantages of the switching power supply.
同步整流控制电路可根据漏源电压或漏极电流来决定同步整流管的开关,当原边MOS管Q1关闭,副边同步整流控制电路检测到同步整流管漏源电压VS降低或出现从源极流向漏极的电流,同时检测出VS电压下降斜率满足要求时,输出开启同步整流管Q2的GATE驱动信号;当同步整流控制电路检测到同步整流管漏源电压VS或从源极流向漏极的电流均趋近于0时,输出关闭同步整流管Q2的GATE信号。而在实际操作时,尽管VS电压斜率检测可避免电压谐振带来的同步整流管误开启,但在轻载、空载模式或其他情况下,同步整流管漏源电压VS在下降时会出现波形斜率突变的情况,从而影响系统的反应时间与检测结果,同步整流管极易出现漏开启的情况,系统的连贯性与稳定性受到影响。对 于关断同步整流管的控制尽管也是通过探测漏源电压来完成的,但随着同步整流管栅极电压的改变,其关断的难易程度也会改变,如当栅极电压减小,同步整流管的关断会变得更容易,所需关断时间也会减小,从而带来提前关断的现象;当栅极电压增大,同步整流管的关断会变得更难,所需关断时间也会增加,从而带来延迟关断的现象。同步整流管延迟关断容易造成反激式开关电源的原边与副边线圈的“共通”现象,带来电路的损伤,同降低电路的安全性;而提前关断容易造成电源转换效率的降低。The synchronous rectifier control circuit can determine the switch of the synchronous rectifier according to the drain-source voltage or drain current. When the primary side MOS transistor Q1 is turned off, the secondary side synchronous rectifier control circuit detects that the synchronous rectifier drain-source voltage VS decreases or appears from the source. When the current flowing to the drain is detected and the VS voltage falling slope meets the requirements, the GATE drive signal to turn on the synchronous rectifier Q2 is output; when the synchronous rectification control circuit detects the synchronous rectifier drain-source voltage VS or the voltage flowing from the source to the drain When the currents all approach 0, the GATE signal that turns off the synchronous rectifier Q2 is output. In actual operation, although the VS voltage slope detection can prevent the synchronous rectifier from turning on by mistake caused by the voltage resonance, in light load, no-load mode or other situations, the synchronous rectifier drain-source voltage VS will have a waveform when it drops. The sudden change of slope affects the response time of the system and the detection result. The synchronous rectifier is very prone to leak open, and the continuity and stability of the system are affected. Although the control for turning off the synchronous rectifier is also accomplished by detecting the drain-source voltage, as the gate voltage of the synchronous rectifier changes, the difficulty of turning off will also change. For example, when the gate voltage decreases, The turn-off of the synchronous rectifier will become easier, and the required turn-off time will be reduced, which will lead to the phenomenon of early turn-off; when the gate voltage increases, the turn-off of the synchronous rectifier will become more difficult. The required turn-off time will also increase, resulting in delayed turn-off. The delayed turn-off of the synchronous rectifier tube will easily cause the “common” phenomenon between the primary and secondary coils of the flyback switching power supply, which will damage the circuit and reduce the safety of the circuit; and the early turn-off will easily reduce the power conversion efficiency. .
实用新型内容Utility model content
本实用新型的目的在于提供一种能保证在重载模式与轻载或空载模式下同步整流管的精确开关,避免了同步整流管的误开启与漏开启的同步整流控制电路。The purpose of the utility model is to provide a synchronous rectifier control circuit that can ensure the precise switching of the synchronous rectifier in the heavy load mode and the light load or no-load mode, and avoids the wrong turn-on and leakage turn-on of the synchronous rectifier tube.
为达到上述目的,本实用新型提供如下技术方案:一种同步整流控制电路包括电源电路、最大频率限制电路、电压幅值检测电路、防止误开启电路、防止漏开启电路、关断阈值补偿电路、逻辑电路、驱动电路及其他控制电路,所述电源电路与反激式开关电源的输出端连接,用以产生电路工作的电压和参考电压,电压幅值检测电路、防止误开启电路、关断阈值补偿电路与驱动电路的输入端均与同步整流管的漏极连接,关断阈值补偿电路的输入端还与同步整流管的栅极连接,防止漏开启电路和最大频率限制电路的输入端与逻辑电路的输出端连接,防止漏开启电路的输入端还与电压幅值检测电路的输出端连接,最大频率限制电路、电压幅值检测电路、防止误开启电路、防止漏开启电路、关断阈值补偿电路与其他控制电路的输出端均连接在逻辑电路的输入端,所述逻辑电路输出控制信号作为驱动电路的输入,所述驱动电路的输出端连接同步整流管的栅极以控制其开关。In order to achieve the above objectives, the present invention provides the following technical solutions: a synchronous rectification control circuit includes a power supply circuit, a maximum frequency limit circuit, a voltage amplitude detection circuit, a circuit for preventing false opening, a circuit for preventing leakage, a circuit for shutting off threshold compensation, Logic circuit, drive circuit and other control circuits. The power supply circuit is connected to the output terminal of the flyback switching power supply to generate the voltage and reference voltage for circuit operation, the voltage amplitude detection circuit, the circuit for preventing false opening, and the shutdown threshold The input terminals of the compensation circuit and the drive circuit are connected to the drain of the synchronous rectifier, and the input terminal of the turn-off threshold compensation circuit is also connected to the gate of the synchronous rectifier to prevent the leakage of the open circuit and the input terminal of the maximum frequency limit circuit with logic The output terminal of the circuit is connected, the input terminal of the leakage prevention circuit is also connected with the output terminal of the voltage amplitude detection circuit, the maximum frequency limit circuit, the voltage amplitude detection circuit, the false opening prevention circuit, the leakage prevention circuit, and the shutdown threshold compensation The output terminals of the circuit and other control circuits are connected to the input terminal of the logic circuit, the logic circuit outputs a control signal as the input of the drive circuit, and the output terminal of the drive circuit is connected to the gate of the synchronous rectifier to control its switching.
进一步地,所述逻辑电路包括第一逻辑“或门”电路、第一逻辑“与门”电路、第二逻辑“与门”电路和RS触发器电路,所述第一逻辑“或门”电路的输入端分别与所述防止误开启电路和所述防止漏开启电路的输出端连接,所述第一逻辑“与门”电路的输入端分别与所述最大频率限制电路、所述电压幅值 检测电路、所述第一逻辑“或门”电路的和其他开启控制电路的输出端连接,所述第二逻辑“与门”电路的输入端分别与所述关断阈值补偿电路、其他关断控制电路的输出端连接,所述第一逻辑“与门”的输出端与所述RS触发器的置位输入端连接,所述第二逻辑“与门”的输出端与所述RS触发器复位输入端连接,所述RS触发器的输出端与所述驱动电路的输入端连接。Further, the logic circuit includes a first logic “OR” circuit, a first logic “AND” circuit, a second logic “AND” circuit, and an RS flip-flop circuit. The first logic “OR” circuit The input terminals of the first logic "AND" circuit are connected to the maximum frequency limit circuit and the voltage amplitude respectively. The output terminals of the detection circuit, the first logic “OR” circuit and other turn-on control circuits are connected, and the input terminals of the second logic “AND” circuit are respectively connected to the turn-off threshold compensation circuit and other turn-off control circuits. The output terminal of the control circuit is connected, the output terminal of the first logic AND gate is connected to the set input terminal of the RS flip-flop, and the output terminal of the second logic AND gate is connected to the RS flip-flop The reset input terminal is connected, and the output terminal of the RS flip-flop is connected to the input terminal of the driving circuit.
进一步地,所述防止误开启电路包括第一电阻、第一电容和施密特触发器,所述第一电阻的一端与电源电路连接,所述第一电阻的另一端分别与所述第一电容的正极和所述施密特触发器的输入端连接,所述第一电容的负极和所述同步整流管漏极连接。Further, the circuit for preventing accidental activation includes a first resistor, a first capacitor, and a Schmitt trigger. One end of the first resistor is connected to the power circuit, and the other end of the first resistor is connected to the first resistor. The anode of the capacitor is connected to the input terminal of the Schmitt trigger, and the cathode of the first capacitor is connected to the drain of the synchronous rectifier.
进一步地,所述防止漏开启电路包括第二逻辑“或门”电路,第一开关、第二电容、第一恒流源和第二比较器,所述逻辑“或门”电路的输入端分别与所述电压幅值检测的输出端和所述RS触发器的输出端连接,所述逻辑“或门”电路的输出端与所述第一开关的控制端连接,所述第一恒流源的输入端与所述电源电路连接,所述第一恒流源的输出端连接在第二电容的正极,所述第一恒流源用于给第二电容充电,所述第一开关用于给所述第二电容放电,所述第二电容的正极与第二比较器的同相端连接,所述第二比较器的反相端连接在所述电源电路上用于接收来自所述电源电路的第一参考电压。Further, the leakage prevention circuit includes a second logic "OR" circuit, a first switch, a second capacitor, a first constant current source and a second comparator, and the input terminals of the logic "OR" circuit are respectively Connected to the output terminal of the voltage amplitude detection and the output terminal of the RS flip-flop, the output terminal of the logical OR circuit is connected to the control terminal of the first switch, and the first constant current source The input terminal of the first constant current source is connected to the power supply circuit, the output terminal of the first constant current source is connected to the anode of the second capacitor, the first constant current source is used to charge the second capacitor, and the first switch is used to To discharge the second capacitor, the positive pole of the second capacitor is connected to the non-inverting terminal of the second comparator, and the inverting terminal of the second comparator is connected to the power circuit for receiving data from the power circuit The first reference voltage.
进一步地,所述关断阈值补偿电路包括第二电阻、第三电阻以及第二比较器,所述第二电阻的输入端连接在所述同步整流管的漏极,所述第三电阻的输入端连接在所述同步整流管的栅极,所述第二电阻的输出端与第三电阻的输出端同时连接在所述第二比较器的同相端,所述第二比较器的反相端连接在电源电路上用于接收来自所述电源电路的第二参考电压。Further, the turn-off threshold compensation circuit includes a second resistor, a third resistor, and a second comparator, the input of the second resistor is connected to the drain of the synchronous rectifier, and the input of the third resistor is The terminal is connected to the gate of the synchronous rectifier, the output terminal of the second resistor and the output terminal of the third resistor are simultaneously connected to the non-inverting terminal of the second comparator, and the inverting terminal of the second comparator It is connected to the power circuit for receiving the second reference voltage from the power circuit.
进一步地,所述驱动电路包括脉冲延时电路、逻辑“非门”电路、逻辑“异或门”电路、弱驱动电路及N型MOS管、P型MOS管,所述脉冲延时电路、逻辑“非门”电路、逻辑“异或门”电路的输入端均与所述逻辑电路的输出端连接,所述逻辑“异或门”电路的输入端还与脉冲延时电路的输出端连接,所述脉冲延时电路的输出端还与P型MOS管的栅极控制端连接,所述逻辑“非门” 电路的输出端与所述N型MOS管的栅极控制端连接,所述P型MOS管的源端与电源端连接,其漏端与所述N型MOS管的漏端连接,所述N型MOS管的源端接地,所述逻辑“异或门”电路的输出端、第三参考电压、所述同步整流管的漏极均为弱驱动电路的输入,所述弱驱动电路的输出端与所述P型MOS管、N型MOS管的漏端连接。Further, the drive circuit includes a pulse delay circuit, a logic "NOT" circuit, a logic "exclusive OR" circuit, a weak drive circuit and an N-type MOS tube and a P-type MOS tube. The pulse delay circuit, logic The input terminals of the "NOT" circuit and the logic "XOR" circuit are both connected to the output terminal of the logic circuit, and the input of the logic "XOR" circuit is also connected to the output terminal of the pulse delay circuit, The output terminal of the pulse delay circuit is also connected to the gate control terminal of the P-type MOS transistor, and the output terminal of the logic "NOT" circuit is connected to the gate control terminal of the N-type MOS transistor. The source terminal of the N-type MOS transistor is connected to the power terminal, and the drain terminal is connected to the drain terminal of the N-type MOS transistor. The source terminal of the N-type MOS transistor is grounded. The output terminal of the logic "exclusive OR" circuit is The third reference voltage and the drain of the synchronous rectifier tube are both inputs of a weak drive circuit, and the output terminal of the weak drive circuit is connected to the drain terminals of the P-type MOS tube and the N-type MOS tube.
进一步地,所述防止误开启电路采用施密特触发器作为电压比较电路以提高响应速度,所述施密特触发器的翻转电压v1小于电源电压的三分之一,翻转电压v2大于电源电压的三分之二。Further, the false turn-on prevention circuit adopts a Schmitt trigger as a voltage comparison circuit to improve response speed, the switching voltage v1 of the Schmitt trigger is less than one third of the power supply voltage, and the switching voltage v2 is greater than the power supply voltage Two-thirds of it.
进一步地,所述防止误开启电路中所述第一电阻的阻值、第一电容的容值可根据漏源电压斜率的变化而更改,由其得到的RC常数的量级应达到纳秒级别。Further, the resistance value of the first resistor and the capacitance value of the first capacitor in the circuit for preventing accidental turn-on can be changed according to the change of the drain-source voltage slope, and the magnitude of the RC constant obtained therefrom should reach the nanosecond level .
进一步地,所述防止误开启电路用于避免同步整流管在漏源电压发生振荡或出现错误电压时的误开启。Further, the false turn-on prevention circuit is used to avoid false turn-on of the synchronous rectifier tube when the drain-source voltage oscillates or a false voltage occurs.
进一步地,所述防止误开启电路中所述第一电阻的阻值、第一电容的容值可根据漏源电压斜率的变化而更改,其RC时间常数范围在20纳秒到2000纳秒之间。Further, the resistance value of the first resistor and the capacitance value of the first capacitor in the circuit for preventing accidental turn-on can be changed according to the change of the drain-source voltage slope, and the RC time constant ranges from 20 nanoseconds to 2000 nanoseconds. between.
进一步地,所述防止漏开启电路可避免同步整流管在漏源电压斜率未被正确检测时的漏开启。Further, the leakage prevention circuit can prevent the synchronous rectifier from being leaked on when the slope of the drain-source voltage is not correctly detected.
进一步地,所述关断阈值补偿电路的同相端电压可实现当驱动电路输出电压较高时降低关断同步整流管所需漏极电压;当驱动电路输出电压较低时提高关断同步整流管所需漏极电压。Further, the non-inverting terminal voltage of the turn-off threshold compensation circuit can reduce the drain voltage required to turn off the synchronous rectifier when the output voltage of the drive circuit is high; when the output voltage of the drive circuit is low, increase the turn-off of the synchronous rectifier. Required drain voltage.
进一步地,所述关断阈值补偿电路可避免同步整流管的提前关断或延迟关断,从而起到保护电路的作用。Further, the turn-off threshold compensation circuit can avoid the early turn-off or delayed turn-off of the synchronous rectifier, thereby playing the role of a protection circuit.
进一步地,所述驱动电路采用强驱动电路、弱驱动电路并行对同步整流管进行控制,所述强驱动电路通过脉冲延时电路进行固定时间的开启控制,所述弱驱动电路则在剩余开启时间对同步整流管进行控制,所述脉冲延时电路的脉冲宽度典型值为500纳秒。Further, the drive circuit adopts a strong drive circuit and a weak drive circuit to control the synchronous rectifier in parallel, the strong drive circuit performs a fixed-time turn-on control through a pulse delay circuit, and the weak drive circuit performs a fixed-time turn-on control during the remaining turn-on time. The synchronous rectifier is controlled, and the pulse width of the pulse delay circuit is typically 500 nanoseconds.
进一步地,所述驱动电路中的弱驱动电路将同步整流管漏极电压与第三参考电压进行比较,并保持漏极电压低于第三参考电压,且所述驱动电压随着漏极电压的升高而降低,所述第三参考电压的典型值为-80~-60毫伏。Further, the weak drive circuit in the drive circuit compares the drain voltage of the synchronous rectifier with a third reference voltage, and keeps the drain voltage lower than the third reference voltage, and the drive voltage increases with the drain voltage As it increases and decreases, the typical value of the third reference voltage is -80 to -60 mV.
进一步地,所述最大频率限制电路限制了同步整流管开启的最小周期,在该周期内同步整流管不允许开启第二次。Further, the maximum frequency limit circuit limits the minimum period during which the synchronous rectifier tube is turned on, during which the synchronous rectifier tube is not allowed to be turned on for the second time.
进一步地,所述最大频率限制电路能够保证电路在正常频率下工作,而不受干扰信号的影响。Further, the maximum frequency limit circuit can ensure that the circuit operates at a normal frequency without being affected by interference signals.
本实用新型的有益效果在于:本实用新型能保证在重载模式、轻载或空载模式下同步整流管的精确开关,避免了同步整流管的误开启与漏开启,实现了反激式开关电源的高效率转换,提高系统的安全性、可靠性。The beneficial effect of the utility model is that the utility model can ensure the accurate switching of the synchronous rectifier in the heavy load mode, light load or no-load mode, avoids the wrong opening and leakage opening of the synchronous rectifier tube, and realizes the flyback switch High-efficiency conversion of the power supply improves the safety and reliability of the system.
上述说明仅是本实用新型技术方案的概述,为了能够更清楚了解本实用新型的技术手段,并可依照说明书的内容予以实施,以下以本实用新型的较佳实施例并配合附图详细说明如后。The above description is only an overview of the technical solution of the present invention. In order to have a clearer understanding of the technical means of the present invention and can be implemented in accordance with the content of the specification, the following is a detailed description of the preferred embodiments of the present invention with accompanying drawings. Rear.
附图说明Description of the drawings
图1是利用二极管的电源电路示意图。Figure 1 is a schematic diagram of a power supply circuit using diodes.
图2是利用MOS管的电源电路示意图。Figure 2 is a schematic diagram of a power circuit using a MOS tube.
图3是本实用新型同步整流控制电路整体结构示意图。Figure 3 is a schematic diagram of the overall structure of the synchronous rectification control circuit of the present invention.
图4是防止误开启电路具体结构示意图。Figure 4 is a schematic diagram of the specific structure of the circuit for preventing false opening.
图5是防止漏开启电路具体结构示意图。Figure 5 is a schematic diagram of the specific structure of the leakage prevention circuit.
图6是关断阈值补偿电路具体结构示意图。Figure 6 is a schematic diagram of the specific structure of the turn-off threshold compensation circuit.
图7是驱动电路具体结构示意图Figure 7 is a schematic diagram of the specific structure of the drive circuit
图8是驱动电路内部相关信号波形示意图Figure 8 is a schematic diagram of relevant signal waveforms in the drive circuit
图9是反激式开关电源非轻载时相关信号的波形示意图。Figure 9 is a schematic diagram of the relevant signal waveforms when the flyback switching power supply is not light-loaded.
图10是反激式开关电源轻载时相关信号的波形示意图。Figure 10 is a schematic diagram of the relevant signal waveforms of the flyback switching power supply at light load.
具体实施方式detailed description
下面结合附图和实施例,对本实用新型的具体实施方式作进一步详细描述。以下实施例用于说明本实用新型,但不用来限制本实用新型的范围。The specific implementation of the present invention will be described in further detail below in conjunction with the drawings and embodiments. The following embodiments are used to illustrate the utility model, but not to limit the scope of the utility model.
参照图3,在本实用新型一较佳实施例中的一种同步整流控制电路包括电源电路、最大频率限制电路、电压幅值检测电路、防止误开启电路、防止漏开启电路、关断阈值补偿电路、逻辑电路、驱动电路及其他控制电路,所述电源电路与反激式开关电源的输出端连接,用以产生电路工作的电压和参考电压,电压幅值检测电路、防止误开启电路、关断阈值补偿电路与驱动电路的输入端均与同步整流管的漏极连接,关断阈值补偿电路的输入端还与同步整流管的栅极连接,防止漏开启电路和最大频率限制电路的输入端与逻辑电路的输出端连接,防止漏开启电路的输入端还与电压幅值检测电路的输出端连接,最大频率限制电路、电压幅值检测电路、防止误开启电路、防止漏开启电路、关断阈值补偿电路与其他控制电路的输出端均连接在逻辑电路的输入端,所述逻辑电路输出控制信号作为驱动电路的输入,所述驱动电路的输出端连接同步整流管的栅极以控制其开关。3, a synchronous rectification control circuit in a preferred embodiment of the present utility model includes a power supply circuit, a maximum frequency limit circuit, a voltage amplitude detection circuit, a false turn-on prevention circuit, a leakage turn-on prevention circuit, and turn-off threshold compensation Circuits, logic circuits, driving circuits and other control circuits. The power supply circuit is connected to the output end of the flyback switching power supply to generate the working voltage and reference voltage of the circuit, the voltage amplitude detection circuit, the circuit to prevent accidental opening, and the shutdown The input terminals of the off-threshold compensation circuit and the drive circuit are connected to the drain of the synchronous rectifier, and the input terminal of the off-threshold compensation circuit is also connected to the gate of the synchronous rectifier to prevent leakage of the input terminal of the circuit and the maximum frequency limit circuit Connected to the output terminal of the logic circuit, the input terminal of the leakage prevention circuit is also connected to the output terminal of the voltage amplitude detection circuit, the maximum frequency limit circuit, the voltage amplitude detection circuit, the false opening prevention circuit, the leakage prevention circuit, and the shutdown The output terminals of the threshold compensation circuit and other control circuits are connected to the input terminal of the logic circuit, the logic circuit outputs a control signal as the input of the drive circuit, and the output terminal of the drive circuit is connected to the gate of the synchronous rectifier to control its switching .
在上述实施例中,参考图7,逻辑电路包括第一逻辑“或门”电路、第一逻辑“与门”电路、第二逻辑“与门”电路和RS触发器电路,第一逻辑“或门”电路的输入端分别与防止误开启电路和防止漏开启电路的输出端连接,第一逻辑“与门”电路的输入端分别与最大频率限制电路、电压幅值检测电路、第一逻辑“或门”电路的和其他开启控制电路的输出端连接,第二逻辑“与门”电路的输入端分别与关断阈值补偿电路、其他关断控制电路的输出端连接,第一逻辑“与门”的输出端与RS触发器的置位输入端连接,第二逻辑“与门”的输出端与RS触发器复位输入端连接,RS触发器的输出端与驱动电路的输入端连接。In the above embodiment, referring to FIG. 7, the logic circuit includes a first logic "OR" circuit, a first logic "AND" circuit, a second logic "AND" circuit and an RS flip-flop circuit, the first logic "OR" circuit The input terminals of the “gate” circuit are respectively connected to the output terminals of the circuit for preventing false opening and the circuit for preventing leakage from opening. The input terminals of the first logic “AND” circuit are connected to the maximum frequency limit circuit, the voltage amplitude detection circuit, and the first logic “ The output terminals of the “OR gate” circuit are connected to the output terminals of other turn-on control circuits. The input terminals of the second logic “AND gate” circuit are respectively connected to the output terminals of the turn-off threshold compensation circuit and other turn-off control circuits. The first logic “AND gate” The output terminal of "" is connected with the set input terminal of the RS flip-flop, the output terminal of the second logic AND gate is connected with the reset input terminal of the RS flip-flop, and the output terminal of the RS flip-flop is connected with the input terminal of the drive circuit.
在上述实施例中,防止误开启电路防止误开启电路用于避免同步整流管在漏源电压发生振荡或出现错误电压时的误开启,它包括第一电阻、第一电容和施密特触发器,第一电阻的一端与电源电路连接,第一电阻的另一端分别与第一电容的正极和施密特触发器的输入端连接,第一电容的负极和同步整流管漏极连接。防止误开启电路采用施密特触发器作为电压比较电路以提高响应速度,施密特触发器的翻转电压v1小于电源电压的三分之一,翻转电压v2大于电源电压的三分之二,防止误开启电路中第一电阻的阻值、第一电容的容值可根据漏 源电压斜率的变化而更改,其RC时间常数范围在20纳秒到2000纳秒之间,在实际应用过程中典型值为200纳秒。In the above-mentioned embodiment, the false turn-on prevention circuit prevents false turn-on of the synchronous rectifier tube when the drain-source voltage oscillates or a false voltage occurs. It includes a first resistor, a first capacitor and a Schmitt trigger. One end of the first resistor is connected to the power supply circuit, the other end of the first resistor is respectively connected to the positive electrode of the first capacitor and the input end of the Schmitt trigger, and the negative electrode of the first capacitor is connected to the drain of the synchronous rectifier. To prevent the circuit from turning on by mistake, the Schmitt trigger is used as the voltage comparison circuit to improve the response speed. The switching voltage v1 of the Schmitt trigger is less than one-third of the power supply voltage, and the switching voltage v2 is greater than two-thirds of the power supply voltage to prevent The resistance value of the first resistor and the capacitance value of the first capacitor in the wrong turn-on circuit can be changed according to the change of the drain-source voltage slope. The RC time constant ranges from 20 nanoseconds to 2000 nanoseconds, which is typical in practical applications. The value is 200 nanoseconds.
在上述实施例中,防止漏开启电路包括第二逻辑“或门”电路,第一开关、第二电容、第一恒流源和第二比较器,逻辑“或门”电路的输入端分别与电压幅值检测的输出端和RS触发器的输出端连接,逻辑“或门”电路的输出端与第一开关的控制端连接,第一恒流源的输入端与电源电路连接,第一恒流源的输出端连接在第二电容的正极,第一恒流源用于给第二电容充电,第一开关用于给第二电容放电,第二电容的正极与第二比较器的同相端连接,第二比较器的反相端连接在电源电路上用于接收来自电源电路的第一参考电压,防止漏开启电路能够实现在同步整流管关闭时对第二电容充电,且当漏源电压低于0V时重新开始充电,充电电压到达第一参考电压的时间典型值为5微秒,防止漏开启电路可避免同步整流管在漏源电压斜率未被正确检测时的漏开启。In the above embodiment, the leakage prevention circuit includes a second logic "OR" circuit, a first switch, a second capacitor, a first constant current source and a second comparator, and the input terminals of the logic "OR" circuit are connected to The output terminal of the voltage amplitude detection is connected to the output terminal of the RS flip-flop, the output terminal of the logic "OR" circuit is connected to the control terminal of the first switch, the input terminal of the first constant current source is connected to the power circuit, and the first constant current source is connected to the power supply circuit. The output terminal of the current source is connected to the positive terminal of the second capacitor. The first constant current source is used to charge the second capacitor, the first switch is used to discharge the second capacitor, and the positive terminal of the second capacitor is in phase with the second comparator. Connected, the inverting terminal of the second comparator is connected to the power supply circuit for receiving the first reference voltage from the power supply circuit, the leakage prevention circuit can charge the second capacitor when the synchronous rectifier is turned off, and when the drain-source voltage When the voltage is lower than 0V, the charging is restarted, and the typical time for the charging voltage to reach the first reference voltage is 5 microseconds. The leakage prevention circuit can avoid the leakage opening of the synchronous rectifier when the drain-source voltage slope is not correctly detected.
在上述实施例中,关断阈值补偿电路包括第二电阻、第三电阻以及第二比较器,第二电阻的输入端连接在同步整流管的漏极,第三电阻的输入端连接在同步整流管的栅极,第二电阻的输出端与第三电阻的输出端同时连接在第二比较器的同相端,第二比较器的反相端连接在电源电路上用于接收来自电源电路的第二参考电压。In the above embodiment, the turn-off threshold compensation circuit includes a second resistor, a third resistor, and a second comparator. The input of the second resistor is connected to the drain of the synchronous rectifier, and the input of the third resistor is connected to the synchronous rectifier. The gate of the tube, the output terminal of the second resistor and the output terminal of the third resistor are simultaneously connected to the non-inverting terminal of the second comparator, and the inverting terminal of the second comparator is connected to the power supply circuit for receiving the first output from the power supply circuit. 2. Reference voltage.
在上述实施例中,驱动电路包括脉冲延时电路、逻辑“非门”电路、逻辑“异或门”电路、弱驱动电路及N型MOS管、P型MOS管,脉冲延时电路、逻辑“非门”电路、逻辑“异或门”电路的输入端均与逻辑电路的输出端连接,逻辑“异或门”电路的输入端还与脉冲延时电路的输出端连接,脉冲延时电路的输出端还与P型MOS管的栅极控制端连接,逻辑“非门”电路的输出端与N型MOS管的栅极控制端连接,P型MOS管的源端与电源端连接,其漏端与N型MOS管的漏端连接,N型MOS管的源端接地,逻辑“异或门”电路的输出端、第三参考电压、同步整流管的漏极均为弱驱动电路的输入,弱驱动电路的输出端与P型MOS管、N型MOS管的漏端连接。In the above embodiment, the drive circuit includes a pulse delay circuit, a logic "NOT" circuit, a logic "exclusive OR" circuit, a weak drive circuit and an N-type MOS tube, a P-type MOS tube, a pulse delay circuit, and a logic" The input terminals of the NOT circuit and the logic XOR circuit are connected to the output terminal of the logic circuit, and the input terminal of the logic XOR circuit is also connected to the output terminal of the pulse delay circuit. The output terminal is also connected with the gate control terminal of the P-type MOS tube, the output terminal of the logic "NOT" circuit is connected with the gate control terminal of the N-type MOS tube, the source terminal of the P-type MOS tube is connected with the power terminal, and its drain The terminal is connected to the drain terminal of the N-type MOS tube, and the source terminal of the N-type MOS tube is grounded. The output terminal of the logic "exclusive OR" circuit, the third reference voltage, and the drain of the synchronous rectifier tube are all inputs of the weak drive circuit. The output terminal of the weak drive circuit is connected to the drain terminal of the P-type MOS tube and the N-type MOS tube.
在上述实施例中,关断阈值补偿电路的同相端电压可实现当驱动电路输出电压较高时降低关断同步整流管所需漏极电压;当驱动电路输出电压较低时提高关断同步整流管所需漏极电压。关断阈值补偿电路可避免同步整流管的提前关断或延迟关断,从而起到保护电路的作用。In the above embodiment, the non-inverting terminal voltage of the turn-off threshold compensation circuit can reduce the drain voltage required to turn off the synchronous rectifier when the output voltage of the drive circuit is high; when the output voltage of the drive circuit is low, increase the turn-off of the synchronous rectifier The required drain voltage of the tube. The turn-off threshold compensation circuit can avoid the early or delayed turn-off of the synchronous rectifier, thereby playing the role of a protection circuit.
在上述实施例中,驱动电路采用强驱动电路、弱驱动电路对同步整流管进行控制,强驱动电路通过脉冲延时电路进行固定时间的开启控制,弱驱动电路则在剩余开启时间对同步整流管进行控制,所述脉冲延时电路的脉冲宽度典型值为500纳秒。驱动电路中的弱驱动电路将同步整流管漏极电压与第三参考电压进行比较,并保持漏极电压低于第三参考电压,且所述驱动电压随着漏极电压的升高而降低,所述第三参考电压的典型值为-80~-60毫伏。In the above embodiment, the driving circuit adopts a strong driving circuit and a weak driving circuit to control the synchronous rectifier, the strong driving circuit performs a fixed time turn-on control through the pulse delay circuit, and the weak driving circuit controls the synchronous rectifier during the remaining turn-on time. For control, the pulse width of the pulse delay circuit is typically 500 nanoseconds. The weak drive circuit in the drive circuit compares the drain voltage of the synchronous rectifier with the third reference voltage, and keeps the drain voltage lower than the third reference voltage, and the drive voltage decreases as the drain voltage increases, The typical value of the third reference voltage is -80 to -60 millivolts.
在上述实施例中,最大频率限制电路限制了同步整流管开启的最小周期,在该周期内同步整流管不允许开启第二次。最大频率限制电路能够保证电路在正常频率下工作,而不受干扰信号的影响。In the above-mentioned embodiment, the maximum frequency limit circuit limits the minimum period during which the synchronous rectifier is turned on, during which the synchronous rectifier is not allowed to be turned on a second time. The maximum frequency limit circuit can ensure that the circuit works at a normal frequency without being affected by interference signals.
在具体工作过程中,如图3所示,当一侧开关管关闭后,同步整流管的漏极电压VS从正电压开始迅速下降,漏极电压VS波形及RS触发器输出信号SW的波形如图7所示。此时,电压幅值检测电路实时跟踪同步整流管漏极电压VS的电压,同时通过防止误开启电路检测VS的下降速度,当VS电压下降速度较快且VS电压低于0V时,电压幅值检测电路S1输出端输出高电平信号,防止误开启电路S2输出端也输出高电平信号,其它开启控制电路和最大频率限制电路同时输出高电平信号,第一逻辑“与门”电路输出触发信号至RS触发器,RS触发器输出SW信号到驱动电路,驱动电路输出GATE信号以开启同步整流管。当其它开启控制电路未发出高电平信号或最大频率限制电路检测到频率超过设定频率时,RS触发器不会被触发,同步整流管无法被开启。In the specific working process, as shown in Figure 3, when one side of the switch tube is turned off, the drain voltage VS of the synchronous rectifier tube drops rapidly from a positive voltage. The waveform of the drain voltage VS and the waveform of the RS trigger output signal SW are as follows Shown in Figure 7. At this time, the voltage amplitude detection circuit tracks the voltage of the synchronous rectifier drain voltage VS in real time, and at the same time detects the falling speed of VS by preventing the circuit from turning on by mistake. The output terminal of the detection circuit S1 outputs a high level signal, and the output terminal of the prevention circuit S2 also outputs a high level signal. The other opening control circuits and the maximum frequency limit circuit output high level signals at the same time, and the first logic "AND" circuit outputs The trigger signal is sent to the RS trigger, the RS trigger outputs the SW signal to the drive circuit, and the drive circuit outputs the GATE signal to turn on the synchronous rectifier. When other turn-on control circuits do not send out a high level signal or the maximum frequency limit circuit detects that the frequency exceeds the set frequency, the RS trigger will not be triggered and the synchronous rectifier cannot be turned on.
防止误开启电路示意图如图4所示,包括第一电阻、第一电容和施密特触发器,第一电阻的一端与电源电路连接,第一电阻的另一端分别与第一电容的正极和施密特触发器的输入端连接,第一电容的负极和同步整流管漏极连接,施密特触发器的翻转电压v1小于电源电压的四分之一,翻转电压v2大于电源电 压的四分之三,通过斯密特触发器对脉冲信号进行整形,可以有效防止同步整流管的误开启。The schematic diagram of the circuit for preventing accidental turn-on is shown in Figure 4, including a first resistor, a first capacitor and a Schmitt trigger. One end of the first resistor is connected to the power circuit, and the other end of the first resistor is connected to the positive and The input terminal of the Schmitt trigger is connected, and the negative pole of the first capacitor is connected to the drain of the synchronous rectifier. The switching voltage v1 of the Schmitt trigger is less than one-fourth of the power supply voltage, and the switching voltage v2 is greater than one-fourth of the power supply voltage. Third, the pulse signal is reshaped by the Schmitt trigger, which can effectively prevent the synchronous rectifier from turning on by mistake.
当开关电源工作在轻载或空载模式时,同步整流管的漏源电压VS波形及RS触发器输出信号SW波形如图10所示。由于轻载或空载模式下,开关电源工作频率较低,会导致一次侧线圈能量倒充的情况,从而使二次侧同步整流管的漏源电压VS下降速度变缓,影响防止误启动电路的判断。此时,防止漏开启电路起作用,其在前一周期SW信号下降沿开始等待一定时间后强制输出高电平,若VS电压幅值同时满足低于0V,逻辑“与门”电路输出触发信号至RS触发器,RS触发器输出SW信号到驱动电路,驱动电路输出GATE信号以开启同步整流管。防止漏开启电路示意图如图5所示,当RS触发器输出信号SW输出高电平,开关K1闭合,电容C1快速放电,当SW输出低电平,开关K1断开,电容C1经恒流源充电,若经Td_eff时间SW信号依旧为低电平,第二电容C2上的电压大于参考电压VREF,第二比较器输出端S3输出高电平信号。When the switching power supply works in light load or no-load mode, the drain-source voltage VS waveform of the synchronous rectifier tube and the RS trigger output signal SW waveform are shown in Figure 10. Due to the low operating frequency of the switching power supply in light load or no-load mode, it will cause the energy of the primary side coil to be reversed, so that the drain-source voltage VS of the secondary side synchronous rectifier tube will slow down and affect the circuit to prevent false start Judgment. At this time, the leakage prevention circuit works. It is forced to output a high level after waiting for a certain period of time at the falling edge of the SW signal in the previous cycle. If the VS voltage amplitude is also lower than 0V, the logic "AND" circuit outputs a trigger signal To the RS trigger, the RS trigger outputs the SW signal to the driving circuit, and the driving circuit outputs the GATE signal to turn on the synchronous rectifier. The schematic diagram of the leakage prevention circuit is shown in Figure 5. When the RS trigger output signal SW outputs a high level, the switch K1 is closed, and the capacitor C1 quickly discharges. When the SW outputs a low level, the switch K1 is opened, and the capacitor C1 passes through the constant current source. When charging, if the SW signal is still low after Td_eff time, the voltage on the second capacitor C2 is greater than the reference voltage VREF, and the second comparator output terminal S3 outputs a high level signal.
关断阈值补偿电路如图6所示,可求得电压VC与GATE的关系式:The turn-off threshold compensation circuit is shown in Figure 6, and the relationship between the voltage VC and GATE can be obtained:
Figure PCTCN2019078497-appb-000002
Figure PCTCN2019078497-appb-000002
当VC=VREF时比较器发生反转,当栅极电压GATE降低时,则需要更高的漏源电压VS比较器才能翻转,从而补偿了栅极电压GATE降低导致同步整流管提前关断的现象。同理,当栅极电压GATE升高时,则需要更低的漏源电压VS比较器就能翻转,从而补偿了栅极电压GATE升高导致同步整流管延时关断的现象。当比较器输出低电平脉冲,逻辑电路中的RS触发器复位,同步整流管关断,其波形如图8、图9所示。When VC=VREF, the comparator is inverted. When the gate voltage GATE decreases, a higher drain-source voltage VS comparator is needed to invert, thereby compensating for the phenomenon that the synchronous rectifier turns off early due to the decrease of the gate voltage GATE . In the same way, when the gate voltage GATE rises, a lower drain-source voltage VS comparator is needed to flip, thereby compensating for the phenomenon that the gate voltage GATE rises causing the synchronous rectifier to be turned off. When the comparator outputs a low-level pulse, the RS flip-flop in the logic circuit is reset, and the synchronous rectifier is turned off. The waveforms are shown in Figures 8 and 9.
综上,本实用新型能保证在重载模式、轻载或空载模式下同步整流管的精确开关,避免了同步整流管的误开启与漏开启,实现了反激式开关电源的高效率转换,提高系统的安全性、可靠性。In summary, the utility model can ensure the accurate switching of the synchronous rectifier in the heavy-load mode, light-load or no-load mode, avoid the erroneous opening and leakage opening of the synchronous rectifier, and realize the high-efficiency conversion of the flyback switching power supply , Improve the safety and reliability of the system.
以上所述实施例仅表达了本实用新型的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对实用新型专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本实用新型构思的前提下,还可以做 出若干变形和改进,这些都属于本实用新型的保护范围。因此,本实用新型专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only express several implementations of the utility model, and the description is relatively specific and detailed, but it should not be understood as a limitation on the scope of the utility model patent. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the utility model, several modifications and improvements can be made, and these all fall within the protection scope of the utility model. Therefore, the protection scope of the utility model patent shall be subject to the appended claims.

Claims (17)

  1. 一种同步整流控制电路,用于控制反激式开关电源,其特征在于,所述同步整流控制电路包括电源电路、最大频率限制电路、电压幅值检测电路、防止误开启电路、防止漏开启电路、关断阈值补偿电路、逻辑电路、驱动电路及其他控制电路,所述电源电路与反激式开关电源的输出端连接,用以产生电路工作的电压和参考电压,电压幅值检测电路、防止误开启电路、关断阈值补偿电路与驱动电路的输入端均与同步整流管的漏极连接,关断阈值补偿电路的输入端还与同步整流管的栅极连接,防止漏开启电路和最大频率限制电路的输入端与逻辑电路的输出端连接,防止漏开启电路的输入端还与电压幅值检测电路的输出端连接,最大频率限制电路、电压幅值检测电路、防止误开启电路、防止漏开启电路、关断阈值补偿电路与其他控制电路的输出端均连接在逻辑电路的输入端,所述逻辑电路输出控制信号作为驱动电路的输入,所述驱动电路的输出端连接同步整流管的栅极以控制其开关。A synchronous rectification control circuit for controlling a flyback switching power supply, characterized in that the synchronous rectification control circuit includes a power supply circuit, a maximum frequency limit circuit, a voltage amplitude detection circuit, a circuit for preventing false opening, and a circuit for preventing leakage opening , Shut-off threshold compensation circuit, logic circuit, drive circuit and other control circuits. The power supply circuit is connected to the output terminal of the flyback switching power supply to generate the working voltage and reference voltage of the circuit. The voltage amplitude detection circuit prevents The input terminals of the false turn-on circuit, turn-off threshold compensation circuit and the drive circuit are all connected to the drain of the synchronous rectifier, and the input terminal of the turn-off threshold compensation circuit is also connected to the gate of the synchronous rectifier to prevent leakage of the turn-on circuit and maximum frequency The input end of the limiting circuit is connected to the output end of the logic circuit, and the input end of the leakage prevention circuit is also connected to the output end of the voltage amplitude detection circuit. The maximum frequency limit circuit, the voltage amplitude detection circuit, the prevention of false opening circuit, and the prevention of leakage The output terminals of the turn-on circuit, turn-off threshold compensation circuit and other control circuits are all connected to the input terminal of the logic circuit, the logic circuit outputs a control signal as the input of the drive circuit, and the output terminal of the drive circuit is connected to the gate of the synchronous rectifier tube Pole to control its switch.
  2. 根据权利要求1所述的同步整流控制电路,其特征在于:所述逻辑电路包括第一逻辑“或门”电路、第一逻辑“与门”电路、第二逻辑“与门”电路和RS触发器电路,所述第一逻辑“或门”电路的输入端分别与所述防止误开启电路和所述防止漏开启电路的输出端连接,所述第一逻辑“与门”电路的输入端分别与所述最大频率限制电路、所述电压幅值检测电路、所述第一逻辑“或门”电路的和其他开启控制电路的输出端连接,所述第二逻辑“与门”电路的输入端分别与所述关断阈值补偿电路、其他关断控制电路的输出端连接,所述第一逻辑“与门”的输出端与所述RS触发器的置位输入端连接,所述第二逻辑“与门”的输出端与所述RS触发器复位输入端连接,所述RS触发器的输出端与所述驱动电路的输入端连接。The synchronous rectification control circuit according to claim 1, wherein the logic circuit comprises a first logic "OR" circuit, a first logic "AND" circuit, a second logic "AND" circuit and RS trigger The input terminals of the first logic “OR” circuit are respectively connected to the output terminals of the false opening prevention circuit and the output terminals of the leakage prevention circuit, and the input terminals of the first logic “AND” circuit are respectively connected Connected to the output terminals of the maximum frequency limit circuit, the voltage amplitude detection circuit, the first logic "OR" circuit and other turn-on control circuits, and the input terminal of the second logic "AND" circuit Are respectively connected to the output terminals of the turn-off threshold compensation circuit and other turn-off control circuits, the output terminal of the first logic AND gate is connected to the set input terminal of the RS flip-flop, and the second logic The output terminal of the AND gate is connected to the reset input terminal of the RS flip-flop, and the output terminal of the RS flip-flop is connected to the input terminal of the driving circuit.
  3. 根据权利要求1所述的同步整流控制电路,其特征在于:所述防止误开启电路包括第一电阻、第一电容和施密特触发器,所述第一电阻的一端与电源电路连接,所述第一电阻的另一端分别与所述第一电容的正极和所述施密特触发器的输入端连接,所述第一电容的负极和所述同步整流管漏极连接。The synchronous rectification control circuit according to claim 1, wherein the circuit for preventing false start comprises a first resistor, a first capacitor, and a Schmitt trigger, and one end of the first resistor is connected to the power supply circuit, so The other end of the first resistor is respectively connected to the positive electrode of the first capacitor and the input terminal of the Schmitt trigger, and the negative electrode of the first capacitor is connected to the drain of the synchronous rectifier.
  4. 根据权利要求2所述的同步整流控制电路,其特征在于:所述防止漏开启电路包括第二逻辑“或门”电路,第一开关、第二电容、第一恒流源和第二比较器,所述逻辑“或门”电路的输入端分别与所述电压幅值检测的输出端和所述RS触发器的输出端连接,所述逻辑“或门”电路的输出端与所述第一开关的控制端连接,所述第一恒流源的输入端与所述电源电路连接,所述第一恒流源的输出端连接在第二电容的正极,所述第一恒流源用于给第二电容充电,所述第一开关用于给所述第二电容放电,所述第二电容的正极与第二比较器的同相端连接,所述第二比较器的反相端连接在所述电源电路上用于接收来自所述电源电路的第一参考电压。The synchronous rectification control circuit according to claim 2, wherein the leakage prevention circuit includes a second logic "OR" circuit, a first switch, a second capacitor, a first constant current source and a second comparator , The input terminal of the logic “OR” circuit is connected to the output terminal of the voltage amplitude detection and the output terminal of the RS flip-flop, respectively, and the output terminal of the logic “OR” circuit is connected to the first The control terminal of the switch is connected, the input terminal of the first constant current source is connected to the power circuit, the output terminal of the first constant current source is connected to the positive electrode of the second capacitor, and the first constant current source is used for Charge the second capacitor, the first switch is used to discharge the second capacitor, the anode of the second capacitor is connected to the non-inverting terminal of the second comparator, and the inverting terminal of the second comparator is connected to The power circuit is used to receive the first reference voltage from the power circuit.
  5. 根据权利要求1所述的同步整流控制电路,其特征在于:所述关断阈值补偿电路包括第二电阻、第三电阻以及第二比较器,所述第二电阻的输入端连接在所述同步整流管的漏极,所述第三电阻的输入端连接在所述同步整流管的栅极,所述第二电阻的输出端与第三电阻的输出端同时连接在所述第二比较器的同相端,所述第二比较器的反相端连接在电源电路上用于接收来自所述电源电路的第二参考电压。The synchronous rectification control circuit of claim 1, wherein the turn-off threshold compensation circuit includes a second resistor, a third resistor, and a second comparator, and the input terminal of the second resistor is connected to the synchronous The drain of the rectifier, the input terminal of the third resistor is connected to the gate of the synchronous rectifier, the output terminal of the second resistor and the output terminal of the third resistor are simultaneously connected to the second comparator The non-inverting terminal, the inverting terminal of the second comparator is connected to the power circuit for receiving the second reference voltage from the power circuit.
  6. 根据权利要求1所述同步整流控制电路,其特征在于:所述驱动电路包括脉冲延时电路、逻辑“非门”电路、逻辑“异或门”电路、弱驱动电路及N型MOS管、P型MOS管,所述脉冲延时电路、逻辑“非门”电路、逻辑“异或门”电路的输入端均与所述逻辑电路的输出端连接,所述逻辑“异或门”电路的输入端还与脉冲延时电路的输出端连接,所述脉冲延时电路的输出端还与P型MOS管的栅极控制端连接,所述逻辑“非门”电路的输出端与所述N型MOS管的栅极控制端连接,所述P型MOS管的源端与电源端连接,其漏端与所述N型MOS管的漏端连接,所述N型MOS管的源端接地,所述逻辑“异或门”电路的输出端、第三参考电压、所述同步整流管的漏极均为弱驱动电路的输入,所述弱驱动电路的输出端与所述P型MOS管、N型MOS管的漏端连接。The synchronous rectification control circuit according to claim 1, wherein the drive circuit includes a pulse delay circuit, a logic "NOT" circuit, a logic "XOR" circuit, a weak drive circuit and an N-type MOS transistor, P Type MOS tube, the input terminals of the pulse delay circuit, the logic “NOT” circuit, and the logic “exclusive OR” circuit are all connected to the output of the logic circuit, and the input of the logic “exclusive OR” circuit Terminal is also connected with the output terminal of the pulse delay circuit, the output terminal of the pulse delay circuit is also connected with the gate control terminal of the P-type MOS tube, and the output terminal of the logic "NOT" circuit is connected with the N-type The gate control terminal of the MOS tube is connected, the source terminal of the P-type MOS tube is connected with the power terminal, the drain terminal is connected with the drain terminal of the N-type MOS tube, and the source terminal of the N-type MOS tube is grounded. The output terminal of the logic "exclusive OR" circuit, the third reference voltage, and the drain of the synchronous rectifier are all inputs of the weak drive circuit, and the output terminal of the weak drive circuit is connected to the P-type MOS transistor, N The drain terminal of the type MOS tube is connected.
  7. 根据权利要求3所述的同步整流控制电路,其特征在于:所述防止误开启电路采用施密特触发器作为电压比较电路以提高响应速度,所述施密特触发器的翻转电压v1小于电源电压的三分之一,翻转电压v2大于电源电压的三分之二。3. The synchronous rectification control circuit according to claim 3, characterized in that: the erroneous turn-on prevention circuit adopts a Schmitt trigger as a voltage comparison circuit to improve response speed, and the switching voltage v1 of the Schmitt trigger is less than the power supply One-third of the voltage, the flip voltage v2 is greater than two-thirds of the power supply voltage.
  8. 根据权利要求3所述的同步整流控制电路,其特征在于:所述防止误开启电路中所述第一电阻的阻值、第一电容的容值可根据漏源电压斜率的变化而更改,其RC时间常数范围在20纳秒到2000纳秒之间。3. The synchronous rectification control circuit according to claim 3, wherein the resistance value of the first resistor and the capacitance value of the first capacitor in the circuit for preventing erroneous turn-on can be changed according to the change of the drain-source voltage slope. The RC time constant ranges from 20 nanoseconds to 2000 nanoseconds.
  9. 根据权利要求3所述的同步整流控制电路,其特征在于:所述防止误开启电路用于避免同步整流管在漏源电压发生振荡或出现错误电压时的误开启。3. The synchronous rectifier control circuit according to claim 3, wherein the false turn-on prevention circuit is used to avoid false turn-on of the synchronous rectifier tube when the drain-source voltage oscillates or the wrong voltage occurs.
  10. 根据权利要求4所述的同步整流控制电路,其特征在于:所述防止漏开启电路能够实现在同步整流管关闭时对所述第二电容充电,且当漏源电压低于0V时重新开始充电,充电电压到达所述第一参考电压的时间典型值为5微秒。The synchronous rectification control circuit according to claim 4, wherein the leakage prevention circuit can charge the second capacitor when the synchronous rectifier is turned off, and restart charging when the drain-source voltage is lower than 0V The typical value of the time for the charging voltage to reach the first reference voltage is 5 microseconds.
  11. 根据权利要求4所述的同步整流控制电路,其特征在于:所述防止漏开启电路可避免同步整流管在漏源电压斜率未被正确检测时的漏开启。4. The synchronous rectification control circuit according to claim 4, wherein the leakage prevention circuit can prevent the synchronous rectifier from leaking on when the drain-source voltage slope is not correctly detected.
  12. 根据权利要求5所述的同步整流控制电路,其特征在于:所述关断阈值补偿电路的同相端电压可实现当驱动电路输出电压较高时降低关断同步整流管所需漏极电压;当驱动电路输出电压较低时提高关断同步整流管所需漏极电压。The synchronous rectifier control circuit according to claim 5, wherein the non-inverting terminal voltage of the turn-off threshold compensation circuit can reduce the drain voltage required to turn off the synchronous rectifier when the output voltage of the driving circuit is high; When the output voltage of the drive circuit is low, the drain voltage required to turn off the synchronous rectifier is increased.
  13. 根据权利要求5所述的同步整流控制电路,其特征在于:所述关断阈值补偿电路可避免同步整流管的提前关断或延迟关断,从而起到保护电路的作用。The synchronous rectifier control circuit according to claim 5, wherein the turn-off threshold compensation circuit can avoid the early turn-off or delayed turn-off of the synchronous rectifier tube, thereby playing a role of a protection circuit.
  14. 根据权利要求6所述的同步整流控制电路,其特征在于:所述驱动电路采用强驱动电路、弱驱动电路并行对同步整流管进行控制,所述强驱动电路通过脉冲延时电路进行固定时间的开启控制,所述弱驱动电路则在剩余开启时间对同步整流管进行控制,所述脉冲延时电路的脉冲宽度典型值为500纳秒。The synchronous rectifier control circuit according to claim 6, characterized in that: the drive circuit uses a strong drive circuit and a weak drive circuit to control the synchronous rectifier in parallel, and the strong drive circuit performs fixed-time control through a pulse delay circuit. Turn on control, the weak drive circuit controls the synchronous rectifier during the remaining turn-on time, and the pulse width of the pulse delay circuit is typically 500 nanoseconds.
  15. 根据权利要求6所述的同步整流控制电路,其特征在于:所述驱动电路中的弱驱动电路将同步整流管漏极电压与第三参考电压进行比较,并保持漏极电压低于第三参考电压,且所述驱动电压随着漏极电压的升高而降低,所述第三参考电压的典型值为‐80~‐60毫伏。The synchronous rectification control circuit according to claim 6, wherein the weak drive circuit in the drive circuit compares the drain voltage of the synchronous rectifier tube with a third reference voltage, and keeps the drain voltage lower than the third reference voltage. The driving voltage decreases as the drain voltage increases, and the typical value of the third reference voltage is -80-60 mV.
  16. 根据权利要求1所述同步整流控制电路,其特征在于:所述最大频率限制电路限制了同步整流管开启的最小周期,在该周期内同步整流管不允许开启第二次。The synchronous rectifier control circuit according to claim 1, wherein the maximum frequency limit circuit limits the minimum period during which the synchronous rectifier is turned on, during which the synchronous rectifier is not allowed to be turned on for the second time.
  17. 根据权利要求1所述同步整流控制电路,其特征在于:所述最大频率限制电路能够保证电路在正常频率下工作,而不受干扰信号的影响。The synchronous rectification control circuit according to claim 1, wherein the maximum frequency limit circuit can ensure that the circuit operates at a normal frequency without being affected by interference signals.
PCT/CN2019/078497 2019-01-31 2019-03-18 Synchronous rectification control circuit WO2020155330A1 (en)

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