CN209167412U - A kind of over-current detection circuit - Google Patents
A kind of over-current detection circuit Download PDFInfo
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- CN209167412U CN209167412U CN201821926401.XU CN201821926401U CN209167412U CN 209167412 U CN209167412 U CN 209167412U CN 201821926401 U CN201821926401 U CN 201821926401U CN 209167412 U CN209167412 U CN 209167412U
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Abstract
The utility model discloses a kind of over-current detection circuit, belongs to protection field of circuit technology.The over-current detection circuit includes ring compensation circuit and over-current detection comparator；For the ring compensation circuit for avoiding overcurrent protection false triggering brought by the ringing voltage of power tube switching node, the over-current detection comparator generates overcurrent protection signal for comparing the operating current and current limit threshold of power switch tube.The over-current detection circuit is in dc-dc converter; especially in high-frequency dc-dc converter; it can be avoided overcurrent protection false triggering brought by the ringing voltage of power switch node; it can guarantee sampling operation electric current when power switch is really connected simultaneously, not influenced by power switch tube conducting delay and transmission delay.
Description
Technical field
The utility model relates to protect field of circuit technology, in particular to a kind of over-current detection circuit.
Background technique
In the prior art, DC-DC switch adjuster usually has some protection circuits, and one of which protection circuit is known as overcurrent
Protection, the electric current for detection stream overpower pipe；When the electric current is more than running current, over-current detection circuit generates overcurrent
Signal-off power switch tube, prevents switch adjuster from damaging.
Usual over-current detection circuit provides the current limit of Cycle by Cycle, adopts in the turn-on time section in a switch periods
Sample operating current.For example, usually connecting the conducting resistance of upper tube or with upper tube in voltage mode step-down switching-converter
Small resistance as sampling resistor, operating current is calculated by the ohmically pressure drop.But turn in high-speed switch frequency
In parallel operation, defect that this sample mode has its intrinsic.There is parasitic ringing voltage in power tube switching node (SW node), should
Ringing voltage will lead to the judgement signal that over-current detection circuit generates mistake, larger next according to overcurrent is compared threshold value setting
Such case is avoided, then current foldback circuit will can not detect destructive operating current.
Another defect is conducting delay and transmission delay from power switch tube, since the conducting of power switch tube is prolonged
When and transmission delay, need to be added the blanking time in over-current detection circuit to guarantee the sampling operation when power switch tube is really connected
Electric current.However, the conducting delay of power switch tube and transmission delay are not a stationary value, easily by the shadow of other factors
It rings, a fixed blanking time is difficult to cover all situations.
Utility model content
The purpose of this utility model is to provide a kind of over-current detection circuits, can be avoided under high-frequency dc-dc converter
Overcurrent protection false triggering brought by the ringing voltage of power tube switching node, while can guarantee that power switch tube is real
Sampling operation electric current when conducting, the conducting delay by power switch tube and transmission delay are not influenced.
In order to solve the above technical problems, the utility model provides a kind of over-current detection circuit, it to be used for high-speed switch converter
In, the over-current detection circuit includes:
Ring compensation circuit, for avoiding overcurrent protection false triggering feelings brought by the ringing voltage of power tube switching node
Condition；
Over-current detection comparator generates overcurrent protection signal for comparing the operating current and current limit threshold of power tube.
Optionally, the ring compensation circuit includes main open signal MAIN_ON, while accessing buffer buf, delay list
First delay, phase inverter inv and the first set-reset flip-floop SR1Set end；Also,
The buffer buf is connected with HDRV pin；
The output end of the delay unit delay connects or the first input end of door OR；
The output of the phase inverter inv connects the second set-reset flip-floop SR2Reset terminal；
The first set-reset flip-floop SR1Output end Q and NMOS tube N1Grid is connected, the NMOS tube N1Drain electrode and electricity
Series resistance R between the VDD of source1And R2, source electrode ground connection；The resistance R1And R2Connecting node and PMOS tube P1Grid phase
Even, the PMOS tube P1Source electrode connect ILIM pin, grounded drain；Current source I is connected between the ILIM pin and ground.
Optionally, the ring compensation circuit further includes first comparator A1, the first comparator A1Positive input terminal connect
Meet SW pin, the first comparator A1Negative input end be set to voltage V1, voltage V1Less than the voltage of the power vd D, institute
State first comparator A1Output end be connected with described or door OR the second input terminal；Described or door OR output end simultaneously with institute
State the first set-reset flip-floop SR1Reset terminal and the second set-reset flip-floop SR2Set end be connected.
Optionally, the ring compensation circuit further includes resistance RLIMWith capacitor CLIM, resistance RLIMWith capacitor CLIMAnd couple
Between the power vd D and the ILIM pin.
Optionally, the over-current detection comparator is specially the second comparator A2, the second comparator A2Negative input end
SW pin is connected, positive input terminal is connected with ILIM pin, the second comparator A2Control terminal connect the second set-reset flip-floop SR2
Output end Q, the second set-reset flip-floop SR2Output end Q output comparator enable signal, for determining that described second compares
Device A2Working time, in due course trigger over-current detection function.
Optionally, the over-current detection circuit includes off-chip circuitry, and the off-chip circuitry includes inductance LS, diode
D, capacitor COUTWith power switch tube HSNMOS；Wherein,
The inductance LSSW pin and output voltage V are connected to as energy transmissionOUTBetween；
The capacitor COUTOutput voltage V is connected to as energy-storage travelling wave tubeOUTBetween ground；
The diode D is connected between the SW pin and ground as continued flow component；
The drain terminal of the power switch tube HSNMOS is connected with supply voltage VDD, and source is connected with the SW pin, grid end
It is connected with HDRV pin；The switch of power switch tube HSNMOS is by HDRV port controlling, after power switch tube HSNMOS conducting,
Supply voltage VDD passes through inductance LSTo output voltage VOUTEnergy is transmitted, after power switch tube HSNMOS is closed, energy passes through
Diode D carries out afterflow.
Optionally, the power switch tube HSNMOS is N-type power MOSFET.
A kind of over-current detection circuit is provided in the present invention, including ring compensation circuit and over-current detection compare
Device；The ring compensation circuit is for avoiding overcurrent protection false triggering feelings brought by the ringing voltage of power tube switching node
Condition, the over-current detection comparator generate overcurrent protection signal for comparing the operating current and current limit threshold of power tube.It should
Over-current detection circuit is for especially in high-frequency dc-dc converter, can be avoided power switch node in dc-dc converter
Overcurrent protection false triggering brought by ringing voltage, while can guarantee sampling operation electricity when power switch is really connected
Stream is not influenced by power switch tube conducting delay and transmission delay.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of over-current detection circuit provided by the utility model.
Specific embodiment
Below in conjunction with the drawings and specific embodiments to the utility model proposes a kind of over-current detection circuit make further it is detailed
It describes in detail bright.According to following explanation and claims, will be become apparent from feature the advantages of the utility model.It should be noted that attached
Figure is all made of very simplified form and using non-accurate ratio, only to convenient, lucidly aid illustration is originally practical new
The purpose of type embodiment.
Embodiment one
The utility model provides a kind of over-current detection circuit, in high-speed switch converter, the over-current detection to be electric
The structure on road is as shown in Figure 1, include ring compensation circuit and over-current detection comparator；The ring compensation circuit is for avoiding function
Overcurrent protection false triggering brought by the ringing voltage of rate pipe switching node, the over-current detection comparator, for comparing
The operating current and current limit threshold of power tube generate overcurrent protection signal.
Specifically, please continue to refer to Fig. 1.The ring compensation circuit includes main open signal MAIN_ON, while being accessed slow
Rush device buf, delay unit delay, phase inverter inv and the first set-reset flip-floop SR1Set end；Also, the buffer buf with
HDRV pin is connected；The output end of the delay unit delay connects or the first input end of door OR；The phase inverter inv's
The second set-reset flip-floop SR of output connection2Reset terminal；The first set-reset flip-floop SR1Output end Q and NMOS tube N1Grid phase
Even, the NMOS tube N1Drain electrode and power vd D between series resistance R1And R2, source electrode ground connection；The resistance R1And R2Company
Connect node and PMOS tube P1Grid be connected, the PMOS tube P1Source electrode connect ILIM pin, grounded drain；Current source I connection
Between the ILIM pin and ground.The ring compensation circuit further includes first comparator A1, the first comparator A1Just
Input terminal connects the SW pin, the first comparator A1Negative input end be set to voltage V1, voltage V1Less than the power supply
The voltage of VDD, such as VDD are 5V, then voltage V1It can be 4V.The first comparator A1Output end and described or door OR the
Two input terminals are connected；Described or door OR output end simultaneously with the first set-reset flip-floop SR1Reset terminal and the 2nd SR
Trigger SR2Set end be connected.In addition, the ring compensation circuit further includes resistance RLIMWith capacitor CLIM, resistance RLIMAnd electricity
Hold CLIMIt is connected between the power vd D and the ILIM pin.
Specifically, the over-current detection comparator is specially the second comparator A2, the second comparator A2Negative input end
SW pin is connected, positive input terminal is connected with ILIM pin, the second comparator A2Control terminal connect the second set-reset flip-floop SR2
Output end Q, the second set-reset flip-floop SR2Output end Q output comparator enable signal, for determining that described second compares
Device A2Working time, in due course trigger over-current detection function.The second comparator A2Output end output signal be overcurrent
Protect signal.
The over-current detection circuit includes off-chip circuitry, and the off-chip circuitry includes inductance LS, diode D, capacitor
COUTWith power switch tube HSNMOS；Wherein, the inductance LSSW pin and output voltage are connected to as energy transmission
VOUTBetween；The capacitor COUTOutput voltage V is connected to as energy-storage travelling wave tubeOUTBetween ground；The diode D is as afterflow
Element is connected between the SW pin and ground；The drain terminal of the power switch tube HSNMOS is connected with supply voltage VDD, source
It is connected with the SW pin, grid end is connected with HDRV pin；The switch of power switch tube HSNMOS works as function by HDRV port controlling
After rate switching tube HSNMOS conducting, supply voltage VDD passes through inductance LSTo output voltage VOUTEnergy is transmitted, power switch tube is worked as
After HSNMOS is closed, energy carries out afterflow by diode D；The power switch tube HSNMOS is N-type power MOSFET.
As shown in Figure 1, overcurrent protection threshold value is by resistance R when dc-dc converter works normallyLIMIt is determined with current source I
It is fixed, current source I current flowing resistance RLIMAfter form pressure drop, the voltage V of ILIM pinLIMFor VDD-I*RLIM, voltage VLIMMake
Comparator A is accessed for overcurrent protection threshold voltage2Positive input terminal, be compared with SW pin voltage to judging overcurrent item
Part.Capacitor CLIMWith resistance RLIMParallel connection forms RC charge circuit, it will be understood by those skilled in the art that, reasonably select capacitor CLIMMake
The RC charge circuit time it must be substantially equal to SW pin ring fall time.
Second comparator A2There are a control terminals, when SW pin voltage rises to default constant voltage V1When, described second compares
Device A2It just starts to work, this ensures that sampling operation electric current when power switch tube HSNMOS is really connected.Additionally introduce
Delay unit delay, generally 50ns or so, to guarantee to cause SW that cannot be lifted to voltage in certain more severe overcurrent conditions
V1When, alternative first comparator A1Effect, thus in time close power switch tube HSNMOS.
More specifically, closing device, the first set-reset flip-floop SR in power switch tube HSNMOS1Output end Q be low level,
NMOS tube N1It is in close state, PMOS tube P1Grid potential be height, P1It is also at closed state, resistance RLIMOnly electric current I
It flows through, voltage VLIMIt is maintained at VDD-I*RLIM.After main open signal MAIN_ON becomes high level, power switch tube HSNMOS
Into turn-on cycle, the first set-reset flip-floop SR at this time1It is set, the end Q exports high level, NMOS tube N1Conducting, PMOS tube P1's
Grid potential is resistance R1And R2Partial pressure, P1Conducting, resistance RLIMThere is another way electric current to flow through, at this time ILIM pin port voltage
Less than stable state voltage VDD-I*RLIM.It may be noted that the unlatching delay due to power tube HSNMOS is greater than NMOS tube N1And PMOS tube
P1Conducting delay, so when ILIM pin port voltage decline when, power tube HSNMOS is not opened also, the second comparator A2Not
Enabled, over-current detection circuit is in off position.
After opening delay and transmission delay, power switch tube HSNMOS is formally connected, and SW pin voltage rises, and works as liter
To voltage V1Afterwards, first comparator A1Output becomes high level or main open signal MAIN_ON becomes after high level by prolonging
The Shi Danyuan delay time touches the 2nd SR as long as any one of two kinds of situations occur or door OR output becomes high level
Send out device SR2Set, the output end Q are high level, the second comparator A2Function is opened, and over-current detection circuit is started to work.In this side
Under formula, it can guarantee sampling operation electric current when power switch tube HSNMOS is really connected, not led by power switch tube HSNMOS
The influence of logical delay and transmission delay.
Or the output of door OR becomes after high level simultaneously by the first set-reset flip-floop SR1It resetting, the output end Q becomes low level,
Close NMOS tube N1With PMOS tube P1, VLIMVoltage starts to raise with RC rate, final to stablize in VDD-I*RLIM.Just because of this
Kind RC rate is raised, so that when ringing occurs in the port SW, voltage VLIMSlightly below its stationary value, so as to avoid
Occurs the case where false triggering during ring.
After main open signal MAIN_ON becomes low level, power switch tube HSNMOS is closed, and phase inverter inv output becomes
For high level, by the second set-reset flip-floop SR2It resets, the output end Q is low level, to close the second comparator A2Function, overcurrent
Detection circuit is in off position, and dc-dc converter enters freewheeling mode.
In the present invention, the word that the expressions such as " connection ", " connected ", " company ", " connecing " are electrical connected, such as nothing are especially said
It is bright, then it represents that direct or indirect electric connection.The first port and second port of above-mentioned all resistance are according to electric current
Flow through direction definition, one end that electric current first passes around resistance is first port, and the other end is just second port.
Foregoing description is only the description to the utility model preferred embodiment, not to any limit of the scope of the utility model
Fixed, any change, the modification that the those of ordinary skill in the utility model field does according to the disclosure above content belong to right and want
Seek the protection scope of book.
Claims (7)
1. a kind of over-current detection circuit, in high-speed switch converter, which is characterized in that the over-current detection circuit includes:
Ring compensation circuit, for avoiding overcurrent protection false triggering brought by the ringing voltage of power tube switching node；
Over-current detection comparator generates overcurrent protection signal for comparing the operating current and current limit threshold of power tube.
2. over-current detection circuit as described in claim 1, which is characterized in that the ring compensation circuit includes main open signal
MAIN_ON, while accessing buffer buf, delay unit delay, phase inverter inv and the first set-reset flip-floop SR1Set end；And
And
The buffer buf is connected with HDRV pin；
The output end of the delay unit delay connects or the first input end of door OR；
The output of the phase inverter inv connects the second set-reset flip-floop SR2Reset terminal；
The first set-reset flip-floop SR1Output end Q and NMOS tube N1Grid is connected, the NMOS tube N1Drain electrode and power vd D
Between series resistance R1And R2, source electrode ground connection；The resistance R1And R2Connecting node and PMOS tube P1Grid be connected, it is described
PMOS tube P1Source electrode connect ILIM pin, grounded drain；Current source I is connected between the ILIM pin and ground.
3. over-current detection circuit as claimed in claim 2, which is characterized in that the ring compensation circuit further includes first comparing
Device A1, the first comparator A1Positive input terminal connect SW pin, the first comparator A1Negative input end be set to voltage
V1, voltage V1Less than the voltage of the power vd D, the first comparator A1Output end and described or door OR second defeated
Enter end to be connected；Described or door OR output end simultaneously with the first set-reset flip-floop SR1Reset terminal and the 2nd SR triggering
Device SR2Set end be connected.
4. over-current detection circuit as claimed in claim 2, which is characterized in that the ring compensation circuit further includes resistance RLIM
With capacitor CLIM, resistance RLIMWith capacitor CLIMIt is connected between the power vd D and the ILIM pin.
5. over-current detection circuit as described in claim 1, which is characterized in that the over-current detection comparator is specially the second ratio
Compared with device A2, the second comparator A2Negative input end connect SW pin, positive input terminal is connected with ILIM pin, and described second compares
Compared with device A2Control terminal connect the second set-reset flip-floop SR2Output end Q, the second set-reset flip-floop SR2Output end Q export ratio
Compared with device enable signal, for determining the second comparator A2Working time, in due course trigger over-current detection function.
6. over-current detection circuit as described in claim 1, which is characterized in that the over-current detection circuit includes off-chip capacitive
Road, the off-chip circuitry include inductance LS, diode D, capacitor COUTWith power switch tube HSNMOS；Wherein,
The inductance LSSW pin and output voltage V are connected to as energy transmissionOUTBetween；
The capacitor COUTOutput voltage V is connected to as energy-storage travelling wave tubeOUTBetween ground；
The diode D is connected between the SW pin and ground as continued flow component；
The drain terminal of the power switch tube HSNMOS is connected with supply voltage VDD, and source is connected with the SW pin, grid end with
HDRV pin is connected；The switch of power switch tube HSNMOS is by HDRV port controlling, after power switch tube HSNMOS conducting, electricity
Source voltage VDD passes through inductance LSTo output voltage VOUTEnergy is transmitted, after power switch tube HSNMOS is closed, energy passes through two
Pole pipe D carries out afterflow.
7. over-current detection circuit as claimed in claim 6, which is characterized in that the power switch tube HSNMOS is N-type power
MOSFET。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821926401.XU CN209167412U (en) | 2018-11-22 | 2018-11-22 | A kind of over-current detection circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821926401.XU CN209167412U (en) | 2018-11-22 | 2018-11-22 | A kind of over-current detection circuit |
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| CN209167412U true CN209167412U (en) | 2019-07-26 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109239449A (en) * | 2018-11-22 | 2019-01-18 | 中国电子科技集团公司第五十八研究所 | A kind of over-current detection circuit |
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2018
- 2018-11-22 CN CN201821926401.XU patent/CN209167412U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109239449A (en) * | 2018-11-22 | 2019-01-18 | 中国电子科技集团公司第五十八研究所 | A kind of over-current detection circuit |
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