CN103280963A - Power factor correction (PFC) control circuit for reducing conducting power consumption of power tube - Google Patents

Abstract

The invention provides a power factor correction (PFC) control circuit for reducing the conducting power consumption of a power tube. The circuit is based on a topological structure of a Boost circuit, and comprises a voltage loop circuit, a power tube drain-source voltage VDS valley conducting control circuit and a logic control and driving circuit, wherein the voltage loop circuit is used for stabilizing output, and generating a switching-off signal for the power tube; the power tube drain-source voltage VDS valley conducting control circuit is used for detecting the drain-source voltage VDS of the power tube, comparing the detected drain-source voltage VDS with valley voltage, and generating a conducting control signal for the power tube; and the logic control and driving circuit is used for driving and controlling the switching-on and the switching-off of the power tube. The VDS is detected to ensure that the power tube can be switched on when the drain-source voltage VDS is the valley voltage or zero voltage under different input voltage conditions, so that the conducting loss of the power tube is reduced.

Description

A kind of PFC control circuit that reduces power tube conducting power consumption

Technical field

The present invention relates to the single-phase power factor correcting circuit of field of switch power, particularly a kind of PFC control circuit that reduces power tube conducting power consumption.

Background technology

At present, in the Boost type PFC of critical conduction mode shown in Figure 1 (CRM, Critical Conduction Mode), traditional zero current detection conducting scheme is opened moment at power tube, and the source-drain voltage of power tube is bigger, the conducting power consumption is also bigger, and this is because input ac voltage V _InThe switching frequency of frequency relative power pipe M very little, so can suppose the big or small constant of in the switch periods of power tube M input voltage.Suppose input ac voltage V _InBe V through the full-bridge rectifier output voltage _Cin, when power tube M is in conducting state, inductance L both end voltage V _LBe V _Cin, this moment inductance L both end voltage V _LWith inductive current i _LThe pass be:

$L\frac{{\mathrm{di}}_L}{\mathrm{dt}}=V_L=V_{\mathrm{cin}}$ Formula 1

By formula 1 as can be known, this moment, inductive current increased linearity, if the ON time of power tube M is T _On, power tube M conduction period so, inductive current i _LThe big or small △ i that increases _l(+) is:

${\mathrm{\Δi}}_L(+)=i_{L\left(\mathrm{peak}\right)}=\frac{V_{\mathrm{cin}}}{L}{T}_{\mathrm{on}}$ Formula 2

When power tube M is in off state, suppose that the turn-off time is T _Off, the output voltage of Boost circuit is V _o, this moment inductance L both end voltage V _LWith inductive current i _LThe pass be:

$L\frac{{\mathrm{di}}_L}{\mathrm{dt}}=V_L=V_{\mathrm{cin}}-V_o$ Formula 3

For Boost booster circuit, V _Cin-V _o＜0, thus power tube M blocking interval, inductive current i _LLinearity is reduced, and power tube M drain-source voltage V _DSEqual output voltage V _oFor the PFC control circuit of traditional employing zero current detection, when detecting inductive current i _LDrop at 0 o'clock, open power tube, but open moment power tube M drain-source voltage V _DSEqual output voltage V _o, therefore can produce serious conducting power consumption.

In the prior art, in order to reduce the conducting power consumption, a kind of method that is called as the lowest point conducting (VS, Valley Switching) or zero voltage switch (ZVS, Zero Voltage Switching) is widely used in the PFC control circuit of CRM.Its cardinal principle is: the inductive current i in detecting the Boost circuit structure _LWhen dropping to zero, power tube M postpones certain hour and opens the drain-source parasitic capacitance C of the inductance L in the Boost circuit structure and power tube _dSeries resonance will take place, the drain-source parasitic capacitance C of power tube _dBegin by inductive discharge, suppose at resonance a period of time T to take place _dAfter, the drain-source parasitic capacitance C of power tube _dOn voltage V _DSDrop to the lowest point value or 0, if the time that makes power tube postpone to open just also equals T _d, so just realized the lowest point conducting or zero voltage switch, reduced the conducting power consumption of power tube.

A kind of PFC control circuit of typical reduction power tube conducting power consumption as shown in Figure 2 in the prior art, its operation principle is: by add the RC time delay module in the PFC of traditional CRM inductive current test section, the time that makes power tube postpone to open equals half of harmonic period, makes power tube just at power tube drain-source voltage V _DSConducting when dropping to the lowest point value, realization reduces the purpose of power tube conducting power consumption.There is following problem in circuit shown in Figure 2: the turn on delay time of power tube is with relevant with input voltage, and, for different input voltages, inductance in the Boost circuit structure will produce different series resonance situations with the power tube parasitic capacitance, so realize the lowest point voltage or no-voltage conducting by adding the RC time delay module, can not satisfy the input voltage of different sizes.

In the prior art, the PFC control circuit of another kind of typical reduction power tube conducting power consumption as shown in Figure 3, several significant instants when it utilizes testing circuit to determine resonance, again according to the time voltage symmetry centered by input voltage at mutual voltage two ends during resonance, just can know power tube drain-source voltage V by circuit computing _DSReach the moment of the lowest point voltage.This circuit has also added grid and has driven the time-delay of signal, thereby reduction power tube conducting power consumption is opened in the lowest point that can realize power tube.This circuit can not satisfy the situation of the input voltage of different sizes, and this circuit more complicated, is difficult for realizing.

Summary of the invention

In order to overcome existing techniques in realizing V _DS(reduce power tube conducting power consumption) when the lowest point voltage or no-voltage conducting, can not satisfy different big or small input voltages and circuit structure complexity, difficult situation about realizing, the invention provides a kind of PFC control circuit that reduces power tube conducting power consumption, by introducing power tube drain-source voltage the lowest point turn-on control circuit, when realizing reducing power tube conducting power consumption, satisfy different input voltages again.This circuit structure is simple, be easy to realize, by detecting V _DSVoltage, guarantee that under different input voltage situations power tube can both be at its drain-source voltage V _DSOpen when being in the lowest point voltage or no-voltage, thus the loss when reducing the power tube conducting.

The technical scheme that the present invention solves the problems of the technologies described above is as follows:

A kind of PFC control circuit that reduces power tube conducting power consumption, topological structure based on Boost type booster circuit, comprise inductance L, power tube M, diode D, one end of inductance L is connected with the positive output end of full-bridge rectifier, the other end of inductance L is connected with the drain electrode of power tube M, the anode of diode D, the source electrode of power tube M is connected with the negative output terminal of full-bridge rectifier, and the negative electrode of diode D connects an end of load, and the other end of load connects the source electrode of power tube M;

It is characterized in that: be provided with for the Voltage loop circuit of stable output and generation power tube M cut-off signals, for detection of power tube M drain-source voltage V _DSAnd compare with the lowest point voltage, produce the power tube drain-source voltage V of power tube M conducting control signal _DSThe lowest point turn-on control circuit and the logic control and the drive circuit that turn on and off for driving control power tube M, wherein:

The Voltage loop circuit comprises resistance R 5, R6, building-out capacitor C _COM, error amplifier, reference voltage source V _REF, saw-toothed wave generator and pulse frequency modulated (PFM) comparator, one end of resistance R 5 is connected with the negative electrode of diode D in the Boost type booster circuit topological structure, resistance R 5 other ends are connected with the inverting input of error amplifier and an end of resistance R 6, the other end ground connection of resistance R 6, the in-phase input end of error amplifier is connected with reference voltage source, building-out capacitor C _COMAn end be connected building-out capacitor C with the output of error amplifier and the inverting input of pulse frequency modulated comparator _COMOther end ground connection, the in-phase input end of pulse frequency modulated comparator is connected with the output of saw-toothed wave generator;

Power tube drain-source voltage V _DSThe lowest point turn-on control circuit comprises subtracter, comparator, power tube drain-source voltage V _DSSample circuit, through the input voltage V of the Boost of full-bridge rectifier rectification type booster circuit topological structure _CinThe output voltage V of sample circuit and Boost type booster circuit topological structure _oSample circuit, power tube drain-source voltage V _DSThe drain electrode of power tube M is connected power tube drain-source voltage V in the input of sample circuit and the Boost type booster circuit topological structure _DSThe output of sample circuit is connected with the inverting input of comparator, and the positive input of comparator is connected with the output of subtracter, the positive input of subtracter and V _CinThe output of sample circuit connects, V _CinThe input of sample circuit is connected the inverting input of subtracter and V with the forward output of full-bridge rectifier _oThe output of sample circuit connects, V _oThe input of sample circuit is connected with the negative electrode of diode D in the Boost type booster circuit topological structure;

Logic control and drive circuit comprise pulse generator, rest-set flip-flop and gate driver circuit, the input of pulse generator and power tube drain-source voltage V _DSThe output of comparator connects in the turn-on control circuit of the lowest point, the output of pulse generator is connected with the set input of rest-set flip-flop (S), the RESET input of rest-set flip-flop (R) connects the output of pulse frequency modulated comparator in the Voltage loop circuit, the output of rest-set flip-flop is connected with the input of gate driver circuit, and the output of gate driver circuit connects the grid of power tube M in the Boost type booster circuit topological structure.

Described power tube drain-source voltage V _DSSample circuit comprises resistance R 3 and R4, and an end of resistance R 3 is as power tube drain-source voltage V _DSThe input of sample circuit is connected with the drain terminal of power tube M in the Boost booster type circuit topological structure, and the other end of resistance R 3 is connected with an end of resistance R 4 and as power tube drain-source voltage V _DSThe output of sample circuit is connected with the inverting input of comparator, the other end ground connection of resistance R 4;

The input voltage V of described Boost booster circuit topological structure _CinSample circuit comprises resistance R 1 and R2, and an end of resistance R 1 is connected with the positive output end of full-bridge rectifier, and the other end of resistance R 1 is connected with an end of resistance R 2 and as V _CinThe output of sample circuit is connected with the positive input of subtracter, the other end ground connection of resistance R 2;

The output voltage V of described Boost booster circuit topological structure _oSample circuit comprises resistance R 7 and R8, and an end of resistance R 7 is as V _oThe input of sample circuit is connected with the negative electrode of diode D in the Boost booster type circuit topological structure, and the other end of resistance R 7 is connected with resistance R 8 one ends and as V _oThe output of sample circuit is connected with the inverting input of subtracter.

Described power tube drain-source voltage V _DSComparator in the turn-on control circuit of the lowest point is a hysteresis comparator.

Described resistance R 1 is 99/1 with the ratio of resistance R 2; Resistance R 3 is 99/1 with the ratio of resistance R 4, and resistance R 7 is 102/1 with the ratio of resistance R 8.

Compared with prior art, the invention has the beneficial effects as follows:

In the PFC control circuit of the present invention, added drain-source voltage V _DSThe lowest point turn-on control circuit is by detection power pipe drain-source voltage V _DS, realized under wider input voltage range, realizing the lowest point conducting of power tube, reduced conduction loss and EMI and disturbed; When the parasitic capacitance of power tube and boost inductance series resonance, power tube is all the time at V _DSFirst the lowest point or no-voltage conducting, restriction is because the input current total harmonic distortion (THD, Total Harmonic Distribution) brought of series resonance effectively; Resistance R 1 equals resistance R 3, and resistance R 2 equals resistance R 4, and the ratio of resistance R 1 and resistance R 2 is greater than the ratio of resistance R 7 with resistance R 8, makes V _DSDrop to when being a bit larger tham the lowest point voltage, the conducting power tube, partial offset is because the influence that the gate capacitance time-delay of power tube M causes.

Description of drawings

Fig. 1 is traditional critical conduction mode (CRM) Boost type PFC control circuit;

Fig. 2 is the PFC control circuit of a kind of typical reduction power tube conducting power consumption of the prior art;

Fig. 3 is the PFC control circuit structured flowchart that another kind of the prior art typically reduces power tube conducting power consumption;

Fig. 4 be of the present invention can be at the PFC control circuit schematic diagram of different input voltage situation decline low-power pipe conducting power consumptions;

Fig. 5 is the physical circuit figure of Fig. 4;

Fig. 6 is 2V _CinV _oThe time, the waveform correlation figure of circuit of the present invention;

Fig. 7 is 2V _Cin＜V _oThe time, the waveform correlation figure of circuit of the present invention;

Fig. 8 is the simulation waveform figure of circuit of the present invention.

Embodiment

Below in conjunction with accompanying drawing principle of the present invention and feature are described, the example of lifting only is used for explaining the present invention, is not for limiting scope of the present invention.

Embodiment:

As Fig. 4, circuit of the present invention also comprises for the Voltage loop circuit 2 of stable output and generation power tube cut-off signals, for detection of V based on the topological structure 1 of Boost type booster circuit _DSAnd compare with the lowest point voltage, produce the power tube drain-source voltage V of power tube conducting control signal _DSThe lowest point turn-on control circuit 3 and the logic control and the drive circuit 4 that turn on and off for driving control power tube.Wherein the topological structure 1 of Boost type booster circuit is same as the prior art, comprise inductance L, power tube M, diode D, one end of inductance L is connected with the positive output end of full-bridge rectifier, the other end of inductance L is connected with the drain electrode of power tube M, the source electrode of power tube M is connected with the negative output terminal of full-bridge rectifier, the grid of power tube M is connected with the output of grid driving (Driver) in the drive circuit with logic control, the other end of inductance L is connected with the anode of diode D, and the negative electrode of diode D is connected with load.

As Fig. 5, Voltage loop circuit 2 comprises resistance R 5, resistance R 6, building-out capacitor C _COM, error amplifier OTA, reference voltage source V _REF, saw-toothed wave generator STG, pulse frequency modulated (PFM) comparator PCOM, the negative electrode of diode D in one end of resistance R 5 and the topological structure of Boost booster circuit is connected, the inverting input of resistance R 5 other end error amplifiers connects, one end of resistance R 6 is connected with the inverting input of error amplifier, the other end ground connection of resistance R 6, the in-phase input end of error amplifier and reference voltage source V _REFConnect building-out capacitor C _COMAn end be connected building-out capacitor C with the output of error amplifier _COMOther end ground connection, the output of error amplifier is connected with the inverting input of pulse frequency modulated than device, the in-phase input end of pulse frequency modulated comparator is connected with saw-toothed wave generator output, and the output of pulse frequency modulated comparator is connected with the R input of rest-set flip-flop in the drive circuit with logic control.

Power tube drain-source voltage V _DSThe lowest point turn-on control circuit 3 comprises subtracter SUB, comparator C OM, V _DSSample circuit, V _CinSample circuit, V _oSample circuit, V _DSThe drain terminal of power tube M is connected V in the input of sample circuit and the Boost booster circuit topological structure _DSThe other end of sample circuit is connected with the inverting input of comparator, the output of comparator is connected with the input of pulse generator in the drive circuit 4 with logic control, the positive input of comparator is connected with the output of subtracter, the positive input of subtracter and V _CinThe output of sample circuit connects, V _CinThe input of sample circuit is connected the inverting input of subtracter and V with the forward output of full-bridge rectifier _oThe output of sample circuit connects, V _oThe input of sample circuit is connected with the negative electrode of diode D in the Boost booster circuit topological structure.

Logic control and drive circuit 4 comprise that pulse generator PUL, rest-set flip-flop TR, grid drive (Driver), the output of pulse generator is connected with the S input of rest-set flip-flop, and the output of rest-set flip-flop is connected with the input that grid drives (Driver).

V _DSSample circuit comprises resistance R 3 and resistance R 4, one end of resistance R 3 is connected with the drain terminal of power tube M in the Boost booster circuit topological structure, the other end of resistance R 3 is connected with an end of resistance R 4, the other end ground connection of resistance R 4, resistance R 3 is the first sampled point a with the junction of resistance R 4, is connected with the inverting input of comparator.

V _CinSample circuit comprises resistance R 1 and resistance R 2, one end of resistance R 1 is connected with the positive output end of full-bridge rectifier, the other end of resistance R 1 is connected with an end of resistance R 2, the other end ground connection of resistance R 2, the junction of resistance R1 and second resistance R 2 is the second sampled point b, is connected with the in-phase input end of subtracter.

V _oSample circuit comprises resistance R 7 and resistance R 8, one end of resistance R 7 is connected with the negative electrode of diode D in the Boost booster circuit topological structure, the other end of resistance R 7 is connected with resistance R 8 one ends, the other end ground connection of resistance R 8, resistance R 7 is the 3rd sampled point c with the junction of resistance R 8, is connected with the inverting input of subtracter.

In the present embodiment, comparator is a hysteresis comparator, and the ratio of resistance R 1 and resistance R 2 equals the ratio of resistance R 3 and resistance R 4, all equals 99/1, and resistance R 7 is 102/1 with the ratio of resistance R 8.

Of the present inventionly can be in the operation principle of the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumptions:

When power tube M is in off state, the current i on the inductance _LLinearity reduces, if work as i _LBe reduced at 0 o'clock, power tube is not in time opened, the parasitic capacitance C of inductance L and power tube _dSeries resonance will take place.For the input voltage of different Boost booster circuit topological structures, its series resonance situation is also different.According to input voltage V _CinDifference mainly contain following 2 kinds of situations:

（1）2V _Cin>V _o

Fig. 6 be in this case provided by the invention a kind of can be at the waveform correlation figure of the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumptions.At t ₀～t ₁During this time, power tube M conducting, the electric current of inductance L is linear to be increased, and energy increases, as process t _OnAfter time, power tube M turn-offs, and inductance L begins to the parasitic capacitance C of devices such as power tube _dCharging is at t ₁Moment C _dOn voltage reach V _O, booster diode D conducting this moment.At t ₀～t ₁During this time, power tube M turn-offs, inductance L and V _CinBeginning releases energy to load, and the inductance L electric current is linear to descend, but output remains on V _OConstant, at t ₂Constantly, inductive current drops to zero.At t ₂～t ₃During this time, power tube M still turn-offs, inductance L and parasitic capacitance C _dResonance takes place, and the cycle of series resonance is:

$T_R=2\mathrm{\&pi;}\sqrt{{\mathrm{<figure-callout\; id="4"\; label="LC\; d\; Formula"\; filenames="HDA00003112587600051.png"\; state="\{\{state\}\}">LC</figure-callout>}}_d}$ Formula 4

Parasitic capacitance C _dBeginning is discharged to inductance L, parasitic capacitance C _dOn voltage begin to descend, inductive current oppositely increases, behind 1/4 harmonic period, the current i of inductance L _LReach reverse maximum, can be got by formula 1: the inductance L both end voltage is 0, thus this moment power tube M drain-source voltage V _DSEqual V _CinArrive t through 1/4 harmonic period again ₃The time, power tube M drain-source voltage V _DSTo reach the lowest point value V _{DS (valley)}, for:

V _{DS (valley)}=V _o- ²(V _o-V _Cin)= ²V _Cin-V _oFormula 5

At t ₀～t ₃Nei inductive current i during this period of time _LWith power tube source-drain voltage V _DSExpression formula is:

${\mathrm{<figure-callout\; id="0"\; label="t"\; filenames="HDA00003112587600031.png,HDA00003112587600051.png"\; state="\{\{state\}\}">t</figure-callout>}}_0~t_1:\left\{\begin{array}{c}{i}_L=\frac{V_{\mathrm{Cin}}}{L}(t-t_0)\\ V_{\mathrm{DS}}=0\end{array}\right.$

${\mathrm{<figure-callout\; id="1"\; label="t"\; filenames="HDA00003112587600022.png"\; state="\{\{state\}\}">t</figure-callout>}}_1~t_2:\left\{\begin{array}{c}{i}_L=\frac{V_{\mathrm{Cin}}}{L}(t_1-t_0)+(-\frac{V_{\mathrm{Cin}}}{L})(t-t_1)\\ V_{\mathrm{DS}}=V_o\end{array}\right.$ Formula 6

${\mathrm{<figure-callout\; id="2"\; label="t"\; filenames="HDA00003112587600012.png,HDA00003112587600022.png"\; state="\{\{state\}\}">t</figure-callout>}}_2~t_3:\left\{\begin{array}{c}{i}_L=C_d\frac{{\mathrm{dV}}_{\mathrm{ds}}}{\mathrm{dt}}=-C_d(V_o-V_{\mathrm{Cin}})\sin \left[w(t-t_2)\right]\\ V_{\mathrm{DS}}=(V_o-V_{\mathrm{Cin}})\cos \left[w(t-t_2)\right]+V_{\mathrm{Cin}}\end{array}\right.,w=\sqrt{{\mathrm{LC}}_d}$

Resistance R 1 equals 99/1 with the ratio of resistance R 2, so through V _CinThe input voltage that sample circuit samples Boost type booster circuit topological structure is:

$V_b=\frac{V_{\mathrm{cin}}}{100}$ Formula 7

Resistance R 7 equals 102/1 with the ratio of resistance R 8, through V _oThe output voltage that sample circuit samples Boost type booster circuit topological structure is:

$V_c=\frac{V_o}{103}$ Formula 8

SUB is output as through subtracter:

$V_{\mathrm{sub}}={2V}_b-V_c=\frac{{2V}_{\mathrm{cin}}}{100}-\frac{V_o}{103}$ Formula 9

Resistance R 3 is 99/1 with the ratio of resistance R 4, so through V _DSThe drain-source voltage of the power tube M that sample circuit samples is:

$V_a=\frac{V_{\mathrm{DS}}}{100}$ Formula 10

Arrive t ₃In the time of constantly, the power tube drain-source voltage arrives the lowest point value V _{DS (valley)}, and V _a＜V _SubSo, this moment, power tube drain-source voltage V _DSHysteresis comparator output low level in the turn-on control circuit of the lowest point through logic control and drive circuit conducting power tube M, has realized V _DSThe lowest point conducting is owing to its drain-source both end voltage V this moment _DSDrop to minimum, so the conducting power consumption also significantly descends.

（2）2V _Cin<V _o

Fig. 7 be in this case provided by the invention a kind of can be at the waveform correlation figure of the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumptions.At t ₀～t ₁, t ₁～t ₂During this time, its voltage and current is analyzed identical with first kind of situation.But at t ₂～t ₃During this time, because 2V _Cin＜V _oSo, last V _DsThe lowest point voltage becomes negative, but because the parasitic diode of power tube M may conducting, thereby it is limited in-0.7V.Because in this case, 2V _Cin-V _o＜0, the output V of subtracter SUB _Sub=0, so when detecting power tube drain-source voltage V _DSDrop at 0 o'clock, the hysteresis comparator output low level through logic control and drive circuit conducting power tube, has realized V _DSThe no-voltage conducting.Thereby ground has reduced the conducting power consumption of power tube M.

Fig. 8 be of the present invention can be 220V to input voltage at the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumptions, output voltage is the simulation waveform figure that the PFC system of 400V carries out emulation.In its ordinate, PFC is that the grid of power tube M drive signal, V _DSBe the drain-source voltage of power tube M, i _LBe the electric current on the inductance L, V _CinBe the input voltage instantaneous value of Boost booster circuit topological structure, V _oIt is the output voltage of Boost booster circuit topological structure.When time t=36.56 μ s, V _Cin=300V, power tube drain-source voltage V _DSDrop to the lowest point value V _{DS (valley)}, be 200V.And this moment 2V _Cin-V _o=200V, the signal of the grid of power tube driving simultaneously becomes high level, the power tube conducting, thus realized the lowest point conducting, reduced the conducting power consumption of power tube, verified feasibility of the present invention.

The above is preferred embodiment of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (4)

1. PFC control circuit that reduces power tube conducting power consumption, topological structure based on Boost type booster circuit, comprise inductance L, power tube M, diode D, one end of inductance L is connected with the positive output end of full-bridge rectifier, the other end of inductance L is connected with the drain electrode of power tube M, the anode of diode D, the source electrode of power tube M is connected with the negative output terminal of full-bridge rectifier, and the negative electrode of diode D connects an end of load, and the other end of load connects the source electrode of power tube M;

It is characterized in that: be provided with for the Voltage loop circuit of stable output and generation power tube M cut-off signals, for detection of power tube M drain-source voltage V _DSAnd compare with the lowest point voltage, produce the power tube drain-source voltage V of power tube M conducting control signal _DSThe lowest point turn-on control circuit and the logic control and the drive circuit that turn on and off for driving control power tube M, wherein:

The Voltage loop circuit comprises resistance R 5, R6, building-out capacitor C _COM, error amplifier, reference voltage source, saw-toothed wave generator and pulse frequency modulated comparator, one end of resistance R 5 is connected with the negative electrode of diode D in the Boost type booster circuit topological structure, resistance R 5 other ends are connected with the inverting input of error amplifier and an end of resistance R 6, the other end ground connection of resistance R 6, the in-phase input end of error amplifier is connected with reference voltage source, building-out capacitor C _COMAn end be connected building-out capacitor C with the output of error amplifier and the inverting input of pulse frequency modulated comparator _COMOther end ground connection, the in-phase input end of pulse frequency modulated comparator is connected with the output of saw-toothed wave generator;

Power tube drain-source voltage V _DSThe lowest point turn-on control circuit comprises subtracter, comparator, power tube drain-source voltage V _DSThe input voltage V of sample circuit, Boost type booster circuit topological structure _CinThe output voltage V of sample circuit and Boost type booster circuit topological structure _oSample circuit, power tube drain-source voltage V _DSThe drain electrode of power tube M is connected power tube drain-source voltage V in the input of sample circuit and the Boost type booster circuit topological structure _DSThe output of sample circuit is connected with the inverting input of comparator, and the positive input of comparator is connected with the output of subtracter, the positive input of subtracter and Boost type booster circuit topological structure input voltage V _CinThe output of sample circuit connects, Boost type booster circuit topological structure input voltage V _CinThe input of sample circuit is connected with the forward output of full-bridge rectifier, the inverting input of subtracter and Boost type booster circuit topological structure output voltage V _oThe output of sample circuit connects, Boost type booster circuit topological structure output voltage V _oThe input of sample circuit is connected with the negative electrode of diode D in the Boost type booster circuit topological structure;

Logic control and drive circuit comprise pulse generator, rest-set flip-flop and gate driver circuit, the input of pulse generator and power tube drain-source voltage V _DSThe output of comparator connects in the turn-on control circuit of the lowest point, the output of pulse generator is connected with the set input S of rest-set flip-flop, the RESET input R of rest-set flip-flop connects the output of pulse frequency modulated comparator in the Voltage loop circuit, the output of rest-set flip-flop is connected with the input of gate driver circuit, and the output of gate driver circuit connects the grid of power tube M in the Boost type booster circuit topological structure.

2. the PFC control circuit of reduction power tube conducting power consumption according to claim 1 is characterized in that:

Described power tube drain-source voltage V _DSSample circuit comprises resistance R 3 and R4, and an end of resistance R 3 is as power tube drain-source voltage V _DSThe input of sample circuit is connected with the drain terminal of power tube M in the Boost booster type circuit topological structure, and the other end of resistance R 3 is connected with an end of resistance R 4 and as power tube drain-source voltage V _DSThe output of sample circuit is connected with the inverting input of comparator C OM, the other end ground connection of resistance R 4;

Described Boost type booster circuit topological structure input voltage V _CinSample circuit comprises resistance R 1 and R2, and an end of resistance R 1 is connected with the positive output end of full-bridge rectifier, and the other end of resistance R 1 is connected with an end of resistance R 2 and as Boost type booster circuit topological structure input voltage V _CinThe output of sample circuit is connected with the positive input of subtracter, the other end ground connection of resistance R 2;

Described Boost type booster circuit topological structure output voltage V _oSample circuit comprises resistance R 7 and R8, and an end of resistance R 7 is as Boost type booster circuit topological structure output voltage V _oThe input of sample circuit is connected with the negative electrode of diode D in the Boost booster type circuit topological structure, and the other end of resistance R 7 is connected with resistance R 8 one ends and as Boost type booster circuit topological structure output voltage V _oThe output of sample circuit is connected with the inverting input of subtracter.

3. the PFC control circuit of reduction power tube conducting power consumption according to claim 1 is characterized in that: described power tube drain-source voltage V _DSComparator in the turn-on control circuit of the lowest point is a hysteresis comparator.

4. the PFC control circuit of reduction power tube conducting power consumption according to claim 2 is characterized in that: described resistance R 1 is 99/1 with the ratio of resistance R 2; Resistance R 3 is 99/1 with the ratio of resistance R 4, and resistance R 7 is 102/1 with the ratio of resistance R 8.

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