WO2020143216A1 - 像素阵列基板和验证掩膜板的方法 - Google Patents

像素阵列基板和验证掩膜板的方法 Download PDF

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Publication number
WO2020143216A1
WO2020143216A1 PCT/CN2019/098315 CN2019098315W WO2020143216A1 WO 2020143216 A1 WO2020143216 A1 WO 2020143216A1 CN 2019098315 W CN2019098315 W CN 2019098315W WO 2020143216 A1 WO2020143216 A1 WO 2020143216A1
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Prior art keywords
pixel
sub
mark
mask
positioning
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French (fr)
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陈凡
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Kunshan Govisionox Optoelectronics Co Ltd
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Kunshan Govisionox Optoelectronics Co Ltd
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24—Vacuum evaporation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques

Definitions

  • the present application relates to the technical field of display devices, in particular to a pixel array substrate and a method for verifying a mask.
  • OLED display panels have become the development trend of next-generation displays with the advantages of light and thin, low power consumption, high contrast, high color gamut, and flexible display.
  • OLED display panels include PMOLED and AMOLED.
  • AMOLED display panels are generally manufactured using a metal mask evaporation process. When the metal mask plate is used for vapor deposition on the back plate, the opening on the metal mask plate and the preset electrode position on the back plate need to be accurately aligned, which requires that the opening position on the metal mask plate must be Meet the requirements of use. In the production process of the metal mask plate, the opening of the metal mask plate is generally verified.
  • the embodiments of the present application provide a pixel array substrate and a method for verifying a mask plate, aiming to improve the production efficiency of a metal mask plate and reduce the production cost of the metal mask plate.
  • a first aspect of an embodiment of the present application provides a pixel array substrate.
  • the pixel array substrate includes: a display area in which a plurality of sub-pixel areas distributed in an array are provided; a non-display area is provided on the outer peripheral side of the display area; positioning coordinates
  • the group includes a first positioning mark and a second positioning mark, a plurality of first positioning marks are spaced along the first direction in the non-display area, and a plurality of second positioning marks are spaced along the second direction in the non-display area, along the second The first straight line extending in the direction and passing through the first positioning mark intersects the second straight line extending in the first direction and passing through the second positioning mark in the display area, and the intersection point of the first straight line and the second straight line corresponds to the sub
  • the pixel area is set; the pixel mark is set at the intersection of the first straight line and the second straight line.
  • a second aspect of an embodiment of the present application provides a method for verifying a mask, including:
  • the array substrate includes a positioning coordinate system and a pixel mark corresponding to the positioning coordinate system, so that the position of the pixel mark can be determined according to the positioning coordinate system;
  • the light-emitting layer is evaporated, and a light-emitting material is evaporated on the sub-pixel area of the array substrate by using a mask to form a light-emitting layer;
  • the mask plate has a verification opening corresponding to the sub-pixel area to be verified, and before verifying the quality of the mask plate, the method further includes:
  • Verifying the quality of the mask also includes: confirming the actual error based on manufacturing errors and evaporation errors, and confirming the quality of the mask based on actual errors.
  • the evaporation error includes the offset and the offset direction.
  • the step of verifying the quality of the mask further includes verifying the quality of the mask based on the offset and the offset direction of more than two actual sub-pixels.
  • the pixel array substrate includes a display area and a non-display area. Multiple sub-pixel areas and pixel marks are provided in the display area, and positioning coordinate groups are provided in the non-display area.
  • the pixel coordinates are located at the intersection of the first straight line and the second straight line, so the pixel mark can be quickly found according to the positioning coordinate group.
  • the intersection of the first straight line and the second straight line corresponds to the setting of the sub-pixel area, and the pixel mark corresponds to the sub-pixel area Setting, can quickly find the sub-pixel area to be detected. Therefore, when the pixel array substrate of the embodiment of the present application is used to verify the quality of the mask, the sub-pixel area to be verified can be quickly found, and the verification efficiency of the mask can be improved.
  • FIG. 1 is a schematic structural diagram of a pixel array substrate according to an embodiment of the present application.
  • FIG. 2 is a partially enlarged view of I in FIG. 1;
  • FIG. 3 is a schematic structural diagram of a mask to be verified according to an embodiment of the present application.
  • FIG. 4 is a schematic flowchart of a method for verifying a mask plate according to an embodiment of the present application
  • FIG. 5 is a schematic structural diagram of an actual sub-pixel offset according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of an actual sub-pixel shift according to another embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of an actual sub-pixel shift according to yet another embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of an actual sub-pixel shift according to still another embodiment of the present application.
  • the metal mask plate in the verification process of the metal mask plate, is generally used for vapor deposition on the test substrate, and the vapor deposition pixels are manually selected to verify the vapor deposition result, and the vapor deposition result is calculated.
  • it is generally necessary to perform more than 4 calibrations, and it is necessary to perform vapor deposition on more than 4 substrates, which not only consumes a large number of substrates, but also requires a lot of time, greatly increasing the metal mask Production costs.
  • FIG. 1 is a pixel array substrate 100 provided by an embodiment of the present application.
  • FIG. 2 is a partial schematic view at I in FIG. 1.
  • the substrate 100 has a display area and a non-display area located on the outer peripheral side of the display area.
  • the pixel array substrate 100 further includes: A positioning coordinate system 110, that is, a positioning coordinate group.
  • the positioning coordinate group includes a first positioning mark 111 and a second positioning mark 112.
  • a plurality of first positioning marks 111 are spaced along the first direction in a non-display area, and a plurality of second positioning marks 112 is spaced along the second direction in the non-display area, the first direction intersects the second direction;
  • the pixel mark 120 is provided corresponding to the sub-pixel area 130, and each first positioning mark 111 extends along the second direction to form a first ray and A second ray formed in each second positioning mark 112 in the first direction intersects the display area and forms a plurality of intersection positions, and a pixel mark 120 is provided at each intersection position.
  • the first ray formed by the first positioning mark 111 extending in the second direction does not constitute a limitation on the structure of the pixel array substrate 100.
  • the second ray formed by the second positioning mark 112 extending in the first direction does not constitute a pair
  • the structure of the pixel array substrate 100 is defined.
  • the concepts of the first ray and the second ray are introduced. In fact, the first ray and the second ray do not really exist in the pixel array substrate 100.
  • the second positioning mark 112 extends in the first direction to form the second ray
  • the pixel mark 120 is located at the intersection of the first ray and the second ray That's it.
  • the substrate 100 includes a display area and a non-display area, and a plurality of sub-pixel areas 130 are provided in the display area. And a first straight line extending in the second direction and passing through the first positioning mark 111 and a second straight line extending in the first direction and passing through the second positioning mark 112 intersect in the display area, and the first straight line and the second The intersection of the straight lines is set corresponding to the sub-pixel area 130.
  • the pixel mark 120 is provided at the intersection of the first straight line and the second straight line.
  • the first direction and the second direction can be intersected at any preset angle.
  • the angle between the first direction and the second direction is 90 degrees
  • the pixel marks 120 can be searched along the horizontal and vertical directions, which facilitates the search and confirmation of the pixel marks 120 and improves the efficiency of the verification mask 200.
  • the first direction and the second direction may be the X direction and the Y direction in FIG. 1, respectively.
  • the pixel array substrate 100 includes a display area and a non-display area, a plurality of sub-pixel areas 130 and pixel marks 120 are provided in the display area, and a positioning coordinate system 110 is provided in the non-display area.
  • the pixel mark of the display area is located at a plurality of intersection positions formed by the intersection of the first ray formed by the first positioning mark 111 extending along the second direction and the second ray formed by the second positioning mark 112 along the first direction, That is, the pixel mark 120 is located at the intersection of the first ray and the second ray, that is, the pixel mark 120 is located at the intersection of the first straight line and the second straight line.
  • the pixel mark 120 can be quickly found according to the positioning coordinate system 110, the intersection of the first straight line and the second straight line and the sub-pixel area are set correspondingly, that is, the pixel mark 120 and the sub-pixel area 130 are set correspondingly, The sub-pixel area 130 to be detected can be quickly found.
  • the pixel array substrate 100 of the embodiment of the present application is used to verify the quality of the mask 200, the sub-pixel region 130 to be verified can be quickly found, and the verification efficiency of the mask 200 can be improved.
  • the specific setting method of the first positioning mark 111 and the second positioning mark 112 in the positioning coordinate system 110 is not limited herein.
  • the first positioning mark 111 and the second positioning mark 112 may be set on a metal with a high light reflectivity
  • the film layer is cleared of other materials around the position where the first positioning mark 111 or the second positioning mark 112 is located, and a single positioning mark is exposed, that is, the metal film layer is exposed.
  • the number of the first positioning marks 111 and the second positioning marks 112 can be adjusted according to the verification requirements.
  • first positioning mark 111 and the second positioning mark 112 are not limited herein.
  • first positioning mark 111 and the second positioning mark 112 may be circular, rectangular, or polygonal.
  • the first positioning mark 111 has a rectangular shape, and the first positioning mark 111 extends a preset distance along the second direction, which is convenient for the user to confirm the first ray formed by the first positioning mark 111 extending along the second direction, so as to facilitate the user according to The first positioning mark 111 finds the position of the pixel mark 120 in the second direction.
  • the shape of the second positioning mark 112 may be the same as or different from that of the first positioning mark 111.
  • the shape of the second positioning mark 112 is similar to the first positioning mark 111.
  • the second positioning mark 112 is rectangular, and the second positioning mark 112 extends along the first direction by a preset distance, which is convenient for the user to confirm the second rays formed by the second positioning mark 112 extending in the first direction.
  • the positioning mark 112 finds the position of the pixel mark 120 in the first direction.
  • the rectangular first positioning mark 111 and the second positioning mark 112 facilitate the user to quickly find the specific position of the pixel mark 120 in the display area of the pixel array substrate 100.
  • the specific number of pixel marks 120 is not limited here. In order to confirm the result of the verification mask 200 according to the sub-pixel regions 130 corresponding to the plurality of pixel marks 120, there are more than two pixel marks 120, and the preferred pixel mark 120 is 4, 9, etc. In this embodiment, there are nine pixel marks 120.
  • the number of the first positioning mark 111 and the second positioning mark 112 is not limited herein.
  • the first positioning mark 111 and the second positioning mark 112 can be determined according to the number of the pixel marks 120. In this embodiment, when the pixel marks When 120 are nine, there are three first positioning marks 111 and second positioning marks 112, respectively.
  • the specific setting position of the pixel mark 120 is not limited herein.
  • the pixel mark 120 corresponds to the pixel definition layer setting, and it can also be considered that the pixel mark 120 corresponds to the pixel definition structure setting, that is, the pixel mark 120 is not located in the pixel In the pixel opening on the array substrate 100, the pixel mark 120 is disposed at the edge of the sub-pixel area 130. Therefore, when the pixel array substrate 100 is vapor-deposited to form a light-emitting layer, the actual sub-pixels 140 of the light-emitting layer will not block the pixel mark 120, which facilitates the search and confirmation of the pixel mark 120. As shown in FIG. 2, in an ideal state, when the pixel array substrate 100 is used for vapor deposition, the actual sub-pixel 140 formed by vapor deposition should be filled in the sub-pixel region 130 to be verified.
  • the pixel mark 120 has a special shape, that is, the pixel mark 120 is different from other structures on the pixel array substrate 100, so that the pixel mark 120 can be quickly found on the pixel array substrate 100.
  • the pixel mark 120 may be cross-shaped, polygonal, or the like. In the embodiment of the present application, the pixel mark 120 has a cross shape.
  • the pixel mark 120 is formed on the metal layer of the pixel array substrate 100.
  • the pixel marks 120 are formed at the same time, so that the pixel marks 120 do not require extra separate processes for manufacturing, which can save costs.
  • the material of the pixel mark 120 is not limited herein.
  • the pixel mark 120 may use some metal materials with better reflectivity, such as Ag, Al and other materials.
  • the second embodiment of the present application also provides a method for verifying the mask 200, as shown in FIG. 3, including:
  • Step S301 Provide a substrate.
  • the substrate 100 is the pixel array substrate 100 provided in any of the first embodiments described above.
  • the array substrate 100 includes a positioning coordinate system 110 and a pixel mark 120 corresponding to the positioning coordinate system 110, and the pixel mark 120 can be determined according to the positioning coordinate system 110 s position.
  • Step S302 Vapor-deposit the light-emitting layer.
  • the light-emitting layer includes actual sub-pixels 140 formed by evaporation, and the actual sub-pixels 140 are correspondingly disposed on the corresponding sub-pixel regions 130 on the substrate 100.
  • Step S303 Confirm the actual sub-pixel 140.
  • the pixel mark 120 is preliminarily determined using the positioning coordinate system 110, the sub-pixel area 130 to be verified is determined using the pixel mark 120, and the actual sub-pixel 140 corresponding to the sub-pixel area 130 to be verified is confirmed according to the sub-pixel area 130 to be verified.
  • the sub-pixel area 130 to be verified and the pixel mark 120 are correspondingly set, that is, the sub-pixel area 130 to be verified is the sub-pixel area 130 corresponding to the pixel mark 120.
  • Step S304 verify the quality of the mask 200.
  • the vapor deposition error of the actual sub-pixel 140 is confirmed according to the actual vapor deposition position of the actual sub-pixel 140, and the quality of the mask 200 is verified according to the vapor deposition error.
  • the evaporation error is the position error between the actual actual sub-pixel 140 formed on the light-emitting layer and the corresponding sub-pixel area 130 to be verified. According to the position error, it can be confirmed whether the quality of the mask 200 meets the requirements.
  • the mask plate 200 has a verification opening 210 corresponding to the sub-pixel area 130 to be verified.
  • the method further includes: acquiring the verification opening 210 Manufacturing error.
  • Step S304 also includes: confirming the actual error according to the manufacturing error and the evaporation error, and confirming the quality of the mask 200 according to the actual error.
  • the number of verification openings 210 is the same as the number of pixel marks 120, the verification opening 210 corresponds to the sub-pixel area 130 corresponding to the pixel marks 120, and no other verification openings 210 is marked, as long as the verification opening 210 corresponds to the sub-pixel area 130 to be verified, and the sub-pixel area 130 to be verified corresponds to the pixel mark 120.
  • the actual error is confirmed according to the manufacturing error and the vapor deposition error of the mask 200, and the result of verifying the mask 200 can be made more accurate according to the actual error.
  • the mask 200 has a certain manufacturing error in the manufacturing process. That is, manufacturing errors may occur in the process of manufacturing the mask plate according to the requirements of the mask plate 200, so the size data of the manufactured mask plate 200 and the design data may be inconsistent. Usually, a set of manufacturing data including manufacturing errors of the mask 200 is given. During the verification process of the mask 200, it is usually verified whether the actual errors of the mask 200 are consistent with the manufacturing data. If the manufacturing error of the mask plate 200 is ignored, and the quality of the mask plate 200 is directly confirmed by the vapor deposition error, the actual error of confirming the quality of the mask plate 200 will be large, and the verification result will be biased.
  • the actual error of the actual sub-pixel 140 is found according to the manufacturing error and the evaporation error of the mask 200, but the quality of the mask 200 is confirmed according to the actual error of the actual sub-pixel 140, so that the verification result of the mask 200 is more accurate.
  • the actual position of a certain opening 210 to be verified on the mask 200 is shifted to the left by one unit relative to the design position, that is, the manufacturing error of the opening 210 to be verified is (-1,0) .
  • the actual evaporation position of the actual sub-pixel 140 corresponding to the opening to be verified 210 is shifted to the left by two units relative to its corresponding sub-pixel area 130, that is, the evaporation error of the actual sub-pixel 140 is (-2, 0) Since the mask 200 itself has a certain manufacturing error, the actual error should be the error value after the vaporization error combined with the manufacturing error, that is, the actual error should be (-1, 0).
  • the actual error in confirming the quality of the mask plate 200 is large, which makes the verification result biased, and the result of verifying the mask plate 200 may be more accurate according to the actual error.
  • the vapor deposition error includes an offset and an offset direction.
  • Step S304 further includes verifying the quality of the mask 200 according to the offset and offset direction of more than two verification sub-pixels.
  • the offset refers to the offset distance of the actual sub-pixel 140 relative to the sub-pixel region 130 to be verified, and the offset direction refers to the direction in which the actual sub-pixel 140 is offset from the sub-pixel region 130 to be verified.
  • the dotted line indicates the sub-pixel area 130 to be verified
  • the solid line indicates the actual sub-pixel 140 formed after the actual evaporation.
  • the actual sub-pixel 140 may be translated relative to the sub-pixel region 130 to be verified, and may also be rotated based on the translation. As shown in FIGS. 5 and 6, the actual sub-pixel 140 is translated by a distance a relative to the sub-pixel area 130 to be verified. As shown in FIGS. 7 and 8, the actual sub-pixel 140 is deflected relative to the sub-pixel region 130 to be verified, and the deflection angle is ⁇ angle, and the offset is b. Therefore, the offset direction includes the translation direction and the rotation angle.
  • step S304 further includes: verifying the quality of the mask 200 according to the translation direction and offset of the actual sub-pixel 140, and/or according to the rotation angle and deviation of the actual sub-pixel 140 The displacement verifies the quality of the mask 200.
  • Step S304 includes step S3041: When the offset directions and offsets of the two or more actual sub-pixels 140 are consistent, it is confirmed that the quality of the mask 200 meets the requirements. Among them, the consistency of the offset here refers to the consistency within the allowable range of the error, rather than the consistency in the strict sense.
  • the sub-pixel area 130 includes a light-emitting area 131.
  • the sub-pixel area 130 is deflected, that is, the actual sub-pixel 140 position formed by evaporation of the pixel area 130 is deflected relative to the pixel area 130.
  • the light-emitting area 131 is still within the sub-pixel area 130, that is, after the actual sub-pixel 140 is deflected relative to the pixel area 130, the light-emitting area 131 is still within the actual sub-pixel 140.
  • the offset directions and offsets of more than two actual sub-pixels 140 are consistent, it means that only the mask 200 needs to be changed according to the offset directions and offsets during the evaporation process , which can compensate for the deposition error, indicating that there is no problem with the quality of the mask 200.
  • step S304 includes step S3042: when the offset directions of more than two actual sub-pixels 140 are not consistent, it is confirmed that the quality of the mask 200 does not meet the requirements.
  • step S304 includes step S3043: the step of verifying the quality of the mask 200 further includes confirming the mask when the offset directions of more than two actual sub-pixels 140 are consistent and the offsets are inconsistent
  • the offset inconsistency here means that the offset is beyond the error range, rather than strictly inconsistent.
  • the method for verifying the mask plate 200 implemented in this application only needs to be vapor-deposited once, and the mask plate 200 can be judged whether it is qualified according to the vapor deposition result, and the verification process can quickly find the pending verification according to the positioning coordinate system 110 and the pixel mark 120
  • the sub-pixel area 130 and the sub-pixel to be verified can effectively improve the verification efficiency of the mask plate 200 and improve the production efficiency of the mask plate 200.

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Abstract

本申请实施例提供一种像素阵列基板和验证掩膜板的方法，像素阵列基板包括：显示区域，显示区域内设置有阵列分布的多个子像素区域；非显示区域，设置于显示区域的外周侧；定位坐标组，包括第一定位标记及第二定位标记，多个第一定位标记在非显示区域沿第一方向间隔分布，多个第二定位标记在非显示区域沿第二方向间隔分布，沿第二方向延伸并经过第一定位标记的第一直线、与沿第一方向延伸并经过第二定位标记的第二直线在显示区域内相交，且第一直线和第二直线的交点对应于子像素区域设置；像素标记，设置于第一直线和第二直线的交点处。

Description

像素阵列基板和验证掩膜板的方法
相关申请的交叉引用
本申请要求享有于2019年1月9日提交的名称为“像素阵列基板和验证掩膜板的方法”的中国专利申请第201910020586.0号的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本申请涉及显示设备技术领域，尤其涉及一种像素阵列基板和验证掩膜板的方法。
背景技术
目前，有LCD、OLED、PDP和电子墨水等多种显示板，其中OLED显示板借助轻薄、低功耗、高对比度、高色度域以及可柔性显示等优点，成为下一代显示器的发展趋势。
OLED显示板包括PMOLED和AMOLED两种类型，其中AMOLED显示板一般采用金属掩膜板蒸镀工艺方式进行生产制造。在采用金属掩膜板在背板上进行蒸镀时，需要将金属掩膜板上的开口和背板上的预设电极位进行准确对准，这就要求金属掩膜板上的开口位置必须满足使用要求。在金属掩膜板的生产过程中，一般要对金属掩膜板上的开口进行验证。
发明内容
本申请实施例提供一种像素阵列基板和验证掩膜板的方法，旨在提高金属掩膜板的生产效率，降低金属掩膜板的生产成本。
本申请实施例第一方面提供了一种像素阵列基板，像素阵列基板包括：显示区域，显示区域内设置有阵列分布的多个子像素区域；非显示区域，设置于显示区域的外周侧；定位坐标组，包括第一定位标记及第二定 位标记，多个第一定位标记在非显示区域沿第一方向间隔分布，多个第二定位标记在非显示区域沿第二方向间隔分布，沿第二方向延伸并经过第一定位标记的第一直线、与沿第一方向延伸并经过第二定位标记的第二直线在显示区域内相交，且第一直线和第二直线的交点对应于子像素区域设置；像素标记，设置于第一直线和第二直线的交点处。
本申请实施例第二方面提供了一种验证掩膜板的方法，包括：
提供阵列基板，阵列基板包括定位坐标系和与定位坐标系对应的像素标记，以根据定位坐标系能够确定像素标记的位置；
蒸镀发光层，利用掩膜板在阵列基板的子像素区域蒸镀发光材料，以形成发光层；
确认实际子像素，利用定位坐标系初步确定像素标记，利用像素标记确定待验证子像素区域，并确认与待验证子像素区域所对应的实际子像素；
验证掩膜板的质量，确认实际子像素的蒸镀误差，并根据蒸镀误差验证掩膜板的质量。
根据本申请第二方面的实施方式，掩膜板上具有与待验证子像素区域对应的验证开口，在验证掩膜板的质量之前还包括：
获取验证开口的制造误差；
验证掩膜板的质量还包括：根据制造误差和蒸镀误差确认实际误差，根据实际误差确认掩膜板的质量。
蒸镀误差包括偏移量和偏移方向，验证掩膜板的质量步骤还包括根据两个以上的实际子像素的偏移量和偏移方向验证掩膜板的质量。
在本申请实施例的像素阵列基板中，像素阵列基板包括显示区域和非显示区域。显示区域内设置有多个子像素区域和像素标记，非显示区域内设置有定位坐标组。像素坐标位于第一直线和第二直线的交点处，因此根据定位坐标组能够快速查找出像素标记，第一直线和第二直线的交点对应于子像素区域设置，像素标记和子像素区域对应设置，能够快速找出待检测的子像素区域。因此在利用本申请实施例的像素阵列基板进行掩膜板质量的验证时，能够快速找到待验证的子像素区域，能够提高掩膜板的验证 效率。
附图说明
通过阅读以下参照附图对非限制性实施例所作的详细描述，本申请的其它特征、目的和优点将会变得更明显，其中，相同或相似的附图标记表示相同或相似的特征。
图1是本申请实施例的一种像素阵列基板的结构示意图；
图2是图1中I处的局部放大图；
图3是本申请实施例的一种待验证掩膜板的结构示意图；
图4是本申请实施例的一种验证掩膜板方法的流程示意图；
图5是本申请实施例的一种实际子像素偏移的结构示意图；
图6是本申请另一实施例的一种实际子像素偏移的结构示意图；
图7是本申请又一实施例的一种实际子像素偏移的结构示意图；
图8是本申请再一实施例的一种实际子像素偏移的结构示意图。
具体实施方式
现有技术中在金属掩膜板验证过程中，一般先使用该金属掩膜板在试验基板上进行蒸镀，人工随意选择蒸镀像素验证蒸镀结果，并对蒸镀结果进行计算。为了保证验证结果精准，一般需要进行4次以上的校准，需要在4块以上的基板上先后进行蒸镀，不仅需要消耗大量的基板，还需要大量的时间，极大的增加了金属掩膜板的生产成本。
因此，亟需一种新的像素阵列基板和验证掩膜板的方法。
下面将详细描述本申请的各个方面的特征和示例性实施例。下文中所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施例中。
为了更好地理解本申请，下面结合图1至图8根据本申请实施例的像素阵列基板和验证掩膜板的方法进行详细描述。
图1为本申请实施例提供的一种像素阵列基板100，图2为图1中I处的局部示意图，基板100具有显示区域和位于显示区域外周侧非显示区 域，像素阵列基板100还包括：定位坐标系110，即定位坐标组，定位坐标组包括第一定位标记111及第二定位标记112，多个第一定位标记111在非显示区域沿第一方向间隔分布，多个第二定位标记112在非显示区域沿第二方向间隔分布，第一方向与第二方向相交；像素标记120，对应子像素区域130设置，每个第一定位标记111沿第二方向延伸形成的第一射线和每个第二定位标记112沿第一方向形成的第二射线相交于显示区域并形成多个相交位置，在每个相交位置处设置有像素标记120。
由第一定位标记111沿第二方向延伸形成的第一射线并不构成对像素阵列基板100的结构限定，同理，第二定位标记112沿第一方向延伸形成的第二射线也不构成对像素阵列基板100的结构限定。此处仅仅是为了便于对像素标记120的设置位置进行描述，引入了第一射线和第二射线的概念。实际上，像素阵列基板100中并不真正的存在第一射线和第二射线。只要由第一定位标记111沿第二方向延伸能够形成第一射线，由第二定位标记112沿第一方向延伸能够形成第二射线，且像素标记120位于第一射线和第二射线的相交位置即可。
即在本发明实施例中，基板100包括显示区域和非显示区域，显示区域内设置有多个子像素区域130。且沿第二方向延伸并经过第一定位标记111的第一直线、与沿第一方向延伸并经过第二定位标记112的第二直线在显示区域内相交，且第一直线和第二直线的交点对应于子像素区域130设置。像素标记120设置于第一直线和第二直线的交点处。
此外，第一方向和第二方向的设置方式有多种，第一方向和第二方向可以以任意预设角度相交设置，优选的，第一方向和第二方向之间的夹角呈90度，根据沿第一方向和第二方向分布的第一定位标记111可以沿着横平竖直的方向查找像素标记120，方便查找确认像素标记120，提高验证掩膜板200的效率。本实施例中，第一方向和第二方向可以分别为图1中的X方向和Y方向。
在本申请实施例的像素阵列基板100中，像素阵列基板100包括显示区域和非显示区域，显示区域内设置有多个子像素区域130和像素标记120，非显示区域内设置有定位坐标系110，且显示区域的像素标记位于第 一定位标记111沿所述第二方向延伸形成的第一射线和第二定位标记112沿所述第一方向形成的第二射线相交形成的多个相交位置处，即像素标记120位于第一射线和第二射线的交点处，即像素标记120位于第一直线和第二直线的交点处。因此根据定位坐标系110能够快速查找出像素标记120，第一直线和第二直线的交点和子像素区域对应设置，即像素标记120和子像素区域130对应设置，根据像素标记120和定位坐标系110能够快速找出待检测的子像素区域130。在利用本申请实施例的像素阵列基板100进行掩膜板200质量的验证时，能够快速找到待验证的子像素区域130，能够提高掩膜板200的验证效率。
其中，定位坐标系110中第一定位标记111和第二定位标记112的具体设置方式在此不做限定，例如第一定位标记111和第二定位标记112可以设置在光反射度较高的金属膜层，清空第一定位标记111或第二定位标记112标记所在位置周围的其他材料，曝光出单个的定位标记，即令金属膜层暴露出。此外还可以根据验证需求，调整第一定位标记111和第二定位标记112的数量。
第一定位标记111和第二定位标记112的形状在此不做限定，例如第一定位标记111和第二定位标记112可以为圆形、矩形和多边形等。
优选的，第一定位标记111呈矩形，且第一定位标记111沿第二方向延伸预设距离，便于用户确认由第一定位标记111沿第二方向延伸形成的第一射线，进而便于用户根据第一定位标记111找到像素标记120在第二方向上的位置。
第二定位标记112的形状可以和第一定位标记111相同或不同，此处为了简化定位坐标系110的设置方式，第二定位标记112的形状和第一定位标记111相似。第二定位标记112为矩形，且第二定位标记112沿第一方向延伸预设距离设置，便于用户确认由第二定位标记112沿第一方向延伸形成的第二射线，进而便于用户根据第二定位标记112找到像素标记120在第一方向上的位置。
因此通过矩形的第一定位标记111和第二定位标记112便于用户快速找到像素标记120在像素阵列基板100显示区域内的具体位置。
像素标记120的具体设置个数在此不做限定，为了根据多个像素标记120对应的子像素区域130确认验证掩膜板200的结果，像素标记120为两个以上，优选的像素标记120为4个、9个等。在本实施例中，像素标记120为9个。
第一定位标记111和第二定位标记112的个数在此不做限定，第一定位标记111和第二定位标记112可以根据像素标记120的个数确定，在本实施例中，当像素标记120为9个时，第一定位标记111和第二定位标记112分别为3个。
像素标记120的具体设置位置在此不做限定，在一些可选的实施例中，像素标记120对应像素定义层设置，也可以认为像素标记120对应像素定义结构设置，即像素标记120不位于像素阵列基板100上的像素开口内，像素标记120位于子像素区域130边缘设置。使得在对像素阵列基板100进行蒸镀形成发光层时，发光层的实际子像素140不会遮挡像素标记120，便于查找和确认像素标记120。如图2所示，理想状态下当利用该像素阵列基板100进行蒸镀时，蒸镀形成的实际子像素140应该填充于待验证子像素区域130内。
像素标记120的具体形状在此不做限定，优选的，像素标记120为异形，即像素标记120与像素阵列基板100上的其他结构形状不同，便于在像素阵列基板100上快速找到像素标记120。例如，像素标记120可以为十字形、多边形等。在本申请实施例中，像素标记120呈十字形。
在一些可选的实施例中，像素标记120形成于像素阵列基板100的金属层。在阵列基板100形成金属层时，同时形成像素标记120，使得像素标记120不需要多余的单独工序进行制作，可以较好的节省成本。
像素标记120的材质在此不做限定，像素标记120可以选用一些反光度较好的金属材料，如Ag、Al等材料。
本申请第二实施例还提供一种验证掩膜板200的方法，如图3所示，包括：
步骤S301：提供基板。
其中，基板100为上述任一第一实施例提供的像素阵列基板100，阵 列基板100包括定位坐标系110和与定位坐标系110对应的像素标记120，且根据定位坐标系110能够确定像素标记120的位置。
步骤S302：蒸镀发光层。
请一并结合图5至图8，利用待验证的掩膜板200在基板100的子像素区域130蒸镀发光材料，形成发光层。发光层包括蒸镀形成的实际子像素140，实际子像素140对应设置于基板100上相应的子像素区域130。
步骤S303：确认实际子像素140。
利用定位坐标系110初步确定像素标记120，利用像素标记120确定待验证子像素区域130，并根据待验证子像素区域130确认与待验证子像素区域130对应的实际子像素140。其中，待验证的子像素区域130和像素标记120对应设置，即待验证的子像素区域130为像素标记120对应的子像素区域130。
步骤S304：验证掩膜板200的质量。
根据实际子像素140的实际蒸镀位置确认实际子像素140的蒸镀误差，并根据蒸镀误差验证掩膜板200的质量。其中蒸镀误差为发光层上形成实际的实际子像素140和与其对应的待验证子像素区域130之间的位置误差，根据该位置误差可以确认掩膜板200的质量是否符合要求。
在一些可选的实施例中，如图4所示，掩膜板200上具有与待验证子像素区域130对应的验证开口210，在验证掩膜板200的质量之前还包括：获取验证开口210的制造误差。步骤S304还包括：根据制造误差和蒸镀误差确认实际误差，根据实际误差确认掩膜板200的质量。
其中，图4中仅示出了一个验证开口210，验证开口210的个数和像素标记120的个数相同，验证开口210和像素标记120对应的子像素区域130对应，不再对其他验证开口210进行标记，只要验证开口210和待验证子像素区域130对应，待验证子像素区域130和像素标记120对应即可。
当掩膜板200的验证开口210存在制造误差时，根据掩膜板200的制造误差和蒸镀误差确认实际误差，根据实际误差能够使得验证掩膜板200的结果更加准确。
通常情况下，掩膜板200在生产制造过程中存在一定的制造误差。即在根据掩膜板200要求制作掩膜板的过程中会出现制造误差，因此制造出的掩膜板200的尺寸数据与设计数据可能不一致。通常会给出一组包含了掩膜板200制造误差的制造数据，掩膜板200的验证过程中通常是验证掩膜板200的实际误差与制造数据是否一致。如果忽略掩膜板200的制造误差，直接以蒸镀误差确认掩膜板200的质量，会导致确认掩膜板200质量的实际误差较大，使得验证结果存在偏差。根据掩膜板200的制造误差和蒸镀误差找出实际子像素140的实际误差，根据实际子像素140的实际误差却确认掩膜板200的质量，使得掩膜板200的验证结果更准确。
例如，在一个坐标系中，掩膜板200上某一个待验证开口210的实际位置相对于设计位置向左偏移了一个单位，即该待验证开口210的制造误差为(-1,0)。该待验证开口210对应的实际子像素140的实际蒸镀位置相对于其对应的子像素区域130向左偏移了两个单位，即实际子像素140的蒸镀误差为(-2，0)，由于掩膜板200本身存在一定的制造误差，实际误差应该是蒸镀误差综合制造误差之后的误差值，即实际误差应该是(-1，0)。如果根据蒸镀位置误差确认掩膜板200的质量，会导致确认掩膜板200质量的实际误差较大，使得验证结果存在偏差，根据实际误差能够使得验证掩膜板200的结果更加准确。
以上仅仅是示出验证开口210的制造误差和实际子像素140的蒸镀误差发生了平移，存在平移误差。而实际蒸镀过程中还会存在其他各种误差，例如旋转误差，在此不再一一举例说明。
在一些可选的实施例中，蒸镀误差包括偏移量和偏移方向，步骤S304还包括根据两个以上的验证子像素的偏移量和偏移方向验证掩膜板200的质量。其中，偏移量是指实际子像素140相对于待验证子像素区域130的偏移距离，偏移方向是指实际子像素140相对于待验证子像素区域130相对于哪个方向发生了偏移。
如图5至图8所示，图中以点划线表示待验证子像素区域130，以实线表示实际蒸镀后形成的实际子像素140。实际子像素140相对于待验证子像素区域130有可能是发生了平移，有可能是在发生平移的基础上还发 生了旋转。如图5和图6所示，实际子像素140相对于待验证子像素区域130平移了距离a。如图7和图8所示，实际子像素140相对于待验证子像素区域130发生了偏转，且偏转角为α角，偏移量为b。因此偏移方向包括平移方向和旋转角度两种。
因此，在一些可选的实施例中，步骤S304还包括：根据实际子像素140的平移方向和偏移量验证掩膜板200的质量，和/或，根据实际子像素140的旋转角度和偏移量验证掩膜板200的质量。
由于验证过程中仅关注于待验证子像素区域130，因此其它子像素区域不做关注，图5至图8中其它子像素区130蒸镀形成的实际子像素是否产生蒸镀误差在此不做限定，图5至图8并不构成对其他子像素区域的限定。
在上述任一实施例中，根据两个以上的实际子像素140的偏移量和偏移方向验证掩膜板200的质量的方法有多种，例如在一些可选的实施例中，
步骤S304包括步骤S3041：当两个以上的实际子像素140的偏移方向和偏移量均一致时，确认掩膜板200的质量符合要求。其中，这里的偏移量一致是指在误差允许范围内的一致，而不是严格意义上的一致。
如图5至图8所示，子像素区域130内包括发光区域131，当子像素区域130发生偏转，即像素区域130蒸镀形成的实际子像素140的位置相对于像素区域130发生了偏转。但是发光区域131仍然在子像素区域130内时，即实际子像素140相对于像素区域130发生偏转后，发光区域131仍然在实际子像素140内。如图5和图7所示，说明子像素区域130虽然发生偏转，但是不影响显示，因此偏移量在误差允许的范围之内；但是当子像素区域130发生偏转，发光区域131已经不在子像素区域130内时，即实际子像素140相对于像素区域130发生偏转后，发光区域131不在实际子像素140内。如图6和图8所示，说明子像素区域130的偏转已经影响显示，因此偏移量不在误差允许的范围之内
在这些可选的实施例中，当两个以上的实际子像素140的偏移方向和偏移量均一致时，表明蒸镀过程中只需根据偏移方向和偏移量改变掩膜板 200的位置，即能够弥补蒸镀误差，说明掩膜板200的质量不存在问题。
在另一些可选的是实施例中，步骤S304包括步骤S3042：当两个以上的实际子像素140的偏移方向不一致时，确认掩膜板200的质量不符合要求。
在这些可选的实施例中，当两个以上的实际子像素140的偏移方向不一致时，说明通过改变掩膜板200和基板100之间的相对位置，无法弥补蒸镀误差，所以掩膜板200的质量存在问题，掩膜板200不合格。
在又一些可选的实施例中，步骤S304包括步骤S3043：验证掩膜板200的质量步骤还包括当两个以上的实际子像素140的偏移方向一致，且偏移量不一致时，确认掩膜板200不符合要求。其中，这里的偏移量不一致是指偏移量超出了误差范围，而不是严格意义上的不一致。
在这些可选的实施例中，当两个以上的实际子像素140的偏移方向一致，且偏移量不一致时，说明通过改变掩膜板200和基板100之间的相对位置，无法弥补蒸镀误差，所以掩膜板200的质量存在问题，掩膜板200不合格。
本申请实施的验证掩膜板200的方法仅需要蒸镀一次，根据蒸镀结果即可能够判断掩膜板200是否合格，且验证过程中能够根据定位坐标系110和像素标记120快速找到待验证的子像素区域130和待验证的子像素，能够有效提高掩膜板200的验证效率，提高掩膜板200的生产效率。
本申请可以以其他的具体形式实现，而不脱离其精神和本质特征。例如，特定实施例中所描述的算法可以被修改，而系统体系结构并不脱离本申请的基本精神。因此，当前的实施例在所有方面都被看作是示例性的而非限定性的，本申请的范围由所附权利要求而非上述描述定义，并且，落入权利要求的含义和等同物的范围内的全部改变从而都被包括在本申请的范围之中。

Claims (17)

  1. 一种像素阵列基板，包括：
    显示区域，所述显示区域内设置有阵列分布的多个子像素区域；
    非显示区域，设置于所述显示区域的外周侧；
    定位坐标组，包括第一定位标记及第二定位标记，多个所述第一定位标记在所述非显示区域沿第一方向间隔分布，多个所述第二定位标记在所述非显示区域沿第二方向间隔分布，沿所述第二方向延伸并经过所述第一定位标记的第一直线与沿所述第一方向延伸并经过所述第二定位标记的第二直线在所述显示区域内相交，且所述第一直线和所述第二直线的交点对应于所述子像素区域设置；
    像素标记，设置于所述第一直线和所述第二直线的交点处。
  2. 根据权利要求1所述的像素阵列基板，其中，所述像素标记对应像素定义结构设置，且所述像素标记位于所述子像素区域边缘。
  3. 根据权利要求1所述的像素阵列基板，其中，所述像素标记形成于所述像素阵列基板的金属层。
  4. 根据权利要求1所述的像素阵列基板，其中，
    所述第一定位标记呈矩形，且所述第一定位标记沿所述第二方向延伸预设距离；
    和/或，所述第二定位标记呈矩形，且所述第二定位标记沿所述第二方向延伸预设距离设置。
  5. 根据权利要求1所述的像素阵列基板，其中，所述像素标记为9个，所述第一定位标记和所述第二定位标记分别为3个。
  6. 根据权利要求1所述的像素阵列基板，其中，所述像素标记为十字形或多边形。
  7. 根据权利要求1所述的像素阵列基板，其中，所述像素标记选用Ag或Al材料制成。
  8. 根据权利要求1所述的像素阵列基板，其中，所述第一定位标记和所述第二定位标记的形状为圆形或多边形。
  9. 一种验证掩膜板的方法，包括：
    提供阵列基板，所述阵列基板包括定位坐标系和与所述定位坐标系对应的像素标记，以根据所述定位坐标系能够确定所述像素标记的位置；
    蒸镀发光层，利用掩膜板在所述阵列基板的子像素区域蒸镀发光材料，以形成发光层；
    确认实际子像素，利用所述定位坐标系初步确定所述像素标记，利用所述像素标记确定待验证子像素区域，并确认与所述待验证子像素区域所对应的实际子像素；
    验证掩膜板的质量，确认所述实际子像素的蒸镀误差，并根据所述蒸镀误差验证所述掩膜板的质量。
  10. 根据权利要求9所述的方法，其特征在在于，所述掩膜板上具有与所述待验证子像素区域对应的验证开口，在验证掩膜板的质量之前还包括：
    获取所述验证开口的制造误差；
    验证掩膜板的质量还包括：根据所述制造误差和所述蒸镀误差确认实际误差，根据所述实际误差确认所述掩膜板的质量。
  11. 根据权利要求9所述的方法，其中，所述蒸镀误差包括偏移量和偏移方向，所述验证掩膜板的质量步骤还包括根据所述两个以上的所述实际子像素的偏移量和偏移方向验证所述掩膜板的质量。
  12. 根据权利要求11所述的方法，其中，所述验证掩膜板的质量步骤还包括：当两个以上的所述实际子像素的偏移方向和偏移量均一致时，确认所述掩膜板的质量符合要求。
  13. 根据权利要求11所述的方法，其中，所述验证掩膜板的质量步骤还包括：当两个以上的所述实际子像素的所述偏移方向不一致时，确认所述掩膜板的质量不符合要求。
  14. 根据权利要求11所述的方法，其中，所述验证掩膜板的质量步骤还包括当两个以上的所述实际子像素的所述偏移方向一致，且所述偏移量不一致时，确认所述掩膜板不符合要求。
  15. 根据权利要求12至14任一项所述的方法，其中，当所述偏移量在误差允许的范围之内时，认为所述偏移量一致；当所述偏移量不在误差允 许的范围之内时，认为所述偏移量不一致。
  16. 根据权利要求15所述的方法，其中，还包括：
    所述子像素区域内包括发光区域；
    当所述实际子像素相对所述子像素区域发生偏转，但发光区域仍然在所述实际子像素区域内时，所述偏移量在误差允许的范围之内；
    当所述实际子像素相对所述子像素区域发生偏转，但至少部分发光区域不在所述实际子像素区域内时，所述偏移量不在误差允许的范围之内。
  17. 根据权利要求11所述的方法，其中，所述偏移方向包括平移方向和旋转角度，所述验证掩膜板的质量步骤还包括：根据所述实际子像素的所述平移方向和所述偏移量验证所述掩膜板的质量，和/或，根据所述实际子像素的所述旋转角度和所述偏移量验证所述掩膜板的质量。
PCT/CN2019/098315 2019-01-09 2019-07-30 像素阵列基板和验证掩膜板的方法 Ceased WO2020143216A1 (zh)

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