WO2020133580A1 - 驱动控制模组及显示装置 - Google Patents

驱动控制模组及显示装置 Download PDF

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Publication number
WO2020133580A1
WO2020133580A1 PCT/CN2019/071095 CN2019071095W WO2020133580A1 WO 2020133580 A1 WO2020133580 A1 WO 2020133580A1 CN 2019071095 W CN2019071095 W CN 2019071095W WO 2020133580 A1 WO2020133580 A1 WO 2020133580A1
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Prior art keywords
output
voltage
switch
output channels
main control
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PCT/CN2019/071095
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English (en)
French (fr)
Inventor
王明良
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惠科股份有限公司
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Publication of WO2020133580A1 publication Critical patent/WO2020133580A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Definitions

  • the present application relates to the field of display technology, in particular to a drive control module and a display device.
  • GDL Gate Driverless display panels
  • the GDL architecture is composed of a boost system and a shift register.
  • the boost system is set on the driver board, and the shift register is set on the driver board of the display panel.
  • the boost system transmits the CLK (Clock, clock) signal Complete the driving of the display panel for the shift register.
  • CLK Lock, clock
  • the step-up system is installed on the driving board so that the frame length of the display panel can be reduced.
  • a drive control module and a display device are provided.
  • the drive control module includes:
  • the conversion circuit is set to receive a low potential logic signal and convert it into a high potential drive signal
  • Multiple first output channels connected to the conversion circuit, set to output high-potential drive signals
  • Multiple second output channels connected to the conversion circuit, set to output high potential drive signals
  • the main control circuit is respectively connected to the plurality of first output channels and the plurality of second output channels, and is configured to control the on and off of the plurality of first output channels and the plurality of second output channels ;
  • a detection circuit connected between the conversion circuit and the plurality of first output channels and between the conversion circuit and the plurality of second output channels, and configured to detect the first output of each first output channel Current and the second output current of each second output channel;
  • a power chip connected to the conversion circuit and configured to supply power to the conversion circuit
  • the main control circuit is also connected to the detection circuit and the power chip respectively, and the main control circuit is further configured to control all first output channels to be cut off when the first output current is greater than a preset output current Or when the second output current is greater than the preset output current, control all second output channels to be turned off, and control the power supply voltage of the power chip to change from the first voltage to the second voltage to increase the The voltage of the high potential driving signal reaches a preset value.
  • the power chip includes:
  • a first memory configured to store first data
  • a digital-to-analog converter is respectively connected to the conversion circuit and the first memory, and is configured to convert the first data into a first voltage and provide it to the conversion circuit.
  • the power chip further includes a second memory, the second memory is configured to store second data; the digital-to-analog converter is also connected to the second memory, the digital-to-analog converter It is also arranged to convert the second data into a second voltage and provide it to the conversion circuit.
  • the power chip further includes:
  • a first switch respectively connected to the first memory, the digital-to-analog converter and the main control circuit;
  • the second switch is respectively connected to the second memory, the digital-to-analog converter and the main control circuit;
  • the main control circuit is further configured to control the first switch from on to off and the second switch from off to on when the first output current is greater than a preset output current, to The power supply voltage of the power chip is controlled to change from the first voltage to the second voltage.
  • the main control circuit is further configured to control the first switch from on to off and to control the second switch when the second output current is greater than a preset output current Turning off becomes on to control the power supply voltage of the power chip to change from the first voltage to the second voltage.
  • the detection circuit includes:
  • a computing element is respectively connected to both ends of the resistor; set to detect the voltage across each resistor, and calculate the first output current corresponding to a first output channel according to the voltage across each resistor, and connect the first The output current is transmitted to the main control circuit.
  • each resistor is connected to a second output channel; the computing element is connected to both ends of the resistor, and is configured to detect the voltage across each resistor, and according to the The voltage calculation corresponds to a second output current of a second output channel, and transmits the second output current to the main control circuit.
  • each first output channel includes a third switch, the third switch is connected to the main control circuit, and is configured to turn off or turn on the switch according to a control signal of the main control circuit The first output channel.
  • each second output channel includes a fourth switch, the fourth switch is connected to the main control circuit, and is configured to turn off or turn on the switch according to the control signal of the main control circuit The second output channel.
  • the main control circuit controls the on and off of the first switch and the on and off of the second switch through a voltage signal.
  • the third switch is a MOS transistor.
  • the fourth switch is a MOS transistor.
  • the number of the first output channel and the second output channel are the same.
  • the absolute value of the potential of the high potential drive signal is greater than the absolute value of the potential of the low potential logic signal.
  • the drive control module includes:
  • the conversion circuit is set to receive a low potential logic signal and convert it into a high potential drive signal
  • Multiple first output channels connected to the conversion circuit, set to output high-potential drive signals
  • Multiple second output channels connected to the conversion circuit, set to output high potential drive signals
  • the main control circuit is respectively connected to the plurality of first output channels and the plurality of second output channels, and is configured to control the on and off of the plurality of first output channels and the plurality of second output channels ;
  • a detection circuit connected between the conversion circuit and the plurality of first output channels and between the conversion circuit and the plurality of second output channels, and configured to detect the first output of each first output channel Current and the second output current of each second output channel;
  • the power chip includes a first memory, a second memory, a digital-to-analog converter, a first switch, and a second switch;
  • the first memory is configured to store first data;
  • the second memory is configured to store second data;
  • the digital-to-analog converter is connected to the conversion circuit, and is also connected to the first memory or the second memory, and is configured to convert the first data to a first voltage and provide the conversion circuit or convert the
  • the second data is converted into a second voltage and provided to the conversion circuit;
  • the first switch is respectively connected to the first memory, the digital-to-analog converter and the main control circuit;
  • the second switch is respectively Connected with the second memory, the digital-to-analog converter and the main control circuit;
  • the main control circuit is also connected to the detection circuit and the power chip respectively, and the main control circuit is further configured to control all first output channels to be cut off when the first output current is greater than a preset output current Or when the second output current is greater than the preset output current, control all the second output channels to be off, and control the first switch from on to off and the second switch from off to Turn on to control the power supply voltage of the power chip to change from the first voltage to the second voltage, thereby increasing the voltage of the high-potential drive signal.
  • a display device including a boosting system, a driving circuit board, a display panel, and a shift register; the boosting system includes the above drive control module; the boosting system is provided on the driving circuit board , The shift register is disposed on both sides of the display panel.
  • the display panel includes an active array substrate, a color filter layer substrate, and a liquid crystal layer formed between the two substrates.
  • the shift register is disposed on the active array substrate.
  • FIG. 1 is a schematic block diagram of a drive control module provided by an embodiment
  • FIG. 2 is a voltage waveform diagram of a high-potential driving signal of a bilateral driving and a unilateral driving of a display panel according to an embodiment
  • FIG. 3 is a circuit diagram of a conversion circuit provided by an embodiment
  • FIG. 4 is a waveform diagram of a low potential logic signal and a high potential drive signal provided by an embodiment
  • FIG. 5 is a schematic block diagram of a display device provided by an embodiment.
  • FIG. 1 is a functional block diagram of a drive control module provided by this application.
  • the drive control module includes a conversion circuit 10, a plurality of first output channels OUT1, a plurality of second output channels OUT2, a main control circuit 30, a detection circuit 40, and a power chip 50.
  • the conversion circuit 10 is used to receive a low potential logic signal and convert it into a high potential drive signal. Specifically, the conversion circuit 10 receives a low-level logic signal through an input channel.
  • the low potential logic signal is a logic signal
  • the high potential drive signal is an analog voltage signal.
  • the absolute value of the potential of the high potential drive signal is greater than the absolute value of the potential of the low potential logic signal.
  • the shift registers are provided on both sides of the display panel.
  • the plurality of first output channels OUT1 are connected to the conversion circuit 10 for outputting high-potential driving signals.
  • the plurality of second output channels OUT2 are connected to the conversion circuit 10 for outputting high-potential driving signals.
  • the drive control module is used in a boosting system.
  • the plurality of first output channels OUT1 are connected to a shift register provided on one side of the display panel, and the plurality of second output channels OUT2 are connected to a shift register provided on the other side of the display panel.
  • the high-potential driving signal is output to the shift register through the plurality of first output channels OUT1 and the plurality of second output channels OUT2, and drives the display panel through the shift register.
  • the main control circuit 30 is connected to the plurality of first output channels OUT1 and the plurality of second output channels OUT2, respectively, for controlling the plurality of first output channels OUT1 and the plurality of second output channels Turn on and off of OUT2.
  • the high-potential driving signal can be transmitted to the shift register through the first output channel OUT1, thereby driving the display panel.
  • the high-potential driving signal stops being transmitted to the shift register through the first output channel OUT1.
  • the second output channel OUT2 is turned on, the high-potential driving signal can be transmitted to the shift register through the second output channel OUT2, thereby driving the display panel.
  • the second output channel OUT2 is turned off, the high-potential driving signal stops being transmitted to the shift register through the second output channel OUT2.
  • the display panel may be driven by the high potential driving signals simultaneously output by the plurality of first output channels OUT1, or may be driven by the high potential driving signals simultaneously output by the plurality of second output channels OUT2, or may be driven by the plurality of An output channel OUT1 and the plurality of second output channels OUT2 simultaneously output high-level driving signals that are simultaneously driven.
  • the display panel is driven and driven by the high potential driving signals simultaneously output by the plurality of first output channels OUT1 and the plurality of second output channels OUT2 into high potentials simultaneously output by the plurality of first output channels OUT1
  • the driving signal is driven or driven by the high-potential driving signals simultaneously output by the plurality of second output channels OUT2, that is, the display panel is changed from bilateral driving to unilateral driving.
  • the main control circuit 30 is an MCU (Microcontroller Unit, Micro Control Unit).
  • the detection circuit 40 is connected between the conversion circuit 10 and the plurality of first output channels OUT1 and between the conversion circuit 10 and the plurality of second output channels OUT2 for detecting each first The first output current of the output channel OUT1 and the second output current of each second output channel OUT2.
  • the first output current and the second output current are driving currents of the display panel.
  • the power chip 50 is connected to the conversion circuit 10 and is used to supply power to the conversion circuit 10.
  • the main control circuit 30 is also connected to the detection circuit 40 and the power chip 50 respectively.
  • the main control circuit 30 is also used to control all the first output channels OUT1 to turn off when the first output current is greater than the preset output current, and control the power supply voltage of the power chip 50 to change from the first voltage to A second voltage, or when the second output current is greater than a preset output current, control all second output channels OUT2 to be turned off, and control the power supply voltage of the power chip 50 to change from the first voltage to the second voltage, In order to increase the voltage of the high potential driving signal to a preset value.
  • the detection circuit 40 transmits the first output current and the second output current to the main control circuit 30, and the main control circuit 30 is also used to determine the first output current and all Whether the second output current is greater than the preset output current.
  • the shift register on the side of the display panel is damaged. If the second output current is greater than the preset output current, the shift register on the other side of the display panel is damaged.
  • the power chip 50 includes a first memory 51, a second memory 52, and a digital-to-analog converter 53.
  • the first memory 51 is used to store first data.
  • the second memory 52 is used to store second data. Both the first data and the second data are digital signals.
  • the digital-to-analog converter 53 is connected to the conversion circuit 10, the digital-to-analog converter 53 is also connected to the first memory 51 or the second memory 52, and the digital-to-analog converter 53 is used for When the first memory 51 is connected, the first data is converted into a first voltage and provided to the conversion circuit 10; also used to convert the second data when connected to the second memory 52 Into a second voltage and provide it to the conversion circuit 10.
  • the power chip 50 further includes a first switch K1 and a second switch K2.
  • the first switch K1 is connected to the first memory 51, the digital-to-analog converter 53, and the main control circuit 30, respectively.
  • the second switch K2 is connected to the second memory 52, the digital-to-analog converter 53, and the main control circuit 30, respectively.
  • the main control circuit 30 is also used to control the first switch K1 to change from on to off when the first output current is greater than a preset output current or the second output current is greater than a preset output current And controlling the second switch K2 to turn from off to on to control the power supply voltage of the power chip 50 to change from the first voltage to the second voltage.
  • the main control circuit 30 controls the on and off of the first switch K1 and the on and off of the second switch K2 through a voltage signal.
  • each first output channel OUT1 includes a third switch K3 that is connected to the main control circuit 30.
  • the third switch K3 is used to turn off or turn on the first output channel OUT1 according to the control signal of the main control circuit 30.
  • Each second output channel OUT2 includes a fourth switch K4 connected to the main control circuit 30. The fourth switch K4 is used to turn off or turn on the second output channel OUT2 according to the control signal of the main control circuit 30.
  • the third switch K3 When the first output channel OUT1 is turned on, that is, the third switch K3 is turned on, that is, the third switch K3 is turned on, and the first output channel OUT1 is turned off, that is, the third The switch K3 is turned off, that is, the third switch K3 turns off the first output channel OUT1.
  • the second output channel OUT2 When the second output channel OUT2 is turned on, that is, the fourth switch K4 is turned on, that is, the fourth switch K4 is turned on, and the second output channel OUT2 is turned off, that is, the fourth The switch K4 is turned off, that is, the fourth switch K4 turns off the second output channel OUT2.
  • the third switch K3 makes the control of the main control circuit 30 on and off of the first output channel OUT1 more flexible and convenient, and the fourth switch K4 makes the main control circuit 30 control the The control of the second output channel OUT2 is more flexible and convenient.
  • both the third switch K3 and the fourth switch K4 are MOS transistors.
  • the display panel is driven by the high-potential drive signals simultaneously output by the plurality of first output channels OUT1 and the plurality of second output channels OUT2 without damage to the shift register.
  • the main control circuit 30 controls all first output channels OUT1 to be turned off, and the display panel is simultaneously output by all second output channels OUT2 Driven by a high-potential driving signal, at this time, the display panel is driven by the high-potential driving signals simultaneously output by the plurality of first output channels OUT1 and the plurality of second output channels OUT2 to become only by the plurality of The high potential drive signal output from the second output channel OUT2 is driven.
  • the display panel is only driven by the high potential drive signal output from the shift register located on one side, because the high potential is transmitted on the display panel There is an impedance in the path of the driving signal.
  • the high-potential driving signal from the shift register to the area away from the shift register, it gradually attenuates as the transmission distance increases, as shown in FIG. 2.
  • the number of the first output channel OUT1 is the same as the number of the second output channel OUT2, and the number of the first output channel OUT1 and the number of the second output channel OUT2 are 4 .
  • the display panel is jointly driven by high potential drive signals simultaneously output by the plurality of first output channels OUT1 and the plurality of second output channels OUT2, and the voltage of each high potential drive signal is VGH1 ,
  • the voltage of each high potential drive signal is By setting the value VGH2, the charging effect driven by the high-potential driving signals simultaneously output by the plurality of first output channels OUT1 and the plurality of second output channels OUT2 can be achieved at this time.
  • the conversion circuit 10 includes a first electronic switch Q1, a second electronic switch Q2, a third electronic switch Q3, a fourth electronic switch Q4, a fifth electronic switch Q5, a sixth electronic switch Q6, a seventh electronic Switch Q7 and the eighth electronic switch Q8.
  • the first terminal of the first electronic switch Q1 receives the low-potential signal A
  • the second terminal of the first electronic switch Q1 is connected to the first power supply VDD
  • the third terminal of the first electronic switch Q1 is connected to the first
  • the first end of the four electronic switches Q4 is connected.
  • the first end of the second electronic switch Q2 receives the inverted signal A of the low potential signal A.
  • the second end of the second electronic switch Q2 is connected to the second end of the first electronic switch Q1.
  • the third terminal of the second electronic switch Q2 is connected to the first terminal of the third electronic switch Q3.
  • the second end of the third electronic switch Q3 is connected to the second end of the fourth electronic switch Q4 and the second power supply VGL, and the third end of the third electronic switch Q3 is also connected to the first electronic switch Q1 The third end of the connection.
  • the third terminal of the fourth electronic switch Q4 is also connected to the third terminal of the second electronic switch Q2.
  • the second end of the fifth electronic switch Q5 is connected to the third power supply VGH, and the third end of the fifth electronic switch Q5 is connected to the first end of the sixth electronic switch Q6.
  • the second end of the sixth electronic switch Q6 is connected to the second end of the fifth electronic switch Q5, and the third end of the sixth electronic switch Q6 is connected to the first end of the fifth electronic switch Q5.
  • the first end of the seventh electronic switch Q7 is connected to the third end of the second electronic switch Q2, the second end of the seventh electronic switch Q7 is connected to the second power supply VGL, and the seventh electronic switch Q7
  • the third end of is connected to the first end of the sixth electronic switch Q6.
  • the first end of the eighth electronic switch Q8 is connected to the third end of the first electronic switch Q1, and the second end of the eighth electronic switch Q8 is connected to the second end of the seventh electronic switch Q7,
  • the third terminal of the eighth electronic switch Q8 is connected to the third terminal of the sixth electronic switch Q6.
  • the signal at the first end of the third electronic switch Q3 and the signal at the first end of the fourth electronic switch Q4 are opposite phase signals, that is, the signal at the first end of the seventh electronic switch Q7 and the signal
  • the signals at the first terminal of the eighth electronic switch Q8 are inverted signals. As shown in FIG. 4, the signals at the first terminal of the third electronic switch Q3 and the signals at the first terminal of the seventh electronic switch Q7 Is B, the signal at the first end of the fourth electronic switch Q4 and the signal at the first end of the eighth electronic switch Q8 are B.
  • the third terminal of the sixth electronic switch Q6 outputs a high potential signal C.
  • the working principle of the conversion circuit 10 is as follows:
  • the low-potential signal A includes a low level and a high level in one cycle.
  • the first power supply VDD is a positive voltage DC power supply and the voltage is the absolute value of the high level of the low potential signal A.
  • the second power supply VGL is a negative voltage DC power supply and the absolute value of the voltage is greater than the absolute value of the low level of the low potential signal A.
  • the third power supply VGH is a positive voltage DC power supply and the voltage is greater than the voltage of the first power supply VDD.
  • the first electronic switch Q1 When the low potential signal A is high, the inverted signal A of the low potential signal A is low, the first electronic switch Q1 is turned off, the second electronic switch Q2 is turned on, and the first Three electronic switches Q3 are turned on, the seventh electronic switch Q7 is turned on, the fourth electronic switch Q4 and the eighth electronic switch Q8 are turned off, and because the seventh electronic switch Q7 is turned on, the sixth The electronic switch Q6 is turned on, the third terminal of the sixth electronic switch Q6 and the third power supply VGH are turned on, the third terminal of the sixth electronic switch Q6 outputs a high level and the voltage is the third power supply VGH voltage.
  • the sixth electronic switch Q6 When the low potential signal A is low, the inverted signal A of the low potential signal A is high, the first electronic switch Q1 is turned on, the second electronic switch Q2 is turned off, and the first Three electronic switches Q3 are turned off, the seventh electronic switch Q7 is turned off, the fourth electronic switch Q4 and the eighth electronic switch Q8 are turned on, and because the eighth electronic switch Q8 is turned on, the sixth electronic switch
  • the third terminal of Q6 is connected to the second power supply VGL, the third terminal of the sixth electronic switch Q6 outputs a low level and the voltage is the voltage of the second power supply VGL.
  • the conversion circuit 10 converts the input low-potential signal A with a lower absolute potential value into a high-potential signal C with a higher absolute potential value for output.
  • the sixth electronic switch Q6 The high level of the high potential signal C output from the third terminal is the third power supply VGH, and the low level is the second power supply VGL.
  • the conversion circuit 10 converts a low-potential signal with a low absolute value of the potential into a high-potential signal with a high absolute value of the potential, so that the high-potential signal can drive the display panel with a sufficient voltage.
  • the detection circuit 40 includes a plurality of resistors R and a calculation element 41. Each resistor R is connected to a first output channel OUT1 or a second output channel OUT2.
  • the calculation element 41 is connected to both ends of each resistor R.
  • the calculating element 41 is used to detect the voltage across each resistor R and calculate the first output current corresponding to a first output channel OUT1 or the second output corresponding to a second output channel OUT2 according to the voltage across each resistor R Current, and transmits the first output current and the second output current to the main control circuit.
  • the current through the resistor R is the first output current of the first output terminal or the second output current of the second output terminal, and the detection accuracy is high ,
  • the detection circuit is simple.
  • the present application also provides a display device, which includes a boosting system 300, a driving circuit board 400, a display panel 500 and a shift register 600.
  • the boosting system 300 includes the aforementioned drive control module.
  • the boosting system 300 is disposed on the driving circuit board 400, and the shift register 600 is disposed on both sides of the display panel 500.
  • the GDL circuit includes a boosting system 300 and a shift register 600. Since the shift register 600 occupies a small area, the display panel of the GDL architecture can achieve an ultra-narrow bezel.
  • the display panel 500 may be, for example, a TFT-LCD (Thin Film Transistor Liquid Crystal Display) display panel, an OLED (Organic Light-Emitting Diode, organic light emitting diode) display panel, a QLED (Quantum Dot Light Emitting Diodes, quantum dot light-emitting diodes) display panels, curved display panels or other display panels.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • OLED Organic Light-Emitting Diode, organic light emitting diode
  • QLED Quantum Dot Light Emitting Diodes, quantum dot light-emitting diodes
  • the display panel 500 is a liquid crystal display panel.
  • the display panel 500 includes an active array (TFT) substrate 501, a color filter (CF) substrate 502, and a substrate formed in two The liquid crystal layer between the substrates.
  • the shift register 600 is disposed on the active array substrate 501.
  • the active array (TFT) and the color filter layer (CF) may be formed on the same substrate.
  • the high-potential drive signal driving the display panel is output to the display panel through the plurality of first output channels and the plurality of second output channels.
  • the All the high-potential driving signals output by the second output channels drive the display panel
  • the second output current is greater than the preset output current
  • the high-potential driving signals output by all the first output channels drive the display panel, realizing
  • the display panel is dynamically switched from double-sided driving to single-sided driving, and the effect of double-sided driving is achieved by increasing the driving voltage of the single-sided driving, and the switching is intelligent and the cost is low.
  • a unit may be, but is not limited to, a process running on a processor, a processor, an object, executable code, a thread of execution, a program, and/or a computer.
  • a unit may be, but is not limited to, a process running on a processor, a processor, an object, executable code, a thread of execution, a program, and/or a computer.
  • the application running on the server and the server can be units.
  • One or more units may reside in a process and/or a thread of execution, and a unit may be located in one computer and/or distributed between two or more computers.

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  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
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  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

公开了一种驱动控制模组，多个第一输出通道（OUT1）及多个第二输出通道（OUT2）用于输出高电位驱动信号；主控电路（30）用于控制第一输出通道（OUT1）及第二输出通道（OUT2）的导通与截止；检测电路(40)用于检测每个第一输出通道（OUT1）的第一输出电流及每个第二输出通道（OUT2）的第二输出电流；主控电路(30)还用于当存在第一输出电流大于预设输出电流时，控制所有的第一输出通道（OUT1）截止，并控制电源芯片(50)的供电电压由第一电压改变为第二电压，以增大高电位驱动信号的电压至预设值。

Description

驱动控制模组及显示装置
本申请要求于2018年12月27日提交中国专利局、申请号为2018116121983、申请名称为“驱动控制模组及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别涉及一种驱动控制模组及显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着人们对窄边框电视的需求越来越强烈，GDL(Gate driver less，无栅极驱动)的显示面板越来越受到欢迎。GDL架构由升压系统和shift register(移位寄存器)两部分组成，升压系统设置于驱动板上，移位寄存器设置于显示面板的驱动板上，升压系统传输CLK(Clock，时钟)信号给移位寄存器完成对显示面板的驱动。升压系统设置于驱动板使得显示面板的边框长度可以减小。
当某个移位寄存器受到损坏时，需人为判断损坏的移位寄存器所在的驱动板，并根据损坏状况被动选择没有移位寄存器损坏的驱动板驱动显示面板，成本高，且不够智能。
发明内容
根据本申请的各种实施例，提供一种驱动控制模组及显示装置，。
一种驱动控制模组，所述驱动控制模组包括：
转换电路，设置为接收低电位逻辑信号并转换成高电位驱动信号；
多个第一输出通道，与转换电路连接，设置为输出高电位驱动信号；
多个第二输出通道，与转换电路连接，设置为输出高电位驱动信号；
主控电路，分别与所述多个第一输出通道及所述多个第二输出通道连接，设置为控制所述多个第一输出通道及所述多个第二输出通道的导通与截止；
检测电路，连接于所述转换电路与所述多个第一输出通道之间及所述转换电路与所述多个第二输出通道之间，设置为检测每个第一输出通道的第一输出电流及每个第二输出通道的第二输出电流；以及
电源芯片，与所述转换电路连接，设置为为所述转换电路供电；
所述主控电路还分别与所述检测电路及所述电源芯片连接，所述主控电路还设置为当存在所述第一输出电流大于预设输出电流时，控制所有的第一输出通道截止，或者当存在所述第二输出电流大于预设输出电流时，控制所有的第二输出通道截止，并控制所述电源芯片的供电电压由第一电压改变为第二电压，以增大所述高电位驱动信号的电压至预设值。
在其中一个实施例中，所述电源芯片包括：
第一存储器，设置为存储第一数据；以及
数模转换器，分别与所述转换电路及所述第一存储器连接，设置为将所述第一数据转换成第一电压并提供给所述转换电路。
在其中一个实施例中，所述电源芯片还包括第二存储器，所述第二存储器设置为存储第二数据；所述数模转换器还与所述第二存储器连接，所述数模转换器还设置为将所述第二数据转换成第二电压并提供给所述转换电路。
在其中一个实施例中，所述电源芯片还包括：
第一开关，分别与所述第一存储器、所述数模转换器及所述主控电路连接；以及
第二开关，分别与所述第二存储器、所述数模转换器及所述主控电路连接；
所述主控电路还设置为当存在所述第一输出电流大于预设输出电流时，控制所述第一开关由导通变为截止及控制所述第二开关由截止变为导通，以控制所述电源芯片的供电电压由所述第一电压改变为所述第二电压。
在其中一个实施例中，所述主控电路还设置为当存在所述第二输出电流大于预设输出电流时，控制所述第一开关由导通变为截止及控制所述第二开关由截止变为导通，以控制所述电源芯片的供电电压由所述第一电压改变为所述第二电压。
在其中一个实施例中，所述检测电路包括：
多个电阻，每个电阻连接于一个第一输出通道；以及
计算元件，分别与所述电阻的两端连接；设置为检测每个电阻两端的电压，并根据每个电阻两端的电压计算对应一个第一输出通道的第一输出电流，并将所述第一输出电流传输至所述主控电路。
在其中一个实施例中，每个电阻连接于一个第二输出通道中；所述计算元件分别与所述电阻的两端连接，设置为检测每个电阻两端的电压，并根据每个电阻两端的电压计算对应一个第二输出通道的第二输出电流，并将所述第二输出电流传输至所述主控电路。
在其中一个实施例中，每个第一输出通道包括第三开关，所述第三开关与所述主控电路连接，设置为根据所述主控电路的控制信号，断开或接通所述第一输出通道。
在其中一个实施例中，每个第二输出通道包括第四开关，所述第四开关与所述主控电路连接，设置为根据所述主控电路的控制信号，断开或接通所述第二输出通道。
在其中一个实施例中，所述主控电路通过电压信号控制所述第一开关的导通与截止以及所述第二开关的导通与截止。
在其中一个实施例中，所述第三开关为MOS管。
在其中一个实施例中，所述第四开关为MOS管。
在其中一个实施例中，所述第一输出通道与所述第二输出通道的数量一致。
在其中一个实施例中，所述高电位驱动信号的电位绝对值大于所述低电位逻辑信号的电位绝对值。
一种驱动控制模组，所述驱动控制模组包括：
转换电路，设置为接收低电位逻辑信号并转换成高电位驱动信号；
多个第一输出通道，与转换电路连接，设置为输出高电位驱动信号；
多个第二输出通道，与转换电路连接，设置为输出高电位驱动信号；
主控电路，分别与所述多个第一输出通道及所述多个第二输出通道连接，设置为控制所述多个第一输出通道及所述多个第二输出通道的导通与截止；
检测电路，连接于所述转换电路与所述多个第一输出通道之间及所述转换电路与所述多个第二输出通道之间，设置为检测每个第一输出通道的第一输出电流及每个第二输出通道的第二输出电流；以及
电源芯片，包括第一存储器、第二存储器、数模转换器、第一开关及第二开关；所述第一存储器设置为存储第一数据；所述第二存储器设置为存储第二数据；所述数模转换器与所述转换电路连接，还与所述第一存储器或所 述第二存储器连接，设置为将所述第一数据转换成第一电压并提供给所述转换电路或将所述第二数据转换成第二电压并提供给所述转换电路；所述第一开关分别与所述第一存储器、所述数模转换器及所述主控电路连接；所述第二开关分别与所述第二存储器、所述数模转换器及所述主控电路连接；
所述主控电路还分别与所述检测电路及所述电源芯片连接，所述主控电路还设置为当存在所述第一输出电流大于预设输出电流时，控制所有的第一输出通道截止，或者当存在所述第二输出电流大于预设输出电流时，控制所有的第二输出通道截止，并控制所述第一开关由导通变为截止及控制所述第二开关由截止变为导通，以控制所述电源芯片的供电电压由所述第一电压改变为所述第二电压，从而增大所述高电位驱动信号的电压。
一种显示装置，所述显示装置包括升压系统、驱动电路板、显示面板及移位寄存器；所述升压系统包括上述的驱动控制模组；所述升压系统设置于所述驱动电路板，所述移位寄存器设置于所述显示面板的两侧。
在其中一个实施例中，所述显示面板包括主动阵列基板、彩色滤光层基板与形成于两基板之间的液晶层。
在其中一个实施例中，所述移位寄存器设置于所述主动阵列基板上。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其它特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前 提下，还可以根据这些附图获得其他实施例的附图。
图1为一个实施例提供的驱动控制模组的原理框图；
图2为一个实施例显示面板双边驱动和单边驱动的高电位驱动信号的电压波形图；
图3为一个实施例提供的转换电路的电路图；
图4为一个实施例提供的低电位逻辑信号和高电位驱动信号的波形图；
图5为一个实施例提供的显示装置的原理框图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的首选实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请的公开内容更加透彻全面。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
需要说明的是，当一个元件被认为是“连接”另一个元件，它可以是直接连接到另一个元件或者可能同时存在居中元件。
下面结合附图，对本申请的具体实施方式进行详细描述。
请参阅图1，图1为本申请提供的驱动控制模组的原理框图。所述驱动控制模组包括转换电路10、多个第一输出通道OUT1、多个第二输出通道 OUT2、主控电路30、检测电路40及电源芯片50。
所述转换电路10用于接收低电位逻辑信号并转换成高电位驱动信号。具体的，所述转换电路10通过输入通道接收低电位逻辑信号。所述低电位逻辑信号为逻辑信号，所述高电位驱动信号为模拟电压信号。所述高电位驱动信号的电位绝对值大于所述低电位逻辑信号的电位绝对值。
采用GDL架构的显示面板，移位寄存器设置于显示面板的两侧。
所述多个第一输出通道OUT1与转换电路10连接，用于输出高电位驱动信号。所述多个第二输出通道OUT2与转换电路10连接，用于输出高电位驱动信号。所述驱动控制模组应用于升压系统中。所述多个第一输出通道OUT1与设置于显示面板一侧的移位寄存器连接，所述多个第二输出通道OUT2与设置于显示面板另一侧的移位寄存器连接。所述高电位驱动信号通过所述多个第一输出通道OUT1及所述多个第二输出通道OUT2输出至所述移位寄存器，并通过所述移位寄存器驱动显示面板。
所述主控电路30分别与所述多个第一输出通道OUT1及所述多个第二输出通道OUT2连接，用于控制所述多个第一输出通道OUT1及所述多个第二输出通道OUT2的导通与截止。
所述第一输出通道OUT1导通，则所述高电位驱动信号能够通过所述第一输出通道OUT1传输至所述移位寄存器，从而实现对显示面板的驱动。所述第一输出通道OUT1截止，则所述高电位驱动信号停止通过所述第一输出通道OUT1传输至所述移位寄存器。所述第二输出通道OUT2导通，则所述高电位驱动信号能够通过所述第二输出通道OUT2传输至所述移位寄存器，从而实现对显示面板的驱动。所述第二输出通道OUT2截止，则所述高电位驱动信号停止通过所述第二输出通道OUT2传输至所述移位寄存器。
所述显示面板可由所述多个第一输出通道OUT1同时输出的高电位驱动信号驱动，也可由所述多个第二输出通道OUT2同时输出的高电位驱动信号驱动，还可由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高电位驱动信号共同驱动。所述显示面板由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高电位驱动信号共同驱动转成由所述多个第一输出通道OUT1同时输出的高电位驱动信号驱动或由所述多个第二输出通道OUT2同时输出的高电位驱动信号驱动，即显示面板由双边驱动变为单边驱动。
在一个实施例中，所述主控电路30为MCU(Microcontroller Unit，微控制单元)。
所述检测电路40连接于所述转换电路10与所述多个第一输出通道OUT1之间及所述转换电路10与所述多个第二输出通道OUT2之间，用于检测每个第一输出通道OUT1的第一输出电流及每个第二输出通道OUT2的第二输出电流。
所述第一输出电流及所述第二输出电流即显示面板的驱动电流。
所述电源芯片50与所述转换电路10连接，用于为所述转换电路10供电。
所述主控电路30还分别与所述检测电路40及所述电源芯片50连接。所述主控电路30还用于当存在所述第一输出电流大于预设输出电流时，控制所有的第一输出通道OUT1截止，并控制所述电源芯片50的供电电压由第一电压改变为第二电压，或者当存在所述第二输出电流大于预设输出电流时，控制所有的第二输出通道OUT2截止，并控制所述电源芯片50的供电电压由第一电压改变为第二电压，以增大所述高电位驱动信号的电压至预设值。
可以理解的，所述检测电路40将所述第一输出电流及所述第二输出电流 传输至所述主控电路30，所述主控电路30还用于判断所述第一输出电流及所述第二输出电流是否大于预设输出电流。
所述第一输出电流大于预设输出电流即位于显示面板一侧的移位寄存器受到损坏。所述第二输出电流大于预设输出电流即位于显示面板另一侧的移位寄存器受到损坏。
在一个实施例中，所述电源芯片50包括第一存储器51、第二存储器52及数模转换器53。
所述第一存储器51用于存储第一数据。第二存储器52用于存储第二数据。所述第一数据及所述第二数据均为数字信号。
所述数模转换器53与所述转换电路10连接，所述数模转换器53还与所述第一存储器51或所述第二存储器52连接，所述数模转换器53用于当与所述第一存储器51连接时，将所述第一数据转换成第一电压并提供给所述转换电路10；还用于当与所述第二存储器52连接时，将所述第二数据转换成第二电压并提供给所述转换电路10。
在一个实施例中，所述电源芯片50还包括第一开关K1及第二开关K2。
所述第一开关K1分别与所述第一存储器51、所述数模转换器53及所述主控电路30连接。所述第二开关K2分别与所述第二存储器52、所述数模转换器53及所述主控电路30连接。所述主控电路30还用于当存在所述第一输出电流大于预设输出电流或存在所述第二输出电流大于预设输出电流时，控制所述第一开关K1由导通变为截止及控制所述第二开关K2由截止变为导通，以控制所述电源芯片50的供电电压由所述第一电压改变为所述第二电压。
在一个实施例中，所述主控电路30通过电压信号控制所述第一开关K1 的导通与截止以及所述第二开关K2的导通与截止。
在一个实施例中，每个第一输出通道OUT1包括第三开关K3，所述第三开关K3与所述主控电路30连接。所述第三开关K3用于根据所述主控电路30的控制信号，断开或接通所述第一输出通道OUT1。每个第二输出通道OUT2包括第四开关K4，所述第四开关K4与所述主控电路30连接。所述第四开关K4用于根据所述主控电路30的控制信号，断开或接通所述第二输出通道OUT2。
所述第一输出通道OUT1导通即所述第三开关K3导通，也即所述第三开关K3接通所述第一输出通道OUT1；所述第一输出通道OUT1截止即所述第三开关K3截止，也即所述第三开关K3断开所述第一输出通道OUT1。所述第二输出通道OUT2导通即所述第四开关K4导通，也即所述第四开关K4接通所述第二输出通道OUT2；所述第二输出通道OUT2截止即所述第四开关K4截止，也即所述第四开关K4断开所述第二输出通道OUT2。所述第三开关K3使得所述主控电路30对所述第一输出通道OUT1的导通与截止的控制更加地灵活、方便，所述第四开关K4使得所述主控电路30对所述第二输出通道OUT2的控制更加地灵活、方便。
在一个实施例中，所述第三开关K3及所述第四开关K4均为MOS管。
所述显示面板在没有移位寄存器损坏的情况下，由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高电位驱动信号共同驱动。当存在第一输出通道OUT1的第一输出电流大于预设输出电流时，所述主控电路30控制所有的第一输出通道OUT1截止，所述显示面板由所有的第二输出通道OUT2同时输出的高电位驱动信号驱动，此时，所述显示面板由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高 电位驱动信号共同驱动变为只由所述多个第二输出通道OUT2输出的高电位驱动信号驱动，若显示面板的尺寸较大，所述显示面板仅由位于一侧的位移寄存器输出的高电位驱动信号驱动，由于显示面板上传输所述高电位驱动信号的通路存在阻抗，所述高电位驱动信号从所述位移寄存器传输至远离所述位移寄存器的区域的过程中，随着传输距离的增大而逐渐衰减，如图2所示。因此，所述显示面板上靠近所述位移寄存器的区域与远离所述位移寄存器的区域的充电将存在差异，增大所述高电位驱动信号的电压可以减小显示面板只由所述多个第二输出通道OUT2输出的高电位驱动信号驱动产生的充电差异，而通过增大所述转换电路10的供电电压可以增大所述高电位驱动信号的电压，当所述高电位驱动信号的电压由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高电位驱动信号共同驱动时的第一电压改变为由所有的第一输出通道OUT1或所有的第二输出通道OUT2驱动时的第二电压，所述高电位驱动信号的电压增大至预设值，此时的高电位驱动信号能够消除显示面板在所述转换电路10的供电电压为第一电压且只由所述多个第一输出通道OUT1或只由所述多个第二输出通道OUT2输出的高电位驱动信号驱动的情况下产生的充电差异，达到由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高电位驱动信号共同驱动的充电效果。
在一个实施例中，所述第一输出通道OUT1的数量与所述第二输出通道OUT2的数量一致，所述第一输出通道OUT1的数量与所述第二输出通道OUT2的数量均为4个。
如图2所示，所述显示面板由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高电位驱动信号共同驱动，每个高电位驱动 信号的电压为VGH1，由所述多个第一输出通道OUT1同时输出的高电位驱动信号驱动或由所述多个第二输出通道OUT2同时输出的高电位驱动信号驱动时，每个高电位驱动信号的电压为预设值VGH2，此时能够达到由所述多个第一输出通道OUT1及所述多个第二输出通道OUT2同时输出的高电位驱动信号共同驱动的充电效果。
请参阅图3，所述转换电路10包括第一电子开关Q1、第二电子开关Q2、第三电子开关Q3、第四电子开关Q4、第五电子开关Q5、第六电子开关Q6、第七电子开关Q7及第八电子开关Q8。所述第一电子开关Q1的第一端接收低电位信号A，所述第一电子开关Q1的第二端与第一电源VDD连接，所述第一电子开关Q1的第三端与所述第四电子开关Q4的第一端连接。所述第二电子开关Q2的第一端接收所述低电位信号A的反相信号A，所述第二电子开关Q2的第二端与所述第一电子开关Q1的第二端连接，所述第二电子开关Q2的第三端与所述第三电子开关Q3的第一端连接。所述第三电子开关Q3的第二端与所述第四电子开关Q4的第二端及第二电源VGL连接，所述第三电子开关Q3的第三端还与所述第一电子开关Q1的第三端连接。所述第四电子开关Q4的第三端还与所述第二电子开关Q2的第三端连接。所述第五电子开关Q5的第二端与第三电源VGH连接，所述第五电子开关Q5的第三端与所述第六电子开关Q6的第一端连接。所述第六电子开关Q6的第二端与所述第五电子开关Q5的第二端连接，所述第六电子开关Q6的第三端与所述第五电子开关Q5的第一端连接。所述第七电子开关Q7的第一端与所述第二电子开关Q2的第三端连接，所述第七电子开关Q7的第二端与第二电源VGL连接，所述第七电子开关Q7的第三端与所述第六电子开关Q6的第一端连接。所述第八电子开关Q8的第一端与所述第一电子开关Q1的第三端连接，所述 第八电子开关Q8的第二端与所述第七电子开关Q7的第二端连接，所述第八电子开关Q8的第三端与所述第六电子开关Q6的第三端连接。所述第三电子开关Q3的第一端的信号与所述第四电子开关Q4的第一端的信号互为反相信号，即所述第七电子开关Q7的第一端的信号与所述第八电子开关Q8的第一端的信号互为反相信号，如图4所示，所述第三电子开关Q3的第一端的信号及所述第七电子开关Q7的第一端的信号为B，所述第四电子开关Q4的第一端的信号及所述第八电子开关Q8的第一端的信号为B。所述第六电子开关Q6的第三端输出高电位信号C。
所述转换电路10的工作原理如下：
所述低电位信号A在一个周期内包括低电平及高电平。所述第一电源VDD为正电压直流电源且电压为所述低电位信号A的高电平的绝对值。所述第二电源VGL为负电压直流电源且电压的绝对值大于所述低电位信号A的低电平的绝对值。所述第三电源VGH为正电压直流电源且电压大于所述第一电源VDD的电压。
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当所述低电位信号A为高电平时，所述低电位信号A的反相信号A为低电平，所述第一电子开关Q1截止，所述第二电子开关Q2导通，所述第三电子开关Q3导通，所述第七电子开关Q7导通，所述第四电子开关Q4及所述第八电子开关Q8截止，由于所述第七电子开关Q7导通，进而所述第六电子开关Q6导通，所述第六电子开关Q6的第三端与所述第三电源VGH导通，所述第六电子开关Q6的第三端输出高电平且电压为所述第三电源VGH的电压。
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当所述低电位信号A为低电平时，所述低电位信号A的反相信号A为高电平，所述第一电子开关Q1导通，所述第二电子开关Q2截止，所述第三电 子开关Q3截止，所述第七电子开关Q7截止，所述第四电子开关Q4及所述第八电子开关Q8导通，由于所述第八电子开关Q8导通，所述第六电子开关Q6的第三端与所述第二电源VGL连接，所述第六电子开关Q6的第三端输出低电平且电压为所述第二电源VGL的电压。
综上所述，请参阅图4，所述转换电路10将输入的电位绝对值较低的低电位信号A转换成电位绝对值较高的高电位信号C输出，所述第六电子开关Q6的第三端输出的高电位信号C的高电平为所述第三电源VGH，低电平为所述第二电源VGL。所述转换电路10将电位绝对值较低的低电位信号转换成电位绝对值较高的高电位信号，使得所述高电位信号能够有足够的电压驱动显示面板。
所述检测电路40包括多个电阻R及计算元件41。每个电阻R连接于一个第一输出通道OUT1或一个第二输出通道OUT2中。所述计算元件41与每个电阻R的两端连接。所述计算元件41用于检测每个电阻R两端的电压，并根据每个电阻R两端的电压计算对应一个第一输出通道OUT1的第一输出电流或对应一个第二输出通道OUT2的第二输出电流，并将所述第一输出电流及所述第二输出电流传输至所述主控电路。通过检测电阻R两端的电压，进而根据欧姆定律计算通过电阻R的电流，通过电阻R的电流即所述第一输出端的第一输出电流或所述第二输出端的第二输出电流，检测精度高，检测电路简单。
请参阅图5，本申请还提供一种显示装置，所述显示装置包括升压系统300、驱动电路板400、显示面板500及移位寄存器600。所述升压系统300包括上述的驱动控制模组。所述升压系统300设置于所述驱动电路板400，所述移位寄存器600设置于所述显示面板500的两侧。
GDL电路包括升压系统300及移位寄存器600。由于所述移位寄存器600占的面积很小，因此，GDL架构的显示面板可以做到超窄的边框。
本申请中，显示面板500可例如为TFT-LCD(Thin Film Transistor Liquid Crystal Displayer，薄膜晶体管液晶显示器)显示面板、OLED(Organic Light-Emitting Diode，有机发光二极管)显示面板、QLED(Quantum Dot Light Emitting Diodes，量子点发光二极管)显示面板、曲面显示面板或其他显示面板。
在一实施例中，所述显示面板500为液晶显示面板，所述显示面板500包括主动阵列(thin film transistor，TFT)基板501、彩色滤光层(color filter，CF)基板502与形成于两基板之间的液晶层。所述移位寄存器600设置于所述主动阵列基板501上。
在一实施例中，所述主动阵列(TFT)及所述彩色滤光层(CF)可形成于同一基板上。
上述的驱动控制模组，驱动显示面板的高电位驱动信号通过多个第一输出通道及多个第二输出通道输出至显示面板，当存在所述第一输出电流大于预设输出电流时，由所有的第二输出通道输出的高电位驱动信号驱动显示面板，当存在所述第二输出电流大于预设输出电流时，由所有的第一输出通道输出的高电位驱动信号驱动显示面板，实现了显示面板由双侧驱动到单侧驱动的动态切换，且通过增加单侧驱动的驱动电压达到双侧驱动的效果，切换智能，成本低。
如在本申请中所使用的，术语“单元”、“模块”和“系统”等旨在表示计算机相关的实体，它可以是硬件、硬件和软件的组合、软件、或者执行中的软件。例如，单元可以是但不限于是，在处理器上运行的进程、处理器、 对象、可执行码、执行的线程、程序和/或计算机。作为说明，运行在服务器上的应用程序和服务器都可以是单元。一个或多个单元可以驻留在进程和/或执行的线程中，并且单元可以位于一个计算机内和/或分布在两个或更多的计算机之间。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (18)

  1. 一种驱动控制模组，所述驱动控制模组包括：
    转换电路，设置为接收低电位逻辑信号并转换成高电位驱动信号；
    多个第一输出通道，与转换电路连接，设置为输出高电位驱动信号；
    多个第二输出通道，与转换电路连接，设置为输出高电位驱动信号；
    主控电路，分别与所述多个第一输出通道及所述多个第二输出通道连接，设置为控制所述多个第一输出通道及所述多个第二输出通道的导通与截止；
    检测电路，连接于所述转换电路与所述多个第一输出通道之间及所述转换电路与所述多个第二输出通道之间，设置为检测每个第一输出通道的第一输出电流及每个第二输出通道的第二输出电流；以及
    电源芯片，与所述转换电路连接，设置为为所述转换电路供电；
    所述主控电路还分别与所述检测电路及所述电源芯片连接，所述主控电路还设置为当存在所述第一输出电流大于预设输出电流时，控制所有的第一输出通道截止，或者当存在所述第二输出电流大于预设输出电流时，控制所有的第二输出通道截止，并控制所述电源芯片的供电电压由第一电压改变为第二电压，以增大所述高电位驱动信号的电压至预设值。
  2. 根据权利要求1所述的驱动控制模组，其中，所述电源芯片包括：
    第一存储器，设置为存储第一数据；以及
    数模转换器，分别与所述转换电路及所述第一存储器连接，设置为将所述第一数据转换成第一电压并提供给所述转换电路。
  3. 根据权利要求2所述的驱动控制模组，其中，所述电源芯片还包括第二存储器，所述第二存储器设置为存储第二数据；所述数模转换器还与所述第二存储器连接，所述数模转换器还设置为将所述第二数据转换成第二电压 并提供给所述转换电路。
  4. 根据权利要求3所述的驱动控制模组，其中，所述电源芯片还包括：
    第一开关，分别与所述第一存储器、所述数模转换器及所述主控电路连接；以及
    第二开关，分别与所述第二存储器、所述数模转换器及所述主控电路连接；
    所述主控电路还设置为当存在所述第一输出电流大于预设输出电流时，控制所述第一开关由导通变为截止及控制所述第二开关由截止变为导通，以控制所述电源芯片的供电电压由所述第一电压改变为所述第二电压。
  5. 根据权利要求4所述的驱动控制模组，其中，所述主控电路还设置为当存在所述第二输出电流大于预设输出电流时，控制所述第一开关由导通变为截止及控制所述第二开关由截止变为导通，以控制所述电源芯片的供电电压由所述第一电压改变为所述第二电压。
  6. 根据权利要求1所述的驱动控制模组，其中，所述检测电路包括：
    多个电阻，每个电阻连接于一个第一输出通道；以及
    计算元件，分别与所述电阻的两端连接；设置为检测每个电阻两端的电压，并根据每个电阻两端的电压计算对应一个第一输出通道的第一输出电流，并将所述第一输出电流传输至所述主控电路。
  7. 根据权利要求6所述的驱动控制模组，其中，每个电阻连接于一个第二输出通道中；所述计算元件分别与所述电阻的两端连接，设置为检测每个电阻两端的电压，并根据每个电阻两端的电压计算对应一个第二输出通道的第二输出电流，并将所述第二输出电流传输至所述主控电路。
  8. 根据权利要求5所述的驱动控制模组，其中，每个第一输出通道包括 第三开关，所述第三开关与所述主控电路连接，设置为根据所述主控电路的控制信号，断开或接通所述第一输出通道。
  9. 根据权利要求8所述的驱动控制模组，其中，每个第二输出通道包括第四开关，所述第四开关与所述主控电路连接，设置为根据所述主控电路的控制信号，断开或接通所述第二输出通道。
  10. 根据权利要求5所述的驱动控制模组，其中，所述主控电路通过电压信号控制所述第一开关的导通与截止以及所述第二开关的导通与截止。
  11. 根据权利要求8所述的驱动控制模组，其中，所述第三开关为MOS管。
  12. 根据权利要求9所述的驱动控制模组，其中，所述第四开关为MOS管。
  13. 根据权利要求1所述的驱动控制模组，其中，所述第一输出通道与所述第二输出通道的数量一致。
  14. 根据权利要求1所述的驱动控制模组，其中，所述高电位驱动信号的电位绝对值大于所述低电位逻辑信号的电位绝对值。
  15. 一种驱动控制模组，所述驱动控制模组包括：
    转换电路，设置为接收低电位逻辑信号并转换成高电位驱动信号；
    多个第一输出通道，与转换电路连接，设置为输出高电位驱动信号；
    多个第二输出通道，与转换电路连接，设置为输出高电位驱动信号；
    主控电路，分别与所述多个第一输出通道及所述多个第二输出通道连接，设置为控制所述多个第一输出通道及所述多个第二输出通道的导通与截止；
    检测电路，连接于所述转换电路与所述多个第一输出通道之间及所述转换电路与所述多个第二输出通道之间，设置为检测每个第一输出通道的第一 输出电流及每个第二输出通道的第二输出电流；以及
    电源芯片，包括第一存储器、第二存储器、数模转换器、第一开关及第二开关；所述第一存储器设置为存储第一数据；所述第二存储器设置为存储第二数据；所述数模转换器与所述转换电路连接，还与所述第一存储器或所述第二存储器连接，设置为将所述第一数据转换成第一电压并提供给所述转换电路或将所述第二数据转换成第二电压并提供给所述转换电路；所述第一开关分别与所述第一存储器、所述数模转换器及所述主控电路连接；所述第二开关分别与所述第二存储器、所述数模转换器及所述主控电路连接；
    所述主控电路还分别与所述检测电路及所述电源芯片连接，所述主控电路还设置为当存在所述第一输出电流大于预设输出电流时，控制所有的第一输出通道截止，或者当存在所述第二输出电流大于预设输出电流时，控制所有的第二输出通道截止，并控制所述第一开关由导通变为截止及控制所述第二开关由截止变为导通，以控制所述电源芯片的供电电压由所述第一电压改变为所述第二电压，从而增大所述高电位驱动信号的电压。
  16. 一种显示装置，所述显示装置包括升压系统、驱动电路板、显示面板及移位寄存器；所述升压系统包括驱动控制模组，所述驱动控制模组包括转换电路、多个第一输出通道、多个第二输出通道、主控电路、检测电路及电源芯片；所述转换电路设置为接收低电位逻辑信号并转换成高电位驱动信号；所述多个第一输出通道与转换电路连接，设置为输出高电位驱动信号；所述多个第二输出通道与转换电路连接，设置为输出高电位驱动信号；所述主控电路分别与所述多个第一输出通道及所述多个第二输出通道连接，设置为控制所述多个第一输出通道及所述多个第二输出通道的导通与截止；所述检测电路连接于所述转换电路与所述多个第一输出通道之间及所述转换电路 与所述多个第二输出通道之间，设置为检测每个第一输出通道的第一输出电流及每个第二输出通道的第二输出电流；所述电源芯片与所述转换电路连接，设置为为所述转换电路供电；所述主控电路还分别与所述检测电路及所述电源芯片连接，所述主控电路还设置为当存在所述第一输出电流大于预设输出电流时，控制所有的第一输出通道截止，或者当存在所述第二输出电流大于预设输出电流时，控制所有的第二输出通道截止，并控制所述电源芯片的供电电压由第一电压改变为第二电压，以增大所述高电位驱动信号的电压至预设值；所述升压系统设置于所述驱动电路板，所述移位寄存器设置于所述显示面板的两侧。
  17. 根据权利要求16所述的显示装置，其中，所述显示面板包括主动阵列基板、彩色滤光层基板与形成于两基板之间的液晶层。
  18. 根据权利要求17所述的显示装置，其中，所述移位寄存器设置于所述主动阵列基板上。
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