WO2020098556A1 - 一种片上微型x射线源及其制造方法 - Google Patents

一种片上微型x射线源及其制造方法 Download PDF

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Publication number
WO2020098556A1
WO2020098556A1 PCT/CN2019/116139 CN2019116139W WO2020098556A1 WO 2020098556 A1 WO2020098556 A1 WO 2020098556A1 CN 2019116139 W CN2019116139 W CN 2019116139W WO 2020098556 A1 WO2020098556 A1 WO 2020098556A1
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Prior art keywords
chip micro
electrode
insulating spacer
ray source
electron source
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PCT/CN2019/116139
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English (en)
French (fr)
Inventor
魏贤龙
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北京大学
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Publication date
Priority claimed from CN201821855698.5U external-priority patent/CN208923024U/zh
Priority claimed from CN201811339577.XA external-priority patent/CN109273337B/zh
Application filed by 北京大学 filed Critical 北京大学
Priority to EP19885758.3A priority Critical patent/EP3882949A4/en
Priority to US17/292,695 priority patent/US11798772B2/en
Priority to JP2021525676A priority patent/JP7296661B2/ja
Publication of WO2020098556A1 publication Critical patent/WO2020098556A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J35/00—X-ray tubes
    • H01J35/02—Details
    • H01J35/025—X-ray tubes with structurally associated circuit elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J35/00—X-ray tubes
    • H01J35/02—Details
    • H01J35/04—Electrodes ; Mutual position thereof; Constructional adaptations therefor
    • H01J35/06—Cathodes
    • H01J35/064—Details of the emitter, e.g. material or structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J35/00—X-ray tubes
    • H01J35/02—Details
    • H01J35/16—Vessels; Containers; Shields associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J35/00—X-ray tubes
    • H01J35/02—Details
    • H01J35/16—Vessels; Containers; Shields associated therewith
    • H01J35/18—Windows
    • H01J35/186—Windows used as targets or X-ray converters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02—Main electrodes
    • H01J1/30—Cold cathodes, e.g. field-emissive cathode
    • H01J1/316—Cold cathodes, e.g. field-emissive cathode having an electric field parallel to the surface, e.g. thin film cathodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2235/00—X-ray tubes
    • H01J2235/06—Cathode assembly
    • H01J2235/068—Multi-cathode assembly
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2235/00—X-ray tubes
    • H01J2235/20—Arrangements for controlling gases within the X-ray tube
    • H01J2235/205—Gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J35/00—X-ray tubes
    • H01J35/02—Details
    • H01J35/04—Electrodes ; Mutual position thereof; Constructional adaptations therefor
    • H01J35/08—Anodes; Anti cathodes
    • H01J35/12—Cooling non-rotary anodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J35/00—X-ray tubes
    • H01J35/02—Details
    • H01J35/14—Arrangements for concentrating, focusing, or directing the cathode ray
    • H01J35/147—Spot size control
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
    • H01J9/02—Manufacture of electrodes or electrode systems
    • H01J9/18—Assembling together the component parts of electrode systems

Definitions

  • the present application relates to the field of X-ray sources, and in particular to an on-chip micro X-ray source and a manufacturing method thereof.
  • X-rays are widely used in health inspections, cancer radiotherapy, safety inspections, industrial flaw detection, material analysis and other fields.
  • X-rays are mainly generated by hot cathode X-ray tubes, which mainly include a heat-emitting cathode and anode.
  • the electrons are accelerated after being emitted from the hot cathode.
  • High-energy electrons bombard the anode and cause tough radiation and atomic inner shell at the anode.
  • the electron transitions, thereby generating X-rays.
  • the thermal cathode cathode Due to the characteristics of large size, high power consumption, and long switching delay time, the thermal cathode cathode generally has a large volume, high power consumption, and long switching response time. These problems limit the application of traditional thermal emission X-ray tubes in many scenarios.
  • the demand for new X-ray instruments such as light and small X-ray medical imaging systems, short-range electrical X-ray radiotherapy equipment, portable X-ray detection and analysis devices is increasing, and the key core component of these instruments is micro X-ray Source, therefore, the micro X-ray source is an important electronic component with increasing demand.
  • micro X-ray source started around 2000, and now a small or micro X-ray source based on the thermal emission electron source and the nano material field emission electron source has been successfully developed.
  • small X-ray sources based on thermal emission electron sources are relatively mature. Although they have a smaller and compact size, they still use thermal emission electron sources and have a structure very similar to traditional X-ray tubes. The source's small X-ray source still has the problem of a long switching response time, making it difficult to apply to dynamic X-ray imaging of moving objects.
  • micro X-ray sources based on nano-material field emission electron sources such as carbon nanotubes and zinc oxide nanowires have smaller size, lower power consumption and shorter Switch response time is considered to be a very promising micro X-ray source technology.
  • the present application provides an on-chip micro X-ray source and a manufacturing method thereof to further reduce the size and cost of the on-chip micro X-ray source.
  • An on-chip micro X-ray source including:
  • An anode located on the first insulating spacer
  • a closed vacuum cavity is formed between the on-chip micro-electron source and the anode.
  • the on-chip micro-electron source includes:
  • At least one electrode pair located on the thin film layer of the resistive material; the electrode pair includes a first electrode and a second electrode, and a gap exists between the first electrode and the second electrode;
  • a tunnel junction is formed in the region of the thin film layer of the resistive material under the gap.
  • the plurality of electrode pairs are interdigitated electrode pairs.
  • the substrate is made of a material having thermal conductivity, and the thin film layer of the resistance change material is provided with at least one through hole communicating with the substrate;
  • At least one electrode of the electrode pair is in contact connection with the substrate through the through hole.
  • the X-ray source further includes a first heat dissipation component located on the anode.
  • the X-ray source further includes a second heat dissipation component under the substrate.
  • the first insulating spacer is a hollow cavity structure.
  • the first insulating spacer is a cavity structure provided with a top cover, and a conductive plug is provided on the top cover;
  • the anode is located under the top cover, and an electrical connection is formed between the conductive plug and the electrode located above the first insulating spacer.
  • the X-ray source further includes:
  • the second insulating spacer is a hollow cavity structure;
  • the second insulating spacer is connected with the on-chip micro-electron source.
  • the enclosed vacuum chamber is provided with a suction member, and the suction member is used to absorb the gas in the enclosed vacuum chamber to adjust or maintain the vacuum in the enclosed vacuum chamber.
  • the anode includes a target layer and a support layer for supporting the target layer;
  • the target layer is located on the side near the electron bombardment, and the support layer is located on the side away from the electron bombardment.
  • the target layer is made of a heavy metal material
  • the support layer is made of copper or aluminum.
  • the thickness of the anode is 0.1-1000 microns.
  • a method for manufacturing an on-chip micro X-ray source including:
  • a first insulating spacer is provided on one surface of the anode, and the first insulating spacer is a cavity structure;
  • the first insulating spacer is connected to a side of the on-chip micro-electron source emitting electrons, so that a closed vacuum cavity is formed between the on-chip micro-electron source and the anode.
  • the method before connecting the on-chip micro-electron source and the first insulating spacer together, the method further includes:
  • a second insulating spacer is provided on a surface of the hollow focusing electrode; the second insulating spacer is a hollow cavity structure;
  • the method further includes:
  • connection of the on-chip micro-electron source and the first insulating spacer specifically includes:
  • the first insulating spacer is connected to a side of the hollow focusing electrode facing away from the second insulating spacer.
  • a suction member is placed in the closed vacuum chamber to be formed, and the suction member is used to absorb the gas in the closed vacuum chamber to adjust or maintain the vacuum in the closed vacuum chamber.
  • the method further includes:
  • a first heat dissipation member is formed on the anode.
  • the preparation of the on-chip micro-electron source specifically includes:
  • the electrode pair includes a first electrode and a second electrode, and a gap exists between the first electrode and the second electrode;
  • the thin film layer of the resistive material under the gap is controlled to softly break down and exhibit resistive characteristics, so as to form a tunnel junction in the region of the thin film layer of the resistive material under the gap.
  • the substrate is a substrate having thermal conductivity, after forming the thin film layer of the resistance change material, and before forming at least one electrode pair, further comprising:
  • At least one electrode of the electrode pair is in contact with the substrate through the through hole.
  • the on-chip micro X-ray source provided by the present application is based on an on-chip micro-electron source, and the on-chip micro-electron source can be processed using micro-processing technology. Therefore, compared with the on-chip micro X-ray source made in the prior art using traditional mechanical processing technology, the on-chip micro X-ray source provided in this application can be processed using micro-processing technology, so its size can be further reduced, and The manufacturing cost can be reduced. Moreover, the on-chip micro X-ray source has the advantages of stable X-ray dose, low working vacuum requirements, fast switch response, integration, and batch processing. It can be applied to various portable X-ray detection and analysis and treatment equipment.
  • Example 1 (1) is a schematic cross-sectional structure diagram of an on-chip micro X-ray source provided in Example 1 of the present application;
  • Example 1 (2) is a schematic diagram of a stereoscopic structure of an on-chip micro X-ray source provided in Example 1 of the present application;
  • Example 1 (3) is a schematic diagram of a three-dimensional structure of an on-chip micro-electron source in an on-chip micro-X-ray source provided in Example 1 of the present application;
  • Example 2 (1) is a schematic diagram of the structure principle of the on-chip micro-electron source provided in Example 1 of the present application;
  • Example 2 (2) is a schematic diagram of the structure of the tunnel junction energy band in the on-chip micro-electron source provided in Example 1 of the present application;
  • FIG. 3 is a schematic cross-sectional structure diagram of a vertical structure tunneling electron source in an on-chip micro X-ray source provided by Example 1 of the present application;
  • Example 4 is a schematic cross-sectional structure diagram of another on-chip micro X-ray source provided in Example 1 of the present application;
  • FIG. 5 is a schematic flow chart of a method for manufacturing an on-chip micro X-ray source provided in Embodiment 1 of the present application;
  • Example 6 is a schematic flowchart of a method for manufacturing an on-chip micro-electron source provided in Example 1 of the present application;
  • FIG. 7 (1) to 7 (4) are schematic cross-sectional structure diagrams corresponding to a series of processes in a method for manufacturing an on-chip micro-electron source provided in Example 1 of the present application;
  • Example 8 is a schematic cross-sectional structure diagram corresponding to the step of preparing an anode provided in Example 1 of the present application;
  • Example 9 (1) is a schematic cross-sectional structure diagram of an on-chip micro X-ray source provided in Example 2 of the present application;
  • Example 9 (2) is a schematic perspective view of an on-chip micro X-ray source provided in Example 2 of the present application.
  • Example 9 (3) is a three-dimensional schematic diagram of an on-chip micro-electron source in an on-chip micro-X-ray source provided in Example 2 of the present application;
  • FIG. 10 is a schematic flow chart of a method for manufacturing an on-chip micro X-ray source provided in Embodiment 2 of the present application;
  • Example 11 is a schematic flowchart of a method for manufacturing an on-chip micro-electron source provided in Example 2 of the present application;
  • 12 (1) to 12 (5) are schematic cross-sectional structure diagrams corresponding to a series of processes in a method for manufacturing an on-chip micro-electron source provided in Example 2 of the present application;
  • FIG. 13 is a schematic cross-sectional structure diagram of an on-chip micro X-ray source provided in Embodiment 3 of the present application;
  • FIG. 14 is a schematic flowchart of a method for manufacturing an on-chip micro X-ray source provided in Embodiment 3 of the present application;
  • Example 15 is a schematic diagram of a cross-sectional structure corresponding to the step of preparing a first heat dissipation component provided in Example 3 of the present application;
  • FIG. 16 is a schematic cross-sectional structure diagram of an on-chip micro X-ray source provided in Embodiment 4 of the present application;
  • FIG. 17 is a schematic flow chart of a method for manufacturing an on-chip micro X-ray source provided in Embodiment 4 of the present application;
  • 18 (1) to 18 (2) are schematic cross-sectional structure diagrams corresponding to a series of processes in a method for manufacturing an on-chip micro X-ray source provided in Example 4 of the present application;
  • Example 19 is a schematic cross-sectional structure diagram of an on-chip micro X-ray source provided in Example 5 of the present application;
  • Example 20 is a schematic cross-sectional structure diagram of another on-chip micro X-ray source provided in Example 5 of the present application;
  • FIG. 21 is a schematic flow chart of a method for manufacturing an on-chip micro X-ray source provided in Embodiment 5 of the present application;
  • 22 (1) to 22 (2) are cross-sectional structural diagrams corresponding to a series of processes in a method for manufacturing an on-chip micro X-ray source provided in Embodiment 5 of the present application.
  • the existing micro X-ray source is obtained by using traditional mechanical processing technology, so it has the problems that it is difficult to further reduce the size and the cost of batch preparation is high.
  • the micro-processing technology is widely used in the processing of on-chip micro-devices such as large-scale integrated circuits, micro-electromechanical systems, micro-fluidic systems, etc., and is the mainstream processing technology for realizing micro-devices. advantage.
  • the present application provides an on-chip micro X-ray source, which is based on an on-chip micro-electron source, wherein the on-chip micro-electron source can be processed using micro-processing technology get. Therefore, compared with the on-chip micro X-ray source made by traditional mechanical processing technology in the prior art, the on-chip micro X-ray source provided by the present application can be processed by micro-processing technology, so its size can be further reduced, and The manufacturing cost can be reduced. Moreover, the on-chip micro X-ray source has the advantages of stable X-ray dose, low working vacuum requirements, fast switch response, integration, and batch processing. It can be applied to various portable X-ray detection and analysis and treatment equipment.
  • FIG. 1 (1) is a schematic cross-sectional structure diagram of an on-chip micro X-ray source provided by Example 1 of the present application
  • FIG. 1 (2) is provided by Example 1 of the present application
  • FIG. 1 (3) is a schematic diagram of a three-dimensional structure of an on-chip micro X-ray source in an on-chip micro X-ray source according to Embodiment 1 of the present application. It should be noted that FIG. 1 (2) is actually not a complete structural schematic. In order to see the internal structure, only the anode is drawn.
  • An on-chip micro X-ray source provided in Embodiment 1 of the present application includes:
  • the anode 12 located above the first insulating spacer 11;
  • a closed vacuum cavity is formed between the on-chip micro-electron source 10 and the anode 12.
  • the on-chip micro-electron source 10 may be a surface tunneling electron source with a planar multi-region structure, which may include:
  • each electrode pair includes a first electrode 1031 and a second electrode 1032, and a gap 104 exists between each first electrode 1031 and each second electrode 1032 ;
  • a tunnel junction 105 is formed in the area of the thin film layer 102 of resistive material under each gap 104 (as shown in FIG. 1 (1)).
  • the above-mentioned resistive material refers to a material that is initially electrically insulating. After a soft breakdown is applied to the voltage, it can exhibit a resistive state and have the ability to emit electrons. After the activation of the resistive material is completed, the electrical insulating material is transformed into conductive material.
  • FIG. 2 (1) shows a schematic structural diagram of the surface tunneling electron source provided by the embodiment of the present application.
  • a voltage is applied between the first electrode 1031 and the second electrode 1032, so that the resistive material film layer 102 under the gap 104 is softly broken down.
  • the resistive material film under the gap 104 After the layer changes from an insulating state to a conductive state, and then undergoes a transition from a low-resistance state to a high-resistance state, the conductive filament breaks and is formed in the region of the resistive material thin film layer 102 under the gap 104 as shown in FIG.
  • the tunnel junction 105 from the first electrode 1031 to the second electrode 1032, includes sequentially connected first conductive regions 1051, insulating regions 1052, and second conductive regions 1053.
  • FIG. 2 (2) The energy band diagram of the tunnel junction 105 formed in the region of the resistive material thin film layer 102 below the gap 104 is shown in FIG. 2 (2).
  • a voltage V1 is applied to the first electrode 1031 and the second electrode 1032, electrons tunnel from the first conductive region 1051 having a low potential to the insulating region 1052, and in the insulating region 1052 accelerates to obtain energy that crosses the vacuum level, and is emitted after reaching the second conductive region 1053 with a high electric potential.
  • the substrate 101 may be a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator), GOI (Germanium On Insulator, Germanium On Insulator), or the like.
  • the substrate 101 can also choose materials with thermal conductivity, or choose materials with both good electrical conductivity and thermal conductivity, when materials with good electrical conductivity and thermal conductivity are used as When the substrate 101 is used, the substrate 101 can also serve as an electrode.
  • a substrate 101 formed of a material having both good electrical conductivity and thermal conductivity will be taken as an example for description.
  • the material used to form the substrate 101 having good electrical and thermal conductivity properties may be a metal or a heavily doped semiconductor.
  • the resistive material thin film layer 102 may be selected from one or more of the following materials: silicon oxide, tantalum oxide, hafnium oxide, tungsten oxide, zinc oxide, magnesium oxide, zirconium oxide, titanium oxide, aluminum oxide, nickel oxide , Germanium oxide, diamond and amorphous carbon. After the above materials are softly broken down, they can realize the transition from the low resistance state to the high resistance state and have the electron emission ability.
  • a plurality of electrode pairs are formed on the resistive material thin film layer 102 as an example, in fact, only one electrode pair may be formed.
  • the plurality of electrodes formed on the resistive material thin film layer 102 may be electrode pairs of different structures.
  • a finger-shaped cross electrode pair will be described as an example.
  • first electrode 1031 and the second electrode 1032 may be any materials for making the electrode.
  • first electrode 1031 and the second electrode 1032 may be selected from one or more of the following materials: metal, graphene, and carbon nanotube.
  • the width of the gap 104 between the first electrode 1031 and the second electrode 1032 may be less than or equal to 10 ⁇ m.
  • the smaller width of the gap 104 is beneficial to control the formation of a smaller width insulating region 1052 in the tunnel junction 105. This ensures that after applying a voltage greater than the surface barrier of the conductive region, significant electron tunneling and electron emission can occur, and the insulating region 1052 is not broken down by the voltage.
  • the first insulating spacer 11 has a hollow cavity structure. In this way, more electrons can be bombarded to the anode 12 to generate X-rays, thereby improving the X-ray emission efficiency.
  • the first insulating spacer 11 may select a material with good insulation.
  • the first insulating spacer 11 may be selected from one or more of the following materials: glass, quartz, ceramic, and plastic.
  • the first insulating spacer 11 in order to make the first insulating spacer 11 play a very good insulating role, its thickness may be 0.1-20 mm. In order to achieve better insulation, the thickness of the first insulating spacer 11 may increase as the voltage applied to both sides of the insulating spacer 11 increases.
  • the anode 12 may be made of a metal material.
  • the anode material may be selected from one or more of the following materials: tungsten, molybdenum, gold, silver, copper, chromium, rhodium, aluminum, Niobium, tantalum, rhenium.
  • the thickness of the anode 12 should not be too thick.
  • the anode thickness may be 0.1-1000 microns.
  • the above is the structure of the on-chip micro X-ray source provided by the embodiment of the present application.
  • the working principle of the on-chip micro X-ray source is as follows:
  • Applying a voltage V1 between the interdigitated electrode pairs causes the on-chip micro-electron source 10 to emit electrons, while applying a voltage V2 to the first electrode 1031 and the anode 12, the electrons emitted by the on-chip micro-electron source 10 are accelerated, and the The anode 12 is bombarded at a high speed, and X-rays are generated inside the anode 12 due to the bremsstrahlung and the transition of the inner energy level of the atoms. The X-rays penetrate the anode 12 and radiate to the external space.
  • the above is a specific implementation manner of the on-chip micro X-ray source provided by the embodiment of the present application.
  • the above-mentioned on-chip micro X-ray source is based on the on-chip micro-electron source 10, and the on-chip micro-electron source 10 can be processed using micro-processing technology, therefore, the X-ray source based on the on-chip micro-electron source 10 can Obtained by micro-processing technology. Therefore, the size of the on-chip micro X-ray source provided by the embodiments of the present application can be further reduced, and the manufacturing cost can be reduced.
  • the on-chip micro X-ray source has the advantages of stable X-ray dose, low working vacuum requirements, fast switch response, integration, and batch processing. It can be applied to various portable X-ray detection and analysis and treatment equipment.
  • the on-chip micro-electron source 10 is explained by taking the surface tunneling electron source as an example.
  • the on-chip micro-electron source 10 described in the embodiments of the present application is not limited to the surface tunneling electron source, it may also be a tunneling electron source with a vertical structure.
  • FIG. 3 shows a cross-sectional structure of a vertical structure tunneling electron source.
  • the vertical structure tunneling electron source includes:
  • the first conductive layer 31 on the substrate 30 is the first conductive layer 31 on the substrate 30;
  • the second conductive layer 33 above the insulating layer 32 is the second conductive layer 33 above the insulating layer 32.
  • the working principle of the tunneling electron source of the vertical structure a positive bias voltage is applied on the second conductive layer 33 relative to the first conductive layer 31, and the bias value is greater than the surface barrier value of the second conductive layer 33 (in electrons) Volts); because the insulating layer 32 is very thin (equivalent to the average free path of electrons), the electrons in the first conductive layer 31 will undergo quantum tunneling effect through the insulating layer 32 and enter the second conductive layer 33, the electrons are tunneling In the process of passing through the insulating layer 32, the energy is increased to above the vacuum level of the second conductive layer 33; due to the thin thickness of the second conductive layer 33, part of the electrons tunneling through the insulating layer 32 can further pass through the first without scattering The second conductive layer 33 is emitted into the vacuum from the surface of the second conductive layer 33.
  • the tunneling electron source of the vertical structure may be a vertical structure based on metal (M) -insulating layer (I) -metal (M), or a semiconductor (S) -insulator (I) -metal ( M) vertical structure or semiconductor (S) -insulator (I) -semiconductor (S) vertical structure.
  • the first insulating spacer 11 is explained by taking the hollow cavity structure as an example, so that more The electrons can bombard the anode 12 to generate X-rays and improve the X-ray emission efficiency.
  • the first insulating spacer 11 may also be a cavity structure provided with a top cover 111 on which a conductive plug 112 is provided.
  • the anode 12 is located under the top cover 111, and the conductive plug 112 is electrically connected to the electrode 113 on the first insulating spacer 11.
  • the first insulating spacer 11 provided with the top cover 111 can increase the tightness of the closed vacuum chamber, which is beneficial to avoid interference of electron emission by impurities in the environment.
  • the present application also provides a specific implementation manner of the on-chip micro X-ray source manufacturing method.
  • a method for manufacturing an on-chip micro X-ray source provided in Embodiment 1 includes:
  • the steps of preparing the on-chip micro-electron source 10 may be specifically:
  • FIG. 7 (1) The schematic diagram of the cross-sectional structure corresponding to this step is shown in FIG. 7 (1).
  • S512 forming a thin film layer 102 of resistive material covering a surface of the substrate 101.
  • This step may be specifically: forming a thin film layer 102 of resistive material on a surface of the substrate 101 by a thin film deposition process or a thermal oxidation process commonly used in the art.
  • FIG. 7 (2) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 7 (2).
  • each electrode pair includes a first electrode 1031 and a second electrode 1032, and exists between each first electrode 1031 and each second electrode 1032 The gap 104.
  • this step may be specifically: depositing an electrode material layer on the resistive material thin film layer 102 by using an electrode deposition process commonly used in the art, which specifically includes spin-coating electron beam photoresist, electron beam exposure, development and fixing , Metal film deposition, stripping and other process steps, forming a first electrode 1031 and a second electrode 1032 and a gap 104 between the first electrode 1031 and the second electrode 1032 covering part of the surface of the resistive material thin film layer 102.
  • an electrode deposition process commonly used in the art, which specifically includes spin-coating electron beam photoresist, electron beam exposure, development and fixing , Metal film deposition, stripping and other process steps, forming a first electrode 1031 and a second electrode 1032 and a gap 104 between the first electrode 1031 and the second electrode 1032 covering part of the surface of the resistive material thin film layer 102.
  • FIG. 7 (3) The schematic diagram of the cross-sectional structure corresponding to the completion of this step is shown in FIG. 7 (3).
  • S514 Control the thin film layer 102 of the resistive material under the gap 104 to be softly broken down and exhibit resistive characteristics, so as to form a tunnel junction 105 in the region of the thin film layer 102 of the resistive material under the gap 104.
  • This step can be specifically as follows: apply a voltage on the first electrode 1031 and the second electrode 1032, and gradually increase the voltage value, while monitoring the current size, and set a limit current at a certain current value, such as 100 ⁇ A, when the current suddenly increases steeply
  • a limit current at a certain current value, such as 100 ⁇ A
  • conductive filaments are formed across the resistive material thin film layer 102 under the entire gap 104 in the region of the resistive material thin film layer 102, so that the region of the resistive material thin film layer 102 changes from an insulating state to a conductive state, and then After undergoing the transition from the low-resistance state to the high-resistance state again, the conductive filament breaks, forming a tunnel junction 105 as shown in FIG. 2 (1) in the region of the resistive material film layer 102 below the gap 104, which tunnel junction From the first electrode 1031 to the second electrode 1032, 105 includes a connected first conductive region 1051, an insulating region 1052, and a second conductive region 1053 in sequence.
  • the surface tunneling electron source in FIGS. 1 (1) to 1 (3) is formed.
  • the surface tunneling electron source is working, electrons do not need to pass through multiple layers of materials during emission, so it can have higher emission efficiency.
  • the surface tunneling electron source can be obtained through micromachining technology, so it can have Small size, and can reduce manufacturing costs.
  • An anode 12 is prepared, and a first insulating spacer 11 is provided on one surface of the anode 12, wherein the first insulating spacer 11 is a cavity structure.
  • This step may be specifically: selecting an insulating layer with a thickness between 0.1-20 mm, and using a physical vapor deposition method, chemical vapor deposition method or spin coating method commonly used in the art, first covering a surface of the insulating layer with a layer Metal material, and the thickness of the metal material layer is controlled between 0.1-1000 mm. Use this metal material layer as the anode 12.
  • the insulating layer is etched on a surface where the anode 12 is not provided until the anode 12 is exposed. The insulating layer is etched into the first insulating spacer 11 of the hollow cavity structure.
  • FIG. 8 The schematic diagram of the cross-sectional structure corresponding to this step is shown in FIG. 8.
  • This step may be specifically as follows: the first insulating spacer 11 is connected to the on-chip micro-electron source 10 on the side where electrons are emitted in a vacuum by adhesive bonding or bonding, so that the on-chip micro-electron source 10 and the anode 12 Closely connected to form a closed vacuum chamber.
  • S51 and S52 are not limited in this application.
  • S514 may be executed before or after S53.
  • the above is a specific implementation of the manufacturing method of the on-chip micro X-ray source provided in Embodiment 1.
  • the on-chip micro X-ray source manufactured by this method has the same advantages as the on-chip micro X-ray source provided in FIG. 1 for the sake of brevity. , Will not repeat them here.
  • Embodiment 2 The above is the specific implementation corresponding to the on-chip micro X-ray source and the manufacturing method thereof provided in Embodiment 1 of the present application.
  • the present application also provides another implementation method of the on-chip micro-X-ray source, please refer to Embodiment 2.
  • FIG. 9 (1) is a schematic cross-sectional structure diagram of an on-chip micro X-ray source provided by Example 2 of the present application
  • FIG. 9 (2) is provided by Example 2 of the present application
  • An on-chip micro X-ray source provided in Embodiment 2 of this application includes:
  • An anode 92 located on the first insulating spacer 91;
  • a closed vacuum cavity is formed between the on-chip micro electron source 90 and the anode 92.
  • the structures of the second embodiment and the first embodiment are basically the same, the only difference is that the structure of the on-chip micro-electron source 90 is different. Therefore, for the sake of brevity, the embodiments of the present application will not describe the specific structures of the first insulating spacer 91 and the anode 92 in detail, but only the on-chip micro-electron source 90 will be described in detail.
  • an on-chip micro-electron source 90 including:
  • each electrode pair includes a first electrode 9031 and a plurality of second electrodes 9032, wherein each second electrode 9032 corresponds to a through hole 9021, and each second electrode 9032 is in contact with the substrate 901 through a through hole 9021; different second electrodes 9032 are isolated from each other;
  • a tunnel junction 905 is formed in the region of the thin film layer 902 of the resistive material under each gap 904.
  • the materials of the substrate 901, the resistive material thin film layer 902, the first electrode 9031 and the second electrode 9032 and the substrate 101, the resistive material thin film layer 102, the first electrode 1031 and the first are the same, and for the sake of brevity, they will not be repeated here.
  • the tunneling junction 905 formed in the region of the resistive material thin film layer 902 under each gap 904 has the same structure as the tunneling junction 105 in the first embodiment described above. Repeat again.
  • the through holes 9021 may be provided in different shapes.
  • the resistive material film layer 902 is provided with a plurality of circular through holes 9021 isolated from each other.
  • the first electrode 9031 may be a continuous electrode layer covering the resistive material thin film layer 902, and each second electrode 9032 may be an electrode covering the inner wall of the circular through hole 9021 Island, and there is electrical isolation between the electrode island and the first electrode 9031.
  • the gap 904 between the first electrode 9031 and each second electrode 9032 may be a circular gap 904. Since there are a plurality of second electrodes 9032, an electrode pair array including a plurality of electrode pairs may be formed between the first electrode 9031 and the second electrode 9032, and accordingly, the plurality of gaps 904 form a gap array.
  • each gap 904 may be less than or equal to 10 ⁇ m.
  • each electrode is connected to the substrate 901 through a circular through-hole 9021, so that the heat generated when the on-chip micro-electron source operates can be dissipated through the second electrode 9032 and the substrate 901 Therefore, the heat dissipation capability of the on-chip micro-electron source 90 is greatly improved, which is beneficial to the integration of multiple on-chip micro-electron sources on the same substrate 901.
  • each second electrode 9032 is in contact with the substrate 901, so as another example of the present application, in order to simplify the process of applying voltage
  • the voltage V1 may be applied to the first electrode 9031 and the substrate 901. Since each second electrode 9032 is in contact with the substrate 901, the electrical signal applied to the substrate 901 is transmitted to each second electrode 9032, which eliminates the need for each second electrode 9032 The process of applying voltage.
  • the above is the structure of the on-chip micro electron source 90 in the on-chip micro X-ray source provided in Embodiment 2 of the present application.
  • the on-chip micro X-ray source based on the on-chip micro electron source 90 has the same working principle as the on-chip micro X-ray source provided in FIGS. 1 (1) and 1 (2) in Embodiment 1, and will not be repeated here for the sake of brevity.
  • the on-chip micro electron source 90 selects a material having both thermal conductivity and electrical conductivity as the substrate 901.
  • the two electrodes 9032 are connected to the substrate 901 through a plurality of through holes 9021 in the resistive material thin film layer 902, so that the heat generated by the on-chip micro-electron source 90 can be dissipated through the second electrode 9032 and the substrate 901, thereby significantly improving the on-chip
  • the heat dissipation capability of the electron source 90 facilitates the integration of multiple on-chip micro-electron sources on the same substrate 901.
  • the on-chip micro X-ray source based on the on-chip micro-electron source 90 can also obtain more emitted electrons for bombarding the anode 92, thereby increasing the emission dose of the X-ray source.
  • the first electrode 9031 of all electrode pairs is used as a common electrode.
  • the first electrode 9031 can be used as the first electrode of all electrode pairs.
  • the first electrodes of each electrode pair may be independent of each other.
  • the second electrode 9032 of each electrode pair is connected to the substrate 901 through the through hole 9021 to realize the heat dissipation of the micro electron source on the accelerator.
  • the substrate 901 is made of insulating
  • the first electrode 9031 and the second electrode 9032 can be connected to the substrate 901 through different through holes 9021 respectively, so as to further improve the heat dissipation capability of the on-chip micro-electron source.
  • the present application also provides a specific implementation method of the on-chip micro X-ray source manufacturing method.
  • a method for manufacturing an on-chip micro X-ray source provided in Embodiment 2 includes:
  • S101 Prepare an on-chip micro-electron source 90.
  • the on-chip micro-electron source 90 can select the same surface tunneling electron source as the on-chip micro-electron source 90 provided in FIG. 9 (3).
  • the steps of preparing the on-chip micro-electron source 90 may be specifically:
  • the substrate 901 material may be the same substrate 901 material as the on-chip micro-electron source provided in FIG. 9 (3). For the sake of brevity, it will not be repeated here.
  • FIG. 12 (1) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 12 (1).
  • FIG. 12 (2) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 12 (2).
  • the through hole 9021 can be formed by a dry etching or wet etching process.
  • the dry etching may be reactive gas etching, plasma etching, or the like.
  • this step may be specifically: spin-coating an electron beam photoresist on the resistive material film layer 902, through electron beam exposure, development and fixing, wet A plurality of circular through holes 9021 are formed on the resistive material thin film layer 902 through process steps such as etching, degumming and the like.
  • FIG. 12 (3) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 12 (3).
  • S1014 forming a first electrode 9031 and a plurality of second electrodes 9032 on the resistive material thin film layer 902, wherein a gap 904 exists between the first electrode 9031 and each second electrode 9032, and each second electrode 9032
  • the via 9021 is connected to the substrate 901.
  • This step may be specifically: depositing a layer of electrode material on the resistive thin film layer 902 and the inner wall of the through hole 9021 using a conventional electrode deposition process, which specifically includes spin-coating electron beam photoresist, electron beam exposure, development and fixing, Process steps such as metal thin film deposition, stripping, etc. form a first electrode 9031 and a second electrode 9032.
  • the first electrode 9031 may be an electrode layer covering the resistive material thin film layer 902
  • each second electrode 9032 may be an electrode layer covering a through hole 9021 and the surrounding resistive material thin film layer 902.
  • each second electrode is connected to the substrate 901 through a circular through hole 9021, thereby greatly improving the heat dissipation capability of the on-chip micro-electron source It is beneficial to the integration of multiple on-chip micro-electron sources on the same substrate 901.
  • FIG. 12 (4) A schematic diagram of the cross-sectional structure corresponding to the completion of this step is shown in FIG. 12 (4).
  • S1015 Control the thin film layer 902 of the resistive material under the gap 904 to be softly broken down and exhibit resistive characteristics, so as to form a tunnel junction 905 in the region of the thin film layer 902 of the resistive material under the gap 904.
  • FIG. 12 (5) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 12 (5).
  • the surface tunneling electron source has the same beneficial effects as the surface tunneling electron source provided in FIG. 9 (3). For the sake of brevity, it will not be repeated here.
  • S102 to S103 are the same as S52 to S53, and will not be described in detail here for the sake of brevity.
  • the schematic diagram of the cross-sectional structure after S102 is executed is shown in FIG. 8, and the schematic diagram of the corresponding structure after S103 is executed is shown in FIG. 9.
  • S101 and S102 are not limited in this application.
  • S1015 may be executed before or after S103, and the embodiments of this application are not limited.
  • Embodiment 3 of this application can be improved on the basis of the above Embodiment 1 or Embodiment 2.
  • Embodiment 3 of this application is improved on the basis of Embodiment 2 get.
  • an on-chip micro X-ray source may include, in addition to all the components in Embodiment 2, the following:
  • first heat dissipation component 130 or the second heat dissipation component 131 may be a heat sink or a heat sink with good heat dissipation capability.
  • first heat-dissipating member 130 and the anode 92, the second heat-dissipating member 131 and the substrate 901 are closely adhered together and form a good thermal contact.
  • the heat generated on the anode 92 can be quickly dissipated through the first heat dissipation member 130, and the heat generated on the on-chip micro electron source 90 can sequentially pass through the second electrode 9032 and the resistive material
  • the thin film layer 902 and the second heat dissipation member 131 are efficiently dispersed.
  • the on-chip micro X-ray source is still on the anode 92 on the basis of the on-chip micro X-ray source provided in Embodiment 2.
  • the heat dissipation components are separately provided under the substrate 901, so that the on-chip micro X-ray source has the same beneficial effects as the on-chip micro X-ray source provided in Embodiment 2, and greatly improves the overall device of the on-chip micro X-ray source Heat dissipation capacity.
  • the present application also provides a specific implementation manner of the on-chip micro X-ray source manufacturing method.
  • a method for manufacturing an on-chip micro X-ray source provided in Embodiment 3 includes:
  • S141 to S143 are the same as S101 to S103, and will not be described in detail here for the sake of brevity.
  • the schematic diagram of the cross-sectional structure after the execution of S143 is shown in FIG. 9 (1).
  • the first heat dissipation member 130 is formed on the anode 92.
  • the first heat dissipation member 130 and the anode 92 can be closely adhered together by bonding or bonding and form a good thermal contact.
  • this step may be specifically: connecting the first heat dissipation member 130 and the anode 92 through a thermally conductive adhesive layer to make the first heat dissipation member 130 and anode 92 are in close contact and form a good thermal contact.
  • FIG. 15 The schematic diagram of the cross-sectional structure corresponding to this step is shown in FIG. 15.
  • a second heat dissipation member 131 is formed under the substrate 901.
  • the second heat dissipation member 131 and the substrate 901 may use the same connection method as in S144, and for the sake of brevity, they will not be repeated here.
  • FIG. 13 The schematic diagram of the cross-sectional structure corresponding to this step is shown in FIG. 13.
  • the above is another specific implementation of the method for manufacturing the on-chip micro X-ray source provided in Embodiment 3.
  • the on-chip micro X-ray source manufactured by this method has the same advantages as the on-chip micro X-ray source provided in FIG. For the sake of brevity, I will not repeat them here.
  • Embodiment 4 is another implementation manner of the on-chip micro X-ray source and the manufacturing method thereof provided in Embodiment 3 of the present application.
  • a hollow focusing electrode and a second insulating spacer may also be formed between the first insulating spacer 91 and the on-chip micro electron source 90.
  • the present application provides on-chip micro X-rays For another implementation of the source, see Embodiment 4.
  • the on-chip micro X-ray source provided in Embodiment 4 of the present application can be improved on the basis of the on-chip micro X-ray source provided in any of the above Embodiments 1 to 3, as an example, the embodiment of this application Fourth, it is improved on the basis of the second embodiment.
  • an on-chip micro X-ray source may include, in addition to all the components in Embodiment 2, the following:
  • Hollow focusing electrode 160 which is located between the first insulating spacer 91 and the on-chip micro-electron source 90;
  • the hollow focusing electrode 160 is close to the second insulating spacer 161 provided on one side surface of the on-chip micro-electron source 90, wherein the second insulating spacer 161 is a hollow cavity structure.
  • the hollow focusing electrode 160 can be made of a material with good conductivity, for example, it can be made of a metal material.
  • the hollow focusing electrode 160 between the first insulating spacer 91 and the on-chip micro-electron source 90 may be a single layer or multiple layers.
  • the material of the second insulating spacer 161 may be the same as the material of the first insulating spacer 91, and the thickness of the second insulating spacer 161 may also be the same as the thickness of the first insulating spacer 91. Repeat again.
  • the above is the structure of the on-chip micro X-ray source provided by the embodiment of the present application.
  • the working principle of the on-chip micro X-ray source is as follows:
  • Applying a voltage V1 to the first electrode 9031 and the substrate 901 causes the on-chip micro-electron source 90 to emit electrons; at the same time, applying a voltage V2 to the first electrode 9031 and the anode 92 to accelerate the electrons emitted by the surface tunneling electron source, It bombards the anode 92 at high speed.
  • X-rays are generated inside the anode 92 due to bremsstrahlung and atomic energy level transitions.
  • the present application also provides a specific implementation manner of the on-chip micro X-ray source manufacturing method.
  • the method for manufacturing the on-chip micro X-ray source provided in Embodiment 4 may further include:
  • S171 to S172 are the same as S101 to S102, and will not be described in detail here for the sake of brevity.
  • FIG. 9 (3) The schematic diagram of the cross-sectional structure corresponding to the execution of S171 is shown in FIG. 9 (3), and the schematic diagram of the cross-sectional structure corresponding to the execution of S172 is shown in FIG. 8.
  • S173 Prepare a hollow focusing electrode 160.
  • a second insulating spacer 161 is provided on one surface of the hollow focusing electrode 160, wherein the second insulating spacer has a hollow cavity structure.
  • This step may be specifically: selecting an insulating layer with a thick bottom between 0.1-20 mm, and using physical vapor deposition, chemical vapor deposition, or spin coating methods conventional in the art, first forming a focused layer on a surface of the insulating layer Electrode layer. Next, using a dry etching or wet etching process, the insulating layer is etched from a surface on which the collecting electrode layer is not provided until the focusing electrode layer is exposed, thereby forming the hollow focusing electrode 160 and the insulating spacer 161 of the hollow structure.
  • FIG. 18 (1) The schematic diagram of the cross-sectional structure corresponding to the completion of this step is shown in FIG. 18 (1).
  • FIG. 18 (2) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 18 (2).
  • S175 Connect the first insulating spacer 91 to the side of the on-chip micro-electron source 90 emitting electrons, so that a closed vacuum cavity is formed between the on-chip micro-electron source 90 and the anode 92.
  • This step may be specifically: connecting the first insulating spacer 91 to the side of the hollow focusing electrode 160 facing away from the second insulating spacer 161 by means of adhesive bonding or bonding, so that the first insulating spacer 91 and the hollow focus The electrodes 160 are tightly connected to form a closed vacuum chamber.
  • the structure diagram corresponding to this step is shown in FIG. 16.
  • S171, S172 and S173 is not limited in this application.
  • the above is a specific implementation of the manufacturing method of the on-chip micro X-ray source provided in Embodiment 4.
  • the on-chip micro X-ray source manufactured by this method has the same advantages as the on-chip micro X-ray source provided in FIG. 16, for the sake of brevity , Will not repeat them here.
  • Embodiment 4 above shows an implementation of an on-chip micro X-ray source.
  • the anode can also be improved and a getter part can be placed in the vacuum chamber.
  • the present application provides for another implementation of the on-chip micro X-ray source manufacturing method, please refer to Embodiment 5.
  • the on-chip micro X-ray source provided in Embodiment 5 of the present application can be improved on the basis of the on-chip micro X-ray source provided in any of the above Embodiments 1 to 4, as an example, the embodiment of the present application Fifth, it is improved on the basis of the fourth embodiment.
  • the on-chip micro X-ray source and the on-chip micro X-ray source provided in Embodiment 4 have the same components, and for the sake of brevity, only the improved components will be described.
  • an on-chip micro X-ray source may further include:
  • the target layer 1911 is located near the electron bombardment side, and the support layer 1912 is located away from the electron bombardment one. side;
  • the suction part 192 located in the closed vacuum chamber.
  • first insulating spacer 190 may be the same as the material and thickness of the first insulating spacer 91 shown in FIG. 16 in Embodiment 4, and for the sake of brevity, no further description is provided here.
  • the target layer 1911 may be made of a heavy metal material.
  • the heavy metal material may be at least one selected from tungsten, molybdenum, gold, silver, copper, chromium, rhodium, aluminum, niobium, tantalum, and rhenium.
  • the support layer 1912 may be made of a material with good thermal conductivity. As an example, the material of the support layer 1912 may be aluminum or copper. The anode 191 made of the target layer 1911 and the support layer 1912 can effectively improve the mechanical strength and thermal conductivity of the anode 191.
  • the on-chip micro X-ray source provided in this embodiment is provided with a hollow focusing electrode 160, which can reduce the area of electron bombardment to the anode 191. Therefore, the area of the target layer 1911 in the anode 191 can be correspondingly reduced.
  • the getter 192 can be selected from the following One or more of the gas agents: zirconium-graphite getter, zirconium-zirconium iron vanadium getter, molybdenum-titanium getter.
  • the second insulating spacer 161 may also be provided with a groove for placing the suction member 192.
  • the on-chip micro X-ray source provided in FIG. 19 of the embodiment of the present application may also be improved.
  • the first heat dissipation member 200 may be formed on the anode 191
  • the second heat dissipation member 201 may be formed under the substrate 901, see FIG. 20.
  • first heat dissipation component 200 and the second heat dissipation component 201 may be heat sinks or fins with good heat dissipation capabilities.
  • the anode 191 in the on-chip micro X-ray source is composed of a target layer 1911 and a support layer 1912.
  • the suction part 192 is provided, so that the mechanical strength and thermal conductivity of the anode 191 are effectively improved and the vacuum in the enclosed vacuum chamber can be adjusted or maintained, thereby greatly improving the performance of the on-chip micro X-ray source.
  • the present application also provides a specific implementation manner of the on-chip micro X-ray source manufacturing method.
  • a method for manufacturing an on-chip micro X-ray source provided in Embodiment 5 includes:
  • S211 is the same as S171 and will not be described in detail here for the sake of brevity.
  • the schematic diagram of the cross-sectional structure after S211 is executed is shown in FIG. 12 (5).
  • S212 An anode 191 is prepared, and a first insulating spacer 190 is provided on one surface of the anode 191, wherein the first insulating spacer 190 is a cavity structure.
  • the anode 191 includes a target layer 1911 and a support layer 1912 for supporting the target layer 1911.
  • This step may be specifically: selecting an insulating spacer with a thickness between 0.1-20 mm, and covering the middle area of one surface of the insulating spacer by using a physical vapor deposition method, a chemical vapor deposition method or a spin coating method conventional in the art A layer of heavy metal material, using the heavy metal material layer as the target layer 1911.
  • a physical vapor deposition method, a chemical vapor deposition method, or a spin coating method a layer of thermally conductive material covering the target layer 1911 and the insulating spacer is deposited on the target layer 1911, and the thermally conductive material layer is used as the support layer 1912.
  • the dry etching or wet etching process is used to start etching from the surface of the insulating spacer opposite to the surface covering the anode 191 until the etching of the target layer 1911 stops.
  • the insulating spacer is etched into a hollow structure cavity gradually retracting from top to bottom, so that the surface of the target layer 1911 opposite to the insulating spacer can be completely exposed, thereby forming the first insulating spacer 190.
  • FIG. 22 (1) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 22 (1).
  • S213 to S214 are the same as S173 to S174, and will not be described in detail here for the sake of brevity.
  • the schematic diagram of the cross-sectional structure after S213 is executed is shown in FIG. 18 (1), and the schematic diagram of the cross-sectional structure after S214 is executed is shown in FIG. 18 (2).
  • S215 Place a suction member 192 in the closed vacuum chamber to be formed.
  • the suction member 192 is used to absorb the gas in the closed vacuum chamber to adjust or maintain the vacuum in the closed vacuum chamber.
  • This step may be specifically: using a dry etching process to etch at least one groove on the side wall of the second insulating spacer 161, and placing the getter 192 into the groove.
  • FIG. 22 (2) The schematic diagram of the cross-sectional structure corresponding to the execution of this step is shown in FIG. 22 (2).
  • S216 is the same as S175, and will not be described in detail here for the sake of brevity.
  • the schematic diagram of the cross-sectional structure corresponding to this step is shown in FIG. 19.
  • the above is a specific implementation of the method for manufacturing the on-chip micro X-ray source provided in Embodiment 5.
  • the on-chip micro X-ray source manufactured by this method has the same advantages as the on-chip micro X-ray source provided in FIG. , Will not repeat them here.

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Abstract

一种片上微型X射线源，包括：片上微型电子源(10)；位于所述片上微型电子源(10)发射电子一侧的第一绝缘间隔体(11)，所述第一绝缘间隔体(11)为腔体结构；位于所述第一绝缘间隔体(11)上的阳极(12)；其中，所述片上微型电子源(10)和所述阳极(12)之间形成封闭真空腔体。该片上微型电子源可以采用微加工技术加工得到，因此，其尺寸能够进一步减小，而且能够降低制备成本。该片上微型X射线源具有X射线剂量稳定、工作真空要求低、开关响应快、可集成、可批量加工等优点，可应用于小型便携的各类X射线检测分析和治疗设备。

Description

一种片上微型X射线源及其制造方法
本申请要求于2018年11月12日提交中国专利局、申请号为201811339577.X、发明创造名称为“一种片上微型X射线源及其制造方法”以及于2018年11月12日提交中国专利局、申请号为201821855698.5、发明创造名称为“一种片上微型X射线源”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及X射线源领域，尤其涉及一种片上微型X射线源及其制造方法。
背景技术
X射线广泛应用于健康检查、癌症放疗、安全检查、工业探伤、材料分析等领域。
目前，X射线主要是通过热阴极X射线管产生，其主要包括一个热发射阴极和阳极，电子从热阴极发射后被加速，高能电子轰击到阳极并在阳极发生韧致辐射和原子内壳层电子跃迁，从而产生X射线。
由于热发射阴极具有体积大、功耗高、开关延迟时间长等特点，热阴极X射线管一般也具有较大的体积、较高的功耗和较长的开关响应时间。这些问题限制了传统热发射X射线管在很多场景的应用。另一方面，轻小型X射线医学成像系统、近距离电学X射线放疗设备、便携式X射线检测和分析装置等新型X射线仪器的应用需求越来越大，这些仪器的关键核心部件就是微型X射线源，因此，微型X射线源是一种重要的、需求越来越大的电子元器件。
微型X射线源的研究始于2000年左右，目前已研制成功了基于热发射电子源和纳米材料场发射电子源的小型或微型X射线源。
其中，基于热发射电子源的小型X射线源的技术比较成熟，其虽然具有更小巧紧凑的尺寸，但由于仍使用热发射电子源且具有和传统X射线管非常相似的结构，基于热发射电子源的小型X射线源仍具有开关响应时间 长的问题，难以应用在移动对象的动态X射线成像等场合。
相比于基于热发射电子源的小型X射线源，基于碳纳米管、氧化锌纳米线等纳米材料场发射电子源的微型X射线源具有更小的尺寸、更低的功耗、更短的开关响应时间，被认为是一种非常有前景的微型X射线源技术。
然而，目前所有片上的微型X射线源均具有尺寸难以进一步减小、批量制备成本高等问题。
发明内容
有鉴于此，本申请提供了一种片上微型X射线源及其制造方法，以进一步减小片上微型X射线源的尺寸，降低其成本。
为了解决上述技术问题，本申请采用了如下技术方案：
一种片上微型X射线源，包括：
片上微型电子源；
位于所述片上微型电子源发射电子一侧的第一绝缘间隔体，所述第一绝缘间隔体为腔体结构；
位于所述第一绝缘间隔体上的阳极；
其中，所述片上微型电子源和所述阳极之间形成封闭真空腔体。
可选地，所述片上微型电子源包括：
衬底；
覆盖所述衬底一表面的阻变材料薄膜层；
位于所述阻变材料薄膜层上的至少一个电极对；所述电极对包括第一电极和第二电极，所述第一电极和所述第二电极之间存在间隙；
其中，所述间隙下面的阻变材料薄膜层区域内形成有遂穿结。
可选地，所述电极对为多个，多个所述电极对为指型交叉电极对。
可选地，所述衬底由具有导热性能的材料制成，所述阻变材料薄膜层上设置有至少一个与所述衬底连通的通孔；
所述电极对中的至少一个电极通过所述通孔与所述衬底接触连接。
可选地，所述X射线源还包括位于所述阳极上的第一散热部件。
可选地，所述X射线源还包括位于所述衬底下面的第二散热部件。
可选地，所述第一绝缘间隔体为中空腔体结构。
可选地，所述第一绝缘间隔体为设置有顶盖的腔体结构，所述顶盖上设置有导电插塞；
所述阳极位于所述顶盖的下面，且通过所述导电插塞与位于所述第一绝缘间隔体上面的电极之间形成电连接。
可选地，所述X射线源还包括：
位于所述第一绝缘间隔体和所述片上微型电子源之间的中空聚焦电极，所述中空聚焦电极靠近所述片上微型电子源的一侧表面上设置有第二绝缘间隔体；所述第二绝缘间隔体为中空腔体结构；
其中，所述第二绝缘间隔体与所述片上微型电子源连接在一起。
可选地，所述封闭真空腔体内设置有吸气部件，所述吸气部件用于吸收所述封闭真空腔体内的气体，以调节或维持所述封闭真空腔体内的真空。
可选地，所述阳极包括靶层和用于支撑所述靶层的支撑层；
所述靶层位于靠近电子轰击一侧，所述支撑层位于远离电子轰击一侧。
可选地，所述靶层由重金属材料制成，所述支撑层由铜或铝制成。
可选地，所述阳极的厚度在0.1-1000微米。
一种片上微型X射线源的制造方法，包括：
制备片上微型电子源；
制备阳极，所述阳极的一表面上设置有第一绝缘间隔体，所述第一绝缘间隔体为腔体结构；
将所述第一绝缘间隔体连接在所述片上微型电子源发射电子一侧，从而使得所述片上微型电子源和所述阳极之间形成封闭真空腔体。
可选地，所述将所述片上微型电子源和所述第一绝缘间隔体连接在一起之前，还包括：
制备中空聚焦电极，所述中空聚焦电极的一表面上设置有第二绝缘间隔体；所述第二绝缘间隔体为中空腔体结构；
所述将所述片上微型电子源和所述第一绝缘间隔体连接在一起之前，还包括：
将所述第二绝缘间隔体连接在所述片上微型电子源发射电子一侧；
所述将所述片上微型电子源和所述第一绝缘间隔体连接在一起，具体包括：
将所述第一绝缘间隔体连接在所述中空聚焦电极背离所述第二绝缘间隔体的一侧。
可选地，所述将所述第一绝缘间隔体连接在所述片上微型电子源发射电子一侧，从而使得所述片上微型电子源和所述阳极之间形成封闭真空腔体之前，还包括：
在即将形成的封闭真空腔体中置入吸气部件，所述吸气部件用于吸收所述封闭真空腔体内的气体，以调节或维持所述封闭真空腔体内的真空。
可选地，所述方法还包括：
在所述阳极上面形成第一散热部件。
可选地，所述制备片上微型电子源，具体包括：
提供衬底；
形成覆盖所述衬底一表面的阻变材料薄膜层；
在所述阻变材料薄膜层上形成至少一个电极对；所述电极对包括第一电极和第二电极，所述第一电极和所述第二电极之间存在间隙；
所述将所述第一绝缘间隔体连接在所述片上微型电子源发射电子一侧，从而使得所述片上微型电子源和所述阳极之间形成封闭真空腔体之前或之后，所述制备片上微型电子源，还包括：
控制所述间隙下面的阻变材料薄膜层被软击穿并呈现阻变特性，以在所述间隙下面的阻变材料薄膜层区域内形成遂穿结。
可选地，所述衬底为具有导热性能的衬底，形成阻变材料薄膜层之后，形成至少一个电极对之前，还包括：
在所述阻变材料薄膜层上形成至少一个与所述衬底连通的通孔；
其中，所述电极对中的至少一个电极通过所述通孔与所述衬底接触连接。
相较于现有技术，本申请具有以下有益效果：
基于以上技术方案可知，本申请提供的片上微型X射线源基于片上微型电子源，该片上微型电子源可以采用微加工技术加工得到。因此，相较于现有技术中采用传统机械加工技术制成的片上微型X射线源，本申请提供的片上 微型X射线源可以采用微加工技术加工得到，因此，其尺寸能够进一步减小，而且能够降低制备成本。而且，该片上微型X射线源具有X射线剂量稳定、工作真空要求低、开关响应快、可集成、可批量加工等优点，可应用于小型便携的各类X射线检测分析和治疗设备。
附图说明
图1(1)是本申请实施例一提供的一种片上微型X射线源的剖面结构示意图；
图1(2)是本申请实施例一提供的一种片上微型X射线源的立体结构示意图；
图1(3)是本申请实施例一提供的一种片上微型X射线源中片上微型电子源的立体结构示意图；
图2(1)是本申请实施例一提供的片上微型电子源的结构原理示意图；
图2(2)是本申请实施例一提供的片上微型电子源中的遂穿结能带结构示意图；
图3是本申请实施例一提供的一种片上微型X射线源中垂直结构隧穿电子源的剖面结构示意图；
图4是本申请实施例一提供的另一种片上微型X射线源的剖面结构示意图；
图5是本申请实施例一提供的一种片上微型X射线源制造方法的流程示意图；
图6是本申请实施例一提供的片上微型电子源制造方法的流程示意图；
图7(1)至图7(4)是本申请实施例一提供的一种片上微型电子源制造方法一系列制程对应的剖面结构示意图；
图8是本申请实施例一提供的制备阳极步骤对应的剖面结构示意图；
图9(1)是本申请实施例二提供的一种片上微型X射线源的剖面结构示意图；
图9(2)是本申请实施例二提供的一种片上微型X射线源的立体结构示意图；
图9(3)是本申请实施例二提供的一种片上微型X射线源中片上微型电子源的立体结构示意图；
图10是本申请实施例二提供的一种片上微型X射线源制造方法的流程示意图；
图11是本申请实施例二提供的片上微型电子源制造方法的流程示意图；
图12(1)至图12(5)是本申请实施例二提供的一种片上微型电子源制造方法一系列制程对应的剖面结构示意图；
图13是本申请实施例三提供的一种片上微型X射线源的剖面结构示意图；
图14是本申请实施例三提供的一种片上微型X射线源制造方法的流程示意图；
图15是本申请实施例三提供的制备第一散热部件步骤对应的剖面结构示意图；
图16是本申请实施例四提供的一种片上微型X射线源的剖面结构示意图；
图17是本申请实施例四提供的一种片上微型X射线源制造方法的流程示意图；
图18(1)至图18(2)是本申请实施例四提供的一种片上微型X射线源制造方法一系列制程对应的剖面结构示意图；
图19是本申请实施例五提供的一种片上微型X射线源的剖面结构示意图；
图20是本申请实施例五提供的另一种片上微型X射线源的剖面结构示意图；
图21是本申请实施例五提供的一种片上微型X射线源制造方法的流程示意图；
图22(1)至图22(2)是本申请实施例五提供的一种片上微型X射线源制造方法一系列制程对应的剖面结构示意图。
具体实施方式
现有的微型X射线源是利用传统的机械加工技术得到，因此具有尺寸难以进一步减小、批量制备成本高等问题。而微加工技术广泛应用于大规模集成电路、微机电系统、微流体系统等片上微型器件的加工，是实现微型器件的主流加工技术，具有加工器件尺寸小、批量加工成本低、加工工艺可靠等优点。
因此，为了解决现有微型X射线源存在的问题，本申请提供了一种片上微型X射线源，该片上微型X射线源基于片上微型电子源，其中，片上微型电子源可以采用微加工技术加工得到。因而，相较于现有技术中采用传统机械加工技术制成的片上微型X射线源，本申请提供的片上微型X射线源可以采用微加工技术加工得到，因此，其尺寸能够进一步减小，而且能够降低制备成本。而且，该片上微型X射线源具有X射线剂量稳定、工作真空要求低、开关响应快、可集成、可批量加工等优点，可应用于小型便携的各类X射线检测分析和治疗设备。
为使本申请的上述目的、特征和优点能够更加明显易懂，下面结合附图对本申请的具体实施方式做详细的说明。
实施例一
参见图1(1)和图1(3)，图1(1)是本申请实施例一提供的一种片上微型X射线源的剖面结构示意图；图1(2)是本申请实施例一提供的一种片上微型X射线源的立体结构示意图；图1(3)是本申请实施例一提供的一种片上微型X射线源中片上微型电子源的立体结构示意图。需要说明，图1(2)实际上不是完整结构示意图，为了看见内部结构，阳极只画出部分。
本申请实施例一提供的一种片上微型X射线源，包括：
片上微型电子源10；
位于片上微型电子源10发射电子一侧的第一绝缘间隔体11，该第一绝缘间隔体11为腔体结构；
位于第一绝缘间隔体11上面的阳极12；
其中，片上微型电子源10和阳极12之间形成封闭真空腔体。
需要说明的是，为了提高片上微型电子源10的发射效率，作为一示例，该片上微型电子源10可以为具有一种平面多区结构的表面隧穿电子源，其具 体可以包括：
衬底101；
覆盖衬底101一表面的阻变材料薄膜层102；
位于阻变材料薄膜层102上的多个电极对，其中，每个电极对包括第一电极1031和第二电极1032，每个第一电极1031和每个第二电极1032之间均存在间隙104；
每个间隙104下面的阻变材料薄膜层102区域内均形成有隧穿结105(如图1(1)所示)。
上述所谓阻变材料是指最初是电学绝缘的材料，在对其施加电压进行软击穿，可以呈现阻变状态并具有电子发射能力，完成阻变材料的激活后，从电学绝缘材料转变成导电材料。
为了清楚的理解表面隧穿电子源的工作原理，图2(1)示出了本申请实施例提供的表面隧穿电子源的原理结构图。如图2(1)所示，在第一电极1031和第二电极1032之间施加电压，使得间隙104下面的阻变材料薄膜层102被软击穿，如此，间隙104下面的阻变材料薄膜层由绝缘态转变到导电态，然后又经历低阻态到高阻态的转变后，导电细丝断裂，在间隙104下面的阻变材料薄膜层102区域内形成如图2(1)所示的遂穿结105，该遂穿结105自第一电极1031到第二电极1032，依次包括连接的第一导电区域1051、绝缘区域1052和第二导电区域1053。
形成于该间隙104下面的阻变材料薄膜层102区域内的遂穿结105的能带图如图2(2)所示。如此，如图1(3)所示，当在第一电极1031和第二电极1032上施加上电压V1后，电子从电势低的第一导电区域1051隧穿到绝缘区域1052，并在绝缘区域1052加速获得越过真空能级的能量，在到达电势高的第二导电区域1053后发射出来。
需要说明的是，衬底101可以为Si衬底、Ge衬底、SiGe衬底、SOI(绝缘体上硅，Silicon On Insulator)或GOI(绝缘体上锗，Germanium On Insulator)等。
其中，为了提高该片上微型电子源的散热能力，衬底101还可以选择具有导热性能的材料，或者选择同时具有良好导电性能和导热性能的材料，当以具 有良好导电性能和导热性能的材料作为衬底101时，该衬底101还可以作为电极。在本申请实施例中，将以同时具有良好导电性能和导热性能的材料形成的衬底101为例进行说明。
作为一示例，用于形成具有良好导电性能和导热性能的衬底101的材料可以为金属或重掺杂半导体。
另外，阻变材料薄膜层102可以选自下列材料中的一种或多种：氧化硅、氧化钽、氧化铪、氧化钨、氧化锌、氧化镁、氧化锆、氧化钛、氧化铝、氧化镍、氧化锗、金刚石和无定形碳。上述材料在被软击穿后，均可以实现由低阻态到高阻态的转变并具有电子发射能力。
需要说明的是，在本申请实施例中，以在阻变材料薄膜层102上形成多个电极对作为示例，实际上，也可以只形成一个电极对。
另外，在阻变材料薄膜层102上形成的多个电极可以为不同结构的电极对，在该实施例中，以指型交叉电极对作为示例进行说明。
另外，第一电极1031和第二电极1032可以为制作电极的任意材料，作为示例，第一电极1031和第二电极1032可以选自下列材料中的一种或多种：金属、石墨烯和碳纳米管。
另外，作为一示例，第一电极1031和第二电极1032之间的间隙104宽度可以小于或者等于10μm，较小的间隙104宽度有利于控制隧穿结105中形成较小宽度的绝缘区域1052，从而保证在施加大于导电区域表面势垒的电压后，能发生显著的电子隧穿和电子发射，绝缘区域1052不被电压击穿。
作为一示例，该第一绝缘间隔体11为中空腔体结构，如此，可以使更多的电子能轰击到阳极12，产生X射线，提高X射线的发射效率。此外，第一绝缘间隔体11可以选择绝缘性较好的材料，作为示例，第一绝缘间隔体11可以选自下列材料中的一种或多种：玻璃、石英、陶瓷、塑料。
需要说明的是，为了使第一绝缘间隔体11起到很好的绝缘隔绝作用，其厚度可以为0.1-20毫米。为了更好的起到绝缘作用，第一绝缘间隔体11的厚度可以随着施加在其两侧电压的增高而增加厚度。
作为另一示例，阳极12可以为金属材料制成，作为更具体示例，阳极材料可以选自下列材料中的一种或多种：钨、钼、金、银、铜、铬、铑、铝、铌、 钽、铼。此外，为了保证X射线能够有效穿透阳极12，阳极12的厚度不宜过厚。作为一示例，阳极厚度可以在0.1-1000微米。
以上为本申请实施例提供的片上微型X射线源的结构，该片上微型X射线源的工作原理如下：
在指型交叉电极对之间施加电压V1，使片上微型电子源10发射电子，同时在第一电极1031和阳极12上施加电压V2，使片上微型电子源10发射出的电子被加速，并以高速轰击到阳极12，在阳极12内部由于韧致辐射和原子内层能级跃迁产生X射线，X射线穿透阳极12辐射到外部空间。
以上为本申请实施例提供的片上微型X射线源的具体实现方式。在该具体实现方式中，上述片上微型X射线源是基于片上微型电子源10，该片上微型电子源10可以采用微加工技术加工得到，因此，基于该片上微型电子源10的X射线源也可以采用微加工技术加工得到。从而，本申请实施例提供的片上微型X射线源的尺寸能够进一步减小，而且能够降低制造成本。并且，该片上微型X射线源具有X射线剂量稳定、工作真空要求低、开关响应快、可集成、可批量加工等优点，可应用于小型便携的各类X射线检测分析和治疗设备。
需要说明的是，在上述实施例中，片上微型电子源10是以表面隧穿电子源作为示例进行说明的。实际上，本申请实施例所述的片上微型电子源10不限于表面遂穿电子源，其还可以为垂直结构的隧穿电子源。图3示出了垂直结构的隧穿电子源的剖面结构，如图3所示，该垂直结构的遂穿遂穿电子源包括：
衬底30；
位于衬底30之上的第一导电层31；
位于第一导电层31之上的绝缘层32；
位于绝缘层32之上的第二导电层33。
该垂直结构的隧穿电子源工作原理：在第二导电层33上施加一个相对于第一导电层31的正偏压，且偏压值大于第二导电层33的表面势垒值(以电子伏特为单位)；由于绝缘层32很薄(与电子平均自由程相当)，第一导电层31中的电子会发生量子隧穿效应通过绝缘层32并进入第二导电层33，电子在隧穿通过绝缘层32的过程中能量被增加到第二导电层33的真空能级以上；由于第二导电层 33的厚度很薄，部分隧穿通过绝缘层32的电子可以无散射地进一步穿过第二导电层33，并从第二导电层33表面发射到真空中。
需要说明的是，垂直结构的隧穿电子源可以为基于金属(M)-绝缘层(I)-金属(M)的垂直结构，还可以为基于半导体(S)-绝缘体(I)-金属(M)的垂直结构或半导体(S)-绝缘体(I)-半导体(S)的垂直结构。
另外，在上述图1(1)至图1(3)所示的片上微型X射线源中，第一绝缘间隔体11是以中空腔体结构为例进行说明的，如此，可以使更多的电子能轰击到阳极12，产生X射线，提高X射线的发射效率。
作为本申请实施例的扩展，参见图4所示，第一绝缘间隔体11还可以为设置有顶盖111的腔体结构，该顶盖111上设置有导电插塞112。其中，阳极12位于顶盖111的下面，导电插塞112与第一绝缘间隔体11上面的电极113之间形成电连接。设置有顶盖111的第一绝缘间隔体11可以增加封闭真空腔体的密封性，有利于避免环境中杂质对电子发射的干扰。
基于上述实施例一提供的一种片上微型X射线源的实现方式，相应的，本申请还提供了该片上微型X射线源制造方法的具体实现方式。
参见图5，实施例一提供的片上微型X射线源的制造方法，包括：
S51：制备片上微型电子源10。
作为示例，以表面遂穿电子源作为片上微型电子源10的示例描述S51的具体实现方式。具体参见图6，制备该片上微型电子源10的步骤可以具体为：
S511：提供衬底101。
执行完该步骤对应的剖面结构示意图如图7(1)所示。
S512：形成覆盖衬底101一表面的阻变材料薄膜层102。
该步骤可以具体为：利用本领域惯用的薄膜沉积工艺或者热氧化的工艺，在衬底101的一表面上形成一层阻变材料薄膜层102。
执行完该步骤对应的剖面结构示意图如图7(2)所示。
S513：在阻变材料薄膜层102上形成多个电极对，其中，每个电极对包括第一电极1031和第二电极1032，每个第一电极1031和每个第二电极1032之间均存在间隙104。
作为一示例，该步骤可以具体为：利用本领域惯用的电极沉积工艺在阻变材料薄膜层102上沉积一层电极材料层，其具体包括旋涂电子束光刻胶、电子束曝光、显影定影、金属薄膜沉积、溶脱剥离等工艺步骤，形成覆盖部分阻变材料薄膜层102表面的第一电极1031和第二电极1032以及第一电极1031和第二电极1032之间的间隙104。
执行完该步骤对应的剖面结构示意图如图7(3)所示。
S514：控制间隙104下面的阻变材料薄膜层102被软击穿并呈现阻变特性，以在间隙104下面的阻变材料薄膜层102区域内形成遂穿结105。
本步骤可以具体为：在第一电极1031和第二电极1032上施加电压，并逐渐增大电压值，同时监测电流大小，并设置限制电流在某一电流值，例如100μA，当电流突然陡峭增加时停止电压增加，此时间隙104下面的阻变材料薄膜层102被软击穿并呈现阻变特性。如此，在该阻变材料薄膜层102区域内形成有横穿整个间隙104下面的阻变材料薄膜层102的导电细丝，使得该阻变材料薄膜层102区域由绝缘态转变到导电态，然后又经历低阻态到高阻态的转变后，导电细丝断裂，在间隙104下面的阻变材料薄膜层102区域内形成如图2(1)所示的遂穿结105，该遂穿结105自第一电极1031到第二电极1032，依次包括连接的第一导电区域1051、绝缘区域1052和第二导电区域1053。
执行完该步骤对应的剖面意图如图7(4)所示。
至此，形成了图1(1)至图1(3)中的表面隧穿电子源。该表面隧穿电子源在工作时，电子在发射时无需穿过多层材料，因此可以具有更高的发射效率，此外，该表面隧穿电子源可以通过微加工工艺技术得到，因此可以具有较小的尺寸，并且能够降低制造成本。
S52：制备阳极12，该阳极12的一表面上设置有第一绝缘间隔体11，其中，第一绝缘间隔体11为腔体结构。
该步骤可以具体为：选择厚度在0.1-20毫米之间的一绝缘层，利用本领域惯用的物理气相沉积、化学气相沉积方法或者旋涂的方法，先在绝缘层的一个表面上覆盖一层金属材料，并将该金属材料层的厚度控制在0.1-1000毫米之间。以该金属材料层作为阳极12。接着，采用干法刻蚀或湿法刻蚀的工艺，从未设置阳极12的一个表面上刻蚀绝缘层，直至露出阳极12。将绝缘层刻蚀 成中空腔体结构的第一绝缘间隔体11。
执行完该步骤对应的剖面结构示意图如图8所示。
S53：将第一绝缘间隔体11连接在片上微型电子源10发射电子一侧，从而使得片上微型电子源10和阳极12之间形成封闭真空腔体。
该步骤可以具体为：在真空中，通过胶粘合或键合的方式，将第一绝缘间隔体11连接在片上微型电子源10发射电子一侧，使得片上微型电子源10和阳极12之间紧密连接，形成一个封闭的真空腔体。
执行完该步骤对应的结构示意图如图1(1)所示。
需要说明的是，本申请对S51和S52的顺序并不做限定，此外，本申请中，S514可以在S53之前或之后执行。
以上为实施例一提供的片上微型X射线源的制造方法的一种具体实现方式，通过该方式制成的片上微型X射线源具有图1提供的片上微型X射线源相同的优点，为简要起见，在此不再赘述。
以上为本申请实施例一提供的片上微型X射线源及其制造方法对应的具体实现方式。为了提高片上微型X射线源中片上微型电子源的散热能力，本申请还提供了另一种片上微型X射线源的实现方式，请参见实施例二。
实施例二
参见图9(1)至图9(2)，图9(1)是本申请实施例二提供的一种片上微型X射线源的剖面结构示意图；图9(2)是本申请实施例二提供的一种片上微型X射线源的立体结构示意图。需要说明，图9(2)实际上不是完整结构示意图，为了看见内部结构，阳极只画出部分。
本申请实施例二提供的一种片上微型X射线源，包括：
片上微型电子源90；
位于片上微型电子源90发射电子一侧的第一绝缘间隔体91，该第一绝缘间隔体91为腔体结构；
位于第一绝缘间隔体91上的阳极92；
其中，片上微型电子源90和阳极92之间形成封闭真空腔体。
需要说明，在实施例二与实施例一的结构基本相同，其不同之处仅在于片上微型电子源90的结构不同。因此，为了简要起见，本申请实施例将不再详细 描述第一绝缘间隔体91和阳极92的具体结构，而仅对片上微型电子源90进行详细描述。
作为一示例，请参见图9(1)至图9(3)，片上微型电子源90，包括：
衬底901；
覆盖衬底901一表面的阻变材料薄膜层902，其中，阻变材料薄膜层902上设置有与衬底901连通的多个通孔9021；
位于阻变材料薄膜层902上面的多个电极对，每个电极对包括第一电极9031以及多个第二电极9032，其中，每个第二电极9032对应一个通孔9021，每个第二电极9032通过一个通孔9021与衬底901接触连接；不同第二电极9032之间相互隔离；
其中，第一电极9031和每个第二电极9032之间均存在间隙904；
每个间隙904下面的阻变材料薄膜层902区域内均形成有隧穿结905。
需要说明的是，衬底901、阻变材料薄膜层902、第一电极9031和第二电极9032的材料和实施一中提供的衬底101、阻变材料薄膜层102、第一电极1031和第二电极1032的材料相同，为简要起见，在此不再赘述。
另外，在本申请实施例中，形成于每个间隙904下面的阻变材料薄膜层902区域的隧穿结905与上述实施例一中的隧穿结105结构相同，为了简要起见，在此不再赘述。
需要说明，通孔9021可以设置为不同的形状，作为示例，阻变材料薄膜层902上设置有多个相互隔离的圆形通孔9021。
另外，为了方便制作，在本申请实施例中，第一电极9031可以为覆盖在阻变材料薄膜层902上的连续电极层，每个第二电极9032可以为覆盖圆形通孔9021内壁的电极岛，且该电极岛与第一电极9031之间存在电隔离。
因通孔9021的形状为圆形，所以，相应地，第一电极9031和每个第二电极9032之间的间隙904可以为圆形间隙904。因第二电极9032为多个，所以，第一电极9031与第二电极9032之间可以形成包括多个电极对的电极对阵列，相应地，多个间隙904形成间隙阵列。
需要说明，在本申请实施例中，每个间隙904的宽度可以小于或者等于10μm。
另外，在该多个第二电极9032中，每个电极通过圆形通孔9021和衬底901连接，如此，片上微型电子源工作时产生的热量可以通过第二电极9032和衬底901散发出去，从而极大的提高了片上微型电子源90的散热能力，有利于在同一衬底901上多个片上微型电子源的集成。
需要说明，本申请实施例提供的片上微型电子源90工作时，可以在第一电极9031与每个第二电极9032之间施加电压，从而使得电子能够从每个遂穿结905内发射出去，从而形成较大的发射电流。
另外，当衬底901为同时具有导热性能和导电性能的材料层时，因每个第二电极9032均与衬底901接触连接，所以，作为本申请的另一示例，为了简化施加电压的过程，可以在第一电极9031和衬底901上施加电压V1。因每个第二电极9032均与衬底901接触连接，所以，施加在衬底901上的电信号会传输到每个第二电极9032上，如此免去了需要在每个第二电极9032上均施加电压的过程。
以上为本申请实施例二提供的片上微型X射线源中的片上微型电子源90的结构。基于该片上微型电子源90的片上微型X射线源和实施例一中图1(1)和1(2)提供的片上微型X射线源工作原理相同，为简要起见，在此不再赘述。
上述为本申请实施例二提供的片上微型X射线源的另一种实现方式，在该实现方式中，片上微型电子源90选择同时具有导热性能和导电性能的材料作为衬底901，每个第二电极9032通过阻变材料薄膜层902中多个通孔9021与衬底901连接，如此，该片上微型电子源90产生的热量可以通过第二电极9032和衬底901散发出去，从而显著提高片上电子源90的散热能力，有利于在同一衬底901上多个片上微型电子源的集成。基于该片上微型电子源90的片上微型X射线源，也可以相应的获得更多的发射电子，用于轰击阳极92，从而提高X射线源的发射剂量。
需要说明，在上述实施例中，是以所有电极对中的第一电极9031为共用电极，换句话说，该第一电极9031可以作为所有电极对的第一电极。实际上，作为本申请的另一实施例，每个电极对的第一电极可以相互独立。
此外，在上述实施例二中，是以每个电极对的第二电极9032通过通孔9021与衬底901连接实现加速片上微型电子源的散热，实际上，当衬底901为由绝缘 性能的材料制成时，第一电极9031和第二电极9032可以分别通过不同的通孔9021与衬底901接触连接，从而达到进一步提高片上微型电子源的散热能力的效果。
基于上述实施例二提供的一种片上微型X射线源的实现方式，相应的，本申请还提供了该片上微型X射线源制造方法的具体实现方法。
参见图10，实施例二提供的片上微型X射线源的制造方法，包括：
S101：制备片上微型电子源90。
片上微型电子源90可以选择和上述图9(3)提供的片上微型电子源90相同的表面隧穿电子源。
参见图11，制备该片上微型电子源90的步骤可以具体为：
S1011：提供衬底901。
衬底901材料可以选择和上述图9(3)提供的片上微型电子源相同的衬底901材料，为了简要起见，在此不再赘述。
执行完该步骤对应的剖面结构示意图如图12(1)所示。
S1012：形成覆盖衬底901一表面的阻变材料薄膜层902。
该步骤的具体实现方式与上述实施例一中S512的具体实现方式可以相同，为了简要起见，在此不再详细描述。
执行完该步骤对应的剖面结构示意图如图12(2)所示。
S1013：在阻变材料薄膜层902上形成多个通孔9021。
通孔9021可以利用干法刻蚀或湿法刻蚀的工艺形成。作为示例，干法刻蚀可以为反应气体刻蚀或等离子体刻蚀等。
当采用湿法刻蚀在阻变材料薄膜层902形成通孔9021时，该步骤可以具体为：在阻变材料薄膜层902上旋涂电子束光刻胶，通过电子束曝光、显影定影、湿法刻蚀、去胶等工艺步骤，在阻变材料薄膜层902上形成多个圆形的通孔9021。
执行完该步骤对应的剖面结构示意图如图12(3)所示。
S1014：在阻变材料薄膜层902上面形成第一电极9031和多个第二电极9032，其中，第一电极9031和每个第二电极9032之间均存在间隙904，且每个第二电极9032通过通孔9021与衬底901连接。
该步骤可以具体为，利用惯用的电极沉积工艺在阻变材料薄膜层902以及通孔9021内壁上沉积一层电极材料层，其具体包括旋涂电子束光刻胶、电子束曝光、显影定影、金属薄膜沉积、溶脱剥离等工艺步骤，形成第一电极9031和第二电极9032。其中，第一电极9031可以为覆盖在阻变材料薄膜层902上面的电极层，每个第二电极9032可以为覆盖一个通孔9021以及其周围阻变材料薄膜层902的电极层。
另外，在阻变材料薄膜层902上形成的多个第二电极9032中，每个第二电极通过圆形通孔9021和衬底901连接，从而极大的提高了片上微型电子源的散热能力，有利于在同一衬底901上多个片上微型电子源的集成。
执行完该步骤对应的剖面结构示意图如图12(4)所示。
S1015：控制间隙904下面的阻变材料薄膜层902被软击穿并呈现阻变特性，以在所述间隙904下面的阻变材料薄膜层902区域内形成遂穿结905。
该步骤的具体实现方式与上述实施例一中S514的具体实现方式可以相同，为了简要起见，在此不再详细描述。
执行完该步骤对应的剖面结构示意图如图12(5)所示。
至此，形成了表面隧穿电子源，该表面隧穿电子源具有和图9(3)中提供的表面隧穿电子源相同的有益效果，为了简要起见，在此不再赘述。
S102～S103与S52～S53相同，为了简要起见，在此不再详细描述。S102执行完对应的剖面结构示意图如图8所示，S103执行完对应的结构示意图如图9所示。
需要说明的是，本申请对S101和S102的顺序并不做限定，此外，本申请中，S1015可以在S103之前或之后执行，本申请实施例不做限定。
以上为实施例二提供的片上微型X射线源的制造方法的另一种具体实现方式，通过该方式制成的片上微型X射线源具有图9(1)和图9(2)提供的片上微型X射线源相同的优点，为简要起见，在此不再赘述。
以上为本申请实施例二提供的一种片上微型X射线源及其制造方法的实现方式。为了进一步提高片上微型X射线源整个器件的散热能力，还可以在阳极92和衬底901上形成散热部件，基于此，本申请提供了片上微型X射线源的另一种实现方式，请参见实施例三。
实施例三
需要说明，本申请实施例三提供的片上微型X射线源可以在上述实施例一或实施例二的基础上进行改进得到，作为示例，本申请实施例三是在实施例二的基础上进行改进得到。
参见图13，一种片上微型X射线源，需要说明的是，该片上微型X射线源除了包括实施二中的所有部件外，还可以包括：
位于阳极92上的第一散热部件130；
位于衬底901下面的第二散热部件131。
需要说明的是，第一散热部件130或第二散热部件131可以为具有良好散热能力的热沉或散热片。
另外，第一散热部件130和阳极92、第二散热部件131和衬底901，均紧密贴合在一起并形成良好的热接触。如此，片上微型X射线源在工作时，阳极92上产生的热量可以通过第一散热部件130很快地散去，片上微型电子源90上产生的热量可以依次通过第二电极9032、阻变材料薄膜层902和第二散热部件131高效率地散去。
以上为本申请实施例三提供的一种片上微型X射线源的实现方式，在该实现方式中，片上微型X射线源在实施例二提供的片上微型X射线源的基础上还在阳极92上和衬底901下面分别设置了散热部件，使该片上微型X射线源具有和实施例二提供的片上微型X射线源相同的有益效果之外，极大的提高了片上微型X射线源整个器件的散热能力。
基于实施例三提供的片上微型X射线源的另一种实现方式，相应的，本申请还提供了该片上微型X射线源制造方法的具体实现方式。
参见图14，实施例三提供的片上微型X射线源的制造方法，包括：
S141～S143与S101～S103相同，为了简要起见，在此不再详细描述。S143执行完对应的剖面结构示意图如图9(1)所示。
S144：在阳极92上形成第一散热部件130。
第一散热部件130和阳极92可以通过粘合或键合的方式，紧密贴合在一起并形成良好的热接触。
为了使第一散热部件130和阳极92之间可以更好的形成热接触，作为一示 例，该步骤可以具体为：通过导热胶粘层连接第一散热部件130和阳极92，使第一散热部件130和阳极92紧密贴合并形成良好的热接触。
执行完该步骤对应的剖面结构示意图如图15所示。
S145：在衬底901下面形成第二散热部件131。
第二散热部件131和衬底901可以采用和S144中相同的连接方式，为了简要起见，在此不再赘述。
执行完该步骤对应的剖面结构示意图如图13所示。
需要说明的是，本申请对S141和S142的顺序并不做限定，对S144和S145的顺序也并不做限定。
以上为实施例三提供的片上微型X射线源的制造方法的另一种具体实现方式，通过该方式制成的片上微型X射线源具有图13提供的片上微型X射线源相同的优点，为简要起见，在此不再赘述。
以上为本申请实施例三提供的又一种片上微型X射线源及其制造方法的实现方式。为了提高片上微型X射线源的检验质量，还可以在第一绝缘间隔体91和片上微型电子源90之间形成中空聚焦电极和第二绝缘间隔体，基于此，本申请提供了片上微型X射线源的另一种实现方式，请参见实施例四。
实施例四
需要说明，本申请实施例四提供的片上微型X射线源可以在上述实施例一至实施例三中任一实施例提供的片上微型X射线源的基础上进行改进得到，作为示例，本申请实施例四是在实施例二的基础上进行改进得到。
参见图16，一种片上微型X射线源，需要说明的是，该片上微型X射线源除了包括实施二中的所有部件外，还可以包括：
中空聚焦电极160，该中空聚焦电极160位于第一绝缘间隔体91和片上微型电子源90之间；
中空聚焦电极160靠近片上微型电子源90的一侧表面上设置的第二绝缘间隔体161，其中，第二绝缘间隔体161为中空腔体结构。
需要说明的是，中空聚焦电极160可以选择具有良好导电性的材料制成，例如，可以选择金属材料制成。
另外，为了增强对发射电子的聚焦能力，第一绝缘间隔体91和片上微型 电子源90之间的中空聚焦电极160可以为单层或者多层。
另外，第二绝缘间隔体161的材料可以和第一绝缘间隔体91的材料相同，第二绝缘间隔体161的厚度也可以和第一绝缘间隔体91的厚度相同，为了简要起见，在此不再赘述。
以上为本申请实施例提供的片上微型X射线源的结构，该片上微型X射线源的工作原理如下：
在第一电极9031和衬底901上施加电压V1，使片上微型电子源90发射电子；同时在第一电极9031和阳极92上施加电压V2，使表面隧穿电子源发射出的电子被加速，并以高速轰击到阳极92，在阳极92内部由于韧致辐射和原子内层能级跃迁产生X射线，X射线穿透阳极92辐射到外部空间；在第一电极9031和中空聚焦电极160之间施加电压V3，可以对片上电子源90发射的电子进行聚焦，从而减小电子束轰击到阳极92的面积和X射线的焦点尺寸，进而有利于提高片上X射线源的检验质量。
基于上述实施例四提供的一种片上微型X射线源的实现方式，相应的，本申请还提供了该片上微型X射线源制造方法的具体实现方式。
参见图17，实施例四提供的片上微型X射线源的制造方法，还可以包括：
S171～S172与S101～S102相同，为了简要起见，在此不再详细描述。
S171执行完对应的剖面结构示意图如图9(3)所示，S172执行完对应的剖面结构示意图如图8所示。
S173：制备中空聚焦电极160，该中空聚焦电极160的一表面上设置有第二绝缘间隔体161，其中，第二绝缘间隔体为中空腔体结构。
该步骤可以具体为：选择厚底在0.1-20毫米之间的一绝缘层，利用本领域惯用物理气相沉积、化学气相沉积方法或者旋涂的方法，先在绝缘层的一个表面上形成一层聚焦电极层。接着，采用干法刻蚀或湿法刻蚀的工艺，从未设置聚集电极层的一个表面上刻蚀绝缘层直至露出聚焦电极层，从而形成中空聚焦电极160和中空结构的绝缘间隔体161。
执行完该步骤对应的剖面结构示意图如图18(1)所示。
S174：将第二绝缘间隔体161连接在片上微型电子源90发射电子的一侧。
该步骤的具体实现方式可以和实施例一中S53的具体实现方式相同，为了 简要起见，在此不再赘述。
执行完该步骤对应的剖面结构示意图如图18(2)所示。
S175：将第一绝缘间隔体91连接在片上微型电子源90发射电子一侧，从而使得片上微型电子源90和阳极92之间形成封闭真空腔体。
该步骤可以具体为：通过胶粘合或键合的方式，将第一绝缘间隔体91连接在中空聚焦电极160背离第二绝缘间隔体161的一侧，使得第一绝缘间隔体91和中空聚焦电极160之间紧密连接，形成一个封闭的真空腔体。
执行完该步骤对应的结构示意图如图16所示。
需要说明的是，本申请对S171、S172和S173的顺序并不做限定。
以上为实施例四提供的片上微型X射线源的制造方法的一种具体实现方式，通过该方式制成的片上微型X射线源具有图16提供的片上微型X射线源相同的优点，为简要起见，在此不再赘述。
上述实施例四示出了一种片上微型X射线源的实现方式，为了提高片上微型X射线源性能，还可以对阳极进行改进并在真空腔体内放置吸气部件，基于此，本申请提供了另一种片上微型X射线源制造方法的实现方式，请参见实施例五。
实施例五
需要说明，本申请实施例五提供的片上微型X射线源可以在上述实施例一至实施例四中任一实施例提供的片上微型X射线源的基础上进行改进得到，作为示例，本申请实施例五是在实施例四的基础上进行改进得到。
另外，该片上微型X射线源和实施四中提供的片上微型X射线源具有相同的部件，为了简要起见，将只对改进的部件进行说明。
参见图19，一种片上微型X射线源，还可以包括：
位于片上微型电子源90发射电子一侧的第一绝缘间隔体190，该第一绝缘间隔体190为腔体结构；
位于第一绝缘间隔体190上的阳极191，其中，阳极191包括靶层1911和用于支撑靶层1911的支撑层1912，靶层1911位于靠近电子轰击一侧，支撑层1912位于远离电子轰击一侧；
位于封闭真空腔体内的吸气部件192。
需要说明的是，第一绝缘间隔体190的材料和厚度可以和实施例四中图16示出的第一绝缘间隔体91的材料和厚度相同，为了简要起见，在此不再赘述。
另外，靶层1911可以为重金属材料制成，作为示例，所述重金属材料可以选自钨、钼、金、银、铜、铬、铑、铝、铌、钽和铼中的至少一种。支撑层1912可以为导热性较好的材料制成，作为示例，支撑层1912材料可以为：铝或铜。由该靶层1911和支撑层1912制成的阳极191，可以有效提高阳极191的机械强度和导热性。
另外，该实施例提供的片上微型X射线源设置有中空聚焦电极160，可以减小电子轰击到阳极191的面积，因此，可以相应的减小阳极191中靶层1911的面积。
另外，为了吸收封闭真空腔体内的气体，以调节或维持封闭真空腔体内的真空，可以选择可靠性较好的吸气剂作为吸气部件192，作为示例，吸气部件192可以选自下列吸气剂中的一种或多种：锆-石墨吸气剂、锆-锆钒铁吸气剂、钼-钛吸气剂。
需要说明的是，为了在封闭真空腔体中放置吸气部件192，第二绝缘间隔体161上还可以设置有放置吸气部件192的凹槽。
另外，为了提高片上微型X射线源整个器件的散热能力，作为另一示例，还可以在本申请实施例图19提供的片上微型X射线源上进行改进。可以在阳极191上形成第一散热部件200，在衬底901下面形成第二散热部件201，参见图20。
需要说明的是，第一散热部件200和第二散热部件201可以为具有良好散热能力的热沉或散热片。
以上为本申请实施例五提供的一种片上微型X射线源的实现方式，在该实现方式中，片上微型X射线源中的阳极191由靶层1911和支撑层1912组成，封闭真空腔体内还设置有吸气部件192，如此，有效的提高了阳极191的机械强度和导热性并可以调节或维持封闭真空腔体内的真空，从而极大的提高了片上微型X射线源的性能。
基于实施例五提供的片上微型X射线源的另一种实现方式，相应的，本申请还提供了该片上微型X射线源制造方法的具体实现方式。
参见图21，实施例五提供的片上微型X射线源的制造方法，包括：
S211与S171相同，为了简要起见，在此不再详细描述。S211执行完对应的剖面结构示意图如图12(5)所示。
S212：制备阳极191，该阳极191的一表面上设置有第一绝缘间隔体190，其中，第一绝缘间隔体190为腔体结构。
需要说明的是，阳极191包括靶层1911和用于支撑靶层1911的支撑层1912。
该步骤可以具体为：选择厚度在0.1-20毫米之间的一绝缘间隔体，利用本领域惯用物理气相沉积、化学气相沉积方法或者旋涂的方法，先在绝缘间隔体一个表面的中间区域覆盖一层重金属材料，以该重金属材料层作为靶层1911。接着，再利用物理气相沉积、化学气相沉积方法或者旋涂的方法，在靶层1911上沉积一层覆盖靶层1911和绝缘间隔体的导热性材料，以该导热性材料层作为支撑层1912。最后，采用干法刻蚀或湿法刻蚀的工艺，从绝缘间隔体上，和覆盖阳极191的表面相对的一表面上开始刻蚀，到靶层1911刻蚀停止。将绝缘间隔体刻蚀成从上往下逐渐缩进的中空结构腔体，使和绝缘间隔体相对的靶层1911表面能够完全暴露出来，从而形成第一绝缘间隔体190。
执行完该步骤对应的剖面结构示意图如图22(1)所示。
S213～S214与S173～S174相同，为了简要起见，在此不再详细描述。S213执行完对应的剖面结构示意图如图18(1)所示，S214执行完对应的剖面结构示意图如图18(2)所示。
S215：在即将形成的封闭真空腔体中置入吸气部件192，该吸气部件192用于吸收封闭真空腔体内的气体，以调节或维持封闭真空腔体内的真空。
该步骤可以具体为：利用干法刻蚀工艺，在第二绝缘间隔体161的侧壁上刻蚀出至少一个凹槽，将吸气部件192放置到凹槽内。
执行完该步骤对应的剖面结构示意图如图22(2)所示。
S216与S175相同，为了简要起见，在此不再详细描述。执行完该步骤对应的剖面结构示意图如图19所示。
以上为实施例五提供的片上微型X射线源的制造方法的一种具体实现方式，通过该方式制成的片上微型X射线源具有图19提供的片上微型X射线源相同的优点，为简要起见，在此不再赘述。
需要说明的是，本申请对S211、S212和S213的顺序并不做限定。
以上所述仅是本申请的优选实施方式，虽然本申请已以较佳实施例披露如上，然而并非用以限定本申请。任何熟悉本领域的技术人员，在不脱离本申请技术方案范围情况下，都可利用上述揭示的方法和技术内容对本申请技术方案做出许多可能的变动和修饰，或修改为等同变化的等效实施例。因此，凡是未脱离本申请技术方案的内容，依据本申请的技术实质对以上实施例所做的任何的简单修改、等同变化及修饰，均仍属于本申请技术方案保护的范围内。

Claims (19)

  1. 一种片上微型X射线源，其特征在于，包括：
    片上微型电子源；
    位于所述片上微型电子源发射电子一侧的第一绝缘间隔体，所述第一绝缘间隔体为腔体结构；
    位于所述第一绝缘间隔体上的阳极；
    其中，所述片上微型电子源和所述阳极之间形成封闭真空腔体。
  2. 根据权利要求1所述的X射线源，其特征在于，所述片上微型电子源包括：
    衬底；
    覆盖所述衬底一表面的阻变材料薄膜层；
    位于所述阻变材料薄膜层上的至少一个电极对；所述电极对包括第一电极和第二电极，所述第一电极和所述第二电极之间存在间隙；
    其中，所述间隙下面的阻变材料薄膜层区域内形成有遂穿结。
  3. 根据权利要求2所述的X射线源，其特征在于，所述电极对为多个，多个所述电极对为指型交叉电极对。
  4. 根据权利要求2所述的X射线源，其特征在于，所述衬底由具有导热性能的材料制成，所述阻变材料薄膜层上设置有至少一个与所述衬底连通的通孔；
    所述电极对中的至少一个电极通过所述通孔与所述衬底接触连接。
  5. 根据权利要求1-4任一项所述的X射线源，其特征在于，所述X射线源还包括位于所述阳极上的第一散热部件。
  6. 根据权利要求4或5所述的X射线源，其特征在于，所述X射线源还包括位于所述衬底下面的第二散热部件。
  7. 根据权利要求1-6任一项所述的X射线源，其特征在于，所述第一绝缘间隔体为中空腔体结构。
  8. 根据权利要求1-6任一项所述的X射线源，其特征在于，所述第一绝缘间隔体为设置有顶盖的腔体结构，所述顶盖上设置有导电插塞；
    所述阳极位于所述顶盖的下面，且通过所述导电插塞与位于所述第一绝缘 间隔体上面的电极之间形成电连接。
  9. 根据权利要求1-8任一项所述的X射线源，其特征在于，所述X射线源还包括：
    位于所述第一绝缘间隔体和所述片上微型电子源之间的中空聚焦电极，所述中空聚焦电极靠近所述片上微型电子源的一侧表面上设置有第二绝缘间隔体；所述第二绝缘间隔体为中空腔体结构；
    其中，所述第二绝缘间隔体与所述片上微型电子源连接在一起。
  10. 根据权利要求1-9任一项所述的X射线源，其特征在于，所述封闭真空腔体内设置有吸气部件，所述吸气部件用于吸收所述封闭真空腔体内的气体，以调节或维持所述封闭真空腔体内的真空。
  11. 根据权利要求1-10任一项所述的X射线源，其特征在于，所述阳极包括靶层和用于支撑所述靶层的支撑层；
    所述靶层位于靠近电子轰击一侧，所述支撑层位于远离电子轰击一侧。
  12. 根据权利要求11所述的X射线源，其特征在于，所述靶层由重金属材料制成，所述支撑层由铜或铝制成。
  13. 根据权利要求1-12任一项所述的X射线源，其特征在于，所述阳极的厚度在0.1-1000微米。
  14. 一种片上微型X射线源的制造方法，其特征在于，包括：
    制备片上微型电子源；
    制备阳极，所述阳极的一表面上设置有第一绝缘间隔体，所述第一绝缘间隔体为腔体结构；
    将所述第一绝缘间隔体连接在所述片上微型电子源发射电子一侧，从而使得所述片上微型电子源和所述阳极之间形成封闭真空腔体。
  15. 根据权利要求14所述的方法，其特征在于，所述将所述片上微型电子源和所述第一绝缘间隔体连接在一起之前，还包括：
    制备中空聚焦电极，所述中空聚焦电极的一表面上设置有第二绝缘间隔体；所述第二绝缘间隔体为中空腔体结构；
    所述将所述片上微型电子源和所述第一绝缘间隔体连接在一起之前，还包括：
    将所述第二绝缘间隔体连接在所述片上微型电子源发射电子一侧；
    所述将所述片上微型电子源和所述第一绝缘间隔体连接在一起，具体包括：
    将所述第一绝缘间隔体连接在所述中空聚焦电极背离所述第二绝缘间隔体的一侧。
  16. 根据权利要求14所述的方法，其特征在于，所述将所述第一绝缘间隔体连接在所述片上微型电子源发射电子一侧，从而使得所述片上微型电子源和所述阳极之间形成封闭真空腔体之前，还包括：
    在即将形成的封闭真空腔体中置入吸气部件，所述吸气部件用于吸收所述封闭真空腔体内的气体，以调节或维持所述封闭真空腔体内的真空。
  17. 根据权利要求14-16任一项所述的方法，其特征在于，所述方法还包括：
    在所述阳极上面形成第一散热部件。
  18. 根据权利要求14-17任一项所述的方法，其特征在于，所述制备片上微型电子源，具体包括：
    提供衬底；
    形成覆盖所述衬底一表面的阻变材料薄膜层；
    在所述阻变材料薄膜层上形成至少一个电极对；所述电极对包括第一电极和第二电极，所述第一电极和所述第二电极之间存在间隙；
    所述将所述第一绝缘间隔体连接在所述片上微型电子源发射电子一侧，从而使得所述片上微型电子源和所述阳极之间形成封闭真空腔体之前或之后，所述制备片上微型电子源，还包括：
    控制所述间隙下面的阻变材料薄膜层被软击穿并呈现阻变特性，以在所述间隙下面的阻变材料薄膜层区域内形成遂穿结。
  19. 根据权利要求18所述的方法，其特征在于，所述衬底为具有导热性能的衬底，形成阻变材料薄膜层之后，形成至少一个电极对之前，还包括：
    在所述阻变材料薄膜层上形成至少一个与所述衬底连通的通孔；
    其中，所述电极对中的至少一个电极通过所述通孔与所述衬底接触连接。
PCT/CN2019/116139 2018-11-12 2019-11-07 一种片上微型x射线源及其制造方法 WO2020098556A1 (zh)

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