WO2020077818A1 - 一种薄膜晶体管阵列基板及液晶显示器 - Google Patents

一种薄膜晶体管阵列基板及液晶显示器 Download PDF

Info

Publication number
WO2020077818A1
WO2020077818A1 PCT/CN2018/122649 CN2018122649W WO2020077818A1 WO 2020077818 A1 WO2020077818 A1 WO 2020077818A1 CN 2018122649 W CN2018122649 W CN 2018122649W WO 2020077818 A1 WO2020077818 A1 WO 2020077818A1
Authority
WO
WIPO (PCT)
Prior art keywords
split
film transistor
thin film
transistor array
array substrate
Prior art date
Application number
PCT/CN2018/122649
Other languages
English (en)
French (fr)
Inventor
郝思坤
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Publication of WO2020077818A1 publication Critical patent/WO2020077818A1/zh

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement

Definitions

  • the present invention relates to the field of display technology, in particular to a thin film transistor array substrate and a liquid crystal display.
  • liquid crystal displays usually consist of a thin film transistor array substrate, a color filter substrate, and a liquid crystal layer between the thin film transistor array substrate and the color filter substrate.
  • VA mode thin film transistor displays are used for large-size panels such as LCD TVs due to their high opening, high resolution, and wide viewing angle.
  • the pixel electrode (ITO) on the thin film transistor array substrate is designed in a fishbone shape, and is divided into multiple areas to improve viewing angle characteristics.
  • the pixel electrode on the color filter substrate side has no shape.
  • a thin film transistor array substrate wherein the thin film transistor array substrate includes:
  • a pixel electrode provided on the substrate includes a first split and a plurality of second splits connected to the first split, the second splits are arranged at a predetermined interval;
  • first split body and the second split body are both provided with a hollow structure; the second split bodies are evenly distributed in an array.
  • the hollow structure includes a plurality of holes, and the cross-sectional shape of the holes is circular, oval or polygonal.
  • the holes are distributed in an array.
  • the second split body is inclined and the edge line of the second split body forms an angle with the edge line of the first split body.
  • the included angle when the included angle is an acute angle, the included angle is less than or equal to 45 degrees; when the included angle is an obtuse angle, the included angle is greater than or equal to 135 degrees.
  • the first split body includes a first electrode branch and a second electrode branch arranged crosswise, the second split body located on one side of the first electrode branch and the other side located on the other side of the first electrode branch
  • the second splits are distributed symmetrically about the first electrode branch.
  • the second split body located on one side of the second electrode branch and the second split body located on the other side of the second electrode branch are symmetrically distributed with respect to the second electrode branch.
  • a thin film transistor array substrate including:
  • a pixel electrode provided on the substrate includes a first split and a plurality of second splits connected to the first split, the second splits are arranged at a predetermined interval;
  • the second split body is provided with a hollow structure.
  • the first divided body is also provided with a hollow structure.
  • the hollow structure includes a plurality of holes, and the cross-sectional shape of the holes is circular, oval or polygonal.
  • the holes are distributed in an array.
  • the second splits are evenly distributed in an array.
  • the second split body is inclined and the edge line of the second split body forms an angle with the edge line of the first split body.
  • the included angle when the included angle is an acute angle, the included angle is less than or equal to 45 degrees; when the included angle is an obtuse angle, the included angle is greater than or equal to 135 degrees.
  • the first split body includes a first electrode branch and a second electrode branch arranged crosswise, the second split body located on one side of the first electrode branch and the other side located on the other side of the first electrode branch
  • the second splits are distributed symmetrically about the first electrode branch.
  • the second split body located on one side of the second electrode branch and the second split body located on the other side of the second electrode branch are symmetrically distributed with respect to the second electrode branch.
  • the invention also provides a liquid crystal display, including a color film substrate and the above-mentioned thin film transistor array substrate, and a liquid crystal layer is provided between the color film substrate and the thin film transistor array substrate.
  • the intensity of light passing through the reticle during the exposure process can be increased, thereby increasing the photosensitive intensity of the photoresist, making the line width and spacing of the pixel electrode thinner, and reducing the exposure time And exposure intensity to improve production efficiency.
  • the reduction of the line width and line spacing of the pixel electrode can increase the liquid crystal efficiency of the liquid crystal display, and the improvement of the liquid crystal efficiency can increase the transmittance of the liquid crystal display, thereby improving the display quality.
  • FIG. 1 is a schematic structural diagram of a thin film transistor array substrate in a specific embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a first split body and a second split body in a specific embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a liquid crystal display in a specific embodiment of the present invention.
  • the present invention is directed to the existing thin film transistor array substrate. As the line width and line spacing of the pixel electrodes become smaller, the exposure intensity required during the manufacturing process is getting larger and larger, and the exposure time is getting longer, resulting in a technology that reduces production efficiency. Problems, the present invention can solve the above problems.
  • a thin film transistor array substrate as shown in FIGS. 1 and 2, the thin film transistor array substrate includes a substrate 10 and pixel electrodes 20 provided on the substrate 10.
  • the pixel electrode 20 includes a first divided body 21 and a plurality of second divided bodies 22 connected to the first divided body 21, and the second divided bodies 22 are arranged at a predetermined interval.
  • the second split body 22 is provided with a hollow structure.
  • the first split body 21 is also provided with a hollow structure.
  • the intensity of light passing through the reticle during the exposure process can be increased, thereby increasing the photosensitive intensity of the photoresist, making the pixel electrode 20 thinner in line width, smaller in pitch, and reducing Exposure time and exposure intensity improve production efficiency.
  • the reduced line width and line spacing of the pixel electrode 20 can increase the liquid crystal efficiency of the liquid crystal display, and the improvement of the liquid crystal efficiency can increase the transmittance of the liquid crystal display, thereby improving the display quality.
  • the hollow structure includes a plurality of holes 30, and the cross-sectional shape of the holes 30 is circular, oval or polygonal.
  • the cross-sectional shape of the hole 30 may also be other shapes, which are not enumerated here.
  • the holes 30 are distributed in an array.
  • a photomask with a prefabricated hollow structure is formed on the pixel electrode 20.
  • a hollow structure is formed on the pixel electrode 20.
  • the second split bodies 22 are evenly distributed in an array.
  • the gap between the second split bodies 22 is more uniform and uniform, thereby facilitating production and manufacturing, reducing waste rate, and improving production efficiency.
  • the second split body 22 is inclined and the edge line of the second split body 22 forms an angle with the edge line of the first split body 21.
  • the included angle is a. Specifically, when the included angle is an acute angle, a is less than or equal to 45 degrees; when the included angle is an obtuse angle, a is greater than or equal to 135 degrees.
  • the first split body 21 includes a first electrode branch 211 and a second electrode branch 212 arranged crosswise, and the second split body 22 located on the side of the first electrode branch 211 is located on the first The second split bodies 22 on the other side of the electrode branch 211 are symmetrically distributed with respect to the first electrode branch 211.
  • the second split 22 located on one side of the second electrode branch 212 and the second split 22 located on the other side of the second electrode branch 212 are symmetrically distributed with respect to the second electrode branch 212.
  • the first electrode branch 211 and the second electrode branch 212 are perpendicular to each other to form a cross-shaped first split body 21, and the first electrode branch 211 and the second electrode branch 212 are formed between The first area 41, the second area 42, the third area 43, and the fourth area 44 are all parallel to each other in the same area.
  • the second sub-body 22 located in the first region 41 and the second sub-body 22 located in the second region 42 are symmetrically distributed about the second electrode branch 212;
  • the second split 22 in the first zone 41 and the corresponding second split 22 in the third zone 43 are symmetrically distributed with respect to the first electrode branch 211;
  • the second split 22 in the third zone 43 and the fourth split The second splits 22 in the region 44 are symmetrically distributed with respect to the second electrode branch 212;
  • the second splits 22 in the fourth region 44 are in one-to-one correspondence with the second electrode 22 in the second region 42 with respect to the first electrode branch 211 ;
  • the pixel electrode 20 with a more regular and uniform pattern is convenient for mass production and manufacturing, thereby improving production efficiency.
  • the present invention also provides a liquid crystal display.
  • the liquid crystal display includes a color film substrate 50 and a thin film transistor array substrate 10.
  • the color film substrate 50 and the thin film transistor array The liquid crystal layer 60 is encapsulated between the substrates 10.
  • the thin film transistor array substrate includes a substrate 10 and a pixel electrode 20 disposed on the substrate 10; the pixel electrode 20 includes a first split 21 and a plurality of second splits connected to the first split 21 22, the second split bodies 22 are arranged at predetermined intervals.
  • the second split body 22 is provided with a hollow structure.
  • the beneficial effects of the present invention are: by adding a hollow structure on the pixel electrode 20, the intensity of light passing through the photomask during exposure can be increased, thereby increasing the photosensitive intensity of the photoresist and making the line width of the pixel electrode 20 thinner , The spacing is smaller, at the same time reduce the exposure time and exposure intensity, improve production efficiency. It has been mentioned in the background art that the reduced line width and line spacing of the pixel electrode 20 can increase the liquid crystal efficiency of the liquid crystal display, and the improvement of the liquid crystal efficiency can increase the transmittance of the liquid crystal display, thereby improving the display quality.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Liquid Crystal (AREA)
  • Geometry (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)

Abstract

本发明提供一种薄膜晶体管阵列基板，包括基板以及设置于所述基板上的像素电极；所述像素电极包括第一分体以及与第一分体连接的多个第二分体，所述第二分体按预定间隔排布；其中，所述第二分体上设置有镂空结构。

Description

一种薄膜晶体管阵列基板及液晶显示器 技术领域
本发明涉及显示技术领域，尤其涉及一种薄膜晶体管阵列基板及液晶显示器。
 背景技术
目前普遍采用的液晶显示器，通常由薄膜晶体管阵列基板、彩膜基板以及位于薄膜晶体管阵列基板和彩膜基板之间的液晶层。目前，VA模式薄膜晶体管显示器，以其高开口、高分辨率、广视角等特点为液晶电视等大尺寸面板采用。
对于VA模式显示器，传统的像素设计中，薄膜晶体管阵列基板上的像素电极（ITO）设计为鱼骨状，并分割为多个区域改善视角特性，彩膜基板侧的像素电极没有形状。使用上述设计方法的像素，随着像素电极的线宽和线距的减小，像素的液晶效率提升，液晶效率的提升可以增加液晶显示器的穿透率，提升显示品质。
但是随着像素电极的线宽及线距变小，制作过程中需要的曝光强度越来越大，曝光时间越来越长，这会降低生产效益。
 技术问题
随着像素电极的线宽及线距变小，制作过程中需要的曝光强度越来越大，曝光时间越来越长，从而导致生产效益降低。
 技术解决方案
一种薄膜晶体管阵列基板，其中，所述薄膜晶体管阵列基板包括：
基板；以及
设置于所述基板上的像素电极，所述像素电极包括第一分体以及与第一分体连接的多个第二分体，所述第二分体按预定间隔排布；
其中，所述第一分体和所述第二分体上均设置有镂空结构；所述第二分体呈阵列均匀分布。
优选的，所述镂空结构包括多个孔洞，所述孔洞的横截面形状呈圆形、椭圆形或多边形。
优选的，所述孔洞按阵列分布。
优选的，所述第二分体倾斜设置且所述第二分体的边缘线与所述第一分体的边缘线形成夹角。
优选的，所述夹角为锐角时，所述夹角小于或等于45度；所述夹角为钝角时，所述夹角大于或等于135度。
优选的，所述第一分体包括交叉设置的第一电极分支和第二电极分支，位于所述第一电极分支一侧的所述第二分体与位于所述第一电极分支另一侧的所述第二分体关于所述第一电极分支对称分布。
优选的，位于所述第二电极分支一侧的所述第二分体与位于所述第二电极分支另一侧的所述第二分体关于所述第二电极分支对称分布。
一种薄膜晶体管阵列基板，包括：
基板；以及
设置于所述基板上的像素电极，所述像素电极包括第一分体以及与第一分体连接的多个第二分体，所述第二分体按预定间隔排布；
其中，所述第二分体上设置有镂空结构。
优选的，所述第一分体上也设置有镂空结构。
优选的，所述镂空结构包括多个孔洞，所述孔洞的横截面形状呈圆形、椭圆形或多边形。
优选的，所述孔洞按阵列分布。
优选的，所述第二分体呈阵列均匀分布。
优选的，所述第二分体倾斜设置且所述第二分体的边缘线与所述第一分体的边缘线形成夹角。
优选的，所述夹角为锐角时，所述夹角小于或等于45度；所述夹角为钝角时，所述夹角大于或等于135度。
优选的，所述第一分体包括交叉设置的第一电极分支和第二电极分支，位于所述第一电极分支一侧的所述第二分体与位于所述第一电极分支另一侧的所述第二分体关于所述第一电极分支对称分布。
优选的，位于所述第二电极分支一侧的所述第二分体与位于所述第二电极分支另一侧的所述第二分体关于所述第二电极分支对称分布。
本发明还提供一种液晶显示器，包括彩膜基板以及上述的薄膜晶体管阵列基板，所述彩膜基板与所述薄膜晶体管阵列基板之间设置有液晶层。
 有益效果
通过在像素电极上增加镂空结构，可以增加曝光过程中，光线穿过光罩的强度，从而增加光阻的感光强度，使像素电极的做的线宽更细、间距更小，同时减少曝光时间和曝光强度，提高生产效益。而在背景技术中已经提及，像素电极的线宽和线距减小，可以增加液晶显示器的液晶效率，液晶效率的提升可以增加液晶显示器的穿透率，从而提升显示品质。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明具体实施方式中薄膜晶体管阵列基板的结构示意图；
图2为本发明具体实施方式中第一分体与第二分体的示意图；
图3为本发明具体实施方式中液晶显示器的结构示意图。
附图标记：
10、基板；20、像素电极；21、第一分体；211、第一电极分支；212、第二电极分支；22、第二分体；30、孔洞；41、第一区；42、第二区；43、第三区；44、第四区；50、彩膜基板；60、液晶层。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
本发明针对现有的薄膜晶体管阵列基板，随着像素电极的线宽及线距变小，制作过程中需要的曝光强度越来越大，曝光时间越来越长，从而导致生产效益降低的技术问题，本发明能解决上述问题。
一种薄膜晶体管阵列基板，如图1和图2所示，所述薄膜晶体管阵列基板包括基板10以及设置于所述基板10上的像素电极20。
其中，所述像素电极20包括第一分体21以及与第一分体21连接的多个第二分体22，所述第二分体22按预定间隔排布。
其中，所述第二分体22上设置有镂空结构。
其中，所述第一分体21上也设置有镂空结构。
通过在像素电极20上增加镂空结构，可以增加曝光过程中，光线穿过光罩的强度，从而增加光阻的感光强度，使像素电极20的做的线宽更细、间距更小，同时减少曝光时间和曝光强度，提高生产效益。而在背景技术中已经提及，像素电极20的线宽和线距减小，可以增加液晶显示器的液晶效率，液晶效率的提升可以增加液晶显示器的穿透率，从而提升显示品质。
具体的，所述镂空结构包括多个孔洞30，所述孔洞30的横截面形状呈圆形、椭圆形或多边形。
需要说明的是，在实际实施中，孔洞30的横截面形状也可为其他形状，在此不一一列举。
具体的，所述孔洞30按阵列分布。
像素电极20在制作过程需要使用曝光显影制程，通过带有预制的镂空结构的光罩，从而在像素电极20上形成镂空结构，通过阵列分布的孔洞30，可以增加曝光过程中，光线穿过光罩的强度和均匀度，从而增加光阻的感光强度，使像素电极20做的更细、间距更小且更均一。
具体的，所述第二分体22呈阵列均匀分布。
使第二分体22之间的间隙更加均匀统一，从而便于生产制造，减少废品率，提高生产效益。
具体的，所述第二分体22倾斜设置且所述第二分体22的边缘线与所述第一分体21的边缘线形成夹角。
需要说明的是，所述夹角为a，具体的，所述夹角为锐角时，a小于或等于45度；所述夹角为钝角时，a大于或等于135度。
通过将第二分体22倾斜设置，在不改变第二分体22与第一分体21的连接点的情况下，缩小相邻两个所述第二分体22之间的间距，从而增加液晶显示器的液晶效率。
具体的，所述第一分体21包括交叉设置的第一电极分支211和第二电极分支212，位于所述第一电极分支211一侧的所述第二分体22与位于所述第一电极分支211另一侧的所述第二分体22关于所述第一电极分支211对称分布。
位于所述第二电极分支212一侧的所述第二分体22与位于所述第二电极分支212另一侧的所述第二分体22关于所述第二电极分支212对称分布。
需要说明的是，如图2所示，第一电极分支211与第二电极分支212相互垂直以形成十字形的第一分体21，且第一电极分支211与第二电极分支212之间形成第一区41、第二区42、第三区43和第四区44，位于相同区域内的所有第二分体22相互平行。
需要对第二分体22的分布情况具体说明的是，位于第一区41的第二分体22与位于第二区42的第二分体22关于第二电极分支212一一对称分布；位于第一区41的第二分体22与位于第三区43的对应的第二分体22关于第一电极分支211一一对称分布；位于第三区43的第二分体22与位于第四区44的第二分体22关于第二电极分支212一一对称分布；位于第四区44的第二分体22关于第二区42的第二分体22关于第一电极分支211一一对应；从而形状均匀排布的第二分体22阵列。
图形更加规则均匀的像素电极20便于大批量生产制造，从而可以提高生产效率。
基于上述薄膜晶体管阵列基板，本发明还提供一种液晶显示器，如图3所示，所示液晶显示器包括彩膜基板50以及薄膜晶体管阵列基板10，所述彩膜基板50与所述薄膜晶体管阵列基板10之间封装有液晶层60。
其中，所述薄膜晶体管阵列基板包括基板10以及设置于所述基板10上的像素电极20；所述像素电极20包括第一分体21以及与第一分体21连接的多个第二分体22，所述第二分体22按预定间隔排布。
其中，所述第二分体22上设置有镂空结构。
本发明的有益效果为：通过在像素电极20上增加镂空结构，可以增加曝光过程中，光线穿过光罩的强度，从而增加光阻的感光强度，使像素电极20的做的线宽更细、间距更小，同时减少曝光时间和曝光强度，提高生产效益。而在背景技术中已经提及，像素电极20的线宽和线距减小，可以增加液晶显示器的液晶效率，液晶效率的提升可以增加液晶显示器的穿透率，从而提升显示品质。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (17)

  1. 一种薄膜晶体管阵列基板，其中，所述薄膜晶体管阵列基板包括：
    基板；以及
    设置于所述基板上的像素电极，所述像素电极包括第一分体以及与第一分体连接的多个第二分体，所述第二分体按预定间隔排布；
    其中，所述第一分体和所述第二分体上均设置有镂空结构；所述第二分体呈阵列均匀分布。
  2. 根据权利要求1所述的薄膜晶体管阵列基板，其中，所述镂空结构包括多个孔洞，所述孔洞的横截面形状呈圆形、椭圆形或多边形。
  3. 根据权利要求2所述的薄膜晶体管阵列基板，其中，所述孔洞按阵列分布。
  4. 根据权利要求1所述的薄膜晶体管阵列基板，其中，所述第二分体倾斜设置且所述第二分体的边缘线与所述第一分体的边缘线形成夹角。
  5. 根据权利要求4所述的薄膜晶体管阵列基板，其中，所述夹角为锐角时，所述夹角小于或等于45度；所述夹角为钝角时，所述夹角大于或等于135度。
  6. 根据权利要求1所述的薄膜晶体管阵列基板，其中，所述第一分体包括交叉设置的第一电极分支和第二电极分支，位于所述第一电极分支一侧的所述第二分体与位于所述第一电极分支另一侧的所述第二分体关于所述第一电极分支对称分布。
  7. 根据权利要求6所述的薄膜晶体管阵列基板，其中，位于所述第二电极分支一侧的所述第二分体与位于所述第二电极分支另一侧的所述第二分体关于所述第二电极分支对称分布。
  8. 一种薄膜晶体管阵列基板，其中，所述薄膜晶体管阵列基板包括：
    基板；以及
    设置于所述基板上的像素电极，所述像素电极包括第一分体以及与第一分体连接的多个第二分体，所述第二分体按预定间隔排布；
    其中，所述第二分体上设置有镂空结构。
  9. 根据权利要求8所述的薄膜晶体管阵列基板，其中，所述第一分体上也设置有镂空结构。
  10. 根据权利要求9所述的薄膜晶体管阵列基板，其中，所述镂空结构包括多个孔洞，所述孔洞的横截面形状呈圆形、椭圆形或多边形。
  11. 根据权利要求10所述的薄膜晶体管阵列基板，其中，所述孔洞按阵列分布。
  12. 根据权利要求8所述的薄膜晶体管阵列基板，其中，所述第二分体呈阵列均匀分布。
  13. 根据权利要求12所述的薄膜晶体管阵列基板，其中，所述第二分体倾斜设置且所述第二分体的边缘线与所述第一分体的边缘线形成夹角。
  14. 根据权利要求13所述的薄膜晶体管阵列基板，其中，所述夹角为锐角时，所述夹角小于或等于45度；所述夹角为钝角时，所述夹角大于或等于135度。
  15. 根据权利要求8所述的薄膜晶体管阵列基板，其中，所述第一分体包括交叉设置的第一电极分支和第二电极分支，位于所述第一电极分支一侧的所述第二分体与位于所述第一电极分支另一侧的所述第二分体关于所述第一电极分支对称分布。
  16. 根据权利要求15所述的薄膜晶体管阵列基板，其中，位于所述第二电极分支一侧的所述第二分体与位于所述第二电极分支另一侧的所述第二分体关于所述第二电极分支对称分布。
  17. 一种液晶显示器，其中，所述液晶显示器包括彩膜基板以及薄膜晶体管阵列基板，所述彩膜基板与所述薄膜晶体管阵列基板之间设置有液晶层；其中，所述薄膜晶体管阵列基板包括：
    基板；以及
    设置于所述基板上的像素电极，所述像素电极包括第一分体以及与第一分体连接的多个第二分体，所述第二分体按预定间隔排布；
    其中，所述第二分体上设置有镂空结构。
PCT/CN2018/122649 2018-10-18 2018-12-21 一种薄膜晶体管阵列基板及液晶显示器 WO2020077818A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811212975.5 2018-10-18
CN201811212975.5A CN109298570B (zh) 2018-10-18 2018-10-18 一种薄膜晶体管阵列基板及液晶显示器

Publications (1)

Publication Number Publication Date
WO2020077818A1 true WO2020077818A1 (zh) 2020-04-23

Family

ID=65157896

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/122649 WO2020077818A1 (zh) 2018-10-18 2018-12-21 一种薄膜晶体管阵列基板及液晶显示器

Country Status (2)

Country Link
CN (1) CN109298570B (zh)
WO (1) WO2020077818A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11971620B2 (en) 2021-01-13 2024-04-30 Wuhan Boe Optoelectronics Technology Co., Ltd. Display panel and electronic device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115398326A (zh) * 2021-03-25 2022-11-25 京东方科技集团股份有限公司 像素单元、阵列基板和显示面板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5946065A (en) * 1995-10-31 1999-08-31 Sharp Kabushiki Kaisha Transmission type LCD with an organic interlayer insulating film having a plurality of microscopic hollows
US20060164585A1 (en) * 2005-01-27 2006-07-27 Po-Sheng Shih Liquid crystal display panel
US8269935B2 (en) * 2008-07-08 2012-09-18 Chimei Innolux Corporation Liquid crystal display
CN104267548A (zh) * 2014-07-18 2015-01-07 友达光电股份有限公司 显示面板的像素结构
CN106773361A (zh) * 2017-03-08 2017-05-31 深圳市华星光电技术有限公司 一种液晶显示面板及液晶显示器
CN106847836A (zh) * 2017-04-10 2017-06-13 深圳市华星光电技术有限公司 Tft基板及其制作方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI560889B (en) * 2015-04-22 2016-12-01 Au Optronics Corp Pixel structure and display panel

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5946065A (en) * 1995-10-31 1999-08-31 Sharp Kabushiki Kaisha Transmission type LCD with an organic interlayer insulating film having a plurality of microscopic hollows
US20060164585A1 (en) * 2005-01-27 2006-07-27 Po-Sheng Shih Liquid crystal display panel
US8269935B2 (en) * 2008-07-08 2012-09-18 Chimei Innolux Corporation Liquid crystal display
CN104267548A (zh) * 2014-07-18 2015-01-07 友达光电股份有限公司 显示面板的像素结构
CN106773361A (zh) * 2017-03-08 2017-05-31 深圳市华星光电技术有限公司 一种液晶显示面板及液晶显示器
CN106847836A (zh) * 2017-04-10 2017-06-13 深圳市华星光电技术有限公司 Tft基板及其制作方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11971620B2 (en) 2021-01-13 2024-04-30 Wuhan Boe Optoelectronics Technology Co., Ltd. Display panel and electronic device

Also Published As

Publication number Publication date
CN109298570B (zh) 2020-06-16
CN109298570A (zh) 2019-02-01

Similar Documents

Publication Publication Date Title
WO2017008369A1 (zh) Coa型液晶显示面板及其制作方法
US20150029428A1 (en) Color filter substrate, manufacturing process thereof and liquid crystal display panel
WO2020187108A1 (zh) 显示面板及其制造方法、显示装置
WO2015081732A1 (zh) 彩膜基板及其制作方法、显示装置
WO2020215372A1 (zh) 阵列基板
WO2016176882A1 (zh) 彩色滤光片及其制作方法、液晶显示面板
WO2019128959A1 (zh) 液晶显示面板及其制作方法
WO2021196286A1 (zh) 一种液晶显示面板
WO2020143217A1 (zh) 掩膜单元及具有该掩膜单元的掩膜板组件
WO2020113751A1 (zh) 一种掩膜板
WO2020107720A1 (zh) 彩膜基板及液晶显示面板
WO2020073568A1 (zh) 一种像素电极结构及显示装置
WO2020124890A1 (zh) 线栅型偏光片制作方法及透明显示装置
WO2019052043A1 (zh) 显示面板及其制造方法
WO2020077818A1 (zh) 一种薄膜晶体管阵列基板及液晶显示器
WO2020042261A1 (zh) 显示面板及其制作方法
WO2020228168A1 (zh) 阵列基板及其制作方法
WO2021047022A1 (zh) 液晶显示面板
WO2019104846A1 (zh) 显示面板及显示装置
WO2020206779A1 (zh) 彩膜基板以及显示面板
WO2021203483A1 (zh) 显示面板及显示装置
WO2018082228A1 (zh) 显示器阵列基板画素结构及其应用的显示设备
WO2019129097A1 (zh) 液晶显示面板及其制作方法
WO2020087807A1 (zh) 显示面板以及显示装置
US20130141677A1 (en) LCD, LCD Substrate and LCD Manufacturing Method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18937033

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18937033

Country of ref document: EP

Kind code of ref document: A1