WO2020073370A1 - Structure d'encapsulation incorporée et procédé de fabrication de puce de détection d'image - Google Patents

Structure d'encapsulation incorporée et procédé de fabrication de puce de détection d'image Download PDF

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Publication number
WO2020073370A1
WO2020073370A1 PCT/CN2018/112617 CN2018112617W WO2020073370A1 WO 2020073370 A1 WO2020073370 A1 WO 2020073370A1 CN 2018112617 W CN2018112617 W CN 2018112617W WO 2020073370 A1 WO2020073370 A1 WO 2020073370A1
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WO
WIPO (PCT)
Prior art keywords
substrate
image sensor
opening
sensor chip
packaging structure
Prior art date
Application number
PCT/CN2018/112617
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English (en)
Chinese (zh)
Inventor
秦飞
赵帅
张理想
陈沛
安彤
代岩伟
肖智轶
Original Assignee
北京工业大学
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Publication of WO2020073370A1 publication Critical patent/WO2020073370A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14618—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14636—Interconnect structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof

Definitions

  • the invention relates to a semiconductor chip packaging structure and manufacturing method, in particular to an image sensor chip packaging structure and manufacturing method, which belongs to the field of semiconductor packaging.
  • the image sensor chip is a semiconductor module, which is a device that converts an optical image into an electronic signal.
  • the electronic signal can be used for further processing or digitization for storage, or for transferring the image to a display device for display. It is widely used in digital cameras, mobile phones and other electronic optical devices.
  • Image sensor chips are mainly divided into two types: charge coupled device (CCD) and CMOS image sensor (CIS).
  • CCD image sensor is superior to the CMOS image sensor in terms of image quality and noise, the CMOS sensor can be manufactured using traditional semiconductor production technology, and the production cost is low.
  • CMOS image sensors have the advantages of low power consumption, low parasitic delay of capacitance and inductance.
  • the current impact sensor chip structure generally makes a cofferdam (polymer material) on the glass cover plate, and then bonds the functional surface of the chip with the periphery of the cofferdam through permanent bonding glue. At the same time, a certain distance needs to be left between the photosensitive region of the chip and the glass cover, which requires that the cofferdam must have a certain thickness.
  • the cofferdam due to the low strength and rigidity of the cofferdam currently used, and the poor thickness uniformity, it is not enough to ensure that there is sufficient distance between the photosensitive area of the chip and the glass cover, generally only 30-50 ⁇ m, and it will cause the chip and glass Problems such as poor flatness at the joint of the cover and uneven glass surface.
  • the interface between the cofferdam and other materials is prone to cracks, delamination and other problems caused by thermal stress, resulting in product failure.
  • the cofferdam contacts the functional surface of the chip, the probability of contamination in the functional area is increased, such as glue overflow.
  • the image sensor chip I / O ports are bound to increase. The increase in I / O port will lead to insufficient space for the ball, which is also a problem in the existing image sensor chip packaging structure.
  • the present invention proposes an embedded packaging structure and manufacturing method of an image sensor chip.
  • the image sensor chip is embedded in a substrate with a groove in a function-oriented manner, and the non-functional surface of the chip and the substrate are concave
  • the bottom of the groove is bonded, and then the glass cover plate is bonded to the substrate, and then the second surface of the substrate and the non-functional surface of the image sensor chip are provided with an opening exposing the pad of the functional surface of the image sensor chip, and formed in the opening to extend to
  • the conductive circuit on the back of the substrate electrically leads the pad to the back of the substrate.
  • the packaging is completed and cut to form an image sensor chip packaging structure.
  • an embedded packaging structure of an image sensor chip which includes at least a substrate, an image sensor chip, and a glass cover plate.
  • the substrate includes a first surface and a second surface opposite thereto. At least one groove extending toward the second surface is formed on the first surface of the substrate.
  • the image sensor chip includes a functional surface and a non-functional surface opposite thereto, and the functional surface includes a plurality of bonding pads and functional areas.
  • the non-functional surface is covered with a first adhesive layer.
  • the non-functional surface of the image sensor chip is bonded to the bottom surface of the groove through a first adhesive layer, and the first surface of the substrate is higher than the functional surface of the image sensor chip by 20 ⁇ m or more.
  • the size of the bottom surface of the groove is larger than the size of the non-functional surface that affects the sensor chip, so that there is a gap between the inner wall of the groove and the side surface of the image sensor chip.
  • the surface of the glass cover is bonded to the first surface of the substrate through a second bonding layer.
  • the second surface of the substrate has a second opening.
  • the first adhesive layer has a third opening, and a non-functional surface of the image sensor chip is provided with a fourth opening exposing each pad corresponding to the position of the pad.
  • the second opening of the second surface of the substrate and the third opening of the first adhesive layer correspond to the position of the fourth opening of the non-functional surface of the image sensor chip.
  • the second opening is connected to the third opening and the fourth opening to form a through hole.
  • the inner wall of the through hole and the second surface of the substrate are sequentially provided with a passivation layer, a metal wiring layer, a solder resist layer, and conductive bumps.
  • the embedded image sensor chip packaging structure is characterized in that the substrate is one of a silicon substrate, a glass substrate, a quartz substrate, and a ceramic substrate.
  • the embedded image sensor chip packaging structure is characterized in that the first surface of the substrate is 20-50 ⁇ m higher than the functional surface of the image sensor chip.
  • the embedded image sensor chip packaging structure is characterized in that there is a gap between the inner wall of the groove and the side of the image sensor chip, and the gap distance is 10- 20 ⁇ m.
  • the embedded image sensor chip packaging structure is characterized in that the packaging structure embeds an image chip on a substrate, or embeds more than two image chips of different structures at the same time On a substrate, a dual camera or array image sensor chip packaging structure is formed.
  • the embedded packaging structure of the image sensor chip is characterized in that the area surrounded by the conductive bumps and the metal wiring layer is not less than the functional surface or non-function of the image sensor chip The area of the surface.
  • step 1 a substrate is provided, the substrate including a first surface and a second surface opposite thereto.
  • Step 2 Coat a layer of photoresist on the first surface of the substrate to form a temporary adhesive layer
  • Step 3 Perform photolithography and development processes on the temporary adhesive layer to form at least one first opening
  • Step 4 Form a groove on the first surface of the substrate corresponding to the first opening, and remove the temporary adhesive layer;
  • Step 5 Provide at least one image sensor chip to be packaged.
  • the image sensor chip includes a functional surface and a non-functional surface opposite thereto, and the functional surface includes a plurality of bonding pads and functional areas.
  • Step 6 Coat a first adhesive layer on the image sensor chip to be packaged, and place at least one chip to be packaged in the groove through the patching process so that the first surface of the substrate is higher than A functional surface of the image sensor chip, there is a gap between the side surface of the image sensor chip and the side wall of the groove;
  • Step 7 providing a transparent glass cover plate, and bonding the glass cover plate and the first surface of the substrate with a second adhesive layer;
  • Step 8 Thin the second surface of the substrate
  • Step 9 forming a second opening in the second surface of the substrate
  • Step 10 forming a third opening and a fourth opening exposing each pad on the first adhesive layer and the non-functional surface of the image sensor chip, the second opening is formed with the third opening, and the fourth opening is formed Through hole
  • Step 11 forming a passivation layer on the inner wall of the through hole and the second surface of the substrate to expose each pad;
  • Step 12 forming a patterned metal wiring layer on the passivation layer
  • Step 13 forming a solder resist layer on the metal wiring layer, and forming a pad opening on the solder resist layer;
  • Step 14 forming conductive bumps on the pad openings
  • Step 15 The substrate and the glass cover are cut to form a single image sensor chip package.
  • the manufacturing method of the embedded packaging structure of the image sensor chip is characterized in that the manufacturing method of the groove of the substrate is dry etching or wet etching.
  • the manufacturing method of the embedded packaging structure of the image sensor chip is characterized in that, after step 6, a glass cover is bonded to the first surface of the substrate.
  • the manufacturing method of the embedded packaging structure of the image sensor chip is characterized in that the manufacturing method of the second opening is one of cutting, dry etching and wet etching Or a combination of several types, the manufacturing method of the third opening and the fourth opening is one or a combination of dry etching and wet etching.
  • the invention provides an embedded packaging structure and manufacturing method of an image sensor chip.
  • the invention does not require a polymer cofferdam, which reduces the reliability problem of excessive thermal stress due to a large thermal expansion coefficient of the polymer.
  • the glass cover is bonded to the substrate, and the image sensor chip is embedded in the cavity formed by the glass cover and the substrate. There is a gap between the inner wall of the cavity and the side wall of the image sensor chip to prevent the overflow of glue from contaminating the photosensitive area.
  • the electric signal is led to the second surface of the substrate through the through hole, which increases the space of the ball.
  • FIG. 1 is a schematic diagram of an image sensor chip embedded package structure according to an embodiment of the present invention.
  • step 1 is a schematic cross-sectional view of the package structure after step 1.
  • step 2 is a schematic cross-sectional view of the packaging structure after step 2.
  • step 3 is a schematic cross-sectional view of the package structure after step 3.
  • 5 is a schematic cross-sectional view of the package structure after step 4.
  • FIG. 6 is a schematic cross-sectional view of the package structure after step 5.
  • FIG. 7 is a schematic cross-sectional view of the packaging structure after step 6.
  • step 9 is a schematic cross-sectional view of the packaging structure after step 8.
  • FIG. 10 is a schematic cross-sectional view of the package structure after step 9.
  • 11 is a schematic cross-sectional view of the package structure after step 10.
  • step 12 is a schematic cross-sectional view of the packaging structure after step 11.
  • step 12 is a schematic cross-sectional view of the package structure after step 12.
  • step 14 is a schematic cross-sectional view of the package structure after step 13.
  • step 15 is a schematic cross-sectional view of the package structure after step 14.
  • 16 is a schematic cross-sectional view of the package structure after step 15.
  • the present invention discloses an embedded packaging structure of an image sensor chip, which includes at least a substrate (1), an image sensor chip (3), and a glass cover (5).
  • the substrate contains a first surface (101) and a second surface (102) opposite thereto.
  • the first surface (101) of the substrate is formed with at least one groove 103 extending toward the second surface (102).
  • the image sensor chip (3) includes a functional surface (301) and a non-functional surface (302) opposite thereto, and the functional surface includes a plurality of bonding pads (303) and functional areas (304).
  • the non-functional surface (302) is covered with a first adhesive layer (4).
  • the non-functional surface (302) of the image sensor chip (3) is bonded to the bottom surface of the groove (103) through the first adhesive layer (4), and the first surface (1) of the substrate (1) 101) 20 ⁇ m or more above the functional surface (301) of the image sensor chip (3).
  • the size of the bottom surface of the groove (103) is larger than the size of the non-functional surface (302) affecting the sensor chip (3), so that the inner wall (104) of the groove (103) and the image sensor There is a gap between the side surfaces (305) of the chip (3).
  • the surface of the glass cover (5) is bonded to the first surface (101) of the substrate (1) through a second adhesive layer (6).
  • the second surface (102) of the substrate (1) has a second opening (105).
  • the first adhesive layer (4) has a third opening (401), and the non-functional surface (302) of the image sensor chip (3) corresponds to the position of the solder pad (303) is provided with a third Four openings (306).
  • the second opening (105) of the second surface (102) of the substrate (1) and the third opening (401) of the first adhesive layer (4) correspond to the non-functional surface of the image sensor chip (3) (302) The position of the fourth opening (306).
  • the second opening (105) is connected to the third opening (401) and the fourth opening (306) to form a through hole.
  • the inner wall of the through hole and the second surface (102) of the substrate (1) are sequentially provided with a passivation layer (7), a metal wiring layer (8), a solder resist layer (9), and conductive bumps (10).
  • the substrate (1) is one of a silicon substrate, a glass substrate, a quartz substrate, and a ceramic substrate.
  • the first surface (101) of the substrate (1) is 20-50 ⁇ m higher than the functional surface (301) of the image sensor chip (3).
  • the gap distance is 10-20 ⁇ m.
  • the packaging structure embeds an image chip on a substrate, or embeds more than two image chips of different structures on a substrate at the same time to form a dual-camera or array image sensor chip package structure.
  • the area surrounded by the conductive bump (10) and the metal wiring layer (8) is not less than the area of the functional surface (303) or non-functional surface (304) of the image sensor chip (3).
  • FIGS. 2 to 16 are schematic diagrams of a method for manufacturing an image sensor chip according to an embodiment of the present invention.
  • a substrate (1) is provided.
  • the substrate includes a first surface (101) and a second surface (102) opposite thereto.
  • Step 2 as shown in FIG. 3, coating a layer of photoresist on the first surface (101) of the substrate (1) to form a temporary adhesive layer (2);
  • Step 3 as shown in FIG. 4, performing photolithography and development processes on the temporary adhesive layer (2) to form at least one first opening (201);
  • Step 4 as shown in FIG. 5, at the position of the first surface (101) of the substrate (1) corresponding to the first opening (201), a groove (103) is formed, and the temporary adhesive layer (2) is removed;
  • Step 5 at least one image sensor chip (3) to be packaged is provided.
  • the image sensor chip (3) includes a functional surface (301) and a non-functional surface (302) opposite thereto.
  • the functional surface (302) contains several pads (303) and functional areas (304).
  • Step 6 as shown in FIG. 7, coat the first adhesive layer (4) on the image sensor chip (3) to be packaged, and place at least one in the groove (103) through the patching process
  • the chip to be packaged makes the first surface (101) of the substrate (1) higher than the functional surface (301) of the image sensor chip, the side surface (305) of the image sensor chip and the groove There is a gap between the side walls (104) of (103);
  • Step 7 as shown in FIG. 8, providing a transparent glass cover plate (5), and bonding the glass cover plate and the first surface (101) of the substrate (1) with a second adhesive layer (6);
  • Step 8 as shown in FIG. 9, thin the second surface (102) of the substrate (1);
  • Step 9 as shown in FIG. 10, forming a second opening (105) on the second surface (103) of the substrate (1);
  • Step 10 as shown in FIG. 11, forming a third opening (302) exposing each pad (303) in the first adhesive layer (4) and the non-functional surface (302) of the image sensor chip (3) 401) and a fourth opening (306), the second opening (105) and the third opening (401), the fourth opening (306) form a through hole;
  • Step 11 as shown in FIG. 12, forming a passivation layer (7) on the inner wall of the through hole and the second surface (102) of the substrate to expose each pad (303)
  • Step 12 as shown in FIG. 13, forming a patterned metal wiring layer (8) on the passivation layer (7);
  • Step 13 as shown in FIG. 14, forming a solder resist layer (9) on the metal wiring layer (8), and forming a pad opening (901) on the solder resist layer;
  • Step 14 as shown in FIG. 15, forming conductive bumps (10) on the pad openings (901);
  • Step 15 as shown in FIG. 16, the substrate (1) and the glass cover (5) are cut to form a single image sensor chip package.
  • the manufacturing method of the groove (103) of the substrate (1) is dry etching or wet etching.
  • a glass cover (5) and the first surface (101) of the substrate (1) are bonded.
  • the manufacturing method of the second opening (105) is one or a combination of cutting, dry etching and wet etching, and the third opening (401) and the fourth opening (306) ) Is produced by one or a combination of dry etching and wet etching.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

L'invention concerne une structure d'encapsulation incorporée et un procédé de fabrication d'une puce de détection d'image (3), la puce de détection d'image (3) étant incorporée dans un substrat (1) comprend une rainure (103), à la manière d'une face fonctionnelle (301) tournée vers le haut ; une face non fonctionnelle (302) de la puce se lie à un fond de la rainure (103) du substrat ; une plaque de recouvrement en verre (5) se lie au substrat (1) ; une ouverture exposant une pastille de soudure (303) de la face fonctionnelle (301) de la puce de détection d'image (3) est disposée sur une seconde surface (102) du substrat (1) et la face non fonctionnelle (302) de la puce de détection d'image (3) ; et une ligne conductrice s'étendant vers l'arrière du substrat (1) est formée à l'intérieur de l'ouverture, introduisant une propriété électrique de la pastille de soudure (303) sur l'arrière du substrat (1). La structure d'encapsulation n'a pas besoin d'un barrage polymère, soulage une désadaptation thermique de la structure, améliore la fiabilité, et diminue la probabilité de contamination de zone fonctionnelle et fournit un espace plus grand pour agencer des globules de soudure.
PCT/CN2018/112617 2018-10-11 2018-10-30 Structure d'encapsulation incorporée et procédé de fabrication de puce de détection d'image WO2020073370A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811181878.4 2018-10-11
CN201811181878.4A CN109326620A (zh) 2018-10-11 2018-10-11 一种影像传感芯片的嵌入式封装结构和制作方法

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WO2020073370A1 true WO2020073370A1 (fr) 2020-04-16

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Publication number Priority date Publication date Assignee Title
CN111710615A (zh) * 2020-06-29 2020-09-25 华天科技（昆山）电子有限公司 Cis芯片封装结构及其封装方法
CN112490185A (zh) * 2020-11-25 2021-03-12 通富微电子股份有限公司 一种芯片封装方法

Citations (4)

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Publication number Priority date Publication date Assignee Title
CN1971926A (zh) * 2005-11-24 2007-05-30 矽格股份有限公司 具微小构装面积的光感测组件封装结构
CN201004462Y (zh) * 2007-01-11 2008-01-09 力相光学股份有限公司 微型镜头模块封装结构
JP2016111270A (ja) * 2014-12-09 2016-06-20 シャープ株式会社 半導体装置、および半導体装置の製造方法
CN107146799A (zh) * 2017-05-11 2017-09-08 北京工业大学 一种基于硅基板的影像芯片封装结构及其制作方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1971926A (zh) * 2005-11-24 2007-05-30 矽格股份有限公司 具微小构装面积的光感测组件封装结构
CN201004462Y (zh) * 2007-01-11 2008-01-09 力相光学股份有限公司 微型镜头模块封装结构
JP2016111270A (ja) * 2014-12-09 2016-06-20 シャープ株式会社 半導体装置、および半導体装置の製造方法
CN107146799A (zh) * 2017-05-11 2017-09-08 北京工业大学 一种基于硅基板的影像芯片封装结构及其制作方法

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