WO2020071391A1 - Adhesive for semiconductors, method for producing semiconductor device, and semiconductor device - Google Patents

Adhesive for semiconductors, method for producing semiconductor device, and semiconductor device

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Publication number
WO2020071391A1
WO2020071391A1 PCT/JP2019/038821 JP2019038821W WO2020071391A1 WO 2020071391 A1 WO2020071391 A1 WO 2020071391A1 JP 2019038821 W JP2019038821 W JP 2019038821W WO 2020071391 A1 WO2020071391 A1 WO 2020071391A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor
adhesive
resin
semiconductor device
semiconductor chip
Prior art date
Application number
PCT/JP2019/038821
Other languages
French (fr)
Japanese (ja)
Inventor
徹弥 谷口
慎 佐藤
幸一 茶花
Original Assignee
日立化成株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=70054548&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2020071391(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 日立化成株式会社 filed Critical 日立化成株式会社
Priority to KR1020217008276A priority Critical patent/KR102629861B1/en
Priority to CN201980062245.8A priority patent/CN112771659A/en
Priority to JP2020550470A priority patent/JP7363798B2/en
Publication of WO2020071391A1 publication Critical patent/WO2020071391A1/en

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    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02Non-macromolecular additives
    • C09J11/04Non-macromolecular additives inorganic
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02Non-macromolecular additives
    • C09J11/06Non-macromolecular additives organic
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/30Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/38Pressure-sensitive adhesives [PSA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142Sealing arrangements between parts, e.g. adhesion promotors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic

Definitions

  • the present disclosure relates to a semiconductor adhesive, a method for manufacturing a semiconductor device, and a semiconductor device.
  • connection method FC connection method
  • FC connection method a method of bonding a connection to a metal using solder, tin, gold, silver, copper, etc., a method of bonding a connection to a metal by applying ultrasonic vibration, and a mechanical contact by a contraction force of a resin are known. From the viewpoint of the reliability of the connection portion, a method of metal-joining the connection portion using solder, tin, gold, silver, copper, or the like is generally used.
  • a COB (Chip On Board) type connection system which is frequently used in BGA (Ball Grid Array), CSP (Chip Size Package) and the like also corresponds to the FC connection system.
  • a connection section (bump or wiring) is formed on a semiconductor chip to connect between semiconductor chips, and a connection section (bump or wiring) is formed on a semiconductor wafer.
  • COW Chip ⁇ On ⁇ Wafer
  • chip stack type packages in which the above-described connection methods are stacked and multi-staged, POP (Package On Package), TSV (Through-Silicon Via), and the like.
  • POP Package On Package
  • TSV Through-Silicon Via
  • chip stack type packages in which the above-described connection methods are stacked and multi-staged, POP (Package On Package), TSV (Through-Silicon Via), and the like.
  • POP Package On Package
  • TSV Through-Silicon Via
  • Such a stacking / multi-stage technique since semiconductor chips and the like are arranged three-dimensionally, the size of the package can be reduced as compared with a technique of arranging two-dimensionally.
  • such a stacking / multi-stage technology is effective in improving the performance of semiconductors, reducing noise, reducing the mounting area, and saving power, and thus has attracted attention as a next-generation semiconductor wiring technology.
  • Flip-chip packages which are becoming more sophisticated, highly integrated, and cost-effective, are expected to expand their applications and production volume in the future. Sustained mass production of flip-chip packages requires the continuous supply of semiconductor adhesives used for them. For this reason, semiconductor adhesives must have excellent stability over time. I have. If the stability over time of the adhesive for semiconductors is poor, the viscosity of the adhesive for semiconductors increases while being left at room temperature, and there is a concern that the mountability at the time of assembling the semiconductor device may deteriorate.
  • the present disclosure is capable of suppressing an increase in viscosity after being left at room temperature, and is unlikely to cause deterioration in mountability when assembling a semiconductor device over time, and a method of manufacturing a semiconductor device using the same. It is an object to provide a semiconductor device.
  • the present disclosure provides (a) an inorganic filler, wherein the (a) inorganic filler is a surface-treated inorganic filler having a glycidyl group, and the (a) inorganic filler as a whole. And a semiconductor adhesive containing 50% by mass or more based on the above. According to the adhesive for semiconductors described above, (a) 50% by mass or more of the entire inorganic filler is a surface-treated inorganic filler having a glycidyl group. An increase in viscosity can be suppressed.
  • the surface treatment agent and moisture easily form a hydrogen bond to increase the viscosity, but the surface treatment having a glycidyl group is difficult.
  • the surface treatment having a glycidyl group is difficult.
  • the semiconductor adhesive an increase in viscosity after standing at room temperature can be suppressed, so that it is possible to suppress the deterioration of the mountability when assembling the semiconductor device over time.
  • the inorganic filler is subjected to a surface treatment having a glycidyl group, the inorganic filler has excellent dispersibility in the adhesive for semiconductors, and the adhesive for semiconductors can obtain good adhesive strength and good insulation reliability. it can.
  • the semiconductor adhesive may further contain (b) an epoxy resin, (c) a curing agent, and (d) a high molecular weight component having a weight average molecular weight of 10,000 or more. Further, the semiconductor adhesive may further contain (e) a flux agent.
  • the semiconductor adhesive may be in the form of a film.
  • the handleability of the semiconductor adhesive can be improved, and the workability and productivity during package manufacturing can be improved.
  • the present disclosure also provides a method of manufacturing a semiconductor device in which connection portions of a semiconductor chip and a printed circuit board are electrically connected to each other, or a semiconductor device in which connection portions of a plurality of semiconductor chips are electrically connected to each other.
  • a method for manufacturing a semiconductor device comprising: a step of sealing at least a part of the connection portion with the semiconductor adhesive. According to the above-mentioned manufacturing method, since the adhesive for semiconductor used is hard to increase in viscosity with time, good mounting performance can be obtained stably.
  • the present disclosure further includes a connection structure in which connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other, or a connection structure in which connection portions of a plurality of semiconductor chips are electrically connected to each other, An adhesive material for sealing at least a part of the connection portion, wherein the adhesive material is made of a cured product of the semiconductor adhesive.
  • the above-described semiconductor device has good mountability, and has excellent adhesion and reliability between the semiconductor chip and the printed circuit board or the semiconductor chip.
  • the adhesive agent for semiconductors which can suppress the viscosity increase after leaving room temperature, and which hardly causes the deterioration of mountability at the time of assembling a semiconductor device over time, a method of manufacturing a semiconductor device using the same, and A semiconductor device can be provided.
  • FIG. 1 is a schematic cross-sectional view illustrating an embodiment of a semiconductor device according to the present disclosure.
  • FIG. 4 is a schematic cross-sectional view illustrating another embodiment of the semiconductor device of the present disclosure.
  • FIG. 4 is a schematic cross-sectional view illustrating another embodiment of the semiconductor device of the present disclosure.
  • FIG. 4 is a schematic cross-sectional view illustrating another embodiment of the semiconductor device of the present disclosure.
  • a numerical range indicated by using “to” indicates a range including numerical values described before and after “to” as a minimum value and a maximum value, respectively.
  • the upper limit or the lower limit of a numerical range in one step can be arbitrarily combined with the upper limit or the lower limit of a numerical range in another step.
  • the upper limit or the lower limit of the numerical range may be replaced with the value shown in the embodiment.
  • “A or B” may include one of A and B, and may include both.
  • the materials exemplified in the present specification can be used alone or in combination of two or more, unless otherwise specified.
  • “(meth) acryl” means acryl or methacryl corresponding thereto.
  • the semiconductor adhesive according to the present embodiment contains (a) an inorganic filler (hereinafter sometimes referred to as “component (a)”).
  • component (a) inorganic filler contains 50% by mass or more of an inorganic filler having a glycidyl group and subjected to a surface treatment, based on the total amount of the (a) inorganic filler.
  • the semiconductor adhesive according to the present embodiment includes (b) an epoxy resin (hereinafter, sometimes referred to as “component (b)”) and (c) a curing agent (hereinafter, sometimes referred to as “component (c)”).
  • the semiconductor adhesive according to the present embodiment may contain (e) a fluxing agent (hereinafter, sometimes referred to as “component (e)”).
  • component (e) a fluxing agent
  • the inorganic filler as the component (a) include an insulating inorganic filler. Among them, an inorganic filler having an average particle diameter of 100 nm or less is more preferable.
  • the material of the insulating inorganic filler include glass, silica, alumina, silica / alumina, titanium oxide, mica, and boron nitride, among which silica, alumina, silica / alumina, titanium oxide, and boron nitride are preferable. Silica, alumina and boron nitride are more preferred.
  • the insulating inorganic filler may be a whisker, and examples of the material of the whisker include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride.
  • the insulating inorganic filler can be used alone or in combination of two or more.
  • the component (a) is preferably a surface-treated filler.
  • the surface treatment include glycidyl (epoxy), amine, phenyl, phenylamino, acryl, vinyl, and the like.
  • a silane treatment with a silane compound such as an epoxy silane type, an amino silane type or an acryl silane type is preferable from the viewpoint of easy surface treatment.
  • a silane compound such as an epoxy silane type, an amino silane type or an acryl silane type
  • the surface treatment agent glycidyl-based, phenylamino-based, and (meth) acryl-based compounds are preferable from the viewpoint of excellent dispersibility and fluidity and further improving the adhesive strength.
  • a glycidyl-based compound is preferable from the viewpoint of suppressing an increase in the viscosity of the semiconductor adhesive after standing at room temperature.
  • the component (a) contains 50% by mass or more of a surface-treated inorganic filler having a glycidyl group, based on the total amount of the component (a).
  • the surface treatment having a glycidyl group can be performed using a glycidyl-based compound having a structure represented by the following general formula (1) as a surface treatment agent.
  • the surface of the inorganic filler has a structure represented by the following general formula (1).
  • R represents a divalent organic group.
  • the content of the inorganic filler subjected to the surface treatment having a glycidyl group is 50% by mass or more based on the total amount of the component (a), and from the viewpoint of further suppressing the increase in the viscosity of the semiconductor adhesive after standing at room temperature, It is preferably at least 60% by mass, more preferably at least 80% by mass.
  • the entire amount (100% by mass) of the component (a) may be a surface-treated inorganic filler having a glycidyl group.
  • the average particle diameter of the component (a) is preferably 100 nm or less, and more preferably 60 nm or less.
  • the average particle size of the component (a) can be measured by a laser diffraction type particle size distribution meter.
  • the viscosity of the semiconductor adhesive may become too low due to the large particle size, and the semiconductor adhesive may be mounted outside a chip called a fillet after mounting. Of the resin may easily occur.
  • the viscosity of the semiconductor adhesive is easily adjusted to a preferable range, and the generation of fillets is sufficiently suppressed, or the amount of fillets is sufficiently reduced. can do.
  • the lower limit of the average particle diameter of the component (a) is not particularly limited, but may be 1 nm or more, 5 nm or more, or 10 nm or more from the viewpoint of suppressing aggregation of the component (a).
  • aggregation may occur even if the average particle size is about 50 nm, but an inorganic filler that has been subjected to a surface treatment having a glycidyl group is used. In this case, even if the average particle size is about 50 nm or less, the occurrence of aggregation can be suppressed.
  • the component (a) can be used alone or as a mixture of two or more.
  • the shape of the component (a) is not particularly limited.
  • the content of the component (a) is preferably from 10 to 80% by mass, more preferably from 15 to 60% by mass, and more preferably from 20 to 50% by mass, based on the total solid content of the semiconductor adhesive. It is even more preferred. When the content is 10% by mass or more, the adhesive strength and the reflow resistance tend to be further improved. When the content is 80% by mass or less, the decrease in connection reliability due to thickening tends to be suppressed. .
  • the semiconductor adhesive according to the present embodiment may contain a resin filler.
  • the resin filler include a filler made of a resin such as polyurethane and polyimide.
  • the resin filler has a smaller coefficient of thermal expansion than other organic components (such as an epoxy resin and a curing agent), and thus has an excellent effect of improving connection reliability. Further, according to the resin filler, the viscosity of the semiconductor adhesive can be easily adjusted. Further, the resin filler has an excellent function of relieving stress as compared with the inorganic filler.
  • the filler contained in the semiconductor adhesive is preferably insulating. It is preferable that the semiconductor adhesive does not contain a conductive metal filler such as a silver filler and a solder filler.
  • An adhesive for semiconductors (circuit connecting material) that does not contain conductive fillers (conductive particles) is sometimes called NCF (Non-Conductive-FILM) or NCP (Non-Conductive-Paste).
  • the semiconductor adhesive according to the present embodiment can be suitably used as NCF or NCP.
  • the epoxy resin (b) include an epoxy resin having two or more epoxy groups in a molecule, such as a bisphenol A epoxy resin, a bisphenol F epoxy resin, a naphthalene epoxy resin, a phenol novolak epoxy resin, Cresol novolak type epoxy resin, phenol aralkyl type epoxy resin, biphenyl type epoxy resin, triphenylmethane type epoxy resin, dicyclopentadiene type epoxy resin, various polyfunctional epoxy resins and the like can be used.
  • the component (b) one type can be used alone, or two or more types can be used in combination.
  • the bisphenol A type or the bisphenol F type liquid epoxy resin has a 1% thermal weight loss temperature of 250 ° C. or less, and thus may be decomposed when heated at a high temperature to generate volatile components. Therefore, it is preferable to use an epoxy resin that is solid at room temperature (1 atm, 25 ° C.). When using a liquid epoxy resin, it is preferable to use it in combination with a solid epoxy resin.
  • the weight average molecular weight of the component (b) may be less than 10,000, and from the viewpoint of heat resistance, is preferably 100 or more and less than 10,000, more preferably 300 or more and 8000 or less, and further preferably 300 or more and 5000 or less.
  • the content of the component (b) is preferably from 10 to 50% by mass, more preferably from 20 to 45% by mass, and still more preferably from 30 to 40% by mass, based on the total solid content of the semiconductor adhesive. It is. When the content of the component (b) is 10% by mass or more, it is easy to sufficiently control the flow of the cured resin. When the content is 50% by mass or less, the resin component of the cured product does not become too large, and Easy to reduce warpage.
  • the semiconductor adhesive according to the present embodiment may further contain a thermosetting resin other than the epoxy resin (b).
  • thermosetting resins include phenolic resins, imide resins, (meth) acrylic compounds, and the like.
  • Component (c): curing agent examples include a phenol resin-based curing agent, an acid anhydride-based curing agent, an amine-based curing agent, an imidazole-based curing agent, and a phosphine-based curing agent.
  • the component (c) contains a phenolic hydroxyl group, an acid anhydride, an amine or an imidazole, it is easy to exhibit a flux activity for suppressing the formation of an oxide film at the connection portion, thereby easily improving connection reliability and insulation reliability. Can be done.
  • each curing agent will be described.
  • Phenolic resin-based curing agent examples include curing agents having two or more phenolic hydroxyl groups in a molecule, such as phenol novolak resin, cresol novolak resin, phenol aralkyl resin, and cresol naphthol. Formaldehyde polycondensates, triphenylmethane-type polyfunctional phenol resins, various polyfunctional phenol resins, and the like can be used.
  • the phenolic resin-based curing agents can be used alone or in combination of two or more.
  • the equivalent ratio of the phenolic resin-based curing agent to the component (b) is preferably from 0.3 to 1.5 from the viewpoint of excellent curability, adhesiveness and storage stability. , 0.4 to 1.0, more preferably 0.5 to 1.0.
  • the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved.
  • the equivalent ratio is 1.5 or less, unreacted phenolic hydroxyl groups do not remain excessively, and the water absorption Is kept low, and the insulation reliability tends to be further improved.
  • Acid anhydride-based curing agent examples include methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic dianhydride, and ethylene glycol bis. Anhydrotrimellitate or the like can be used.
  • the acid anhydride-based curing agent can be used alone or in combination of two or more.
  • the equivalent ratio of the acid anhydride-based curing agent to the component (b) is from 0.3 to 1.5 from the viewpoint of excellent curability, adhesiveness and storage stability. Is preferably, 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is more preferable. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved. When the equivalent ratio is 1.5 or less, the unreacted acid anhydride does not remain excessively, and the water absorption Is kept low, and the insulation reliability tends to be further improved.
  • (C-iii) Amine-based curing agent As the amine-based curing agent, dicyandiamide, various amine compounds, and the like can be used.
  • the equivalent ratio of the amine-based curing agent to the component (b) is preferably from 0.3 to 1.5 from the viewpoint of excellent curability, adhesion and storage stability. -1.0 is more preferable, and 0.5-1.0 is more preferable. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved. When the equivalent ratio is 1.5 or less, unreacted amine does not remain excessively, and insulation reliability is improved. There is a tendency to further improve.
  • imidazole curing agent examples include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, Cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6 -[2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2′-undecylimidazolyl- (1 ′)]-ethyl-s-triazine, 2, 4-diamino-6- [2'-ethyl-4'-methylimidazolyl
  • 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellit from the viewpoint of further improving curability, storage stability and connection reliability.
  • the content of the imidazole-based curing agent is preferably from 0.1 to 20 parts by mass, more preferably from 0.1 to 10 parts by mass, per 100 parts by mass of the component (b).
  • the content of the imidazole-based curing agent is 0.1 part by mass or more, the curability tends to be improved, and when the content is 20 parts by mass or less, the adhesive composition is cured before metal bonding is formed. And there is a tendency that poor connection hardly occurs.
  • (Cv) Phosphine-based curing agent examples include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate, and tetraphenylphosphonium (4-fluorophenyl) borate. Is mentioned.
  • the content of the phosphine-based curing agent is preferably from 0.1 to 10 parts by mass, more preferably from 0.1 to 5 parts by mass, per 100 parts by mass of the component (b).
  • the content of the phosphine-based curing agent is 0.1 part by mass or more, the curability tends to be improved, and when the content is 10 parts by mass or less, the semiconductor adhesive is cured before metal bonding is formed. And there is a tendency that poor connection hardly occurs.
  • the phenolic resin-based curing agent, acid anhydride-based curing agent, and amine-based curing agent can be used alone or in combination of two or more.
  • the imidazole-based curing agent and the phosphine-based curing agent may be used alone, but may be used together with a phenolic resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent.
  • the component (c) from the viewpoint of excellent curability, a combined use of a phenolic resin-based curing agent and an imidazole-based curing agent, a combined use of an acid anhydride-based curing agent and an imidazole-based curing agent, an amine-based curing agent and an imidazole-based curing agent And the use of an imidazole-based curing agent alone is preferred. Since the productivity is improved when the connection is made in a short time, it is more preferable to use an imidazole-based curing agent having excellent quick-curing properties alone. In this case, when cured in a short time, volatile components such as low molecular components can be suppressed, so that the generation of voids can be easily suppressed.
  • the high molecular weight component having a weight average molecular weight of 10,000 or more includes phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, (meth) acrylic resin, Polyester resin, polyethylene resin, polyether sulfone resin, polyetherimide resin, polyvinyl acetal resin, polyurethane resin, acrylic rubber, and the like, among which, from the viewpoint of excellent heat resistance and film formability, phenoxy resin, polyimide resin, (Meth) acrylic resin, acrylic rubber, cyanate ester resin and polycarbodiimide resin are preferred, phenoxy resin, polyimide resin, (meth) acrylic resin and acrylic rubber are more preferred, and phenoxy resin is even more preferred.
  • the component (d) may be used alone or as a mixture or copolymer of two or more.
  • the mass ratio of the component (d) to the component (b) is not particularly limited, but from the viewpoint of maintaining a good film shape, the content of the component (b) is 1 part by mass of the component (d).
  • the amount is preferably 0.01 to 5 parts by mass, more preferably 0.05 to 4 parts by mass, and even more preferably 0.1 to 3 parts by mass.
  • the content of the component (b) is 0.01 parts by mass or more, the curability does not decrease, and the adhesive strength does not decrease.
  • the content is 5 parts by mass or less, the film formability and the film are reduced. The formability does not decrease.
  • the weight average molecular weight of the component (d) is 10,000 or more in terms of polystyrene, but is preferably 30,000 or more, more preferably 40,000 or more, and still more preferably 50,000 or more, in order to show good film-forming properties by itself.
  • the weight average molecular weight is 10,000 or more, there is no possibility that the film forming property is reduced.
  • the weight-average molecular weight means a weight-average molecular weight measured by high-performance liquid chromatography (Shimadzu Corporation, CR4A) in terms of polystyrene.
  • the semiconductor adhesive may further contain (e) a flux agent which is a compound exhibiting flux activity (activity for removing oxides, impurities, and the like).
  • a flux agent which is a compound exhibiting flux activity (activity for removing oxides, impurities, and the like).
  • the flux agent include nitrogen-containing compounds having an unshared electron pair (imidazoles, amines, etc., except those contained in the component (c)), carboxylic acids, phenols, alcohols, and the like. Note that carboxylic acids exhibit stronger flux activity than alcohols, and are more likely to improve connectivity.
  • the content of the component (e) is preferably from 0.2 to 3% by mass, and more preferably from 0.4 to 1.8% by mass, based on the total solid content of the semiconductor adhesive. Is more preferable.
  • the semiconductor adhesive may further contain an ion trapper, an antioxidant, a silane coupling agent, a titanium coupling agent, a leveling agent, and the like. These may be used alone or in combination of two or more. What is necessary is just to adjust suitably these compounding quantities so that the effect of each additive may be exhibited.
  • the shear viscosity at 80 ° C. when the semiconductor adhesive is formed into a film is preferably 4500 to 14000 Pa ⁇ s, more preferably 5000 to 13000 Pa ⁇ s, and more preferably 5000 to 10000 Pa ⁇ s. More preferred.
  • the shear viscosity is 4500 Pa ⁇ s or more, generation of fillets can be sufficiently suppressed, or the amount of fillets can be sufficiently reduced.
  • the shear viscosity is 14000 Pa ⁇ s or less, the mountability at the time of assembling the semiconductor device can be improved.
  • the shear viscosity of the film-form semiconductor adhesive can be measured, for example, by using a dynamic shear viscoelasticity measuring device (trade name “ARES-G2” manufactured by TA Instruments Japan Co., Ltd.). It can be measured under the conditions of 10 ° C./min, a measurement temperature range of 30 ° C. to 145 ° C., and a frequency of 10 Hz.
  • the value of the viscosity at 80 ° C. of the viscosity value measured by the above method can be determined as the shear viscosity at 80 ° C. when the adhesive for a semiconductor is formed into a film.
  • the adhesive for semiconductors according to the present embodiment is preferably in the form of a film (film-like adhesive) from the viewpoint of improving productivity.
  • the method for producing the film adhesive will be described below.
  • component, (b) component, (c) component, (d) component, and other components as necessary are added to an organic solvent, and then dissolved or dispersed by stirring, mixing, kneading, or the like.
  • the organic solvent is reduced by heating, and the base film is removed.
  • a film adhesive may be formed on the wafer by a method of spin-coating a resin varnish on a wafer or the like to form a film, and then drying the solvent.
  • organic solvent used for preparing the resin varnish those having properties capable of uniformly dissolving or dispersing each component are preferable, for example, dimethylformamide, dimethylacetamide, N-methyl-2-pyrrolidone, dimethylsulfoxide, diethylene glycol dimethyl ether, Examples include toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, and ethyl acetate. These organic solvents can be used alone or in combination of two or more.
  • the stirring, mixing and kneading at the time of preparing the resin varnish can be performed using, for example, a stirrer, a raker, a three-roll, a ball mill, a bead mill or a homodisper.
  • the substrate film is not particularly limited as long as it has heat resistance enough to withstand the heating conditions when the organic solvent is volatilized, and polyester film, polypropylene film, polyethylene terephthalate film, polyimide film, polyetherimide film, polyether Ether naphthalate film, methylpentene film and the like can be mentioned.
  • the base film is not limited to a single layer made of one of these films, and may be a multilayer film made of two or more films.
  • the thickness of the film in the film adhesive according to the present embodiment is preferably from 10 to 100 ⁇ m, and more preferably from 20 to 50 ⁇ m, from the viewpoint of visibility, fluidity, and filling property.
  • the semiconductor adhesive according to the present embodiment is preferably used for a semiconductor device, and a semiconductor device in which electrodes of respective connection portions of a semiconductor chip and a wiring circuit board are electrically connected to each other, or a plurality of semiconductor chips.
  • a semiconductor device in which electrodes of respective connection portions are electrically connected to each other it is particularly suitably used for sealing the connection portions.
  • the electrodes of the connection portion in the semiconductor device may be either a metal joint between the bump and the wiring or a metal joint between the bump and the bump.
  • flip-chip connection for obtaining electrical connection via a semiconductor adhesive may be used.
  • FIG. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device (COB-type connection between a semiconductor chip and a substrate).
  • the first semiconductor device 100 is arranged on a semiconductor chip 10 and a substrate (wiring circuit board) 20 facing each other, and on a surface of the semiconductor chip 10 and the substrate 20 facing each other.
  • the semiconductor chip 10 and the substrate 20 are flip-chip connected by the wiring 15 and the connection bump 30.
  • the wiring 15 and the connection bump 30 are sealed with an adhesive material 40 and are shielded from an external environment.
  • the adhesive material 40 is a cured product of the semiconductor adhesive of the present embodiment.
  • the second semiconductor device 200 is disposed on the semiconductor chip 10 and the substrate (wiring circuit substrate) 20 facing each other, and on the surfaces of the semiconductor chip 10 and the substrate 20 facing each other. And a bonding material 40 that fills the gap between the semiconductor chip 10 and the substrate 20 without any gap.
  • the semiconductor chip 10 and the substrate 20 are flip-chip connected by connecting the opposing bumps 32 to each other.
  • the bump 32 is sealed with an adhesive material 40 and is shielded from an external environment.
  • FIG. 2 is a schematic sectional view showing another embodiment of the semiconductor device (COC type connection between semiconductor chips).
  • the third semiconductor device 300 is the same as the first semiconductor device 100 except that two semiconductor chips 10 are flip-chip connected by wirings 15 and connection bumps 30. It is.
  • the fourth semiconductor device 400 is similar to the second semiconductor device 200 except that two semiconductor chips 10 are flip-chip connected by bumps 32.
  • the semiconductor chip 10 is not particularly limited, and various semiconductors such as element semiconductors composed of the same kind of elements such as silicon and germanium, and compound semiconductors such as gallium / arsenic and indium / phosphorus can be used.
  • the substrate 20 is not particularly limited as long as it is a printed circuit board, and is formed on the surface of an insulating substrate mainly composed of glass epoxy resin, polyimide resin, polyester resin, ceramic, epoxy resin, bismaleimide triazine resin and the like.
  • a circuit board or the like on which a conductive material is printed to form a wiring (wiring pattern) can be used.
  • Connections such as the wiring 15 and the bumps 32 are mainly composed of gold, silver, copper, solder (for example, tin-silver, tin-lead, tin-bismuth, tin-copper), nickel, tin, lead, etc. And may contain a plurality of metals.
  • a metal layer may be formed. This metal layer may be composed of only a single component, or may be composed of a plurality of components. Further, a structure in which a plurality of metal layers are stacked may be employed. Copper and solder are generally used because they are inexpensive. Since copper and solder contain oxides and impurities, the semiconductor adhesive preferably has flux activity.
  • the material of the conductive protrusions called bumps is mainly composed of gold, silver, copper, solder (for example, tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. And may be composed of only a single component, or may be composed of a plurality of components. Further, these metals may be formed so as to form a laminated structure.
  • the bump may be formed on a semiconductor chip or a substrate. Copper and solder are generally used because they are inexpensive. Since copper and solder contain oxides and impurities, the semiconductor adhesive preferably has flux activity.
  • a semiconductor device as shown in FIG. 1 or FIG. 2 is laminated, and gold, silver, copper, solder (for example, tin-silver, tin-lead, tin-bismuth, tin-copper), You may electrically connect with tin, nickel, etc.
  • an adhesive may be flip-chip connected or laminated between semiconductor chips to form a hole penetrating the semiconductor chip and connect to the electrode on the pattern surface.
  • FIG. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device (semiconductor chip stacked type (TSV)).
  • TSV semiconductor chip stacked type
  • the wiring 15 formed on the interposer 50 is connected to the wiring 15 of the semiconductor chip 10 via the connection bumps 30, so that the semiconductor chip 10 and the interposer 50 are connected. Is flip-chip connected.
  • the gap between the semiconductor chip 10 and the interposer 50 is filled with the adhesive material 40 without any gap.
  • the semiconductor chip 10 is repeatedly laminated via the wiring 15, the connection bump 30, and the adhesive material 40.
  • the wirings 15 on the pattern surface on the front and back sides of the semiconductor chip 10 are connected to each other by through electrodes 34 filled in holes passing through the inside of the semiconductor chip 10.
  • the material of the through electrode 34 may be copper, aluminum, or the like.
  • the semiconductor adhesive according to the present embodiment is suitably used as a sealing material between the opposing semiconductor chips 10 or between the semiconductor chip 10 and the interposer 50.
  • a semiconductor chip and a wiring circuit board or a plurality of semiconductor chips are connected to each other using the semiconductor adhesive according to the present embodiment.
  • the method of manufacturing a semiconductor device according to the present embodiment includes, for example, connecting a semiconductor chip and a wiring circuit board to each other via a semiconductor adhesive and electrically connecting respective connection portions of the semiconductor chip and the wiring circuit board to each other. Obtaining a semiconductor device by connecting the plurality of semiconductor chips to each other via a semiconductor adhesive and electrically connecting respective connection portions of the plurality of semiconductor chips to each other to obtain a semiconductor device.
  • connection portions can be connected to each other by metal bonding. That is, the connection portions of the semiconductor chip and the printed circuit board are connected to each other by metal bonding, or the connection portions of the plurality of semiconductor chips are connected to each other by metal bonding.
  • a method of manufacturing the sixth semiconductor device 600 shown in FIG. 4 will be described.
  • a substrate for example, a glass epoxy substrate
  • a semiconductor chip 10 having a wiring (for example, copper pillar, copper post) 15 are bonded to each other via an adhesive material 40. It is connected.
  • the wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are electrically connected by connection bumps (solder bumps) 30.
  • the solder resist 70 is arranged on the surface of the substrate 60 where the wiring 15 is formed, except for the position where the connection bump 30 is formed.
  • a semiconductor adhesive such as a film adhesive
  • the sticking can be performed by heating press, roll lamination, vacuum lamination, or the like.
  • the supply area and the thickness of the semiconductor adhesive are appropriately set according to the size of the semiconductor chip 10 or the substrate 60, the bump height, and the like.
  • the semiconductor adhesive may be adhered to the semiconductor chip 10.
  • the semiconductor adhesive may be adhered to the semiconductor wafer, and the semiconductor chip 10 may be diced into individual semiconductor chips 10. May be produced.
  • the adhesive can be applied not only on the semiconductor wafer (semiconductor chip) but also on the substrate. It is not restricted and has excellent handling properties.
  • connection bumps 30 on the wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are aligned using a connection device such as a flip chip bonder. . Then, the semiconductor chip 10 and the substrate 60 are pressed while being heated at a temperature equal to or higher than the melting point of the connection bump 30 (when solder is used for the connection portion, it is preferably applied to the solder portion at 240 ° C. or higher). At the same time, the semiconductor adhesive is cured, and the gap between the semiconductor chip 10 and the substrate 60 is sealed and filled with the adhesive material 40 made of a cured product of the semiconductor adhesive.
  • connection load depends on the number of bumps, but is set in consideration of bump height variation absorption, control of the amount of bump deformation, and the like.
  • the connection time is preferably short from the viewpoint of improving productivity. It is preferable that the solder is melted, an oxide film, impurities on the surface and the like are removed, and a metal joint is formed at the connection portion.
  • the short connection time means that the time required for the connection portion to be 240 ° C. or more (for example, the time when solder is used) is 10 seconds or less during the connection formation (final pressure bonding).
  • the connection time is preferably 5 seconds or less, more preferably 3 seconds or less.
  • the semiconductor chip and the substrate are temporarily fixed after alignment (in a state in which the semiconductor adhesive is interposed), and are heated in a reflow furnace to melt the solder bumps, thereby bonding the semiconductor chip and the substrate.
  • the semiconductor device may be manufactured by connecting. Temporary fixing does not require a significant need to form a metal bond, so that a lower load, a shorter time, and a lower temperature may be used as compared to the above-described full pressure bonding, and advantages such as improved productivity and prevention of deterioration of the connection portion are generated. .
  • heat treatment may be performed in an oven or the like to further cure the semiconductor adhesive.
  • the heating temperature is a temperature at which the curing of the semiconductor adhesive proceeds, and is preferably substantially complete. The heating temperature and the heating time may be set as appropriate.
  • the method for manufacturing a semiconductor device includes a semiconductor chip, a substrate, another semiconductor chip, or a semiconductor wafer including a portion corresponding to another semiconductor chip, and a semiconductor adhesive disposed therebetween. (Film adhesive), and sandwiching the laminate, in which the connection portion of the semiconductor chip and the connection portion of the substrate or another semiconductor chip are arranged to face each other, between a pair of opposing temporary pressure-pressing pressing members. Heating and pressurizing, thereby temporarily bonding a substrate, another semiconductor chip or a semiconductor wafer to the semiconductor chip (temporary pressure bonding step), and connecting a connection portion of the semiconductor chip and a connection portion of the substrate or another semiconductor chip to a metal. And a step of electrically connecting by bonding (final pressure bonding step).
  • At least one of the pair of temporary pressing members used in the temporary pressing step, when heating and pressing the laminate, is formed of a metal material forming a surface of a connection portion of the semiconductor chip.
  • the substrate is heated to a temperature lower than the melting point and the melting point of the metal material forming the surface of the connection portion of the substrate or other semiconductor chip.
  • the laminate has a melting point of the metal material forming the surface of the connection portion of the semiconductor chip or the melting point of the metal material forming the surface of the connection portion of the substrate or another semiconductor chip. Heating is performed to at least one of the melting points or more.
  • the final pressure bonding step can be performed, for example, by the following method.
  • the laminated body is heated and pressed by sandwiching it between a pair of opposing pressing members, which are prepared separately from the temporary pressing member, thereby connecting the connection portion of the semiconductor chip to the substrate or another semiconductor chip.
  • the parts are electrically connected by metal bonding.
  • at least one of the pair of pressure-bonding pressing members when heating and pressing the laminate, the melting point of the metal material forming the surface of the connection portion of the semiconductor chip, or the substrate or other semiconductor chip.
  • the heating is performed to a temperature equal to or higher than at least one of the melting points of the metal material forming the surface of the connection portion.
  • the step of temporarily press-bonding at a temperature lower than the melting point of the metal material forming the surface of the connection portion, and the final press-bonding at a temperature equal to or higher than the melting point of the metal material forming the surface of the connection portion By performing the process and the pressing using different pressing members for pressing, the time required for heating and cooling each pressing member for pressing can be reduced. Therefore, a semiconductor device can be manufactured with higher productivity in a shorter time than when crimping is performed with one crimping pressing member. As a result, many highly reliable semiconductor devices can be manufactured in a short time. Connections can be made collectively in the final pressure bonding step.
  • a pressure bonding head facing a stage and a batch connection sheet arranged so as to cover the plurality of laminates or a plurality of semiconductor chips, a semiconductor wafer, and a laminate having an adhesive disposed on the stage By heating and pressurizing the plurality of stacked bodies at once, the connection portion of the semiconductor chip and the connection portion of the substrate or another semiconductor chip are electrically connected by metal bonding.
  • at least one of the stage and the pressure bonding head is formed of the melting point of the metal material forming the surface of the connection portion of the semiconductor chip, or of the metal material forming the surface of the connection portion of the substrate or another semiconductor chip.
  • the heating is performed to a temperature equal to or higher than at least one of the melting points.
  • the ratio of semiconductor devices having poor connection can be reduced.
  • the raw material of the sheet for collective connection is not particularly limited, for example, polytetrafluoroethylene resin, polyimide resin, phenoxy resin, epoxy resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, poly Examples include an ether sulfone resin, a polyetherimide resin, a polyvinyl acetal resin, a urethane resin, and an acrylic rubber.
  • the sheet for collective connection is selected from a polytetrafluoroethylene resin, a polyimide resin, an epoxy resin, a phenoxy resin, an acrylic resin, an acrylic rubber, a cyanate ester resin, and a polycarbodiimide resin from the viewpoint of excellent heat resistance and film formability.
  • the resin for the sheet for collective connection is a sheet containing at least one resin selected from polytetrafluoroethylene resin, polyimide resin, phenoxy resin, acrylic resin and acrylic rubber, from the viewpoint of particularly excellent heat resistance and film formability. There may be. These resins can be used alone or in combination of two or more.
  • the laminated body is heated in a heating furnace or on a hot plate, and the melting point of the metal material forming the surface of the connection portion of the semiconductor chip, or the melting point of the metal material forming the surface of the connection portion of the substrate or another semiconductor chip. Heat to a temperature that is at least one of the melting points.
  • the time required for heating and cooling of the pressing member for provisional pressure bonding can be reduced by separately performing the provisional pressure bonding step and the main pressure bonding step. Therefore, a semiconductor device can be manufactured with higher productivity in a shorter time than when crimping is performed with one crimping pressing member. As a result, many highly reliable semiconductor devices can be manufactured in a short time. Further, in the above method, a plurality of laminates may be heated collectively in a heating furnace or on a hot plate. Thereby, a semiconductor device can be manufactured with higher productivity.
  • the plurality of temporarily-pressed laminates can be fully press-bonded collectively.
  • the one subjected to temporary compression bonding first and the one subjected to temporary compression bonding last do not vary in quality after the final compression bonding. That is, since the first pre-compressed product is held in the pre-compressed state longer than the last pre-compressed product, the semiconductor adhesive used has a viscosity from the beginning to the end of the pre-compression process. It is required that the increase hardly occurs.
  • the adhesive for semiconductors (film-like adhesive) according to the present embodiment can suppress the increase in viscosity over time, and thus can satisfy the above requirements and can be suitably used in the above manufacturing method.
  • the compounds used in each of the examples and comparative examples are as follows.
  • Example 1 ⁇ Preparation of film adhesive> (Example 1) 12.4 g of epoxy resin “EP1032”, 0.72 g of “YL7175”, 0.9 g of curing agent “2MAOK”, 1.2 g of glutaric acid, 33.9 g of inorganic filler “SE nanosilica”, 6.0 g of acrylic resin “LA4285”, And cyclohexanone (the amount of the solid content in the resin varnish becomes 49% by mass) is charged, and zirconia beads having a diameter of 1.0 mm are added in the same mass as the solid content, and a bead mill (Fritsch Japan K.K. The mixture was stirred for 30 minutes at P-7). Thereafter, the zirconia beads used for stirring were removed by filtration to obtain a resin varnish.
  • the obtained resin varnish is coated on a base film (manufactured by Teijin Dupont Film Co., Ltd., trade name "Purex A54") using a small precision coating apparatus (manufactured by Yasui Seiki Co., Ltd.), and the coated resin is coated.
  • the varnish was dried (100 ° C./5 minutes) in a clean oven (manufactured by Espec Corporation) to obtain a film adhesive.
  • the thickness was made 0.02 mm.
  • Example 2 A film-like adhesive was produced in the same manner as in Example 1, except that the amount of the inorganic filler “SE nanosilica” was reduced to 17 g and the amount of the inorganic filler “YA nanosilica” was added 17 g.
  • Example 1 A film-like adhesive was produced in the same manner as in Example 1 except that the inorganic filler “SE nanosilica” was eliminated and 33.9 g of the inorganic filler “YA nanosilica” was added.
  • Table 1 shows the compositions (unit: g) of Examples 1 and 2 and Comparative Example 1 collectively.
  • the shear viscosity of the obtained measurement sample was measured by a dynamic shear viscoelasticity measuring device (trade name “ARES-G2” manufactured by TA Instruments Japan Co., Ltd.). . The measurement was performed at a heating rate of 10 ° C./min, a measuring temperature range of 30 ° C. to 145 ° C., and a frequency of 10 Hz, and the viscosity at 80 ° C. was read. In the same manner, the shear viscosity of the measurement sample left at room temperature (23 ° C., 50% RH) for 4 weeks was measured. Table 2 shows the measurement results of shear viscosity before and after standing at room temperature and the rate of increase in viscosity before and after standing at room temperature.
  • the viscosity of the film adhesives of Examples 1 and 2 in which the surface-treated inorganic filler having a glycidyl group accounts for 50% by mass or more of the entire inorganic filler is increased before and after being left at room temperature.
  • the rate was 20% or less, and it was confirmed that the increase in viscosity over time was suppressed.
  • the increase in viscosity with time is suppressed, and therefore, the mounting property at the time of assembling the semiconductor device hardly deteriorates with time.
  • SYMBOLS 10 Semiconductor chip, 15 ... Wiring, 20, 60 ... Substrate, 30 ... Connection bump, 32 ... Bump, 34 ... Through electrode, 40 ... Adhesive material, 50 ... Interposer, 70 ... Solder resist, 100, 200, 300, 400 , 500, 600 ... semiconductor devices.

Abstract

An adhesive for semiconductors, which contains (a) an inorganic filler, and which is configured such that the inorganic filler (a) contains 50% by mass or more of a surface-treated inorganic filler that has a glycidyl group based on the total amount of the inorganic filler (a).

Description

半導体用接着剤、半導体装置の製造方法及び半導体装置Semiconductor adhesive, method of manufacturing semiconductor device, and semiconductor device
 本開示は、半導体用接着剤、半導体装置の製造方法、及び半導体装置に関する。 The present disclosure relates to a semiconductor adhesive, a method for manufacturing a semiconductor device, and a semiconductor device.
 従来、半導体チップと基板とを接続するには金ワイヤ等の金属細線を用いるワイヤーボンディング方式が広く適用されている。一方、半導体装置に対する高機能化、高集積化、高速化等の要求に対応するため、半導体チップ又は基板にバンプと呼ばれる導電性突起を形成して、半導体チップと基板とを直接接続するフリップチップ接続方式(FC接続方式)が広まりつつある。 Conventionally, a wire bonding method using a thin metal wire such as a gold wire has been widely applied for connecting a semiconductor chip and a substrate. On the other hand, in order to respond to demands for higher functionality, higher integration, higher speed, etc. for semiconductor devices, flip chips that directly connect the semiconductor chip and the substrate by forming conductive protrusions called bumps on the semiconductor chip or the substrate. The connection method (FC connection method) is spreading.
 FC接続方式としては、はんだ、スズ、金、銀、銅等を用いて接続部を金属接合させる方法、超音波振動を印加して接続部を金属接合させる方法、樹脂の収縮力によって機械的接触を保持する方法などが知られている。接続部の信頼性の観点から、はんだ、スズ、金、銀、銅等を用いて接続部を金属接合させる方法が一般的である。 As the FC connection method, a method of bonding a connection to a metal using solder, tin, gold, silver, copper, etc., a method of bonding a connection to a metal by applying ultrasonic vibration, and a mechanical contact by a contraction force of a resin Are known. From the viewpoint of the reliability of the connection portion, a method of metal-joining the connection portion using solder, tin, gold, silver, copper, or the like is generally used.
 例えば、半導体チップ及び基板間の接続に関して、BGA(Ball Grid Array)、CSP(Chip Size Package)等に盛んに用いられているCOB(Chip On Board)型の接続方式もFC接続方式に該当する。また、FC接続方式は、半導体チップ上に接続部(バンプ又は配線)を形成して、半導体チップ間を接続するCOC(Chip On Chip)型、及び、半導体ウエハ上に接続部(バンプ又は配線)を形成して、半導体チップと半導体ウエハ間を接続するCOW(Chip On Wafer)型の接続方式にも広く用いられている(例えば、特許文献1参照)。 For example, regarding the connection between the semiconductor chip and the substrate, a COB (Chip On Board) type connection system which is frequently used in BGA (Ball Grid Array), CSP (Chip Size Package) and the like also corresponds to the FC connection system. In the FC connection method, a connection section (bump or wiring) is formed on a semiconductor chip to connect between semiconductor chips, and a connection section (bump or wiring) is formed on a semiconductor wafer. Is widely used also in a COW (Chip \ On \ Wafer) type connection method for connecting a semiconductor chip and a semiconductor wafer (for example, see Patent Document 1).
 また、さらなる小型化、薄型化、高機能化が強く要求されるパッケージでは、上述した接続方式を積層・多段化したチップスタック型パッケージ、POP(Package On Package)、TSV(Through-Silicon Via)等も広く普及し始めている。このような積層・多段化技術は、半導体チップ等を三次元的に配置することから、二次元的に配置する手法と比較してパッケージを小さくできる。また、このような積層・多段化技術は、半導体の性能向上、ノイズ低減、実装面積の削減、省電力化にも有効であることから、次世代の半導体配線技術として注目されている。 Further, for packages that are strongly required to be further miniaturized, thinned, and highly functional, chip stack type packages in which the above-described connection methods are stacked and multi-staged, POP (Package On Package), TSV (Through-Silicon Via), and the like. Has also begun to spread widely. In such a stacking / multi-stage technique, since semiconductor chips and the like are arranged three-dimensionally, the size of the package can be reduced as compared with a technique of arranging two-dimensionally. In addition, such a stacking / multi-stage technology is effective in improving the performance of semiconductors, reducing noise, reducing the mounting area, and saving power, and thus has attracted attention as a next-generation semiconductor wiring technology.
特開2016-102165号公報JP 2016-102165 A
 高機能化、高集積化、低コスト化が進んでいるフリップチップパッケージは、今後さらなる用途拡大とそれに伴う生産量拡大が見込まれる。フリップチップパッケージの持続的な大量生産には、それに用いる半導体用接着剤の持続的な供給が必須であり、そのためには、この半導体用接着剤が経時安定性に優れていることが求められている。半導体用接着剤の経時安定性が悪いと、室温に放置される間に半導体用接着剤の粘度が増加し、半導体装置組み立て時の実装性悪化の懸念がある。 フ Flip-chip packages, which are becoming more sophisticated, highly integrated, and cost-effective, are expected to expand their applications and production volume in the future. Sustained mass production of flip-chip packages requires the continuous supply of semiconductor adhesives used for them. For this reason, semiconductor adhesives must have excellent stability over time. I have. If the stability over time of the adhesive for semiconductors is poor, the viscosity of the adhesive for semiconductors increases while being left at room temperature, and there is a concern that the mountability at the time of assembling the semiconductor device may deteriorate.
 そこで、本開示は、室温放置後の粘度増加を抑制することができ、経時的に半導体装置組み立て時の実装性悪化が生じ難い半導体用接着剤、並びに、それを用いた半導体装置の製造方法及び半導体装置を提供することを目的とする。 Therefore, the present disclosure is capable of suppressing an increase in viscosity after being left at room temperature, and is unlikely to cause deterioration in mountability when assembling a semiconductor device over time, and a method of manufacturing a semiconductor device using the same. It is an object to provide a semiconductor device.
 上記目的を達成するために、本開示は、(a)無機フィラーを含有し、上記(a)無機フィラーが、グリシジル基を有する表面処理が施された無機フィラーを、上記(a)無機フィラー全量を基準として50質量%以上含む、半導体用接着剤を提供する。上記半導体用接着剤によれば、(a)無機フィラー全体のうちの50質量%以上をグリシジル基を有する表面処理が施された無機フィラーとすることで、室温放置中の吸湿による水分の影響で粘度が増加することを抑制することができる。例えば、メタクリル基を有する表面処理等の他の表面処理が施された無機フィラーの場合、表面処理剤と水分とが水素結合を形成して粘度増加が生じやすいが、グリシジル基を有する表面処理が施された無機フィラーの場合には、水分と水素結合が形成され難く、粘度上昇が生じ難い。そして、上記半導体用接着剤によれば、室温放置後の粘度増加を抑制することができるため、経時的に半導体装置組み立て時の実装性悪化が生じることを抑制することができる。また、無機フィラーにグリシジル基を有する表面処理が施されていることで、半導体用接着剤中での分散性に優れ、半導体用接着剤は良好な接着力及び良好な絶縁信頼性を得ることができる。 In order to achieve the above object, the present disclosure provides (a) an inorganic filler, wherein the (a) inorganic filler is a surface-treated inorganic filler having a glycidyl group, and the (a) inorganic filler as a whole. And a semiconductor adhesive containing 50% by mass or more based on the above. According to the adhesive for semiconductors described above, (a) 50% by mass or more of the entire inorganic filler is a surface-treated inorganic filler having a glycidyl group. An increase in viscosity can be suppressed. For example, in the case of an inorganic filler that has been subjected to another surface treatment such as a surface treatment having a methacryl group, the surface treatment agent and moisture easily form a hydrogen bond to increase the viscosity, but the surface treatment having a glycidyl group is difficult. In the case of the applied inorganic filler, it is difficult for hydrogen bonds to be formed with water and the viscosity is unlikely to increase. According to the semiconductor adhesive, an increase in viscosity after standing at room temperature can be suppressed, so that it is possible to suppress the deterioration of the mountability when assembling the semiconductor device over time. In addition, since the inorganic filler is subjected to a surface treatment having a glycidyl group, the inorganic filler has excellent dispersibility in the adhesive for semiconductors, and the adhesive for semiconductors can obtain good adhesive strength and good insulation reliability. it can.
 上記半導体用接着剤は、(b)エポキシ樹脂、(c)硬化剤、及び、(d)重量平均分子量10000以上の高分子量成分を更に含有していてもよい。また、上記半導体用接着剤は、(e)フラックス剤を更に含有していてもよい。 The semiconductor adhesive may further contain (b) an epoxy resin, (c) a curing agent, and (d) a high molecular weight component having a weight average molecular weight of 10,000 or more. Further, the semiconductor adhesive may further contain (e) a flux agent.
 上記半導体用接着剤は、フィルム状であってもよい。この場合、半導体用接着剤の取り扱い性を向上させることができ、パッケージ製造時の作業性及び生産性を向上させることができる。 The semiconductor adhesive may be in the form of a film. In this case, the handleability of the semiconductor adhesive can be improved, and the workability and productivity during package manufacturing can be improved.
 本開示はまた、半導体チップ及び配線回路基板のそれぞれの接続部が互いに電気的に接続された半導体装置、又は、複数の半導体チップのそれぞれの接続部が互いに電気的に接続された半導体装置の製造方法であって、上記接続部の少なくとも一部を、上記半導体用接着剤を用いて封止する工程を備える、半導体装置の製造方法を提供する。上記製造方法によれば、使用する半導体用接着剤が経時的に粘度増加し難いものであるため、安定して良好な実装性を得ることができる。 The present disclosure also provides a method of manufacturing a semiconductor device in which connection portions of a semiconductor chip and a printed circuit board are electrically connected to each other, or a semiconductor device in which connection portions of a plurality of semiconductor chips are electrically connected to each other. A method for manufacturing a semiconductor device, comprising: a step of sealing at least a part of the connection portion with the semiconductor adhesive. According to the above-mentioned manufacturing method, since the adhesive for semiconductor used is hard to increase in viscosity with time, good mounting performance can be obtained stably.
 本開示は更に、半導体チップ及び配線回路基板のそれぞれの接続部が互いに電気的に接続された接続構造、又は、複数の半導体チップのそれぞれの接続部が互いに電気的に接続された接続構造と、上記接続部の少なくとも一部を封止する接着材料と、を備え、上記接着材料は、上記半導体用接着剤の硬化物からなる、半導体装置を提供する。上記半導体装置は、実装性が良好であり、半導体チップと配線回路基板又は半導体チップとの間の接着力及び信頼性が優れたものとなる。 The present disclosure further includes a connection structure in which connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other, or a connection structure in which connection portions of a plurality of semiconductor chips are electrically connected to each other, An adhesive material for sealing at least a part of the connection portion, wherein the adhesive material is made of a cured product of the semiconductor adhesive. The above-described semiconductor device has good mountability, and has excellent adhesion and reliability between the semiconductor chip and the printed circuit board or the semiconductor chip.
 本開示によれば、室温放置後の粘度増加を抑制することができ、経時的に半導体装置組み立て時の実装性悪化が生じ難い半導体用接着剤、並びに、それを用いた半導体装置の製造方法及び半導体装置を提供することができる。 ADVANTAGE OF THE INVENTION According to this indication, the adhesive agent for semiconductors which can suppress the viscosity increase after leaving room temperature, and which hardly causes the deterioration of mountability at the time of assembling a semiconductor device over time, a method of manufacturing a semiconductor device using the same, and A semiconductor device can be provided.
本開示の半導体装置の一実施形態を示す模式断面図である。1 is a schematic cross-sectional view illustrating an embodiment of a semiconductor device according to the present disclosure. 本開示の半導体装置の他の一実施形態を示す模式断面図である。FIG. 4 is a schematic cross-sectional view illustrating another embodiment of the semiconductor device of the present disclosure. 本開示の半導体装置の他の一実施形態を示す模式断面図である。FIG. 4 is a schematic cross-sectional view illustrating another embodiment of the semiconductor device of the present disclosure. 本開示の半導体装置の他の一実施形態を示す模式断面図である。FIG. 4 is a schematic cross-sectional view illustrating another embodiment of the semiconductor device of the present disclosure.
 以下、場合により図面を参照しつつ本開示の好適な実施形態について詳細に説明する。なお、図面中、同一又は相当部分には同一符号を付し、重複する説明は省略する。また、上下左右等の位置関係は、特に断らない限り、図面に示す位置関係に基づくものとする。さらに、図面の寸法比率は図示の比率に限られるものではない。 Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the drawings as necessary. In the drawings, the same or corresponding parts have the same reference characters allotted, and overlapping description will be omitted. Unless otherwise specified, the positional relationship such as up, down, left, and right is based on the positional relationship shown in the drawings. Further, the dimensional ratios in the drawings are not limited to the illustrated ratios.
 本明細書において、「~」を用いて示された数値範囲は、「~」の前後に記載される数値をそれぞれ最小値及び最大値として含む範囲を示す。本明細書に段階的に記載されている数値範囲において、ある段階の数値範囲の上限値又は下限値は、他の段階の数値範囲の上限値又は下限値と任意に組み合わせることができる。本明細書に記載されている数値範囲において、その数値範囲の上限値又は下限値は、実施例に示されている値に置き換えてもよい。「A又はB」とは、A及びBのどちらか一方を含んでいればよく、両方とも含んでいてもよい。本明細書に例示する材料は、特に断らない限り、1種を単独で又は2種以上を組み合わせて用いることができる。本明細書において、「(メタ)アクリル」とは、アクリル又はそれに対応するメタクリルを意味する。 に お い て In this specification, a numerical range indicated by using “to” indicates a range including numerical values described before and after “to” as a minimum value and a maximum value, respectively. In the numerical ranges described stepwise in this specification, the upper limit or the lower limit of a numerical range in one step can be arbitrarily combined with the upper limit or the lower limit of a numerical range in another step. In the numerical ranges described in this specification, the upper limit or the lower limit of the numerical range may be replaced with the value shown in the embodiment. “A or B” may include one of A and B, and may include both. The materials exemplified in the present specification can be used alone or in combination of two or more, unless otherwise specified. In the present specification, “(meth) acryl” means acryl or methacryl corresponding thereto.
<半導体用接着剤>
 本実施形態に係る半導体用接着剤は、(a)無機フィラー(以下、場合により「(a)成分」という。)を含有する。上記(a)無機フィラーは、グリシジル基を有する表面処理が施された無機フィラーを、(a)無機フィラー全量を基準として50質量%以上含む。また、本実施形態に係る半導体用接着剤は、(b)エポキシ樹脂(以下、場合により「(b)成分」という。)、(c)硬化剤(以下、場合により「(c)成分」という。)、及び、(d)重量平均分子量10000以上の高分子量成分(以下、場合により「(d)成分」という。)のうちの1種以上を含有していてもよい。更に、本実施形態に係る半導体用接着剤は、(e)フラックス剤(以下、場合により「(e)成分」という。)を含有していてもよい。以下、各成分について説明する。
<Semiconductor adhesive>
The semiconductor adhesive according to the present embodiment contains (a) an inorganic filler (hereinafter sometimes referred to as “component (a)”). The (a) inorganic filler contains 50% by mass or more of an inorganic filler having a glycidyl group and subjected to a surface treatment, based on the total amount of the (a) inorganic filler. The semiconductor adhesive according to the present embodiment includes (b) an epoxy resin (hereinafter, sometimes referred to as “component (b)”) and (c) a curing agent (hereinafter, sometimes referred to as “component (c)”). ) And (d) one or more of high molecular weight components having a weight average molecular weight of 10,000 or more (hereinafter, sometimes referred to as “component (d)”). Furthermore, the semiconductor adhesive according to the present embodiment may contain (e) a fluxing agent (hereinafter, sometimes referred to as “component (e)”). Hereinafter, each component will be described.
((a)成分:無機フィラー)
 (a)成分の無機フィラーとしては、絶縁性無機フィラー等が挙げられる。中でも、平均粒径100nm以下の無機フィラーであればより好ましい。絶縁性無機フィラーの材質としては、ガラス、シリカ、アルミナ、シリカ・アルミナ、酸化チタン、マイカ、窒化ホウ素等が挙げられ、その中でも、シリカ、アルミナ、シリカ・アルミナ、酸化チタン、窒化ホウ素が好ましく、シリカ、アルミナ、窒化ホウ素がより好ましい。絶縁性無機フィラーは、ウィスカーであってもよく、ウィスカーの材質としては、ホウ酸アルミニウム、チタン酸アルミニウム、酸化亜鉛、珪酸カルシウム、硫酸マグネシウム、窒化ホウ素等が挙げられる。絶縁性無機フィラーは、1種単独で又は2種以上を組み合わせて用いることができる。
((A) component: inorganic filler)
Examples of the inorganic filler as the component (a) include an insulating inorganic filler. Among them, an inorganic filler having an average particle diameter of 100 nm or less is more preferable. Examples of the material of the insulating inorganic filler include glass, silica, alumina, silica / alumina, titanium oxide, mica, and boron nitride, among which silica, alumina, silica / alumina, titanium oxide, and boron nitride are preferable. Silica, alumina and boron nitride are more preferred. The insulating inorganic filler may be a whisker, and examples of the material of the whisker include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride. The insulating inorganic filler can be used alone or in combination of two or more.
 分散性及び接着力向上の観点から、(a)成分は表面処理フィラーであることが好ましい。表面処理としては、グリシジル系(エポキシ系)、アミン系、フェニル系、フェニルアミノ系、アクリル系、ビニル系等が挙げられる。 成分 From the viewpoint of improving dispersibility and adhesive strength, the component (a) is preferably a surface-treated filler. Examples of the surface treatment include glycidyl (epoxy), amine, phenyl, phenylamino, acryl, vinyl, and the like.
 表面処理としては、表面処理のしやすさから、エポキシシラン系、アミノシラン系、アクリルシラン系等のシラン化合物によるシラン処理が好ましい。表面処理剤としては、分散性及び流動性に優れ、接着力を更に向上させる観点から、グリシジル系、フェニルアミノ系、(メタ)アクリル系の化合物が好ましい。表面処理剤としては、室温放置後の半導体用接着剤の粘度増加を抑制する観点から、グリシジル系の化合物が好ましい。 As the surface treatment, a silane treatment with a silane compound such as an epoxy silane type, an amino silane type or an acryl silane type is preferable from the viewpoint of easy surface treatment. As the surface treatment agent, glycidyl-based, phenylamino-based, and (meth) acryl-based compounds are preferable from the viewpoint of excellent dispersibility and fluidity and further improving the adhesive strength. As the surface treatment agent, a glycidyl-based compound is preferable from the viewpoint of suppressing an increase in the viscosity of the semiconductor adhesive after standing at room temperature.
 本実施形態において、(a)成分は、グリシジル基を有する表面処理が施された無機フィラーを、(a)成分全量を基準として50質量%以上含む。グリシジル基を有する表面処理は、表面処理剤として下記一般式(1)で表される構造を有するグリシジル系の化合物を用いて施すことができる。これにより、無機フィラーは、表面に下記一般式(1)で表される構造を有するものとなる。 In the present embodiment, the component (a) contains 50% by mass or more of a surface-treated inorganic filler having a glycidyl group, based on the total amount of the component (a). The surface treatment having a glycidyl group can be performed using a glycidyl-based compound having a structure represented by the following general formula (1) as a surface treatment agent. Thus, the surface of the inorganic filler has a structure represented by the following general formula (1).
Figure JPOXMLDOC01-appb-C000001
 式中、Rは2価の有機基を示す。
Figure JPOXMLDOC01-appb-C000001
In the formula, R represents a divalent organic group.
 グリシジル基を有する表面処理が施された無機フィラーの含有量は、(a)成分全量を基準として50質量%以上であり、室温放置後の半導体用接着剤の粘度増加をより抑制する観点から、60質量%以上であることが好ましく、80質量%以上であることがより好ましい。(a)成分の全量(100質量%)が、グリシジル基を有する表面処理が施された無機フィラーであってもよい。 The content of the inorganic filler subjected to the surface treatment having a glycidyl group is 50% by mass or more based on the total amount of the component (a), and from the viewpoint of further suppressing the increase in the viscosity of the semiconductor adhesive after standing at room temperature, It is preferably at least 60% by mass, more preferably at least 80% by mass. The entire amount (100% by mass) of the component (a) may be a surface-treated inorganic filler having a glycidyl group.
 (a)成分の平均粒径は、視認性(透明性)向上の観点から、100nm以下であると好ましく、60nm以下であることがより好ましい。(a)成分の平均粒径は、レーザ回折式粒度分布計により測定することができる。 From the viewpoint of improving the visibility (transparency), the average particle diameter of the component (a) is preferably 100 nm or less, and more preferably 60 nm or less. The average particle size of the component (a) can be measured by a laser diffraction type particle size distribution meter.
 また、(a)成分の平均粒径が100nmを超えると、粒径が大きいことに起因して半導体用接着剤の粘度が低くなり過ぎる場合があり、半導体チップの実装後にフィレットと呼ばれるチップ外への樹脂のはみ出しが発生しやすくなる場合がある。これに対し、(a)成分の平均粒径が100nm以下であると、半導体用接着剤の粘度を好ましい範囲に調整しやすく、フィレットの発生を十分に抑制する、又は、フィレット量を十分に低減することができる。 If the average particle size of the component (a) exceeds 100 nm, the viscosity of the semiconductor adhesive may become too low due to the large particle size, and the semiconductor adhesive may be mounted outside a chip called a fillet after mounting. Of the resin may easily occur. On the other hand, when the average particle size of the component (a) is 100 nm or less, the viscosity of the semiconductor adhesive is easily adjusted to a preferable range, and the generation of fillets is sufficiently suppressed, or the amount of fillets is sufficiently reduced. can do.
 (a)成分の平均粒径の下限値は特に限定されないが、(a)成分の凝集を抑制する観点から、1nm以上、5nm以上、又は、10nm以上であってもよい。表面処理が施されていない無機フィラーを用いた場合には、例えば平均粒径が50nm程度であっても凝集が生じる恐れがあるが、グリシジル基を有する表面処理が施された無機フィラーを用いた場合には、平均粒径が50nm程度又はそれ以下であっても、凝集の発生を抑制することができる。 下限 The lower limit of the average particle diameter of the component (a) is not particularly limited, but may be 1 nm or more, 5 nm or more, or 10 nm or more from the viewpoint of suppressing aggregation of the component (a). When an inorganic filler that has not been subjected to a surface treatment is used, for example, aggregation may occur even if the average particle size is about 50 nm, but an inorganic filler that has been subjected to a surface treatment having a glycidyl group is used. In this case, even if the average particle size is about 50 nm or less, the occurrence of aggregation can be suppressed.
 (a)成分は単独又は2種以上の混合体として使用することもできる。(a)成分の形状については、特に制限されない。 成分 The component (a) can be used alone or as a mixture of two or more. The shape of the component (a) is not particularly limited.
 (a)成分の含有量は、半導体用接着剤の固形分全量を基準として、10~80質量%であることが好ましく、15~60質量%であることがより好ましく、20~50質量%であることが更に好ましい。この含有量が10質量%以上であると、接着力及び耐リフロー性をより向上できる傾向があり、80質量%以下であると、増粘により接続信頼性が低下することを抑制できる傾向がある。 The content of the component (a) is preferably from 10 to 80% by mass, more preferably from 15 to 60% by mass, and more preferably from 20 to 50% by mass, based on the total solid content of the semiconductor adhesive. It is even more preferred. When the content is 10% by mass or more, the adhesive strength and the reflow resistance tend to be further improved. When the content is 80% by mass or less, the decrease in connection reliability due to thickening tends to be suppressed. .
 本実施形態に係る半導体用接着剤は、樹脂フィラーを含有していてもよい。樹脂フィラーとしては、例えば、ポリウレタン、ポリイミド等の樹脂からなるフィラーが挙げられる。樹脂フィラーは、他の有機成分(エポキシ樹脂及び硬化剤等)と比較して熱膨張率が小さいため接続信頼性の向上効果に優れる。また、樹脂フィラーによれば、半導体用接着剤の粘度調整を容易に行うことができる。また、樹脂フィラーは、無機フィラーと比較して応力を緩和する機能に優れている。 半導体 The semiconductor adhesive according to the present embodiment may contain a resin filler. Examples of the resin filler include a filler made of a resin such as polyurethane and polyimide. The resin filler has a smaller coefficient of thermal expansion than other organic components (such as an epoxy resin and a curing agent), and thus has an excellent effect of improving connection reliability. Further, according to the resin filler, the viscosity of the semiconductor adhesive can be easily adjusted. Further, the resin filler has an excellent function of relieving stress as compared with the inorganic filler.
 絶縁信頼性の観点から、半導体用接着剤に含まれるフィラーは絶縁性であることが好ましい。半導体用接着剤は、銀フィラー、はんだフィラー等の導電性の金属フィラーは含有していないことが好ましい。導電性フィラー(導電性粒子)を含有しない半導体用接着剤(回路接続材料)は、NCF(Non-Conductive-FILM)又はNCP(Non-Conductive-Paste)と呼ばれることもある。本実施形態に係る半導体用接着剤は、NCF又はNCPとして好適に用いることができる。 か ら From the viewpoint of insulation reliability, the filler contained in the semiconductor adhesive is preferably insulating. It is preferable that the semiconductor adhesive does not contain a conductive metal filler such as a silver filler and a solder filler. An adhesive for semiconductors (circuit connecting material) that does not contain conductive fillers (conductive particles) is sometimes called NCF (Non-Conductive-FILM) or NCP (Non-Conductive-Paste). The semiconductor adhesive according to the present embodiment can be suitably used as NCF or NCP.
((b)成分:エポキシ樹脂)
 (b)成分のエポキシ樹脂としては、分子内に2個以上のエポキシ基を有するエポキシ樹脂が挙げられ、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ナフタレン型エポキシ樹脂、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、フェノールアラルキル型エポキシ樹脂、ビフェニル型エポキシ樹脂、トリフェニルメタン型エポキシ樹脂、ジシクロペンタジエン型エポキシ樹脂、各種多官能エポキシ樹脂等を使用することができる。(b)成分は、1種単独で又は2種以上を組み合わせて用いることができる。
((B) component: epoxy resin)
Examples of the epoxy resin (b) include an epoxy resin having two or more epoxy groups in a molecule, such as a bisphenol A epoxy resin, a bisphenol F epoxy resin, a naphthalene epoxy resin, a phenol novolak epoxy resin, Cresol novolak type epoxy resin, phenol aralkyl type epoxy resin, biphenyl type epoxy resin, triphenylmethane type epoxy resin, dicyclopentadiene type epoxy resin, various polyfunctional epoxy resins and the like can be used. As the component (b), one type can be used alone, or two or more types can be used in combination.
 エポキシ樹脂の中でも、ビスフェノールA型又はビスフェノールF型の液状エポキシ樹脂は、1%熱重量減少温度が250℃以下であるため、高温加熱時に分解して揮発成分が発生する恐れがある。このため、室温(1気圧、25℃)で固形のエポキシ樹脂を用いることが好ましい。液状エポキシ樹脂を用いる場合は、固形のエポキシ樹脂と組み合わせて用いることが好ましい。 Among the epoxy resins, the bisphenol A type or the bisphenol F type liquid epoxy resin has a 1% thermal weight loss temperature of 250 ° C. or less, and thus may be decomposed when heated at a high temperature to generate volatile components. Therefore, it is preferable to use an epoxy resin that is solid at room temperature (1 atm, 25 ° C.). When using a liquid epoxy resin, it is preferable to use it in combination with a solid epoxy resin.
 (b)成分の重量平均分子量は10000未満であってもよく、耐熱性の観点から、100以上10000未満が好ましく、300以上8000以下がより好ましく、300以上5000以下が更に好ましい。 重量 The weight average molecular weight of the component (b) may be less than 10,000, and from the viewpoint of heat resistance, is preferably 100 or more and less than 10,000, more preferably 300 or more and 8000 or less, and further preferably 300 or more and 5000 or less.
 (b)成分の含有量は、半導体用接着剤の固形分全量を基準として、好ましくは10~50質量%であり、より好ましくは20~45質量%であり、更に好ましくは30~40質量%である。(b)成分の含有量が10質量%以上であると、硬化後の樹脂の流動を十分に制御しやすく、50質量%以下であると、硬化物の樹脂成分が多くなりすぎず、パッケージの反りを低減しやすい。 The content of the component (b) is preferably from 10 to 50% by mass, more preferably from 20 to 45% by mass, and still more preferably from 30 to 40% by mass, based on the total solid content of the semiconductor adhesive. It is. When the content of the component (b) is 10% by mass or more, it is easy to sufficiently control the flow of the cured resin. When the content is 50% by mass or less, the resin component of the cured product does not become too large, and Easy to reduce warpage.
 本実施形態に係る半導体用接着剤は、上記(b)エポキシ樹脂以外の他の熱硬化性樹脂を更に含有していてもよい。他の熱硬化性樹脂としては、例えばフェノール樹脂、イミド樹脂、(メタ)アクリル化合物等が挙げられる。 半導体 The semiconductor adhesive according to the present embodiment may further contain a thermosetting resin other than the epoxy resin (b). Examples of other thermosetting resins include phenolic resins, imide resins, (meth) acrylic compounds, and the like.
((c)成分:硬化剤)
 (c)硬化剤としては、フェノール樹脂系硬化剤、酸無水物系硬化剤、アミン系硬化剤、イミダゾール系硬化剤及びホスフィン系硬化剤等が挙げられる。(c)成分がフェノール性水酸基、酸無水物、アミン類又はイミダゾール類を含むと、接続部に酸化膜が生じることを抑制するフラックス活性を示しやすく、接続信頼性及び絶縁信頼性を容易に向上させることができる。以下、各硬化剤について説明する。
(Component (c): curing agent)
(C) Examples of the curing agent include a phenol resin-based curing agent, an acid anhydride-based curing agent, an amine-based curing agent, an imidazole-based curing agent, and a phosphine-based curing agent. When the component (c) contains a phenolic hydroxyl group, an acid anhydride, an amine or an imidazole, it is easy to exhibit a flux activity for suppressing the formation of an oxide film at the connection portion, thereby easily improving connection reliability and insulation reliability. Can be done. Hereinafter, each curing agent will be described.
(c-i)フェノール樹脂系硬化剤
 フェノール樹脂系硬化剤としては、分子内に2個以上のフェノール性水酸基を有する硬化剤が挙げられ、フェノールノボラック樹脂、クレゾールノボラック樹脂、フェノールアラルキル樹脂、クレゾールナフトールホルムアルデヒド重縮合物、トリフェニルメタン型多官能フェノール樹脂、各種多官能フェノール樹脂等を使用することができる。フェノール樹脂系硬化剤は、1種単独で又は2種以上を組み合わせて用いることができる。
(Ci) Phenolic resin-based curing agent Examples of the phenolic resin-based curing agent include curing agents having two or more phenolic hydroxyl groups in a molecule, such as phenol novolak resin, cresol novolak resin, phenol aralkyl resin, and cresol naphthol. Formaldehyde polycondensates, triphenylmethane-type polyfunctional phenol resins, various polyfunctional phenol resins, and the like can be used. The phenolic resin-based curing agents can be used alone or in combination of two or more.
 上記(b)成分に対するフェノール樹脂系硬化剤の当量比(フェノール性水酸基/エポキシ基、モル比)は、硬化性、接着性及び保存安定性に優れる観点から、0.3~1.5が好ましく、0.4~1.0がより好ましく、0.5~1.0がさらに好ましい。当量比が0.3以上であると、硬化性が向上し接着力が向上する傾向があり、1.5以下であると、未反応のフェノール性水酸基が過剰に残存することがなく、吸水率が低く抑えられ、絶縁信頼性がさらに向上する傾向がある。 The equivalent ratio of the phenolic resin-based curing agent to the component (b) (phenolic hydroxyl group / epoxy group, molar ratio) is preferably from 0.3 to 1.5 from the viewpoint of excellent curability, adhesiveness and storage stability. , 0.4 to 1.0, more preferably 0.5 to 1.0. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved. When the equivalent ratio is 1.5 or less, unreacted phenolic hydroxyl groups do not remain excessively, and the water absorption Is kept low, and the insulation reliability tends to be further improved.
(c-ii)酸無水物系硬化剤
 酸無水物系硬化剤としては、メチルシクロヘキサンテトラカルボン酸二無水物、無水トリメリット酸、無水ピロメリット酸、ベンゾフェノンテトラカルボン酸二無水物、エチレングリコールビスアンヒドロトリメリテート等を使用することができる。酸無水物系硬化剤は、1種単独で又は2種以上を組み合わせて用いることができる。
(C-ii) Acid anhydride-based curing agent Examples of the acid anhydride-based curing agent include methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic dianhydride, and ethylene glycol bis. Anhydrotrimellitate or the like can be used. The acid anhydride-based curing agent can be used alone or in combination of two or more.
 上記(b)成分に対する酸無水物系硬化剤の当量比(酸無水物基/エポキシ基、モル比)は、硬化性、接着性及び保存安定性に優れる観点から、0.3~1.5が好ましく、0.4~1.0がより好ましく、0.5~1.0がさらに好ましい。当量比が0.3以上であると、硬化性が向上し接着力が向上する傾向があり、1.5以下であると、未反応の酸無水物が過剰に残存することがなく、吸水率が低く抑えられ、絶縁信頼性がさらに向上する傾向がある。 The equivalent ratio of the acid anhydride-based curing agent to the component (b) (acid anhydride group / epoxy group, molar ratio) is from 0.3 to 1.5 from the viewpoint of excellent curability, adhesiveness and storage stability. Is preferably, 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is more preferable. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved. When the equivalent ratio is 1.5 or less, the unreacted acid anhydride does not remain excessively, and the water absorption Is kept low, and the insulation reliability tends to be further improved.
(c-iii)アミン系硬化剤
 アミン系硬化剤としては、ジシアンジアミド、各種アミン化合物等を使用することができる。
(C-iii) Amine-based curing agent As the amine-based curing agent, dicyandiamide, various amine compounds, and the like can be used.
 上記(b)成分に対するアミン系硬化剤の当量比(アミン/エポキシ基、モル比)は、硬化性、接着性及び保存安定性に優れる観点から0.3~1.5が好ましく、0.4~1.0がより好ましく、0.5~1.0がさらに好ましい。当量比が0.3以上であると、硬化性が向上し接着力が向上する傾向があり、1.5以下であると、未反応のアミンが過剰に残存することがなく、絶縁信頼性がさらに向上する傾向がある。 The equivalent ratio of the amine-based curing agent to the component (b) (amine / epoxy group, molar ratio) is preferably from 0.3 to 1.5 from the viewpoint of excellent curability, adhesion and storage stability. -1.0 is more preferable, and 0.5-1.0 is more preferable. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved. When the equivalent ratio is 1.5 or less, unreacted amine does not remain excessively, and insulation reliability is improved. There is a tendency to further improve.
(c-iv)イミダゾール系硬化剤
 イミダゾール系硬化剤としては、2-フェニルイミダゾール、2-フェニル-4-メチルイミダゾール、1-ベンジル-2-メチルイミダゾール、1-ベンジル-2-フェニルイミダゾール、1-シアノエチル-2-ウンデシルイミダゾール、1-シアノ-2-フェニルイミダゾール、1-シアノエチル-2-ウンデシルイミダゾールトリメリテイト、1-シアノエチル-2-フェニルイミダゾリウムトリメリテイト、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-ウンデシルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-エチル-4’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジンイソシアヌル酸付加体、2-フェニルイミダゾールイソシアヌル酸付加体、2-フェニル-4,5-ジヒドロキシメチルイミダゾール、2-フェニル-4-メチル-5-ヒドロキシメチルイミダゾール、エポキシ樹脂とイミダゾール類の付加体等が挙げられる。これらの中でも、硬化性、保存安定性及び接続信頼性にさらに優れる観点から、1-シアノエチル-2-ウンデシルイミダゾール、1-シアノ-2-フェニルイミダゾール、1-シアノエチル-2-ウンデシルイミダゾールトリメリテイト、1-シアノエチル-2-フェニルイミダゾリウムトリメリテイト、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-エチル-4’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジンイソシアヌル酸付加体、2-フェニルイミダゾールイソシアヌル酸付加体、2-フェニル-4,5-ジヒドロキシメチルイミダゾール及び2-フェニル-4-メチル-5-ヒドロキシメチルイミダゾールが好ましい。イミダゾール系硬化剤は、1種単独で又は2種以上を組み合わせて用いることができる。また、これらをマイクロカプセル化した潜在性硬化剤としてもよい。
(C-iv) Imidazole curing agent Examples of the imidazole curing agent include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, Cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6 -[2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2′-undecylimidazolyl- (1 ′)]-ethyl-s-triazine, 2, 4-diamino-6- [2'-ethyl-4'-methylimidazolyl- (1 ')]-ethyl-s-to Azine, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5- Examples include dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, adducts of epoxy resins and imidazoles, and the like. Among these, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellit, from the viewpoint of further improving curability, storage stability and connection reliability. Tate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2'-ethyl-4'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino-6- [2'-methylimidazolyl- (1')]-ethyl-s-triazine Isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole and 2-phenylimidazole Preferred is phenyl-4-methyl-5-hydroxymethylimidazole. The imidazole-based curing agents can be used alone or in combination of two or more. Further, these may be used as a latent curing agent obtained by microencapsulation.
 イミダゾール系硬化剤の含有量は、(b)成分100質量部に対して、0.1~20質量部が好ましく、0.1~10質量部がより好ましい。イミダゾール系硬化剤の含有量が0.1質量部以上であると、硬化性が向上する傾向があり、20質量部以下であると、金属接合が形成される前に接着剤組成物が硬化することがなく、接続不良が発生しにくい傾向がある。 The content of the imidazole-based curing agent is preferably from 0.1 to 20 parts by mass, more preferably from 0.1 to 10 parts by mass, per 100 parts by mass of the component (b). When the content of the imidazole-based curing agent is 0.1 part by mass or more, the curability tends to be improved, and when the content is 20 parts by mass or less, the adhesive composition is cured before metal bonding is formed. And there is a tendency that poor connection hardly occurs.
(c-v)ホスフィン系硬化剤
 ホスフィン系硬化剤としては、トリフェニルホスフィン、テトラフェニルホスホニウムテトラフェニルボレート、テトラフェニルホスホニウムテトラ(4-メチルフェニル)ボレート及びテトラフェニルホスホニウム(4-フルオロフェニル)ボレート等が挙げられる。
(Cv) Phosphine-based curing agent Examples of the phosphine-based curing agent include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate, and tetraphenylphosphonium (4-fluorophenyl) borate. Is mentioned.
 ホスフィン系硬化剤の含有量は、(b)成分100質量部に対して、0.1~10質量部が好ましく、0.1~5質量部がより好ましい。ホスフィン系硬化剤の含有量が0.1質量部以上であると、硬化性が向上する傾向があり、10質量部以下であると、金属接合が形成される前に半導体用接着剤が硬化することがなく、接続不良が発生しにくい傾向がある。 The content of the phosphine-based curing agent is preferably from 0.1 to 10 parts by mass, more preferably from 0.1 to 5 parts by mass, per 100 parts by mass of the component (b). When the content of the phosphine-based curing agent is 0.1 part by mass or more, the curability tends to be improved, and when the content is 10 parts by mass or less, the semiconductor adhesive is cured before metal bonding is formed. And there is a tendency that poor connection hardly occurs.
 フェノール樹脂系硬化剤、酸無水物系硬化剤及びアミン系硬化剤は、それぞれ1種単独で又は2種以上を組み合わせて用いることができる。イミダゾール系硬化剤及びホスフィン系硬化剤はそれぞれ単独で用いてもよいが、フェノール樹脂系硬化剤、酸無水物系硬化剤又はアミン系硬化剤と共に用いてもよい。 The phenolic resin-based curing agent, acid anhydride-based curing agent, and amine-based curing agent can be used alone or in combination of two or more. The imidazole-based curing agent and the phosphine-based curing agent may be used alone, but may be used together with a phenolic resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent.
 (c)成分としては、硬化性に優れる観点から、フェノール樹脂系硬化剤とイミダゾール系硬化剤の併用、酸無水物系硬化剤とイミダゾール系硬化剤の併用、アミン系硬化剤とイミダゾール系硬化剤の併用、イミダゾール系硬化剤単独使用が好ましい。短時間で接続すると生産性が向上することから、速硬化性に優れたイミダゾール系硬化剤単独使用がより好ましい。この場合、短時間で硬化すると低分子成分等の揮発分が抑制できることから、ボイドの発生を容易に抑制することもできる。 As the component (c), from the viewpoint of excellent curability, a combined use of a phenolic resin-based curing agent and an imidazole-based curing agent, a combined use of an acid anhydride-based curing agent and an imidazole-based curing agent, an amine-based curing agent and an imidazole-based curing agent And the use of an imidazole-based curing agent alone is preferred. Since the productivity is improved when the connection is made in a short time, it is more preferable to use an imidazole-based curing agent having excellent quick-curing properties alone. In this case, when cured in a short time, volatile components such as low molecular components can be suppressed, so that the generation of voids can be easily suppressed.
((d)成分:重量平均分子量10000以上の高分子量成分)
 (d)重量平均分子量10000以上の高分子量成分((b)成分に該当する化合物を除く)としては、フェノキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリカルボジイミド樹脂、シアネートエステル樹脂、(メタ)アクリル樹脂、ポリエステル樹脂、ポリエチレン樹脂、ポリエーテルスルホン樹脂、ポリエーテルイミド樹脂、ポリビニルアセタール樹脂、ポリウレタン樹脂、アクリルゴム等が挙げられ、その中でも、耐熱性及びフィルム形成性に優れる観点から、フェノキシ樹脂、ポリイミド樹脂、(メタ)アクリル樹脂、アクリルゴム、シアネートエステル樹脂、ポリカルボジイミド樹脂が好ましく、フェノキシ樹脂、ポリイミド樹脂、(メタ)アクリル樹脂、アクリルゴムがより好ましく、フェノキシ樹脂が更に好ましい。(d)成分は、単独又は2種以上の混合体又は共重合体として使用することもできる。
(Component (d): high molecular weight component having a weight average molecular weight of 10,000 or more)
(D) The high molecular weight component having a weight average molecular weight of 10,000 or more (excluding the compound corresponding to the component (b)) includes phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, (meth) acrylic resin, Polyester resin, polyethylene resin, polyether sulfone resin, polyetherimide resin, polyvinyl acetal resin, polyurethane resin, acrylic rubber, and the like, among which, from the viewpoint of excellent heat resistance and film formability, phenoxy resin, polyimide resin, (Meth) acrylic resin, acrylic rubber, cyanate ester resin and polycarbodiimide resin are preferred, phenoxy resin, polyimide resin, (meth) acrylic resin and acrylic rubber are more preferred, and phenoxy resin is even more preferred. The component (d) may be used alone or as a mixture or copolymer of two or more.
 (d)成分と(b)成分との質量比は、特に制限されないが、フィルム状を良好に保持する観点から、(d)成分1質量部に対して、(b)成分の含有量は、0.01~5質量部であることが好ましく、0.05~4質量部であることがより好ましく、0.1~3質量部であることがさらに好ましい。(b)成分の含有量が0.01質量部以上であると、硬化性が低下したり、接着力が低下することがなく、含有量が5質量部以下であると、フィルム形成性及び膜形成性が低下することがない。 The mass ratio of the component (d) to the component (b) is not particularly limited, but from the viewpoint of maintaining a good film shape, the content of the component (b) is 1 part by mass of the component (d). The amount is preferably 0.01 to 5 parts by mass, more preferably 0.05 to 4 parts by mass, and even more preferably 0.1 to 3 parts by mass. When the content of the component (b) is 0.01 parts by mass or more, the curability does not decrease, and the adhesive strength does not decrease. When the content is 5 parts by mass or less, the film formability and the film are reduced. The formability does not decrease.
 (d)成分の重量平均分子量は、ポリスチレン換算で10000以上であるが、単独で良好なフィルム形成性を示すために、30000以上が好ましく、40000以上がより好ましく、50000以上がさらに好ましい。重量平均分子量が10000以上である場合にはフィルム形成性が低下する恐れがない。なお、本明細書において、重量平均分子量とは、高速液体クロマトグラフィー(島津製作所製C-R4A)を用いて、ポリスチレン換算で測定したときの重量平均分子量を意味する。 The weight average molecular weight of the component (d) is 10,000 or more in terms of polystyrene, but is preferably 30,000 or more, more preferably 40,000 or more, and still more preferably 50,000 or more, in order to show good film-forming properties by itself. When the weight average molecular weight is 10,000 or more, there is no possibility that the film forming property is reduced. In the present specification, the weight-average molecular weight means a weight-average molecular weight measured by high-performance liquid chromatography (Shimadzu Corporation, CR4A) in terms of polystyrene.
((e)成分:フラックス剤)
 半導体用接着剤は、フラックス活性(酸化物、不純物等を除去する活性)を示す化合物である(e)フラックス剤をさらに含有することができる。フラックス剤としては、非共有電子対を有する含窒素化合物(イミダゾール類、アミン類等。ただし、(c)成分に含まれるものを除く)、カルボン酸類、フェノール類及びアルコール類等が挙げられる。なお、アルコール類に比べてカルボン酸類の方がフラックス活性を強く発現し、接続性を向上し易い。
(Component (e): flux agent)
The semiconductor adhesive may further contain (e) a flux agent which is a compound exhibiting flux activity (activity for removing oxides, impurities, and the like). Examples of the flux agent include nitrogen-containing compounds having an unshared electron pair (imidazoles, amines, etc., except those contained in the component (c)), carboxylic acids, phenols, alcohols, and the like. Note that carboxylic acids exhibit stronger flux activity than alcohols, and are more likely to improve connectivity.
 (e)成分の含有量は、はんだ濡れ性の観点から、半導体用接着剤の固形分全量を基準として、0.2~3質量%であることが好ましく、0.4~1.8質量%であることがより好ましい。 From the viewpoint of solder wettability, the content of the component (e) is preferably from 0.2 to 3% by mass, and more preferably from 0.4 to 1.8% by mass, based on the total solid content of the semiconductor adhesive. Is more preferable.
 半導体用接着剤には、更に、イオントラッパー、酸化防止剤、シランカップリング剤、チタンカップリング剤、レベリング剤等を配合してもよい。これらは1種を単独で用いてもよいし、2種以上組み合わせて用いてもよい。これらの配合量については、各添加剤の効果が発現するように適宜調整すればよい。 接着 The semiconductor adhesive may further contain an ion trapper, an antioxidant, a silane coupling agent, a titanium coupling agent, a leveling agent, and the like. These may be used alone or in combination of two or more. What is necessary is just to adjust suitably these compounding quantities so that the effect of each additive may be exhibited.
 半導体用接着剤をフィルム状にした場合の80℃におけるずり粘度は、4500~14000Pa・sであることが好ましく、5000~13000Pa・sであることがより好ましく、5000~10000Pa・sであることが更に好ましい。ずり粘度が4500Pa・s以上であることで、フィレットの発生を十分に抑制する、又は、フィレット量を十分に低減することができる。ずり粘度が14000Pa・s以下であることで、半導体装置組み立て時の実装性を向上させることができる。フィルム状にした半導体用接着剤のずり粘度は、例えば、動的ずり粘弾性測定装置(ティー・エイ・インスツルメント・ジャパン株式会社製、商品名「ARES-G2」等)により、昇温速度10℃/分、測定温度範囲30℃~145℃、周波数10Hzの条件で測定することができる。上記方法で測定された粘度値の80℃での値を、半導体用接着剤のフィルム状にした場合の80℃におけるずり粘度として求めることができる。 The shear viscosity at 80 ° C. when the semiconductor adhesive is formed into a film is preferably 4500 to 14000 Pa · s, more preferably 5000 to 13000 Pa · s, and more preferably 5000 to 10000 Pa · s. More preferred. When the shear viscosity is 4500 Pa · s or more, generation of fillets can be sufficiently suppressed, or the amount of fillets can be sufficiently reduced. When the shear viscosity is 14000 Pa · s or less, the mountability at the time of assembling the semiconductor device can be improved. The shear viscosity of the film-form semiconductor adhesive can be measured, for example, by using a dynamic shear viscoelasticity measuring device (trade name “ARES-G2” manufactured by TA Instruments Japan Co., Ltd.). It can be measured under the conditions of 10 ° C./min, a measurement temperature range of 30 ° C. to 145 ° C., and a frequency of 10 Hz. The value of the viscosity at 80 ° C. of the viscosity value measured by the above method can be determined as the shear viscosity at 80 ° C. when the adhesive for a semiconductor is formed into a film.
<半導体用接着剤の製造方法>
 本実施形態に係る半導体用接着剤は、生産性が向上する観点から、フィルム状(フィルム状接着剤)であることが好ましい。フィルム状接着剤の作製方法を以下に説明する。
<Production method of semiconductor adhesive>
The adhesive for semiconductors according to the present embodiment is preferably in the form of a film (film-like adhesive) from the viewpoint of improving productivity. The method for producing the film adhesive will be described below.
 まず、(a)成分、(b)成分、(c)成分、(d)成分、及び必要に応じてその他の成分を有機溶媒中に加えた後に攪拌混合、混錬等により溶解又は分散させて樹脂ワニスを調製する。その後、離型処理を施した基材フィルム上に、ナイフコーター、ロールコーター、アプリケーター、ダイコーター、コンマコーター等を用いて樹脂ワニスを塗布した後、加熱により有機溶媒を減少させて、基材フィルム上にフィルム状接着剤を形成する。また、加熱により有機溶媒を減少させる前に、樹脂ワニスをウエハ等にスピンコートして膜を形成した後、溶媒乾燥を行う方法によりウエハ上にフィルム状接着剤を形成してもよい。 First, (a) component, (b) component, (c) component, (d) component, and other components as necessary are added to an organic solvent, and then dissolved or dispersed by stirring, mixing, kneading, or the like. Prepare a resin varnish. Then, after applying a resin varnish using a knife coater, a roll coater, an applicator, a die coater, a comma coater, or the like on the release-treated base film, the organic solvent is reduced by heating, and the base film is removed. Form a film adhesive on top. In addition, before the organic solvent is reduced by heating, a film adhesive may be formed on the wafer by a method of spin-coating a resin varnish on a wafer or the like to form a film, and then drying the solvent.
 樹脂ワニスの調製に用いる有機溶媒としては、各成分を均一に溶解又は分散し得る特性を有するものが好ましく、例えば、ジメチルホルムアミド、ジメチルアセトアミド、N-メチル-2-ピロリドン、ジメチルスルホキシド、ジエチレングリコールジメチルエーテル、トルエン、ベンゼン、キシレン、メチルエチルケトン、テトラヒドロフラン、エチルセロソルブ、エチルセロソルブアセテート、ブチルセロソルブ、ジオキサン、シクロヘキサノン、及び酢酸エチルが挙げられる。これらの有機溶媒は、単独で又は2種類以上を組み合わせて使用することができる。樹脂ワニス調製の際の攪拌混合及び混錬は、例えば、攪拌機、らいかい機、3本ロール、ボールミル、ビーズミル又はホモディスパーを用いて行うことができる。 As the organic solvent used for preparing the resin varnish, those having properties capable of uniformly dissolving or dispersing each component are preferable, for example, dimethylformamide, dimethylacetamide, N-methyl-2-pyrrolidone, dimethylsulfoxide, diethylene glycol dimethyl ether, Examples include toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, and ethyl acetate. These organic solvents can be used alone or in combination of two or more. The stirring, mixing and kneading at the time of preparing the resin varnish can be performed using, for example, a stirrer, a raker, a three-roll, a ball mill, a bead mill or a homodisper.
 基材フィルムとしては、有機溶媒を揮発させる際の加熱条件に耐え得る耐熱性を有するものであれば特に制限はなく、ポリエステルフィルム、ポリプロピレンフィルム、ポリエチレンテレフタレートフィルム、ポリイミドフィルム、ポリエーテルイミドフィルム、ポリエーテルナフタレートフィルム、メチルペンテンフィルム等が挙げられる。基材フィルムとしては、これらのフィルムのうちの1種からなる単層のものに限られず、2種以上のフィルムからなる多層フィルムであってもよい。 The substrate film is not particularly limited as long as it has heat resistance enough to withstand the heating conditions when the organic solvent is volatilized, and polyester film, polypropylene film, polyethylene terephthalate film, polyimide film, polyetherimide film, polyether Ether naphthalate film, methylpentene film and the like can be mentioned. The base film is not limited to a single layer made of one of these films, and may be a multilayer film made of two or more films.
 塗布後の樹脂ワニスから有機溶媒を揮発させる際の条件としては、具体的には、50~200℃、0.1~90分間の加熱を行うことが好ましい。実装後のボイド、粘度調整等に影響がなければ、有機溶媒が1.5質量%以下まで揮発する条件とすることが好ましい。 (4) As conditions for evaporating the organic solvent from the resin varnish after application, specifically, it is preferable to perform heating at 50 to 200 ° C. for 0.1 to 90 minutes. It is preferable that the organic solvent is volatilized to 1.5% by mass or less as long as there is no effect on the voids, viscosity adjustment, and the like after mounting.
 本実施形態に係るフィルム状接着剤におけるフィルムの厚さは、視認性、流動性、充填性の観点から、10~100μmが好ましく、20~50μmがより好ましい。 フ ィ ル ム The thickness of the film in the film adhesive according to the present embodiment is preferably from 10 to 100 μm, and more preferably from 20 to 50 μm, from the viewpoint of visibility, fluidity, and filling property.
<半導体装置>
 本実施形態に係る半導体用接着剤は、半導体装置に好適に用いられ、半導体チップ及び配線回路基板のそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置、又は複数の半導体チップのそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置において、接続部の封止に特に好適に用いられる。以下、本実施形態に係る半導体用接着剤を用いた半導体装置について説明する。半導体装置における接続部の電極同士は、バンプと配線との金属接合、及び、バンプとバンプとの金属接合のいずれでもよい。半導体装置では、例えば、半導体用接着剤を介して電気的な接続を得るフリップチップ接続が用いられてよい。
<Semiconductor device>
The semiconductor adhesive according to the present embodiment is preferably used for a semiconductor device, and a semiconductor device in which electrodes of respective connection portions of a semiconductor chip and a wiring circuit board are electrically connected to each other, or a plurality of semiconductor chips. In a semiconductor device in which electrodes of respective connection portions are electrically connected to each other, it is particularly suitably used for sealing the connection portions. Hereinafter, a semiconductor device using the semiconductor adhesive according to the present embodiment will be described. The electrodes of the connection portion in the semiconductor device may be either a metal joint between the bump and the wiring or a metal joint between the bump and the bump. In a semiconductor device, for example, flip-chip connection for obtaining electrical connection via a semiconductor adhesive may be used.
 図1は、半導体装置の実施形態(半導体チップ及び基板のCOB型の接続態様)を示す模式断面図である。図1の(a)に示すように、第1の半導体装置100は、互いに対向する半導体チップ10及び基板(配線回路基板)20と、半導体チップ10及び基板20の互いに対向する面にそれぞれ配置された配線15と、半導体チップ10及び基板20の配線15を互いに接続する接続バンプ30と、半導体チップ10及び基板20間の空隙に隙間なく充填された接着材料40とを有している。半導体チップ10及び基板20は、配線15及び接続バンプ30によりフリップチップ接続されている。配線15及び接続バンプ30は、接着材料40により封止されており外部環境から遮断されている。接着材料40は、本実施形態の半導体用接着剤の硬化物である。 FIG. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device (COB-type connection between a semiconductor chip and a substrate). As shown in FIG. 1A, the first semiconductor device 100 is arranged on a semiconductor chip 10 and a substrate (wiring circuit board) 20 facing each other, and on a surface of the semiconductor chip 10 and the substrate 20 facing each other. Wiring 15, connecting bumps 30 for connecting the wiring 15 of the semiconductor chip 10 and the wiring 20 of the substrate 20 to each other, and an adhesive material 40 that fills the gap between the semiconductor chip 10 and the substrate 20 without gaps. The semiconductor chip 10 and the substrate 20 are flip-chip connected by the wiring 15 and the connection bump 30. The wiring 15 and the connection bump 30 are sealed with an adhesive material 40 and are shielded from an external environment. The adhesive material 40 is a cured product of the semiconductor adhesive of the present embodiment.
 図1の(b)に示すように、第2の半導体装置200は、互いに対向する半導体チップ10及び基板(配線回路基板)20と、半導体チップ10及び基板20の互いに対向する面にそれぞれ配置されたバンプ32と、半導体チップ10及び基板20間の空隙に隙間なく充填された接着材料40とを有している。半導体チップ10及び基板20は、対向するバンプ32が互いに接続されることによりフリップチップ接続されている。バンプ32は、接着材料40により封止されており外部環境から遮断されている。 As shown in FIG. 1B, the second semiconductor device 200 is disposed on the semiconductor chip 10 and the substrate (wiring circuit substrate) 20 facing each other, and on the surfaces of the semiconductor chip 10 and the substrate 20 facing each other. And a bonding material 40 that fills the gap between the semiconductor chip 10 and the substrate 20 without any gap. The semiconductor chip 10 and the substrate 20 are flip-chip connected by connecting the opposing bumps 32 to each other. The bump 32 is sealed with an adhesive material 40 and is shielded from an external environment.
 図2は、半導体装置の他の実施形態(半導体チップ同士のCOC型の接続態様)を示す模式断面図である。図2の(a)に示すように、第3の半導体装置300は、2つの半導体チップ10が配線15及び接続バンプ30によりフリップチップ接続されている点を除き、第1の半導体装置100と同様である。図2の(b)に示すように、第4の半導体装置400は、2つの半導体チップ10がバンプ32によりフリップチップ接続されている点を除き、第2の半導体装置200と同様である。 FIG. 2 is a schematic sectional view showing another embodiment of the semiconductor device (COC type connection between semiconductor chips). As shown in FIG. 2A, the third semiconductor device 300 is the same as the first semiconductor device 100 except that two semiconductor chips 10 are flip-chip connected by wirings 15 and connection bumps 30. It is. As shown in FIG. 2B, the fourth semiconductor device 400 is similar to the second semiconductor device 200 except that two semiconductor chips 10 are flip-chip connected by bumps 32.
 半導体チップ10としては、特に制限はなく、シリコン、ゲルマニウム等の同一種類の元素から構成される元素半導体、ガリウム・ヒ素、インジウム・リン等の化合物半導体などの各種半導体を用いることができる。 The semiconductor chip 10 is not particularly limited, and various semiconductors such as element semiconductors composed of the same kind of elements such as silicon and germanium, and compound semiconductors such as gallium / arsenic and indium / phosphorus can be used.
 基板20としては、配線回路基板であれば特に制限はなく、ガラスエポキシ樹脂、ポリイミド樹脂、ポリエステル樹脂、セラミック、エポキシ樹脂、ビスマレイミドトリアジン樹脂等を主な成分とする絶縁基板の表面に形成された金属層の不要な個所をエッチング除去して配線(配線パターン)が形成された回路基板、上記絶縁基板の表面に金属めっき等によって配線(配線パターン)が形成された回路基板、上記絶縁基板の表面に導電性物質を印刷して配線(配線パターン)が形成された回路基板などを用いることができる。 The substrate 20 is not particularly limited as long as it is a printed circuit board, and is formed on the surface of an insulating substrate mainly composed of glass epoxy resin, polyimide resin, polyester resin, ceramic, epoxy resin, bismaleimide triazine resin and the like. A circuit board having wiring (wiring pattern) formed by removing unnecessary portions of the metal layer by etching, a circuit board having wiring (wiring pattern) formed on the surface of the insulating substrate by metal plating or the like, and a surface of the insulating substrate. A circuit board or the like on which a conductive material is printed to form a wiring (wiring pattern) can be used.
 配線15、バンプ32等の接続部は、主成分として金、銀、銅、はんだ(主成分は、例えばスズ-銀、スズ-鉛、スズ-ビスマス、スズ-銅)、ニッケル、スズ、鉛等を含有しており、複数の金属を含有していてもよい。 Connections such as the wiring 15 and the bumps 32 are mainly composed of gold, silver, copper, solder (for example, tin-silver, tin-lead, tin-bismuth, tin-copper), nickel, tin, lead, etc. And may contain a plurality of metals.
 配線(配線パターン)の表面には、金、銀、銅、はんだ(主成分は、例えばスズ-銀、スズ-鉛、スズ-ビスマス、スズ-銅)、スズ、ニッケル等を主な成分とする金属層が形成されていてもよい。この金属層は単一の成分のみで構成されていてもよく、複数の成分から構成されていてもよい。また、複数の金属層が積層された構造をしていてもよい。銅、はんだは安価であることから一般的に使用されている。なお、銅、はんだには酸化物、不純物等が含まれるため、半導体用接着剤はフラックス活性を有することが好ましい。 On the surface of the wiring (wiring pattern), gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. are main components. A metal layer may be formed. This metal layer may be composed of only a single component, or may be composed of a plurality of components. Further, a structure in which a plurality of metal layers are stacked may be employed. Copper and solder are generally used because they are inexpensive. Since copper and solder contain oxides and impurities, the semiconductor adhesive preferably has flux activity.
 バンプと呼ばれる導電性突起の材質としては、主な成分として、金、銀、銅、はんだ(主成分は例えば、スズ-銀、スズ-鉛、スズ-ビスマス、スズ-銅)、スズ、ニッケル等が用いられ、単一の成分のみで構成されていてもよく、複数の成分から構成されていてもよい。また、これらの金属が積層された構造をなすように形成されていてもよい。バンプは半導体チップ又は基板に形成されていてもよい。銅、はんだは安価であることから一般的に使用されている。なお、銅、はんだには酸化物、不純物等が含まれるため、半導体用接着剤はフラックス活性を有することが好ましい。 The material of the conductive protrusions called bumps is mainly composed of gold, silver, copper, solder (for example, tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. And may be composed of only a single component, or may be composed of a plurality of components. Further, these metals may be formed so as to form a laminated structure. The bump may be formed on a semiconductor chip or a substrate. Copper and solder are generally used because they are inexpensive. Since copper and solder contain oxides and impurities, the semiconductor adhesive preferably has flux activity.
 また、図1又は図2に示すような半導体装置(パッケージ)を積層して金、銀、銅、はんだ(主成分は、例えばスズ-銀、スズ-鉛、スズ-ビスマス、スズ-銅)、スズ、ニッケル等で電気的に接続してもよい。例えば、TSV技術で見られるような、接着剤を半導体チップ間に介して、フリップチップ接続又は積層し、半導体チップを貫通する孔を形成し、パターン面の電極とつなげてもよい。 Further, a semiconductor device (package) as shown in FIG. 1 or FIG. 2 is laminated, and gold, silver, copper, solder (for example, tin-silver, tin-lead, tin-bismuth, tin-copper), You may electrically connect with tin, nickel, etc. For example, as in the case of the TSV technology, an adhesive may be flip-chip connected or laminated between semiconductor chips to form a hole penetrating the semiconductor chip and connect to the electrode on the pattern surface.
 図3は、半導体装置の他の実施形態(半導体チップ積層型の態様(TSV))を示す模式断面図である。図3に示すように、第5の半導体装置500では、インターポーザ50上に形成された配線15が半導体チップ10の配線15と接続バンプ30を介して接続されることにより、半導体チップ10とインターポーザ50とはフリップチップ接続されている。半導体チップ10とインターポーザ50との間の空隙には接着材料40が隙間なく充填されている。上記半導体チップ10におけるインターポーザ50と反対側の表面上には、配線15、接続バンプ30及び接着材料40を介して半導体チップ10が繰り返し積層されている。半導体チップ10の表裏におけるパターン面の配線15は、半導体チップ10の内部を貫通する孔内に充填された貫通電極34により互いに接続されている。なお、貫通電極34の材質としては、銅、アルミニウム等を用いることができる。 FIG. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device (semiconductor chip stacked type (TSV)). As shown in FIG. 3, in the fifth semiconductor device 500, the wiring 15 formed on the interposer 50 is connected to the wiring 15 of the semiconductor chip 10 via the connection bumps 30, so that the semiconductor chip 10 and the interposer 50 are connected. Is flip-chip connected. The gap between the semiconductor chip 10 and the interposer 50 is filled with the adhesive material 40 without any gap. On the surface of the semiconductor chip 10 opposite to the interposer 50, the semiconductor chip 10 is repeatedly laminated via the wiring 15, the connection bump 30, and the adhesive material 40. The wirings 15 on the pattern surface on the front and back sides of the semiconductor chip 10 are connected to each other by through electrodes 34 filled in holes passing through the inside of the semiconductor chip 10. The material of the through electrode 34 may be copper, aluminum, or the like.
 このようなTSV技術により、通常は使用されない半導体チップの裏面からも信号を取得することができる。さらには、半導体チップ10内に貫通電極34を垂直に通すため、対向する半導体チップ10間、又は半導体チップ10及びインターポーザ50間の距離を短くし、柔軟な接続が可能である。本実施形態に係る半導体用接着剤は、このようなTSV技術において、対向する半導体チップ10間、又は半導体チップ10及びインターポーザ50間の封止材料として好適に用いられる。 信号 With such TSV technology, signals can be obtained even from the back surface of a semiconductor chip that is not normally used. Furthermore, since the penetrating electrodes 34 pass vertically through the semiconductor chip 10, the distance between the opposing semiconductor chips 10 or the distance between the semiconductor chip 10 and the interposer 50 can be shortened, and flexible connection is possible. In such TSV technology, the semiconductor adhesive according to the present embodiment is suitably used as a sealing material between the opposing semiconductor chips 10 or between the semiconductor chip 10 and the interposer 50.
<半導体装置の製造方法>
 本実施形態に係る半導体装置の製造方法は、本実施形態に係る半導体用接着剤を用いて、半導体チップ及び配線回路基板、又は、複数の半導体チップ同士を接続する。本実施形態に係る半導体装置の製造方法は、例えば、半導体用接着剤を介して半導体チップ及び配線回路基板を互いに接続すると共に半導体チップ及び配線回路基板のそれぞれの接続部を互いに電気的に接続して半導体装置を得る工程、又は、半導体用接着剤を介して複数の半導体チップを互いに接続すると共に複数の半導体チップのそれぞれの接続部を互いに電気的に接続して半導体装置を得る工程を備える。
<Semiconductor device manufacturing method>
In the method for manufacturing a semiconductor device according to the present embodiment, a semiconductor chip and a wiring circuit board or a plurality of semiconductor chips are connected to each other using the semiconductor adhesive according to the present embodiment. The method of manufacturing a semiconductor device according to the present embodiment includes, for example, connecting a semiconductor chip and a wiring circuit board to each other via a semiconductor adhesive and electrically connecting respective connection portions of the semiconductor chip and the wiring circuit board to each other. Obtaining a semiconductor device by connecting the plurality of semiconductor chips to each other via a semiconductor adhesive and electrically connecting respective connection portions of the plurality of semiconductor chips to each other to obtain a semiconductor device.
 本実施形態に係る半導体装置の製造方法では、接続部を互いに金属接合によって接続することができる。すなわち、半導体チップ及び配線回路基板のそれぞれの接続部を互いに金属接合によって接続する、又は、複数の半導体チップのそれぞれの接続部を互いに金属接合によって接続する。 In the method for manufacturing a semiconductor device according to the present embodiment, the connection portions can be connected to each other by metal bonding. That is, the connection portions of the semiconductor chip and the printed circuit board are connected to each other by metal bonding, or the connection portions of the plurality of semiconductor chips are connected to each other by metal bonding.
 本実施形態に係る半導体装置の製造方法の一例として、図4に示す第6の半導体装置600の製造方法について説明する。第6の半導体装置600は、配線(銅配線)15を有する基板(例えばガラスエポキシ基板)60と、配線(例えば銅ピラー、銅ポスト)15を有する半導体チップ10とが接着材料40を介して互いに接続されている。半導体チップ10の配線15と基板60の配線15とは、接続バンプ(はんだバンプ)30により電気的に接続されている。基板60における配線15が形成された表面には、接続バンプ30の形成位置を除いてソルダーレジスト70が配置されている。 と し て As an example of the method of manufacturing the semiconductor device according to the present embodiment, a method of manufacturing the sixth semiconductor device 600 shown in FIG. 4 will be described. In the sixth semiconductor device 600, a substrate (for example, a glass epoxy substrate) 60 having a wiring (copper wiring) 15 and a semiconductor chip 10 having a wiring (for example, copper pillar, copper post) 15 are bonded to each other via an adhesive material 40. It is connected. The wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are electrically connected by connection bumps (solder bumps) 30. The solder resist 70 is arranged on the surface of the substrate 60 where the wiring 15 is formed, except for the position where the connection bump 30 is formed.
 第6の半導体装置600の製造方法では、まず、ソルダーレジスト70が形成された基板60上に半導体用接着剤(フィルム状接着剤等)を貼付する。貼付は、加熱プレス、ロールラミネート、真空ラミネート等によって行うことができる。半導体用接着剤の供給面積及び厚みは、半導体チップ10又は基板60のサイズ、バンプ高さ等によって適宜設定される。半導体用接着剤を半導体チップ10に貼付してもよく、半導体ウエハに半導体用接着剤を貼付した後にダイシングして半導体チップ10に個片化することによって、半導体用接着剤を貼付した半導体チップ10を作製してもよい。この場合、高い光透過率を有する半導体用接着剤であれば、アライメントマークを覆っても視認性が確保されることから、半導体ウエハ(半導体チップ)のみならず、基板上においても貼付する範囲が制限されず、取り扱い性に優れる。 In the method of manufacturing the sixth semiconductor device 600, first, a semiconductor adhesive (such as a film adhesive) is attached to the substrate 60 on which the solder resist 70 is formed. The sticking can be performed by heating press, roll lamination, vacuum lamination, or the like. The supply area and the thickness of the semiconductor adhesive are appropriately set according to the size of the semiconductor chip 10 or the substrate 60, the bump height, and the like. The semiconductor adhesive may be adhered to the semiconductor chip 10. The semiconductor adhesive may be adhered to the semiconductor wafer, and the semiconductor chip 10 may be diced into individual semiconductor chips 10. May be produced. In this case, if a semiconductor adhesive having a high light transmittance is used, the visibility can be ensured even when the alignment mark is covered, so that the adhesive can be applied not only on the semiconductor wafer (semiconductor chip) but also on the substrate. It is not restricted and has excellent handling properties.
 半導体用接着剤を基板60又は半導体チップ10に貼り付けた後、半導体チップ10の配線15上の接続バンプ30と、基板60の配線15とをフリップチップボンダー等の接続装置を用いて位置合わせする。そして、半導体チップ10と基板60を接続バンプ30の融点以上の温度で加熱しながら押し付けて(接続部にはんだを用いる場合は、はんだ部分に240℃以上かかることが好ましい)、半導体チップ10と基板60を接続すると共に、半導体用接着剤を硬化させ、半導体用接着剤の硬化物からなる接着材料40によって半導体チップ10と基板60の間の空隙を封止充てんする。接続荷重は、バンプ数に依存するが、バンプの高さばらつき吸収、バンプ変形量の制御等を考慮して設定される。接続時間は、生産性向上の観点から、短時間が好ましい。はんだを溶融させ、酸化膜、表面の不純物等を除去し、金属接合を接続部に形成することが好ましい。 After the semiconductor adhesive is attached to the substrate 60 or the semiconductor chip 10, the connection bumps 30 on the wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are aligned using a connection device such as a flip chip bonder. . Then, the semiconductor chip 10 and the substrate 60 are pressed while being heated at a temperature equal to or higher than the melting point of the connection bump 30 (when solder is used for the connection portion, it is preferably applied to the solder portion at 240 ° C. or higher). At the same time, the semiconductor adhesive is cured, and the gap between the semiconductor chip 10 and the substrate 60 is sealed and filled with the adhesive material 40 made of a cured product of the semiconductor adhesive. The connection load depends on the number of bumps, but is set in consideration of bump height variation absorption, control of the amount of bump deformation, and the like. The connection time is preferably short from the viewpoint of improving productivity. It is preferable that the solder is melted, an oxide film, impurities on the surface and the like are removed, and a metal joint is formed at the connection portion.
 短時間の接続時間(圧着時間)とは、接続形成(本圧着)中に接続部に240℃以上かかる時間(例えば、はんだ使用時の時間)が10秒以下であることをいう。接続時間は、5秒以下が好ましく、3秒以下がより好ましい。 The short connection time (crimping time) means that the time required for the connection portion to be 240 ° C. or more (for example, the time when solder is used) is 10 seconds or less during the connection formation (final pressure bonding). The connection time is preferably 5 seconds or less, more preferably 3 seconds or less.
 本実施形態の半導体装置の製造方法では、位置合わせをした後に仮固定し(半導体用接着剤を介している状態)、リフロー炉で加熱処理することによってはんだバンプを溶融させて半導体チップと基板を接続することによって半導体装置を製造してもよい。仮固定は、金属接合を形成する必要性が顕著に要求されないため、上述の本圧着に比べて低荷重、短時間、低温度でもよく、生産性向上、接続部の劣化防止等のメリットが生じる。半導体チップと基板を接続した後、オーブン等で加熱処理を行って、半導体用接着剤を更に硬化させてもよい。加熱温度は、半導体用接着剤の硬化が進行し、好ましくはほぼ完全に硬化する温度である。加熱温度及び加熱時間は適宜設定すればよい。 In the method of manufacturing a semiconductor device according to the present embodiment, the semiconductor chip and the substrate are temporarily fixed after alignment (in a state in which the semiconductor adhesive is interposed), and are heated in a reflow furnace to melt the solder bumps, thereby bonding the semiconductor chip and the substrate. The semiconductor device may be manufactured by connecting. Temporary fixing does not require a significant need to form a metal bond, so that a lower load, a shorter time, and a lower temperature may be used as compared to the above-described full pressure bonding, and advantages such as improved productivity and prevention of deterioration of the connection portion are generated. . After connecting the semiconductor chip and the substrate, heat treatment may be performed in an oven or the like to further cure the semiconductor adhesive. The heating temperature is a temperature at which the curing of the semiconductor adhesive proceeds, and is preferably substantially complete. The heating temperature and the heating time may be set as appropriate.
 本実施形態に係る半導体装置の製造方法は、半導体チップと、基板、他の半導体チップ、又は、他の半導体チップに相当する部分を含む半導体ウエハと、これらの間に配置された半導体用接着剤(フィルム状接着剤)とを有し、半導体チップの接続部と基板又は他の半導体チップの接続部とが対向配置されている、積層体を、対向する一対の仮圧着用押圧部材で挟むことによって加熱及び加圧し、それにより半導体チップに基板、他の半導体チップ又は半導体ウエハを仮圧着する工程(仮圧着工程)と、半導体チップの接続部と基板又は他の半導体チップの接続部とを金属接合によって電気的に接続する工程(本圧着工程)と、をこの順に備える方法であってもよい。 The method for manufacturing a semiconductor device according to this embodiment includes a semiconductor chip, a substrate, another semiconductor chip, or a semiconductor wafer including a portion corresponding to another semiconductor chip, and a semiconductor adhesive disposed therebetween. (Film adhesive), and sandwiching the laminate, in which the connection portion of the semiconductor chip and the connection portion of the substrate or another semiconductor chip are arranged to face each other, between a pair of opposing temporary pressure-pressing pressing members. Heating and pressurizing, thereby temporarily bonding a substrate, another semiconductor chip or a semiconductor wafer to the semiconductor chip (temporary pressure bonding step), and connecting a connection portion of the semiconductor chip and a connection portion of the substrate or another semiconductor chip to a metal. And a step of electrically connecting by bonding (final pressure bonding step).
 上記製造方法においては、仮圧着工程で用いられる上記一対の仮圧着用押圧部材のうち少なくとも一方が、積層体を加熱及び加圧する時に、半導体チップの接続部の表面を形成している金属材料の融点、及び基板又は他の半導体チップの接続部の表面を形成している金属材料の融点よりも低い温度に加熱される。 In the above manufacturing method, at least one of the pair of temporary pressing members used in the temporary pressing step, when heating and pressing the laminate, is formed of a metal material forming a surface of a connection portion of the semiconductor chip. The substrate is heated to a temperature lower than the melting point and the melting point of the metal material forming the surface of the connection portion of the substrate or other semiconductor chip.
 一方、本圧着工程において、積層体は、半導体チップの接続部の表面を形成している金属材料の融点、又は基板若しくは他の半導体チップの接続部の表面を形成している金属材料の融点のうち少なくともいずれか一方の融点以上の温度に加熱される。ここで、本圧着工程は、例えば以下の方法で行うことができる。 On the other hand, in the final pressure bonding step, the laminate has a melting point of the metal material forming the surface of the connection portion of the semiconductor chip or the melting point of the metal material forming the surface of the connection portion of the substrate or another semiconductor chip. Heating is performed to at least one of the melting points or more. Here, the final pressure bonding step can be performed, for example, by the following method.
(第1の方法)
 積層体を、仮圧着用押圧部材とは別に準備された、対向する一対の本圧着用押圧部材で挟むことによって加熱及び加圧し、それにより半導体チップの接続部と基板又は他の半導体チップの接続部とを金属接合によって電気的に接続する。この場合、一対の本圧着用押圧部材のうち少なくとも一方が、積層体を加熱及び加圧する時に、半導体チップの接続部の表面を形成している金属材料の融点、又は基板若しくは他の半導体チップの接続部の表面を形成している金属材料の融点のうち少なくともいずれか一方の融点以上の温度に加熱される。
(First method)
The laminated body is heated and pressed by sandwiching it between a pair of opposing pressing members, which are prepared separately from the temporary pressing member, thereby connecting the connection portion of the semiconductor chip to the substrate or another semiconductor chip. The parts are electrically connected by metal bonding. In this case, at least one of the pair of pressure-bonding pressing members, when heating and pressing the laminate, the melting point of the metal material forming the surface of the connection portion of the semiconductor chip, or the substrate or other semiconductor chip. The heating is performed to a temperature equal to or higher than at least one of the melting points of the metal material forming the surface of the connection portion.
 上記方法によれば、接続部の表面を形成している金属材料の融点よりも低い温度で仮圧着する工程と、接続部の表面を形成している金属材料の融点以上の温度で本圧着する工程とを別々の圧着用押圧部材を用いて行うことで、それぞれの圧着用押圧部材の加熱及び冷却に要する時間を短縮することができる。そのため、1つの圧着用押圧部材で圧着するよりも短時間で生産性よく半導体装置を製造することができる。その結果、短時間で多くの高信頼性な半導体装置を製造できる。本圧着工程において一括して接続することができる。一括接続をする場合、本圧着では仮圧着と比較して、より多くの複数個の半導体チップを圧着するため、面積の大きな圧着ヘッドを備える圧着用押圧部材を使用することができる。このように複数の半導体チップを一括で本圧着して接続を確保することができると、半導体装置の生産性が向上する。 According to the above method, the step of temporarily press-bonding at a temperature lower than the melting point of the metal material forming the surface of the connection portion, and the final press-bonding at a temperature equal to or higher than the melting point of the metal material forming the surface of the connection portion By performing the process and the pressing using different pressing members for pressing, the time required for heating and cooling each pressing member for pressing can be reduced. Therefore, a semiconductor device can be manufactured with higher productivity in a shorter time than when crimping is performed with one crimping pressing member. As a result, many highly reliable semiconductor devices can be manufactured in a short time. Connections can be made collectively in the final pressure bonding step. In the case of performing the collective connection, in the final press bonding, a larger number of semiconductor chips are pressed than in the temporary press, so that a pressing member having a larger pressing head with a larger area can be used. When the plurality of semiconductor chips can be permanently pressed together to secure the connection, the productivity of the semiconductor device is improved.
(第2の方法)
 ステージ上に配置された複数の積層体又は複数の半導体チップ、半導体ウエハ及び接着剤を有する積層体とそれらを覆うように配置された一括接続用シートとを、ステージと該ステージに対向する圧着ヘッドとで挟むことによって一括して複数の積層体を加熱及び加圧し、それにより半導体チップの接続部と基板又は他の半導体チップの接続部とを金属接合によって電気的に接続する。この場合、ステージ及び圧着ヘッドのうち少なくとも一方が、半導体チップの接続部の表面を形成している金属材料の融点、又は基板若しくは他の半導体チップの接続部の表面を形成している金属材料の融点のうち少なくともいずれか一方の融点以上の温度に加熱される。
(Second method)
A pressure bonding head facing a stage and a batch connection sheet arranged so as to cover the plurality of laminates or a plurality of semiconductor chips, a semiconductor wafer, and a laminate having an adhesive disposed on the stage By heating and pressurizing the plurality of stacked bodies at once, the connection portion of the semiconductor chip and the connection portion of the substrate or another semiconductor chip are electrically connected by metal bonding. In this case, at least one of the stage and the pressure bonding head is formed of the melting point of the metal material forming the surface of the connection portion of the semiconductor chip, or of the metal material forming the surface of the connection portion of the substrate or another semiconductor chip. The heating is performed to a temperature equal to or higher than at least one of the melting points.
 上記方法によれば、複数の半導体チップと複数の基板、複数の他の半導体チップ又は半導体ウエハとを一括で本圧着する場合において、接続不良の半導体装置の割合を減らすことができる。 According to the above method, in the case where a plurality of semiconductor chips and a plurality of substrates, a plurality of other semiconductor chips, or a semiconductor wafer are collectively press-bonded together, the ratio of semiconductor devices having poor connection can be reduced.
 一括接続用シートの原料は特に限定されないが、例えば、ポリテトラフルオロエチレン樹脂、ポリイミド樹脂、フェノキシ樹脂、エポキシ樹脂、ポリアミド樹脂、ポリカルボジイミド樹脂、シアネートエステル樹脂、アクリル樹脂、ポリエステル樹脂、ポリエチレン樹脂、ポリエーテルスルホン樹脂、ポリエーテルイミド樹脂、ポリビニルアセタール樹脂、ウレタン樹脂、及びアクリルゴムが挙げられる。一括接続用シートは、耐熱性及びフィルム形成性に優れるという観点から、ポリテトラフルオロエチレン樹脂、ポリイミド樹脂、エポキシ樹脂、フェノキシ樹脂、アクリル樹脂、アクリルゴム、シアネートエステル樹脂、及びポリカルボジイミド樹脂から選ばれる少なくとも1種の樹脂を含むシートであってもよい。一括接続用シートの樹脂は、耐熱性及びフィルム形成性に特に優れるという観点から、ポリテトラフルオロエチレン樹脂、ポリイミド樹脂、フェノキシ樹脂、アクリル樹脂及びアクリルゴムから選ばれる少なくとも1種の樹脂を含むシートであってもよい。これらの樹脂は、1種を単独で又は2種以上を組み合わせて用いることができる。 The raw material of the sheet for collective connection is not particularly limited, for example, polytetrafluoroethylene resin, polyimide resin, phenoxy resin, epoxy resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, poly Examples include an ether sulfone resin, a polyetherimide resin, a polyvinyl acetal resin, a urethane resin, and an acrylic rubber. The sheet for collective connection is selected from a polytetrafluoroethylene resin, a polyimide resin, an epoxy resin, a phenoxy resin, an acrylic resin, an acrylic rubber, a cyanate ester resin, and a polycarbodiimide resin from the viewpoint of excellent heat resistance and film formability. It may be a sheet containing at least one resin. The resin for the sheet for collective connection is a sheet containing at least one resin selected from polytetrafluoroethylene resin, polyimide resin, phenoxy resin, acrylic resin and acrylic rubber, from the viewpoint of particularly excellent heat resistance and film formability. There may be. These resins can be used alone or in combination of two or more.
(第3の方法)
 積層体を、加熱炉内又はホットプレート上で、半導体チップの接続部の表面を形成している金属材料の融点、又は基板若しくは他の半導体チップの接続部の表面を形成している金属材料の融点のうち少なくともいずれか一方の融点以上の温度に加熱する。
(Third method)
The laminated body is heated in a heating furnace or on a hot plate, and the melting point of the metal material forming the surface of the connection portion of the semiconductor chip, or the melting point of the metal material forming the surface of the connection portion of the substrate or another semiconductor chip. Heat to a temperature that is at least one of the melting points.
 上記方法の場合も、仮圧着工程と、本圧着工程とを別々に行うことで、仮圧着用押圧部材の加熱及び冷却に要する時間を短縮することができる。そのため、1つの圧着用押圧部材で圧着するよりも短時間で生産性よく半導体装置を製造することができる。その結果、短時間で多くの高信頼性な半導体装置を製造できる。また、上記方法では、複数の積層体を加熱炉内又はホットプレート上で一括して加熱してもよい。これにより、更に高い生産性で半導体装置を製造することができる。 も Also in the case of the above method, the time required for heating and cooling of the pressing member for provisional pressure bonding can be reduced by separately performing the provisional pressure bonding step and the main pressure bonding step. Therefore, a semiconductor device can be manufactured with higher productivity in a shorter time than when crimping is performed with one crimping pressing member. As a result, many highly reliable semiconductor devices can be manufactured in a short time. Further, in the above method, a plurality of laminates may be heated collectively in a heating furnace or on a hot plate. Thereby, a semiconductor device can be manufactured with higher productivity.
 このような仮圧着工程と本圧着工程とを別々に行う製造方法では、複数の積層体を仮圧着した後、仮圧着した複数の積層体を一括して本圧着することができるが、その際に、複数の積層体のうちの例えば最初に仮圧着したものと、最後に仮圧着したものとで、本圧着後の品質にバラツキが生じないことが求められる。すなわち、上記最初に仮圧着したものは、最後に仮圧着したものよりも仮圧着状態で保持される時間が長くなるため、使用される半導体用接着剤は、仮圧着工程の始めから終わりまで粘度増加が生じ難いことが求められる。本実施形態に係る半導体用接着剤(フィルム状接着剤)は、経時的な粘度増加を抑制することができるため、上記要求を満たすことができ、上記製造方法に好適に使用することができる。 In such a manufacturing method in which the temporary press-bonding step and the main press-bonding step are separately performed, after the plurality of laminates are temporarily press-bonded, the plurality of temporarily-pressed laminates can be fully press-bonded collectively. In addition, it is required that, for example, of the plurality of laminates, the one subjected to temporary compression bonding first and the one subjected to temporary compression bonding last do not vary in quality after the final compression bonding. That is, since the first pre-compressed product is held in the pre-compressed state longer than the last pre-compressed product, the semiconductor adhesive used has a viscosity from the beginning to the end of the pre-compression process. It is required that the increase hardly occurs. The adhesive for semiconductors (film-like adhesive) according to the present embodiment can suppress the increase in viscosity over time, and thus can satisfy the above requirements and can be suitably used in the above manufacturing method.
 以下、実施例を挙げて本開示についてさらに具体的に説明する。ただし、本開示はこれら実施例に限定されるものではない。 Hereinafter, the present disclosure will be described more specifically with reference to examples. However, the present disclosure is not limited to these examples.
 各実施例及び比較例で使用した化合物は以下の通りである。
(a)無機フィラー
・エポキシ表面処理ナノシリカフィラー(グリシジル基を有する表面処理が施された無機フィラー、株式会社アドマテックス製、商品名「50nm SE-AH1」、平均粒径:約50nm、以下「SEナノシリカ」という。)
・メタクリル表面処理ナノシリカフィラー(株式会社アドマテックス製、商品名「50nm YA050C-HGF」、平均粒径:約50nm、以下「YAナノシリカ」という。)
The compounds used in each of the examples and comparative examples are as follows.
(A) Inorganic filler / epoxy surface treated nano-silica filler (inorganic filler having a glycidyl group and surface treatment, manufactured by Admatex Co., Ltd., trade name "50 nm SE-AH1", average particle size: about 50 nm, hereinafter referred to as "SE" It is called nano-silica.)
-Methacryl surface-treated nano silica filler (trade name "50 nm YA050C-HGF", manufactured by Admatechs Co., Ltd., average particle size: about 50 nm, hereinafter referred to as "YA nano silica")
(b)エポキシ樹脂
・トリフェノールメタン骨格含有多官能固形エポキシ樹脂(三菱ケミカル株式会社製、商品名「EP1032H60」、以下「EP1032」という。)
・柔軟性エポキシ樹脂(三菱ケミカル株式会社製、商品名「YL7175」、以下「YL7175」という。)
(B) Epoxy resin / triphenolmethane skeleton-containing polyfunctional solid epoxy resin (manufactured by Mitsubishi Chemical Corporation, trade name “EP1032H60”, hereinafter referred to as “EP1032”)
-Flexible epoxy resin (manufactured by Mitsubishi Chemical Corporation, trade name "YL7175", hereinafter referred to as "YL7175")
(c)硬化剤
・2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジンイソシアヌル酸付加体(四国化成工業株式会社製、商品名「2MAOK-PW」、以下「2MAOK」という。)
(C) Curing agent • 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct (trade name “2MAOK-PW manufactured by Shikoku Chemical Industry Co., Ltd.) , "Hereinafter referred to as" 2MAOK ".)
(d)重量平均分子量10000以上の高分子量成分
・アクリル樹脂(株式会社クラレ製、商品名「クラリティLA4285」、Mw/Mn=1.28、重量平均分子量Mw:80000、以下「LA4285」という。)
(D) A high molecular weight component / acrylic resin having a weight average molecular weight of 10,000 or more (trade name “Clarity LA4285”, manufactured by Kuraray Co., Ltd., Mw / Mn = 1.28, weight average molecular weight Mw: 80000, hereinafter referred to as “LA4285”)
(e)フラックス剤
・グルタル酸(シグマアルドリッチジャパン合同会社製、融点:約97℃)
(E) Flux agent / glutaric acid (manufactured by Sigma-Aldrich Japan G.K., melting point: about 97 ° C)
<フィルム状接着剤の作製>
(実施例1)
 エポキシ樹脂「EP1032」12.4g、「YL7175」0.72g、硬化剤「2MAOK」0.9g、グルタル酸1.2g、無機フィラー「SEナノシリカ」33.9g、アクリル樹脂「LA4285」6.0g、及び、シクロヘキサノン(樹脂ワニス中の固形分量が49質量%になる量)を仕込み、直径1.0mmのジルコニアビーズを固形分と同質量加え、ビーズミル(フリッチュ・ジャパン株式会社製、遊星型微粉砕機P-7)で30分撹拌した。その後、撹拌に用いたジルコニアビーズをろ過によって除去し、樹脂ワニスを得た。
<Preparation of film adhesive>
(Example 1)
12.4 g of epoxy resin “EP1032”, 0.72 g of “YL7175”, 0.9 g of curing agent “2MAOK”, 1.2 g of glutaric acid, 33.9 g of inorganic filler “SE nanosilica”, 6.0 g of acrylic resin “LA4285”, And cyclohexanone (the amount of the solid content in the resin varnish becomes 49% by mass) is charged, and zirconia beads having a diameter of 1.0 mm are added in the same mass as the solid content, and a bead mill (Fritsch Japan K.K. The mixture was stirred for 30 minutes at P-7). Thereafter, the zirconia beads used for stirring were removed by filtration to obtain a resin varnish.
 得られた樹脂ワニスを基材フィルム(帝人デュポンフィルム株式会社製、商品名「ピューレックスA54」)上に小型精密塗工装置(株式会社康井精機製)で塗工し、塗工された樹脂ワニスをクリーンオーブン(エスペック株式会社製)で乾燥(100℃/5分)して、フィルム状接着剤を得た。厚みは0.02mmとなるよう作製した。 The obtained resin varnish is coated on a base film (manufactured by Teijin Dupont Film Co., Ltd., trade name "Purex A54") using a small precision coating apparatus (manufactured by Yasui Seiki Co., Ltd.), and the coated resin is coated. The varnish was dried (100 ° C./5 minutes) in a clean oven (manufactured by Espec Corporation) to obtain a film adhesive. The thickness was made 0.02 mm.
(実施例2)
 無機フィラー「SEナノシリカ」を17gに減らし、無機フィラー「YAナノシリカ」を17g加えたこと以外は、実施例1と同様にして、フィルム状接着剤を作製した。
(Example 2)
A film-like adhesive was produced in the same manner as in Example 1, except that the amount of the inorganic filler “SE nanosilica” was reduced to 17 g and the amount of the inorganic filler “YA nanosilica” was added 17 g.
(比較例1)
 無機フィラー「SEナノシリカ」をなくし、無機フィラー「YAナノシリカ」を33.9g加えたこと以外は、実施例1と同様にして、フィルム状接着剤を作製した。
(Comparative Example 1)
A film-like adhesive was produced in the same manner as in Example 1 except that the inorganic filler “SE nanosilica” was eliminated and 33.9 g of the inorganic filler “YA nanosilica” was added.
 表1に、実施例1~2及び比較例1の配合(単位:g)をまとめて示す。 Table 1 shows the compositions (unit: g) of Examples 1 and 2 and Comparative Example 1 collectively.
<評価>
 以下、実施例及び比較例で得られたフィルム状接着剤の評価方法を示す。
<Evaluation>
Hereinafter, evaluation methods of the film adhesives obtained in Examples and Comparative Examples will be described.
(1)ずり粘度測定サンプルの作製
 作製したフィルム状接着剤を卓上ラミネータ(株式会社ミラーコーポレーション製、商品名「ホットドッグGK-13DX」)にて、総厚が0.4mm(400μm)になるまで複数枚ラミネート(積層)し、縦7.3mm、横7.3mmサイズに切り抜き、測定サンプルを得た。
(1) Preparation of Shear Viscosity Measurement Sample The prepared film-like adhesive was applied to a desktop laminator (trade name “Hot Dog GK-13DX” manufactured by Mirror Corporation) until the total thickness became 0.4 mm (400 μm). A plurality of sheets were laminated (laminated) and cut out into a size of 7.3 mm in length and 7.3 mm in width to obtain a measurement sample.
(2)ずり粘度の測定
 得られた測定サンプルのずり粘度を、動的ずり粘弾性測定装置(ティー・エイ・インスツルメント・ジャパン株式会社製、商品名「ARES-G2」)にて測定した。測定条件は、昇温速度10℃/分、測定温度範囲30℃~145℃、周波数10Hzで行い、80℃での粘度値を読み取った。同様の方法で、室温(23℃、50%RH)で4週間放置後の測定サンプルについて、ずり粘度の測定を行った。室温放置前後のずり粘度の測定結果、及び、室温放置前後の粘度増加率を表2に示す。
(2) Measurement of Shear Viscosity The shear viscosity of the obtained measurement sample was measured by a dynamic shear viscoelasticity measuring device (trade name “ARES-G2” manufactured by TA Instruments Japan Co., Ltd.). . The measurement was performed at a heating rate of 10 ° C./min, a measuring temperature range of 30 ° C. to 145 ° C., and a frequency of 10 Hz, and the viscosity at 80 ° C. was read. In the same manner, the shear viscosity of the measurement sample left at room temperature (23 ° C., 50% RH) for 4 weeks was measured. Table 2 shows the measurement results of shear viscosity before and after standing at room temperature and the rate of increase in viscosity before and after standing at room temperature.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000003
Figure JPOXMLDOC01-appb-T000003
 表2の評価結果より、グリシジル基を有する表面処理が施された無機フィラーが無機フィラー全体の50質量%以上を占める実施例1及び実施例2のフィルム状接着剤では、室温放置前後の粘度増加率が20%以下であり、経時的な粘度増加が抑制されていることが確認された。これら実施例1及び実施例2のフィルム状接着剤は、経時的な粘度増加が抑制されているため、経時的に半導体装置組み立て時の実装性悪化が生じ難い。一方、グリシジル基を有する表面処理が施された無機フィラーが無機フィラー全体の50質量%未満である比較例1のフィルム状接着剤では、室温放置前後の粘度増加率が80%以上であり、経時的に粘度が増加しやすいことが分かった。 According to the evaluation results in Table 2, the viscosity of the film adhesives of Examples 1 and 2 in which the surface-treated inorganic filler having a glycidyl group accounts for 50% by mass or more of the entire inorganic filler is increased before and after being left at room temperature. The rate was 20% or less, and it was confirmed that the increase in viscosity over time was suppressed. In the film-like adhesives of Examples 1 and 2, the increase in viscosity with time is suppressed, and therefore, the mounting property at the time of assembling the semiconductor device hardly deteriorates with time. On the other hand, in the case of the film adhesive of Comparative Example 1 in which the surface-treated inorganic filler having a glycidyl group is less than 50% by mass of the entire inorganic filler, the viscosity increase before and after standing at room temperature is 80% or more, and It was found that the viscosity easily increased.
 10…半導体チップ、15…配線、20,60…基板、30…接続バンプ、32…バンプ、34…貫通電極、40…接着材料、50…インターポーザ、70…ソルダーレジスト、100,200,300,400,500,600…半導体装置。 DESCRIPTION OF SYMBOLS 10 ... Semiconductor chip, 15 ... Wiring, 20, 60 ... Substrate, 30 ... Connection bump, 32 ... Bump, 34 ... Through electrode, 40 ... Adhesive material, 50 ... Interposer, 70 ... Solder resist, 100, 200, 300, 400 , 500, 600 ... semiconductor devices.

Claims (6)

  1.  (a)無機フィラーを含有し、前記(a)無機フィラーが、グリシジル基を有する表面処理が施された無機フィラーを、前記(a)無機フィラー全量を基準として50質量%以上含む、半導体用接着剤。 (A) an adhesive for semiconductors, comprising an inorganic filler, wherein the (a) inorganic filler contains a glycidyl group-treated surface-treated inorganic filler in an amount of 50% by mass or more based on the total amount of the (a) inorganic filler. Agent.
  2.  (b)エポキシ樹脂、(c)硬化剤、及び、(d)重量平均分子量10000以上の高分子量成分を更に含有する、請求項1に記載の半導体用接着剤。 The adhesive for semiconductors according to claim 1, further comprising: (b) an epoxy resin, (c) a curing agent, and (d) a high molecular weight component having a weight average molecular weight of 10,000 or more.
  3.  (e)フラックス剤を更に含有する、請求項1又は2に記載の半導体用接着剤。 The adhesive for semiconductors according to claim 1 or 2, further comprising (e) a flux agent.
  4.  フィルム状である、請求項1~3のいずれか一項に記載の半導体用接着剤。 接着 The semiconductor adhesive according to any one of claims 1 to 3, which is in the form of a film.
  5.  半導体チップ及び配線回路基板のそれぞれの接続部が互いに電気的に接続された半導体装置、又は、複数の半導体チップのそれぞれの接続部が互いに電気的に接続された半導体装置の製造方法であって、
     前記接続部の少なくとも一部を、請求項1~4のいずれか一項に記載の半導体用接着剤を用いて封止する工程を備える、半導体装置の製造方法。
    A method of manufacturing a semiconductor device in which connection portions of a semiconductor chip and a wiring circuit board are electrically connected to each other, or a semiconductor device in which connection portions of a plurality of semiconductor chips are electrically connected to each other,
    A method for manufacturing a semiconductor device, comprising a step of sealing at least a part of the connection portion with the semiconductor adhesive according to any one of claims 1 to 4.
  6.  半導体チップ及び配線回路基板のそれぞれの接続部が互いに電気的に接続された接続構造、又は、複数の半導体チップのそれぞれの接続部が互いに電気的に接続された接続構造と、
     前記接続部の少なくとも一部を封止する接着材料と、を備え、
     前記接着材料は、請求項1~4のいずれか一項に記載の半導体用接着剤の硬化物からなる、半導体装置。
    A connection structure in which connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other, or a connection structure in which connection portions of the plurality of semiconductor chips are electrically connected to each other;
    An adhesive material for sealing at least a part of the connection portion,
    A semiconductor device, wherein the adhesive material comprises a cured product of the semiconductor adhesive according to any one of claims 1 to 4.
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