TW202033708A - Adhesive for semiconductors, method for producing semiconductor device, and semiconductor device - Google Patents

Abstract

An adhesive for semiconductors, which contains (a) an inorganic filler, and which is configured such that the inorganic filler (a) contains 50% by mass or more of a surface-treated inorganic filler that has a glycidyl group based on the total amount of the inorganic filler (a).

Description

Adhesive for semiconductor, method for manufacturing semiconductor device, and semiconductor device

This disclosure relates to an adhesive for semiconductors, a method of manufacturing a semiconductor device, and a semiconductor device.

In the past, when connecting a semiconductor chip (chip) to a substrate, a wire bonding method using thin metal wires such as gold wires has been widely used. On the other hand, in order to meet the requirements for higher functions, higher integration, and higher speed of semiconductor devices, conductive bumps called bumps are formed on semiconductor wafers or substrates to directly connect the semiconductor wafers and substrates. Flip chip connection (FC (flip chip) connection) is being promoted.

As the FC connection method, there is known a method of using solder, tin, gold, silver, copper, etc. to metal join the connection part, and the method of applying ultrasonic vibration to the connection part is metal joined. Methods of maintaining mechanical contact, etc. However, from the viewpoint of the reliability of the connection part, it is usually a method of metal bonding the connection part using solder, tin, gold, silver, copper, or the like.

For example, regarding the connection between semiconductor chips and substrates, ball grid arrays (Ball Grid Array, BGA), chip size packages (Chip Size Package, CSP), etc. are popularly used in Chip On Board (COB) connection methods It is also equivalent to FC connection. In addition, the FC connection method is also widely used in the chip on chip (COC) type that forms the connection (bumps or wiring) on the semiconductor chip and connects between the semiconductor chips, and on the semiconductor wafer A chip-on-wafer (COW) type connection method in which a connection portion (bump or wiring) is formed to connect between a semiconductor wafer and a semiconductor wafer (for example, refer to Patent Document 1).

In addition, in packages that strongly demand further miniaturization, thinning, and high functionality, chip stacked packages, stacked packages (Package On Package, POP), silicon Perforation (Through-Silicon Via, TSV) has also begun to spread widely. This type of lamination and multi-stage technology arranges semiconductor wafers three-dimensionally, and therefore, it is possible to reduce the package size compared to the two-dimensional arrangement method. In addition, this type of build-up and multi-stage technology is also effective in improving semiconductor performance, reducing noise, reducing mounting area, and saving power, so it is attracting attention as the next-generation semiconductor wiring technology. [Prior Art Literature] [Patent Literature]

Patent Document 1: Japanese Patent Laid-Open No. 2016-102165

[The problem to be solved by the invention] With regard to flip-chip packages that have advanced high-performance, high-integration, and low-cost, it is expected that the use will be further expanded in the future and the production volume will increase with this. In the continuous mass production of flip-chip packages, it is necessary to continuously supply the adhesive for semiconductors used, and therefore, the adhesive for semiconductors is required to have excellent stability over time. If the time-dependent stability of the adhesive for semiconductors is poor, the viscosity of the adhesive for semiconductors increases while it is left at room temperature, and there is a possibility that the mountability at the time of assembling a semiconductor device may deteriorate.

Therefore, an object of the present disclosure is to provide an adhesive for semiconductors that can suppress the increase in viscosity after being left at room temperature, and is unlikely to cause deterioration of mountability during assembly of semiconductor devices over time, and a semiconductor device using the adhesive for semiconductors Manufacturing method and semiconductor device. [Means to solve the problem]

In order to achieve the object, the present disclosure provides an adhesive for semiconductors, which contains (a) an inorganic filler, based on the total amount of the (a) inorganic filler, and the (a) inorganic filler contains 50% by mass or more. A surface-treated inorganic filler with glycidyl groups. According to the adhesive for semiconductors, (a) 50% by mass or more of the total inorganic filler is used as an inorganic filler that has been surface-treated with a glycidyl group, thereby suppressing moisture absorption during room temperature storage A situation where the viscosity increases due to the influence of incoming moisture. For example, in the case of inorganic fillers with other surface treatments such as surface treatments with methacrylic groups, the surface treatment agent forms hydrogen bonds with water and tends to increase the viscosity, but in the case of surface treatments with glycidyl groups In the case of inorganic fillers, it is difficult to form a hydrogen bond with moisture, so that viscosity increase is difficult to occur. Furthermore, according to the adhesive for semiconductors, since the viscosity increase after being left at room temperature can be suppressed, it is possible to suppress the deterioration of mountability during assembly of the semiconductor device over time. In addition, by performing a surface treatment with a glycidyl group on the inorganic filler, the dispersibility in the adhesive for semiconductors is excellent, and the adhesive for semiconductors can obtain good adhesive force and good insulation reliability.

The adhesive for semiconductors may further contain (b) an epoxy resin, (c) a curing agent, and (d) a high molecular weight component with a weight average molecular weight of 10,000 or more. In addition, the adhesive for semiconductors may further contain (e) flux.

The adhesive for semiconductors may be in the form of a film. In this case, the handleability of the adhesive for semiconductors can be improved, and the workability and productivity during package manufacturing can be improved.

In addition, the present disclosure provides a method of manufacturing a semiconductor device, which is a semiconductor device in which the respective connection portions of a semiconductor wafer and a wiring circuit board are electrically connected to each other, or a plurality of semiconductor wafers are electrically connected to each other. In the connected semiconductor device, the method of manufacturing the semiconductor device includes a step of sealing at least a part of the connection portion with the adhesive for semiconductor. According to the manufacturing method, the adhesive for semiconductors used is less likely to increase in viscosity over time, and therefore, good mountability can be stably obtained.

Furthermore, the present disclosure provides a semiconductor device including: a connection structure in which respective connection portions of a semiconductor chip and a wiring circuit board are electrically connected to each other, or a connection structure in which respective connection portions of a plurality of semiconductor chips are electrically connected to each other , And an adhesive material that seals at least a part of the connecting portion, the adhesive material including a cured product of the semiconductor adhesive. The semiconductor device has good mountability and excellent adhesion and reliability between the semiconductor chip and the wiring circuit board or the semiconductor chip. [Effects of the invention]

According to the present disclosure, it is possible to provide an adhesive for a semiconductor that can suppress the increase in viscosity after being left at room temperature, and is less likely to cause deterioration in mountability during assembly of a semiconductor device over time, and a method for manufacturing a semiconductor device using the adhesive for semiconductor And semiconductor devices.

Hereinafter, as appropriate, the preferred embodiments of the present disclosure will be described in detail with reference to the drawings. In addition, in the drawings, the same or corresponding parts are denoted with the same symbols and repeated descriptions are omitted. In addition, unless otherwise specified, positional relationships such as up, down, left, and right are regarded as based on the positional relationship shown in the drawings. Furthermore, the size ratio of the drawing is not limited to the ratio shown in the figure.

In this specification, the numerical range represented by "～" means a range that includes the numerical values described before and after "～" as the minimum and maximum values, respectively. In the numerical ranges described in this specification step by step, the upper limit or lower limit of the numerical range of a certain stage can be combined with the upper limit or lower limit of the numerical range of another stage arbitrarily. In the numerical range described in this specification, the upper limit or lower limit of the numerical range may be replaced with the value shown in the examples. The so-called "A or B" may include any one of A and B, and may include both. Unless otherwise specified, the materials exemplified in this specification can be used alone or in combination of two or more. In this specification, the "(meth)acrylic acid" refers to acrylic acid or methacrylic acid corresponding to it.

＜Adhesives for semiconductors＞ The adhesive for semiconductors of this embodiment contains (a) an inorganic filler (hereinafter, referred to as "(a) component" as appropriate). Based on the total amount of (a) the inorganic filler, the (a) inorganic filler contains 50% by mass or more of the inorganic filler that has been surface-treated with a glycidyl group. In addition, the adhesive for semiconductors of this embodiment may contain (b) epoxy resin (hereinafter, referred to as "(b) component" as appropriate), (c) hardener (hereinafter, referred to as "(c) component as appropriate") "), and (d) one or more of high molecular weight components with a weight average molecular weight of 10,000 or more (hereinafter referred to as "(d) component" as appropriate). Furthermore, the adhesive for semiconductors of this embodiment may contain (e) flux (hereinafter, referred to as "(e) component" as appropriate). Hereinafter, each component will be described.

((A) component: inorganic filler) As the inorganic filler of the component (a), insulating inorganic fillers and the like can be cited. Among them, an inorganic filler having an average particle diameter of 100 nm or less is more preferable. Examples of materials for insulating inorganic fillers include glass, silica, alumina, silica-alumina, titania, mica, boron nitride, etc. Among them, silica, alumina, and silica are preferred. Silica-alumina, titanium oxide, boron nitride, more preferably silicon dioxide, aluminum oxide, boron nitride. The insulating inorganic filler may also be whiskers. Examples of materials for the whiskers include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride. The insulating inorganic filler can be used alone or in combination of two or more.

From the viewpoint of improvement in dispersibility and adhesive force, the component (a) is preferably a surface treatment filler. Examples of surface treatments include glycidyl-based (epoxy-based), amine-based, phenyl-based, phenylamino-based, acrylic, vinyl, and the like.

As the surface treatment, in terms of easiness of surface treatment, silane treatment with a silane compound such as an epoxy silane-based, amino silane-based, and acrylic silane-based silane compound is preferred. As the surface treatment agent, from the viewpoint of excellent dispersibility and fluidity and further improvement of adhesive force, glycidyl-based, phenylamino-based, and (meth)acrylic-based compounds are preferred. As the surface treatment agent, a glycidyl-based compound is preferred from the viewpoint of suppressing the increase in the viscosity of the adhesive for semiconductors after being left at room temperature.

In this embodiment, the (a) component contains 50% by mass or more of an inorganic filler that has been surface-treated with a glycidyl group based on the total amount of the component (a). The surface treatment having a glycidyl group can be implemented using a glycidyl-based compound having a structure represented by the following general formula (1) as a surface treatment agent. Thereby, the inorganic filler has a structure represented by the following general formula (1) on the surface.

式中，R表示二價有機基。[化1]

In the formula, R represents a divalent organic group.

The content of the inorganic filler that has been surface-treated with a glycidyl group is 50% by mass or more based on the total amount of the component (a). From the viewpoint of further suppressing the increase in the viscosity of the semiconductor adhesive after being left at room temperature, It is preferably 60% by mass or more, and more preferably 80% by mass or more. The total amount (100% by mass) of the component (a) may be an inorganic filler that has been surface-treated with a glycidyl group.

From the viewpoint of improving visibility (transparency), the average particle size of the component (a) is preferably 100 nm or less, and more preferably 60 nm or less. (A) The average particle size of the component can be measured with a laser diffraction particle size distribution meter.

In addition, if the average particle size of the component (a) exceeds 100 nm, the viscosity of the semiconductor adhesive may become too low due to the large particle size, which may be called fillet after mounting of the semiconductor wafer. Fillet resin overflows out of the wafer. In contrast, if the average particle size of the component (a) is 100 nm or less, the viscosity of the semiconductor adhesive can be easily adjusted to a preferable range, and the generation of corner fillers can be sufficiently suppressed, or corner fillers can be sufficiently reduced the amount.

The lower limit of the average particle diameter of the component (a) is not particularly limited, but from the viewpoint of suppressing aggregation of the component (a), it may be 1 nm or more, 5 nm or more, or 10 nm or more. In the case of using an inorganic filler that has not been surface-treated, for example, an average particle size of about 50 nm may cause aggregation. However, in the case of using an inorganic filler that has been surface-treated with a glycidyl group, the average particle size A diameter of about 50 nm or less can also suppress aggregation.

(A) The component can also be used alone or in the form of a mixture of two or more kinds. There are no particular restrictions on the shape of the component (a).

Based on the total solid content of the semiconductor adhesive, the content of component (a) is preferably 10% by mass to 80% by mass, more preferably 15% by mass to 60% by mass, and still more preferably 20% by mass to 50% by mass quality%. If the content is 10% by mass or more, there is a tendency to further improve the adhesive strength and reflow resistance, and if it is 80% by mass or less, there is a tendency to suppress the decrease in connection reliability due to viscosity increase.

The adhesive for semiconductors of this embodiment may contain a resin filler. Examples of the resin filler include fillers containing resins such as polyurethane and polyimide. Compared with other organic components (epoxy resins, hardeners, etc.), resin fillers have a low thermal expansion coefficient, and therefore have an excellent effect of improving connection reliability. In addition, according to the resin filler, the viscosity of the adhesive for semiconductors can be easily adjusted. In addition, resin fillers have an excellent stress-relieving function compared to inorganic fillers.

From the viewpoint of insulation reliability, the filler contained in the adhesive for semiconductors is preferably insulating. The adhesive for semiconductors preferably does not contain conductive metal fillers such as silver fillers and solder fillers. Adhesives for semiconductors (circuit connection materials) that do not contain conductive fillers (conductive particles) are sometimes also called non-conductive films (Non-Conductive-FILM, NCF) or non-conductive pastes (Non-Conductive-Paste, NCP). The adhesive for semiconductors of this embodiment can be preferably used as NCF or NCP.

((B) component: epoxy resin) The epoxy resin of component (b) includes epoxy resins having two or more epoxy groups in the molecule, and usable: bisphenol A epoxy resin, bisphenol F epoxy resin, naphthalene epoxy resin , Phenol novolak type epoxy resin, cresol novolak type epoxy resin, phenol aralkyl type epoxy resin, biphenyl type epoxy resin, triphenylmethane type epoxy resin, dicyclopentadiene type ring Oxygen resin, various multifunctional epoxy resins, etc. (B) A component can be used individually by 1 type or in combination of 2 or more types.

Among epoxy resins, the 1% thermal weight loss temperature of bisphenol A type or bisphenol F type liquid epoxy resin is 250° C. or less, so it may decompose when heated at high temperature and generate volatile components. Therefore, it is preferable to use an epoxy resin that is solid at room temperature (1 atm, 25°C). When a liquid epoxy resin is used, it is preferably used in combination with a solid epoxy resin.

(B) The weight average molecular weight of the component may be less than 10,000, and from the viewpoint of heat resistance, it is preferably 100 or more and less than 10,000, more preferably 300 or more and 8,000 or less, and still more preferably 300 or more and 5,000 or less.

Based on the total solid content of the semiconductor adhesive, the content of component (b) is preferably 10% by mass to 50% by mass, more preferably 20% by mass to 45% by mass, and still more preferably 30% by mass to 40% by mass. quality%. (B) If the content of the component is 10% by mass or more, it is easy to sufficiently control the flow of the cured resin, and if it is 50% by mass or less, the resin component of the cured product will not be too much, and it is easy to reduce the warpage of the package.

The adhesive for semiconductors of this embodiment may further contain thermosetting resins other than the above-mentioned (b) epoxy resin. Examples of other thermosetting resins include phenol resins, imine resins, and (meth)acrylic compounds.

((C) component: hardener) (C) Hardeners include phenol resin hardeners, acid anhydride hardeners, amine hardeners, imidazole hardeners, and phosphine hardeners. If the component (c) contains a phenolic hydroxyl group, acid anhydride, amines, or imidazoles, it is easy to exhibit flux activity that suppresses the generation of an oxide film in the connection portion, and it is possible to easily improve connection reliability and insulation reliability. Hereinafter, each curing agent will be described.

(C-i) Phenolic resin hardener Examples of phenol resin curing agents include curing agents having two or more phenolic hydroxyl groups in the molecule, and can be used: phenol novolak resin, cresol novolak resin, phenol aralkyl resin, cresol naphthol formaldehyde condensation polymer, Triphenylmethane type multifunctional phenol resin, various multifunctional phenol resins, etc. The phenol resin curing agent can be used alone or in combination of two or more.

From the viewpoint of excellent curability, adhesiveness, and storage stability, the equivalent ratio of the phenol resin curing agent to the component (b) (phenolic hydroxyl group/epoxy group, molar ratio) is preferably 0.3 to 1.5, more preferably 0.4 to 1.0, still more preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, the curability will be improved and the adhesion tends to improve. If it is 1.5 or less, unreacted phenolic hydroxyl groups will not remain excessively, the water absorption rate will be suppressed to a low value, and the insulation reliability will be improved. Tendency to improve.

(C-ii) Acid anhydride hardener As an acid anhydride hardener, you can use: methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic dianhydride, ethylene glycol bistrimellitic anhydride Wait. The acid anhydride hardener can be used alone or in combination of two or more.

From the viewpoint of excellent curability, adhesiveness, and storage stability, the equivalent ratio (anhydride group/epoxy group, molar ratio) of the acid anhydride-based curing agent to the component (b) is preferably 0.3 to 1.5. It is more preferably 0.4 to 1.0, and still more preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, the curability is improved and the adhesion tends to be improved. If it is 1.5 or less, unreacted acid anhydride does not remain excessively, the water absorption is suppressed to a low value, and the insulation reliability is further improved. tendency.

(C-iii) Amine hardener As the amine curing agent, dicyandiamine, various amine compounds, and the like can be used.

From the viewpoint of excellent curability, adhesiveness, and storage stability, the equivalent ratio (amine/epoxy group, molar ratio) of the amine-based curing agent to the component (b) is preferably 0.3 to 1.5, and more It is preferably 0.4 to 1.0, more preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, the curability is improved and the adhesive force tends to be improved, and if it is 1.5 or less, unreacted amines will not remain excessively, and the insulation reliability tends to be further improved.

(C-iv) Imidazole hardener Examples of imidazole hardeners include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1- Cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl -2-Phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, 2,4-bis Amino-6-[2'-undecylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-ethyl-4'-methan Imidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine isotriazine Polycyanic acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethyl Base imidazole, epoxy resin and imidazole adducts, etc. Among these, from the viewpoint of more excellent curability, storage stability, and connection reliability, 1-cyanoethyl-2-undecylimidazole and 1-cyano-2-phenylimidazole are preferred. , 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6- [2'-Methylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1' )]-Ethyl-s-triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole. The imidazole-based hardener can be used alone or in combination of two or more. Moreover, it can also be set as the latent hardening agent which microencapsulated these.

The content of the imidazole hardener is preferably 0.1 parts by mass to 20 parts by mass, and more preferably 0.1 parts by mass to 10 parts by mass relative to 100 parts by mass of the component (b). If the content of the imidazole-based curing agent is 0.1 parts by mass or more, the curability tends to be improved, and if it is 20 parts by mass or less, the adhesive composition does not harden before the formation of the metal joint, and there is a tendency that poor connection is less likely to occur.

(C-v) Phosphine hardener Examples of phosphine-based hardeners include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra(4-methylphenyl) borate, and tetraphenylphosphonium (4-fluorophenyl) borate. ) Borate, etc.

The content of the phosphine-based hardener is preferably 0.1 parts by mass to 10 parts by mass, and more preferably 0.1 parts by mass to 5 parts by mass relative to 100 parts by mass of the component (b). If the content of the phosphine-based hardening agent is 0.1 parts by mass or more, the curability tends to be improved, and if it is 10 parts by mass or less, the adhesive for semiconductors will not harden before the formation of metal bonding, and there is a tendency that poor connection will not easily occur.

The phenol resin curing agent, acid anhydride curing agent, and amine curing agent may be used alone or in combination of two or more. The imidazole-based curing agent and the phosphine-based curing agent may be used alone, respectively, but may also be used together with a phenol resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent.

As component (c), from the viewpoint of excellent curability, it is preferable to use a phenol resin curing agent and an imidazole curing agent together, an acid anhydride curing agent and an imidazole curing agent together, and an amine curing agent and an imidazole curing agent together. Use imidazole hardener alone. If it is connected in a short time, the productivity is improved, so it is more preferable to use an imidazole-based hardener with excellent quick-curing properties alone. In this case, if it is cured in a short time, volatile components such as low-molecular components can be suppressed, and therefore the generation of voids can also be easily suppressed.

((D) component: high molecular weight component with a weight average molecular weight of 10,000 or more) (D) High molecular weight components with a weight average molecular weight of 10,000 or more (except for the compound corresponding to component (b)) include: phenoxy resin, polyimide resin, polyamide resin, and polycarbodiimide Resin, cyanate ester resin, (meth)acrylic resin, polyester resin, polyethylene resin, polyether resin, polyether imide resin, polyvinyl acetal resin, polyurethane resin, acrylic rubber, etc. From the standpoint of excellent heat resistance and film formation properties, phenoxy resins, polyimide resins, (meth)acrylic resins, acrylic rubbers, cyanate ester resins, and polycarbodiimides are preferred. The resin is more preferably a phenoxy resin, a polyimide resin, a (meth)acrylic resin, or an acrylic rubber, and still more preferably a phenoxy resin. (D) The component can also be used alone or in the form of a mixture or copolymer of two or more kinds.

The mass ratio of the component (d) to the component (b) is not particularly limited. From the viewpoint of maintaining the film shape well, the content of the component (b) is preferably 0.01 part by mass relative to 1 part by mass of the component (d) ~5 parts by mass, more preferably 0.05 parts by mass to 4 parts by mass, and still more preferably 0.1 parts by mass to 3 parts by mass. If the content of the component (b) is 0.01 parts by mass or more, there is no decrease in curability or adhesiveness, and if the content is 5 parts by mass or less, there is no decrease in film formability and film formability.

(D) The weight average molecular weight of the component is 10,000 or more in terms of polystyrene. In order to individually exhibit good film formation properties, it is preferably 30,000 or more, more preferably 40,000 or more, and still more preferably 50,000 or more. When the weight average molecular weight is 10,000 or more, there is no possibility that the film formability will decrease. In addition, in this specification, the weight average molecular weight refers to the weight average molecular weight when measured by polystyrene conversion using high performance liquid chromatography (C-R4A manufactured by Shimadzu Corporation).

((E) component: flux) The adhesive for semiconductors may further contain (e) flux, which is a compound exhibiting flux activity (activity to remove oxides, impurities, etc.). Examples of the flux include nitrogen-containing compounds having non-covalent electron pairs (imidazoles, amines, etc.; among these, compounds contained in the component (c) are excluded), carboxylic acids, phenols, and alcohols. Furthermore, compared with alcohols, carboxylic acids exhibit more fluxing activity and are easier to improve connectivity.

From the viewpoint of solder wettability, the content of the component (e) is preferably 0.2% to 3% by mass, and more preferably 0.4% to 1.8% by mass based on the total solid content of the semiconductor adhesive.

The adhesive for semiconductors can be further formulated: ion trapping agent, antioxidant, silane coupling agent, titanium coupling agent, leveling agent, etc. These may be used alone or in combination of two or more. Regarding these blending amounts, they may be appropriately adjusted so as to exhibit the effects of each additive.

The shear viscosity at 80°C when the adhesive for semiconductor is made into a film is preferably 4500 Pa·s to 14000 Pa·s, more preferably 5000 Pa·s to 13000 Pa·s, and still more preferably 5000 Pa ·S～10000 Pa·s. With a shear viscosity of 4500 Pa·s or more, the generation of corner fillers can be sufficiently suppressed or the amount of corner fillers can be sufficiently reduced. With a shear viscosity of 14000 Pa·s or less, the mountability during semiconductor device assembly can be improved. For example, the shear viscosity of the film-like semiconductor adhesive can be measured using a dynamic shear viscoelasticity measuring device (manufactured by TA Instruments Japan Co., Ltd., trade name "ARES-G2", etc.). Measure under the conditions of 10℃/min, measuring temperature range 30℃～145℃, and frequency 10 Hz. The value of the viscosity value measured by the above method at 80° C. can be obtained as the shear viscosity at 80° C. when the adhesive for semiconductors is formed into a film.

＜Method of manufacturing adhesive for semiconductor＞ From the viewpoint of productivity improvement, the adhesive for semiconductors of the present embodiment is preferably in the form of a film (film-like adhesive). Hereinafter, the method for producing the film adhesive will be described.

First, add (a) component, (b) component, (c) component, (d) component and other components as necessary to an organic solvent, and then dissolve or disperse it by stirring, mixing, kneading, etc. to prepare a resin varnish . After that, on the base film that has undergone a mold release treatment, it is coated with a blade coater, roll coater, applicator, die coater, comma coater, etc. After the resin varnish is applied, the organic solvent is reduced by heating to form a film-like adhesive on the base film. In addition, a film-like adhesive may be formed on the wafer by the following method: before the organic solvent is reduced by heating, the resin varnish is spin-coated on the wafer or the like to form a film, and then the solvent is dried.

As the organic solvent used in the preparation of the resin varnish, it is preferable to have the characteristic of uniformly dissolving or dispersing each component. For example, dimethylformamide, dimethylacetamide, and N-methyl- 2-pyrrolidone, dimethyl sulfide, diethylene glycol dimethyl ether, toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, Butyl cellosolve, dioxane, cyclohexanone, and ethyl acetate. These organic solvents can be used alone or in combination of two or more. The stirring, mixing and kneading at the time of preparing the resin varnish can be performed using, for example, a mixer, an attritor, a three-roller, a ball mill, a bead mill, or a homogenizer.

The base film is not particularly limited as long as it has heat resistance that can withstand the heating conditions when the organic solvent is volatilized. Examples include polyester film, polypropylene film, polyethylene terephthalate film, and poly Imide film, polyether imine film, polyether naphthalate film, methyl pentene film, etc. The base film is not limited to a single-layer film including one of these films, and may be a multilayer film including two or more films.

As the conditions for volatilizing the organic solvent from the resin varnish after coating, specifically, it is preferable to perform heating at 50°C to 200°C for 0.1 minute to 90 minutes. As long as it does not affect the voids, viscosity adjustment, etc. after mounting, it is preferable to set the conditions under which the organic solvent volatilizes to 1.5% by mass or less.

From the viewpoints of visibility, fluidity, and filling properties, the thickness of the film in the film-like adhesive of this embodiment is preferably 10 μm to 100 μm, and more preferably 20 μm to 50 μm.

＜Semiconductor device＞ The adhesive for semiconductors of this embodiment can be preferably used in semiconductor devices, in which the electrodes of the respective connection portions of the semiconductor wafer and the wiring circuit board are electrically connected to each other, or the respective connection of a plurality of semiconductor wafers In a semiconductor device in which the electrodes of the part are electrically connected to each other, it can be particularly preferably used for sealing the connection part. Hereinafter, a semiconductor device using the adhesive for semiconductor of this embodiment will be described. The electrodes of the connecting portion in the semiconductor device may be either metal bonding between bumps and wiring, and metal bonding between bumps and bumps. In a semiconductor device, for example, a flip chip connection in which electrical connection is obtained through an adhesive for semiconductor can be used.

1(a) and 1(b) are schematic cross-sectional views showing an embodiment of a semiconductor device (a COB-type connection of a semiconductor wafer and a substrate). As shown in FIG. 1(a), the first semiconductor device 100 has: a semiconductor wafer 10 and a substrate (wiring circuit board) 20 facing each other, and wirings 15 respectively arranged on the surfaces of the semiconductor wafer 10 and the substrate 20 facing each other , The connection bump 30 that connects the wiring 15 of the semiconductor wafer 10 and the substrate 20 to each other, and the adhesive material 40 that fills the gap between the semiconductor wafer 10 and the substrate 20 without gaps. The semiconductor chip 10 and the substrate 20 are connected via a flip chip by wiring 15 and connection bumps 30. The wiring 15 and the connection bump 30 are sealed by the adhesive material 40 and blocked from the external environment. The next material 40 is a cured product of the semiconductor adhesive of this embodiment.

As shown in FIG. 1(b), the second semiconductor device 200 has: a semiconductor wafer 10 and a substrate (wiring circuit board) 20 facing each other, and bumps respectively arranged on the surfaces of the semiconductor wafer 10 and the substrate 20 facing each other 32. Adhesive material 40 filled in the gap between the semiconductor wafer 10 and the substrate 20 without gaps. The semiconductor chip 10 and the substrate 20 are connected to each other by the bumps 32 facing each other to be connected by flip chip. The bump 32 is sealed by the adhesive material 40 and blocked from the external environment.

FIG. 2(a) and FIG. 2(b) are schematic cross-sectional views showing another embodiment of the semiconductor device (the COC-type connection of semiconductor wafers). As shown in (a) of FIG. 2, the third semiconductor device 300 is the same as the first semiconductor device 100 except that the two semiconductor chips 10 are flip-chip connected by wiring 15 and connection bumps 30. As shown in FIG. 2( b ), the fourth semiconductor device 400 is the same as the second semiconductor device 200 except that the two semiconductor chips 10 are flip-chip connected by bumps 32.

The semiconductor wafer 10 is not particularly limited, and various semiconductors such as elemental semiconductors composed of the same type of elements such as silicon and germanium; compound semiconductors such as gallium-arsenic and indium-phosphorus can be used.

The substrate 20 is not particularly limited as long as it is a wiring circuit substrate. It can be used: glass epoxy resin, polyimide resin, polyester resin, ceramic, epoxy resin, bismaleimide triazine resin A circuit board with wiring (wiring pattern) formed by etching and removing unnecessary parts of the formed metal layer on the surface of the insulating substrate as the main component; formed on the surface of the insulating substrate by metal plating, etc. A circuit board with wiring (wiring pattern); a circuit board with wiring (wiring pattern) formed by printing a conductive substance on the surface of the insulating substrate, etc.

The wiring 15, bumps 32, and other connecting parts contain gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), nickel, tin, lead, etc. as main components, also Can contain multiple metals.

On the surface of the wiring (wiring pattern), gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. may also be formed as main components Metal layer. The metal layer may contain only a single component or multiple components. In addition, it may be formed into a structure in which a plurality of metal layers are laminated. Copper and solder are usually used because of their low price. Furthermore, since copper and solder contain oxides, impurities, etc., the adhesive for semiconductors preferably has flux activity.

As the material of conductive protrusions called bumps, gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. can be used as main materials. The ingredients may include only a single ingredient or multiple ingredients. In addition, it can also be formed in a structure in which these metals are laminated. The bumps can also be formed on semiconductor wafers or substrates. Copper and solder are usually used because of their low price. Furthermore, since copper and solder contain oxides, impurities, etc., the adhesive for semiconductors preferably has flux activity.

In addition, semiconductor devices (packages) as shown in Figure 1 (a), Figure 1 (b) or Figure 2 (a), and Figure 2 (b) can also be stacked, and gold, silver, and copper can be used. , Solder (such as tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. are electrically connected. For example, as seen in TSV technology, an adhesive can be interposed between semiconductor wafers for flip-chip connection or build-up, forming a hole penetrating the semiconductor wafer and connecting with electrodes on the pattern surface.

FIG. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device (a semiconductor wafer laminated type (TSV)). As shown in FIG. 3, in the fifth semiconductor device 500, the wiring 15 formed on the interposer 50 is connected to the wiring 15 of the semiconductor chip 10 via the connection bumps 30, thereby connecting the semiconductor chip 10 and the interposer 50 flip chip connections. The gap between the semiconductor wafer 10 and the interposer 50 is filled with the adhesive material 40 without any gap. On the surface of the semiconductor wafer 10 opposite to the interposer 50, the semiconductor wafer 10 is repeatedly laminated via the wiring 15, the connection bump 30 and the adhesive material 40. The wirings 15 on the pattern surface of the front and back of the semiconductor wafer 10 are connected to each other by through electrodes 34 filled in holes penetrating the inside of the semiconductor wafer 10. In addition, as the material of the through electrode 34, copper, aluminum, or the like can be used.

With this TSV technology, signals can also be obtained from the backside of semiconductor chips that are not normally used. Furthermore, since the through electrode 34 penetrates vertically in the semiconductor wafer 10, the distance between the opposing semiconductor wafers 10 or between the semiconductor wafer 10 and the interposer 50 can be shortened, and flexible connection can be achieved. The adhesive for semiconductors of this embodiment can be preferably used as a sealing material between the opposing semiconductor wafers 10 or between the semiconductor wafer 10 and the interposer 50 in this TSV technology.

＜Method of manufacturing semiconductor device＞ The manufacturing method of the semiconductor device of this embodiment uses the adhesive for semiconductors of this embodiment to connect a semiconductor wafer, a wiring circuit board, or a plurality of semiconductor wafers to each other. The manufacturing method of the semiconductor device of the present embodiment includes, for example, a step of connecting a semiconductor wafer and a wiring circuit board to each other via an adhesive for semiconductors, and electrically connecting the respective connecting portions of the semiconductor wafer and the wiring circuit board to each other to obtain a semiconductor device Or a step of connecting a plurality of semiconductor wafers to each other via an adhesive for semiconductor, and electrically connecting the respective connecting portions of the plurality of semiconductor wafers to each other to obtain a semiconductor device.

In the manufacturing method of the semiconductor device of this embodiment, the connection portions can be connected to each other by metal bonding. That is, the respective connection portions of the semiconductor wafer and the wiring circuit board are connected to each other by metal bonding, or the respective connection portions of a plurality of semiconductor wafers are connected to each other by metal bonding.

As an example of the method of manufacturing the semiconductor device of this embodiment, a method of manufacturing the sixth semiconductor device 600 shown in FIG. 4 will be described. In the sixth semiconductor device 600, a substrate (for example, a glass epoxy substrate) 60 having wiring (copper wiring) 15 and a substrate (for example, copper pillar, copper post) 15 having wiring (for example, copper pillar and post) The semiconductor wafers 10 are connected to each other. The wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are electrically connected by connecting bumps (solder bumps) 30. On the surface of the substrate 60 on which the wiring 15 is formed, a solder resist 70 is arranged outside the position where the connection bump 30 is formed.

In the manufacturing method of the sixth semiconductor device 600, first, an adhesive for semiconductor (a film-like adhesive, etc.) is attached to the substrate 60 on which the solder resist 70 is formed. The attachment can be performed by heating and pressing, roll lamination, vacuum lamination and the like. The supply area and thickness of the adhesive for semiconductors can be appropriately set according to the size of the semiconductor wafer 10 or the substrate 60, the bump height, and the like. The adhesive for semiconductors can be attached to the semiconductor wafer 10, or the adhesive for semiconductors can be attached to the semiconductor wafer and then dicing to form the semiconductor wafer 10 into individual pieces, thereby making the adhesive for semiconductors attached. The semiconductor wafer 10. In this case, if it is an adhesive for semiconductors with high light transmittance, visibility can be ensured even if the alignment mark is covered, so it is not only pasted on the semiconductor wafer (semiconductor wafer) but also on the substrate The scope of attachment is not limited, and the operability is excellent.

After the adhesive for semiconductor is attached to the substrate 60 or the semiconductor wafer 10, the connection bumps 30 on the wiring 15 of the semiconductor wafer 10 and the wiring 15 of the substrate 60 are aligned using a connecting device such as a flip chip bonder. Then, the semiconductor wafer 10 and the substrate 60 are heated and pressed at a temperature higher than the melting point of the connecting bump 30 (in the case of using solder in the connecting part, it is preferable to apply 240°C or higher to the solder part), thereby the semiconductor wafer 10 is connected to the substrate 60, the adhesive for semiconductor is cured, and the gap between the semiconductor wafer 10 and the substrate 60 is sealed and filled with the adhesive 40 containing the cured product of the adhesive for semiconductor. The connection load depends on the number of bumps, but it should be set in consideration of absorbing the uneven height of the bumps and controlling the amount of bump deformation. From the standpoint of improving productivity, the connection time is preferably short. It is preferable to melt the solder to remove oxide films, surface impurities, etc., and to form a metal joint at the connection portion.

The short-term connection time (crimping time) means that the time (for example, the time when solder is used) to apply 240°C or more to the connection part during the connection formation (full crimping) process is 10 seconds or less. The connection time is preferably 5 seconds or less, more preferably 3 seconds or less.

In the manufacturing method of the semiconductor device of this embodiment, it is also possible to temporarily fix (via the state of the semiconductor adhesive) after the alignment and heat treatment in a reflow furnace to melt the solder bumps to melt the semiconductor wafer Connect with the substrate, thereby manufacturing a semiconductor device. Temporary fixation does not significantly require the formation of metal joints. Therefore, compared with the above-mentioned formal crimping, it can be low load, short time, and low temperature, resulting in improved productivity and prevention of deterioration of the connection portion. After the semiconductor wafer and the substrate are connected, heat treatment may be performed in an oven or the like to further harden the adhesive for semiconductors. The heating temperature is a temperature at which the adhesive for semiconductors hardens, and is preferably substantially completely hardened. The heating temperature and heating time may be appropriately set.

The manufacturing method of the semiconductor device of the present embodiment may be a method including the following steps in sequence: heating and pressing are performed by sandwiching a laminated body having a semiconductor wafer with a pair of opposing temporarily crimping pressing members. ; Substrates, other semiconductor wafers, or semiconductor wafers containing parts equivalent to other semiconductor wafers; and semiconductor adhesives (film-like adhesives) arranged between these, and the connection part of the semiconductor wafer and the substrate or other semiconductors The connection parts of the chip are arranged facing each other, thereby temporarily crimping the substrate, other semiconductor wafers or semiconductor wafers to the semiconductor chip (temporary crimping step); and metal bonding between the connection parts of the semiconductor chip and the substrate or other semiconductors The step of electrically connecting the connection part of the chip (formal crimping step).

In the manufacturing method, when at least one of the pair of pressing members for temporary pressure bonding used in the temporary pressure bonding step heats and presses the laminated body, it is heated to be higher than that of the connecting portion of the semiconductor wafer. The temperature at which the melting point of the metal material on the surface and the metal material forming the surface of the connection portion of the substrate or other semiconductor wafers are low.

On the other hand, in the main pressure bonding step, the laminated body is heated to at least the melting point of the metal material forming the surface of the connecting portion of the semiconductor wafer or the melting point of the metal material forming the surface of the connecting portion of the substrate or other semiconductor wafer Any temperature above the melting point. Here, the formal crimping step can be performed by the following method, for example.

(The first method) The laminated body is heated and pressurized by sandwiching the laminated body with a pair of facing pressing members prepared separately from the pressing member for temporary pressing, thereby connecting the connecting portion of the semiconductor chip to the substrate or other semiconductor chips The parts are electrically connected by metal bonding. In this case, when at least one of the pair of pressing members for main pressure bonding heats and presses the laminate, it is heated to the melting point of the metal material forming the surface of the connecting portion of the semiconductor wafer, or forms a substrate or other semiconductor The temperature of at least any one of the melting points of the metal material on the surface of the connection portion of the wafer.

According to the method, the step of temporarily crimping at a temperature lower than the melting point of the metal material forming the surface of the connecting portion is performed by using different pressing members for crimping, and the step of temporarily crimping with the metal material forming the surface of the connecting portion The step of performing the main crimping at a temperature above the melting point can shorten the time required for heating and cooling of the pressing members for crimping. Therefore, the semiconductor device can be manufactured with good productivity in a short period of time compared to crimping using one pressing member for crimping. As a result, a large number of highly reliable semiconductor devices can be manufactured in a short time. It can be connected in batches during the formal crimping step. In the case of batch connection, a plurality of semiconductor wafers are crimped in the main crimping process than temporarily crimped, so a crimping pressing member including a large area crimping joint can be used. If such a large number of semiconductor wafers can be mass-bonded to ensure the connection, the productivity of the semiconductor device will be improved.

(The second method) By using a platform and a pressure joint facing the platform to clamp a plurality of laminated bodies arranged on the platform or a laminated body having a plurality of semiconductor wafers, semiconductor wafers, and adhesives, and a laminated body arranged in such a way as to cover these The batch connection sheet heats and presses a plurality of laminates in batches, thereby electrically connecting the connection parts of the semiconductor chip and the connection parts of the substrate or other semiconductor chips by metal bonding. In this case, at least one of the platform and the pressure joint is heated to the melting point of the metal material forming the surface of the connecting portion of the semiconductor wafer, or the melting point of the metal material forming the surface of the connecting portion of the substrate or another semiconductor wafer. At least any temperature above the melting point.

According to the method, when a plurality of semiconductor wafers and a plurality of substrates, a plurality of other semiconductor wafers, or semiconductor wafers are subjected to formal crimping in batches, the proportion of semiconductor devices with poor connections can be reduced.

The raw material of the batch connection sheet is not particularly limited, and examples include polytetrafluoroethylene resin, polyimide resin, phenoxy resin, epoxy resin, polyamide resin, polycarbodiimide resin, and cyanide resin. Ester resins, acrylic resins, polyester resins, polyethylene resins, polyether resins, polyether imide resins, polyvinyl acetal resins, urethane resins, and acrylic rubbers. From the viewpoint of excellent heat resistance and film formability, the sheet for mass connection may be selected from polytetrafluoroethylene resin, polyimide resin, epoxy resin, phenoxy resin, acrylic resin, and acrylic rubber , Cyanate resin, and polycarbodiimide resin at least one resin sheet. From the viewpoint of particularly excellent heat resistance and film formability, the resin for the bulk connection sheet may be selected from polytetrafluoroethylene resin, polyimide resin, phenoxy resin, acrylic resin and acrylic rubber Of at least one resin sheet. These resins can be used individually by 1 type or in combination of 2 or more types.

(The third method) In the heating furnace or on the heating plate, the laminate is heated to at least any one of the melting point of the metal material forming the surface of the connecting portion of the semiconductor wafer or the melting point of the metal material forming the surface of the connecting portion of the substrate or other semiconductor wafer The temperature above the melting point.

In the case of the above method, by separately performing the temporary crimping step and the full crimping step, the time required for heating and cooling the pressing member for temporary crimping can also be shortened. Therefore, the semiconductor device can be manufactured with good productivity in a short period of time compared to crimping using one pressing member for crimping. As a result, a large number of highly reliable semiconductor devices can be manufactured in a short time. In addition, in the above method, a plurality of laminates may be heated in batches in a heating furnace or on a hot plate. Thereby, semiconductor devices can be manufactured with higher productivity.

In such a manufacturing method in which the temporary crimping step and the main crimping step are separately performed, after the plurality of laminated bodies are temporarily crimped, the plurality of temporarily crimped laminated bodies can be subjected to mass crimping. However, in this case, it is required that, among the plurality of laminates, for example, the first temporary crimping and the last temporary crimping do not cause deviation in the quality after the formal crimping. That is, the first temporarily crimped person has a longer time in the temporarily crimped state than the last temporarily crimped person. Therefore, the semiconductor adhesive used is required to be used from the beginning to the end of the temporary crimping step It is difficult to increase the viscosity so far. The adhesive for semiconductors (film-like adhesive) of the present embodiment can suppress the increase in viscosity over time, and therefore can satisfy the above-mentioned requirements, and can be preferably used in the above-mentioned manufacturing method. [Example]

Hereinafter, the present disclosure will be further described in detail with examples. However, the present disclosure is not limited to these embodiments.

The compounds used in the respective examples and comparative examples are as follows. (A) Inorganic filler ・Epoxy surface-treated nano-silica filler (inorganic filler with glycidyl-based surface treatment, manufactured by Admatechs Co., Ltd., brand name "50 nm SE-AH1", average particle size: About 50 nm, hereinafter referred to as "SE Nano Silica") ・Methacrylic acid surface-treated nano-silica filler (manufactured by Admatechs Co., Ltd., trade name "50 nm YA050C-HGF", average particle size: about 50 nm, hereinafter referred to as "YA nano two Silica")

(B) Epoxy resin ・Multifunctional solid epoxy resin containing triphenolmethane skeleton (manufactured by Mitsubishi Chemical Corporation, trade name "EP1032H60", hereinafter referred to as "EP1032") ・Flexible epoxy resin (manufactured by Mitsubishi Chemical Corporation, trade name "YL7175", hereinafter referred to as "YL7175")

(C) Hardener ・2,4-Diamino-6-[2'-methylimidazole-(1')]-ethyl-s-triazine isocyanuric acid adduct (manufactured by Shikoku Chemical Industry Co., Ltd., product Name "2MAOK-PW", hereafter referred to as "2MAOK")

(D) High molecular weight components with a weight average molecular weight of 10,000 or more ・Acrylic resin (manufactured by Kuraray Co., Ltd., trade name "Kurarity LA4285", Mw/Mn=1.28, weight average molecular weight Mw: 80000, hereafter referred to as "LA4285")

(E) Flux ・Glutaric acid (manufactured by Sigma Aldrich Co., Ltd., melting point: about 97°C)

＜Production of film adhesive＞ (Example 1) Filled with 12.4 g epoxy resin "EP1032", 0.72 g epoxy resin "YL7175", 0.9 g hardener "2MAOK", 1.2 g glutaric acid, 33.9 g inorganic filler "SE nanosilica", acrylic resin " LA4285" 6.0 g, and cyclohexanone (the amount of solid content in the resin varnish is 49% by mass), add zirconia beads with the same mass as the solid content of 1.0 mm in diameter, and use a bead mill (Japan Feichi (Fritsch) Co., Ltd., planetary micro pulverizer P-7) Stir for 30 minutes After that, the zirconia beads used for stirring were removed by filtration to obtain a resin varnish.

Coating the obtained resin varnish on the substrate film (manufactured by Teijin DuPont Film Co., Ltd., trade name "Purex (Purex) A54") using a small precision coating device (manufactured by Lianjing Seiki Co., Ltd.) , Use a clean oven (manufactured by ESPEC Co., Ltd.) to dry the applied resin varnish (100°C/5 minutes) to obtain a film adhesive. It is made so that the thickness becomes 0.02 mm.

(Example 2) Except that the inorganic filler "SE nanosilica" was reduced to 17 g, and 17 g of the inorganic filler "YA nanosilica" was added, the same procedure as in Example 1 was carried out to prepare a film-like adhesive.

(Comparative example 1) Except that the inorganic filler "SE nanosilica" was removed, and 33.9 g of the inorganic filler "YA nanosilica" was added, the same procedure as in Example 1 was carried out to prepare a film-like adhesive.

Table 1 collectively shows the formulations (unit: g) of Examples 1 to 2 and Comparative Example 1.

＜Evaluation＞ The evaluation method of the film adhesive obtained in the Example and the comparative example is shown below.

(1) Preparation of samples for shear viscosity measurement Use a desktop laminator (manufactured by Lami corporation, trade name "HOTDOG GK-13DX") to laminate (laminate) multiple sheets of the film-like adhesive to the total thickness It is 0.4 mm (400 μm), and cut out a size of 7.3 mm in length and 7.3 mm in width to obtain a measurement sample.

Shear viscosity determination The shear viscosity of the obtained measurement sample was measured using a dynamic shear viscoelasticity measuring device (manufactured by TA Instruments Japan Co., Ltd., trade name "ARES-G2"). The temperature was increased at a rate of 10°C/min, the measurement temperature range was 30°C to 145°C, and the frequency was 10 Hz. The viscosity value at 80°C was read. In the same way, the shear viscosity of the sample was measured after being placed at room temperature (23°C, 50%RH) for 4 weeks. Table 2 shows the measurement results of the shear viscosity before and after room temperature storage, and the viscosity increase rate before and after room temperature storage.

[Table 1] Example 1 Example 2 Comparative example 1 (A) Filling SE Nano Silica 33.9 17 - YA Nano Silica - 17 33.9 (B) Epoxy resin EP1032 12.4 12.4 12.4 YL7175 0.72 0.72 0.72 (C) Hardener 2MAOK 0.9 0.9 0.9 (D) High molecular weight components LA4285 6.0 6.0 6.0 (E) Flux Glutaric acid 1.2 1.2 1.2

[Table 2] Example 1 Example 2 Comparative example 1 Viscosity before storage at room temperature (Pa·s) 8579 11858 9951 Viscosity after storage at room temperature (Pa·s) 9950 12928 17,976 Viscosity increase rate (%) 16 9 81

According to the evaluation results in Table 2, it was confirmed that in the film-like adhesives of Examples 1 and 2 in which the inorganic filler having a glycidyl group surface treatment accounted for more than 50% by mass of the entire inorganic filler, before and after being left at room temperature The increase rate of the viscosity is less than 20%, and the increase in viscosity over time is suppressed. Since the film-like adhesives of Examples 1 and 2 suppress the increase in viscosity over time, it is unlikely that the deterioration of the mountability during the assembly of the semiconductor device will occur over time. On the other hand, it can be seen that in the film-like adhesive of Comparative Example 1 in which the inorganic filler subjected to the surface treatment with glycidyl group is less than 50% by mass of the entire inorganic filler, the viscosity increase rate before and after being left at room temperature is 80% or more. The viscosity tends to increase over time.

10: Semiconductor wafer 15: Wiring 20, 60: substrate 30: Connection bump 32: bump 34: Through electrode 40: Adhesive materials 50: Intermediary layer 70: Solder resist 100: semiconductor device/first semiconductor device 200: semiconductor device/second semiconductor device 300: semiconductor device / third semiconductor device 400: semiconductor device / fourth semiconductor device 500: semiconductor device / fifth semiconductor device 600: Semiconductor device/Sixth semiconductor device

1(a) and 1(b) are schematic cross-sectional views showing one embodiment of the semiconductor device of the present disclosure. 2(a) and 2(b) are schematic cross-sectional views showing another embodiment of the semiconductor device of the present disclosure. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device of the present disclosure. 4 is a schematic cross-sectional view showing another embodiment of the semiconductor device of the present disclosure.

10: Semiconductor wafer

15: Wiring

20: substrate

30: Connection bump

32: bump

40: Adhesive materials

100: semiconductor device/first semiconductor device

200: semiconductor device/second semiconductor device

Claims (6)

An adhesive for semiconductors, which contains (a) an inorganic filler, based on the total amount of the (a) inorganic filler, and the (a) inorganic filler contains 50% by mass or more of an inorganic surface-treated with a glycidyl group filler. The adhesive for semiconductors as described in item 1 of the scope of patent application further contains (b) epoxy resin, (c) hardener, and (d) high molecular weight components with a weight average molecular weight of 10,000 or more. The adhesive for semiconductors as described in item 1 or item 2 of the scope of patent application further contains (e) flux. The adhesive for semiconductors as described in any one of items 1 to 3 of the scope of patent application is in the form of a film. A method of manufacturing a semiconductor device, wherein the semiconductor device is a semiconductor device in which the respective connecting portions of a semiconductor wafer and a wiring circuit board are electrically connected to each other, or a semiconductor device in which the respective connecting portions of a plurality of semiconductor wafers are electrically connected to each other Device, the manufacturing method of the semiconductor device includes: The step of sealing at least a part of the connection part using the adhesive for semiconductors as described in any one of the first to fourth claims. A semiconductor device including: A connection structure in which the respective connection portions of a semiconductor chip and a printed circuit board are electrically connected to each other, or a connection structure in which the respective connection portions of a plurality of semiconductor chips are electrically connected to each other; and An adhesive material that seals at least a part of the connecting portion, The adhesive material includes the cured product of the adhesive for semiconductors as described in any one of items 1 to 4 in the scope of patent application.

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