WO2020056809A1 - Woled back plate and preparation method therefor - Google Patents

Woled back plate and preparation method therefor Download PDF

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Publication number
WO2020056809A1
WO2020056809A1 PCT/CN2018/109625 CN2018109625W WO2020056809A1 WO 2020056809 A1 WO2020056809 A1 WO 2020056809A1 CN 2018109625 W CN2018109625 W CN 2018109625W WO 2020056809 A1 WO2020056809 A1 WO 2020056809A1
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Prior art keywords
color film
layer
sub
woled
flat layer
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PCT/CN2018/109625
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French (fr)
Chinese (zh)
Inventor
唐甲
任章淳
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020056809A1 publication Critical patent/WO2020056809A1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment

Definitions

  • the present application relates to the field of display technology, and in particular, to a WOLED backplane and a method for preparing the same.
  • the flat layer is generally a highly penetrating organic material, and the multi-directionality of light propagation often causes pixels that do not need to emit light to emit light due to adjacent pixels emitting light, which appears as light leakage.
  • the present application provides a WOLED backplane and a method for manufacturing the same, which can solve the problem of light leakage caused by pixels.
  • the present application provides a method for preparing a WOLED backplane.
  • the method includes the following steps:
  • Step S10 providing a substrate having a bottom thin film transistor layer formed thereon, and forming a patterned color film on the bottom thin film transistor layer, the color film including sub color film units corresponding to the sub pixels in a spaced distribution;
  • Step S20 forming a flat layer on the color film, and patterning the flat layer to form a groove corresponding to a spaced position between two adjacent sub color film units;
  • Step S30 forming a patterned anode corresponding to the sub-color film unit on the flat layer;
  • a patterned pixel definition layer is formed at the position of the groove, and the pixel definition layer defines a pixel area, wherein a material of the pixel definition layer is a light-absorbing material.
  • the sub-color film unit includes a red color film unit, a green color film unit, and a blue color film unit.
  • the flat layer includes a completely reserved area and a partially reserved area, and the flat layer corresponding to the completely reserved area is completely completed in the patterning process in step S20. Occlusion, and half-exposing the flat layer corresponding to the partially reserved area.
  • the completely reserved area of the flat layer corresponds to the sub color film unit, and the partially reserved area corresponds to a space position between two adjacent sub color film units.
  • the method further includes the following steps:
  • Step S50 forming an organic light emitting layer in the pixel region
  • step S60 a cathode layer is formed on the organic light emitting layer.
  • this application also provides a WOLED backplane, including:
  • a bottom thin film transistor layer is prepared on the substrate
  • a color film prepared on the underlying thin film transistor layer including sub-color film units spaced apart from each other;
  • An anode which is prepared on the flat layer corresponding to the sub-color film unit array, and the anode is located at a position between the flat layer corresponding to two adjacent grooves, and the grooves are exposed;
  • a pixel definition layer prepared on the flat layer corresponding to the position of the groove, and defining a pixel area
  • the material of the pixel definition layer is a light absorbing material.
  • the groove and the sub-color film unit are separated by the flat layer.
  • the groove is a grid-like structure surrounding the sub-color film unit.
  • the pixel definition layer includes an insertion portion and a spacer portion, the insertion portion is inserted into the groove, the spacer portion protrudes from the flat layer and two adjacent Pixel areas are spaced apart.
  • the spacer portion extends to an edge portion of the anode.
  • the insertion portion and the spacer portion are designed in one piece.
  • this application also provides a WOLED backplane, including:
  • a bottom thin film transistor layer is prepared on the substrate
  • a color film prepared on the underlying thin film transistor layer including sub-color film units spaced apart from each other;
  • the anode is prepared on the flat layer corresponding to the sub-color film unit array
  • a pixel definition layer prepared on the flat layer corresponding to the position of the groove, and defining a pixel area
  • the material of the pixel definition layer is a light absorbing material.
  • the groove and the sub-color film unit are separated by the flat layer.
  • the groove is a grid-like structure surrounding the sub-color film unit.
  • the pixel definition layer includes an insertion portion and a spacer portion, the insertion portion is inserted into the groove, the spacer portion protrudes from the flat layer and two adjacent Pixel areas are spaced apart.
  • the spacer portion extends to an edge portion of the anode.
  • the insertion portion and the spacer portion are designed in one piece.
  • the beneficial effect of the present application is that, compared with the existing WOLED backplane, the WOLED backplane and the preparation method thereof provided by the present application are provided with grooves on a flat layer corresponding to the space between adjacent two color film units And inserting the insertion portion of the pixel definition layer of the light absorbing material in the groove, so that the inside of the flat layer provided on the color film separates the different color film units by the light absorbing material, thereby avoiding the occurrence of different pixels Problems with light leakage or color mixing.
  • the insertion portion is obtained by designing the pixel definition layer, so there is no need to increase the manufacturing process of the insertion portion.
  • FIG. 1 is a flowchart of a method for preparing a WOLED backplane according to an embodiment of the present application
  • FIGS. 2A ⁇ 2D are schematic diagrams of a manufacturing process of a WOLED back sheet provided in an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a WOLED backplane provided by an embodiment of the present application.
  • This application is directed to the existing WOLED backplane, which has the technical problem of light leakage or color mixing between adjacent pixels. This embodiment can solve this defect.
  • FIG. 1 it is a flowchart of a method for preparing a WOLED backplane provided by an embodiment of the present application.
  • Figs. 2A to 2D a schematic diagram of a manufacturing process of a WOLED backplane provided by an embodiment of the present application is shown. The method includes the following steps:
  • step S10 a substrate on which an underlying thin film transistor layer is formed is provided.
  • a patterned color film is formed on the underlying thin film transistor layer, and the color film includes sub-color film units corresponding to sub-pixels spaced apart from each other.
  • an underlying thin film transistor layer 202 is formed on a substrate 201; and a patterned color film 203 is formed on the underlying thin film transistor layer 202.
  • the color film 203 includes a sub color film unit 203A, and a gap 203B exists between two adjacent sub color film units 203A.
  • the sub-color film unit 203A includes, but is not limited to, a red sub-color film unit, a green sub-color film unit, and a blue sub-color film unit.
  • step S20 a flat layer is formed on the color film, and the flat layer is patterned to form a groove corresponding to a spaced position between two adjacent sub color film units.
  • a flat layer 204 is formed on the color film 203, and the flat layer 204 is patterned.
  • the flat layer 204 includes a fully reserved area 204B and a partially reserved area 204C.
  • the completely reserved area 204B corresponds to the sub-color film unit 203A
  • the partially reserved area 204C corresponds to the position 203B between two adjacent sub-color film units 203A.
  • the flat layer 204 corresponding to the completely reserved area 204B is completely blocked, and the flat layer 204 corresponding to the partially reserved area 204C is half-exposed.
  • a groove 204A corresponding to the position of the space 203B is formed.
  • the groove 204A may be a grid-like structure surrounding the sub-color film unit 203A.
  • step S30 a patterned anode corresponding to the sub-color film unit is formed on the flat layer.
  • an anode metal layer is prepared on the flat layer 204. After the anode metal layer is patterned, a plurality of anodes 205 corresponding to the sub-color film unit 203A are formed, and the anodes 205 expose the grooves. 204A.
  • a patterned pixel definition layer is formed at the position of the groove, and the pixel definition layer defines a pixel area, wherein a material of the pixel definition layer is a light-absorbing material.
  • a patterned pixel definition layer 206 is formed on the anode 205.
  • the pixel definition layer 206 uses a black light-absorbing material and is located at the position of the groove 204A.
  • the pixel definition layer 206 defines Pixel area 207.
  • the method further includes the following steps:
  • Step S50 forming an organic light emitting layer in the pixel region
  • step S60 a cathode layer is formed on the organic light emitting layer.
  • the organic light-emitting material forming the organic light-emitting layer may be an evaporation material or a printing light-emitting material.
  • the corresponding pixel definition layers 206 are conventional non-hydrophobic materials and hydrophobic materials, respectively.
  • the pixel definition layer can both define the pixel area and also serve as a light-shielding column between two adjacent sub-color film units, so that the inside of the flat layer provided on the color film is light-absorbing material. Different sub-color film units are spaced apart, thereby avoiding the problem of light leakage or color mixing between different pixels.
  • the WOLED backplane includes: a substrate 301; an underlying thin film transistor layer 302 prepared on the substrate 301; and a color film 303 prepared on the underlying film.
  • the color film 303 includes sub-color film units 303A spaced apart from each other; a flat layer 304 is prepared on the color film 303 and corresponds to an interval between two adjacent sub-color film units 303A.
  • a groove 304A is provided at the position of 303B; an anode 305 is prepared on the flat layer 304 corresponding to the sub-color film unit 303A; the anode 305 is located between the two flat grooves 304A corresponding to the two adjacent grooves 304A Part of the groove so that the groove 304A is exposed; a patterned pixel definition layer 306 is prepared on the flat layer 304 corresponding to the position of the groove 304A and defines a pixel area 307; wherein the pixel definition layer
  • the material of 306 is a light absorbing material; an organic light emitting layer can be prepared in the pixel region 307, and a cathode layer is prepared on the organic light emitting layer.
  • the groove 304A and the sub-color film unit 303A are separated by the flat layer 304.
  • the depth and size of the groove 304A can be designed according to actual needs.
  • the half-tone mask process can also be used, or the ordinary mask process can be used.
  • the pixel definition layer 306 includes an insertion portion 306A and a spacer portion 306B.
  • the insertion portion 306A is inserted into the groove 304A.
  • the spacer portion 306B protrudes from the flat layer 304 and connects two adjacent pixel regions. 307 are spaced apart.
  • the inserting portion 306A and the spacer portion 306B are integrally designed, and a portion of the spacer portion 306B that is in contact with the anode 305 extends to an edge portion of the anode 305. In this way, a gap is formed between the pixel defining layer 306 and the anode 305 to prevent light leakage.
  • the WOLED backplane may further include other conventional film layers, such as a thin film encapsulation layer, etc., and details are not described herein again.
  • the sub-color film unit 303A includes, but is not limited to, a red sub-color film unit, a green sub-color film unit, and a blue sub-color film unit.
  • the material of the pixel definition layer 306 in the present application is a material having extremely low light transmittance and can play a role of blocking light, which is not specifically limited.
  • the insertion portion 306A of the pixel definition layer 306 is located in the flat layer 304 and is located between two adjacent sub-color film units 303A. The light entering the flat layer 304 and directed to the adjacent sub-color film unit 303A is effectively blocked, so as to avoid light leakage or color mixing between adjacent pixels.

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Abstract

Provided in the present application are a WOLED back plate and a preparation method therefor. The WOLED back plate comprises: a bottom-layer thin-film transistor layer, a color film, a flat layer and an anode that are sequentially arranged on a substrate, wherein the color film comprises sub-color film units that are arranged at intervals, the flat layer is provided with a groove at a position corresponding to an interval between the two adjacent sub-color film units, and the anode is arranged corresponding to the sub-color film units; and a pixel definition layer, wherein same is arranged at a position, corresponding to the groove, on the flat layer, and the pixel definition layer is made of a light-absorbing material.

Description

一种WOLED背板及其制备方法WOLED back plate and preparation method thereof 技术领域Technical field
本申请涉及显示技术领域,尤其涉及一种WOLED背板及其制备方法。The present application relates to the field of display technology, and in particular, to a WOLED backplane and a method for preparing the same.
背景技术Background technique
随着背板解析度的不断提高,像素数量及子像素间间距不断减小,对于底发射型WOLED(COA)发光时,光线需要通过平坦层和R/G/B彩膜,由于底发光WOLED的平坦层一般是高穿透有机材料,光线传播的多向性,往往会导致不需要发光的像素由于相邻的像素发光而发光,表现为漏光。With the continuous improvement of the backplane resolution, the number of pixels and the spacing between sub-pixels continue to decrease. For bottom emission WOLED (COA) light, light needs to pass through the flat layer and R / G / B color film. The flat layer is generally a highly penetrating organic material, and the multi-directionality of light propagation often causes pixels that do not need to emit light to emit light due to adjacent pixels emitting light, which appears as light leakage.
因此,现有技术存在缺陷,急需改进。Therefore, the prior art has defects and urgently needs improvement.
技术问题technical problem
本申请提供一种WOLED背板及其制备方法,能够解决像素产生漏光的问题。The present application provides a WOLED backplane and a method for manufacturing the same, which can solve the problem of light leakage caused by pixels.
技术解决方案Technical solutions
为解决上述问题,本申请提供的技术方案如下:To solve the above problems, the technical solutions provided in this application are as follows:
本申请提供一种WOLED背板的制备方法,所述方法包括以下步骤:The present application provides a method for preparing a WOLED backplane. The method includes the following steps:
步骤S10,提供一形成有底层薄膜晶体管层的基板,在所述底层薄膜晶体管层上形成图案化的彩膜,所述彩膜包括对应子像素呈间隔分布的子彩膜单元;Step S10, providing a substrate having a bottom thin film transistor layer formed thereon, and forming a patterned color film on the bottom thin film transistor layer, the color film including sub color film units corresponding to the sub pixels in a spaced distribution;
步骤S20,在所述彩膜上形成平坦层,并对所述平坦层进行图案化,形成对应相邻两所述子彩膜单元之间间隔位置的凹槽;Step S20: forming a flat layer on the color film, and patterning the flat layer to form a groove corresponding to a spaced position between two adjacent sub color film units;
步骤S30,在所述平坦层上形成对应所述子彩膜单元的图案化的阳极;Step S30: forming a patterned anode corresponding to the sub-color film unit on the flat layer;
步骤S40,在所述凹槽位置形成图案化的像素定义层,所述像素定义层定义出像素区域,其中,所述像素定义层的材料为吸光材料。In step S40, a patterned pixel definition layer is formed at the position of the groove, and the pixel definition layer defines a pixel area, wherein a material of the pixel definition layer is a light-absorbing material.
在本申请的WOLED背板的制备方法中,所述子彩膜单元包括红色彩膜单元、绿色彩膜单元以及蓝色彩膜单元。In the method for preparing a WOLED backplane of the present application, the sub-color film unit includes a red color film unit, a green color film unit, and a blue color film unit.
在本申请的WOLED背板的制备方法中,所述平坦层包括完全保留区域和部分保留区域,在所述步骤S20中的图案化制程中对对应所述完全保留区域的所述平坦层进行完全遮挡,对对应所述部分保留区域的所述平坦层进行半曝光。In the method for manufacturing a WOLED backplane of the present application, the flat layer includes a completely reserved area and a partially reserved area, and the flat layer corresponding to the completely reserved area is completely completed in the patterning process in step S20. Occlusion, and half-exposing the flat layer corresponding to the partially reserved area.
在本申请的WOLED背板的制备方法中,所述平坦层的所述完全保留区域对应所述子彩膜单元,所述部分保留区域对应相邻两所述子彩膜单元之间的间隔位置。In the method for preparing a WOLED backplane of the present application, the completely reserved area of the flat layer corresponds to the sub color film unit, and the partially reserved area corresponds to a space position between two adjacent sub color film units. .
在本申请的WOLED背板的制备方法中,在所述步骤S40之后,所述方法还包括以下步骤:In the method for preparing a WOLED back sheet of the present application, after the step S40, the method further includes the following steps:
步骤S50,在所述像素区域形成有机发光层;Step S50: forming an organic light emitting layer in the pixel region;
步骤S60,在所述有机发光层上形成阴极层。In step S60, a cathode layer is formed on the organic light emitting layer.
为解决上述问题,本申请还提供一种WOLED背板,包括:To solve the above problems, this application also provides a WOLED backplane, including:
基板;Substrate
底层薄膜晶体管层,制备于所述基板上;A bottom thin film transistor layer is prepared on the substrate;
彩膜,制备于所述底层薄膜晶体管层上,所述彩膜包括间隔分布的子彩膜单元;以及A color film prepared on the underlying thin film transistor layer, the color film including sub-color film units spaced apart from each other; and
平坦层,制备于所述彩膜上,且在对应相邻两所述子彩膜单元之间的间隔位置设置有凹槽;A flat layer prepared on the color film and provided with a groove at a position corresponding to an interval between two adjacent color film units;
阳极,对应所述子彩膜单元阵列的制备于所述平坦层上,所述阳极位于所述平坦层对应相邻两所述凹槽之间的部位,且露出所述凹槽;An anode, which is prepared on the flat layer corresponding to the sub-color film unit array, and the anode is located at a position between the flat layer corresponding to two adjacent grooves, and the grooves are exposed;
像素定义层,对应所述凹槽的位置制备于所述平坦层上,并定义出像素区域;A pixel definition layer, prepared on the flat layer corresponding to the position of the groove, and defining a pixel area;
其中,所述像素定义层的材料为吸光材料。The material of the pixel definition layer is a light absorbing material.
在本申请的WOLED背板中,所述凹槽与所述子彩膜单元之间以所述平坦层隔开。In the WOLED backplane of the present application, the groove and the sub-color film unit are separated by the flat layer.
在本申请的WOLED背板中,所述凹槽为包围所述子彩膜单元的网格状结构。In the WOLED backplane of the present application, the groove is a grid-like structure surrounding the sub-color film unit.
在本申请的WOLED背板中,所述像素定义层包括插入部和间隔部,所述插入部插入到所述凹槽内,所述间隔部凸出所述平坦层并将相邻两所述像素区域间隔开。In the WOLED backplane of the present application, the pixel definition layer includes an insertion portion and a spacer portion, the insertion portion is inserted into the groove, the spacer portion protrudes from the flat layer and two adjacent Pixel areas are spaced apart.
在本申请的WOLED背板中,所述间隔部延伸至所述阳极的边缘部位。In the WOLED back sheet of the present application, the spacer portion extends to an edge portion of the anode.
在本申请的WOLED背板中,所述插入部与所述间隔部为一体式设计。In the WOLED backplane of the present application, the insertion portion and the spacer portion are designed in one piece.
为解决上述问题,本申请还提供一种WOLED背板,包括:To solve the above problems, this application also provides a WOLED backplane, including:
基板;Substrate
底层薄膜晶体管层,制备于所述基板上;A bottom thin film transistor layer is prepared on the substrate;
彩膜,制备于所述底层薄膜晶体管层上,所述彩膜包括间隔分布的子彩膜单元;以及A color film prepared on the underlying thin film transistor layer, the color film including sub-color film units spaced apart from each other; and
平坦层,制备于所述彩膜上,且在对应相邻两所述子彩膜单元之间的间隔位置设置有凹槽;A flat layer prepared on the color film and provided with a groove at a position corresponding to an interval between two adjacent color film units;
阳极,对应所述子彩膜单元阵列的制备于所述平坦层上;The anode is prepared on the flat layer corresponding to the sub-color film unit array;
像素定义层,对应所述凹槽的位置制备于所述平坦层上,并定义出像素区域;A pixel definition layer, prepared on the flat layer corresponding to the position of the groove, and defining a pixel area;
其中,所述像素定义层的材料为吸光材料。The material of the pixel definition layer is a light absorbing material.
在本申请的WOLED背板中,所述凹槽与所述子彩膜单元之间以所述平坦层隔开。In the WOLED backplane of the present application, the groove and the sub-color film unit are separated by the flat layer.
在本申请的WOLED背板中,所述凹槽为包围所述子彩膜单元的网格状结构。In the WOLED backplane of the present application, the groove is a grid-like structure surrounding the sub-color film unit.
在本申请的WOLED背板中,所述像素定义层包括插入部和间隔部,所述插入部插入到所述凹槽内,所述间隔部凸出所述平坦层并将相邻两所述像素区域间隔开。In the WOLED backplane of the present application, the pixel definition layer includes an insertion portion and a spacer portion, the insertion portion is inserted into the groove, the spacer portion protrudes from the flat layer and two adjacent Pixel areas are spaced apart.
在本申请的WOLED背板中,所述间隔部延伸至所述阳极的边缘部位。In the WOLED back sheet of the present application, the spacer portion extends to an edge portion of the anode.
在本申请的WOLED背板中,所述插入部与所述间隔部为一体式设计。In the WOLED backplane of the present application, the insertion portion and the spacer portion are designed in one piece.
有益效果Beneficial effect
本申请的有益效果为:相较于现有的WOLED背板,本申请提供的WOLED背板及其制备方法,通过在平坦层上对应相邻两子彩膜单元之间的间隔位置设置凹槽,并将吸光材料的像素定义层的插入部插入在所述凹槽内,使得设于彩膜上的平坦层的内部通过吸光材料将不同子彩膜单元间隔开,从而避免了不同像素间产生漏光或混色的问题。另外,该插入部是通过对像素定义层的设计得到的,因此不用另外增加插入部的制程。The beneficial effect of the present application is that, compared with the existing WOLED backplane, the WOLED backplane and the preparation method thereof provided by the present application are provided with grooves on a flat layer corresponding to the space between adjacent two color film units And inserting the insertion portion of the pixel definition layer of the light absorbing material in the groove, so that the inside of the flat layer provided on the color film separates the different color film units by the light absorbing material, thereby avoiding the occurrence of different pixels Problems with light leakage or color mixing. In addition, the insertion portion is obtained by designing the pixel definition layer, so there is no need to increase the manufacturing process of the insertion portion.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly explain the embodiments or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are only for application. For some embodiments, for those skilled in the art, other drawings can be obtained based on these drawings without paying creative labor.
图1为本申请实施例提供的WOLED背板的制备方法流程图;FIG. 1 is a flowchart of a method for preparing a WOLED backplane according to an embodiment of the present application; FIG.
图2A~2D为本申请实施例提供的WOLED背板的制备过程示意图;2A ~ 2D are schematic diagrams of a manufacturing process of a WOLED back sheet provided in an embodiment of the present application;
图3为为本申请实施例提供的WOLED背板结构示意图。FIG. 3 is a schematic structural diagram of a WOLED backplane provided by an embodiment of the present application.
本发明的实施方式Embodiments of the invention
以下各实施例的说明是参考附加的图示,用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本申请,而非用以限制本申请。在图中,结构相似的单元是用以相同标号表示。The following descriptions of the embodiments are with reference to the attached drawings to illustrate specific embodiments that can be implemented by the present application. The directional terms mentioned in this application, such as [up], [down], [front], [rear], [left], [right], [in], [out], [side], etc., are for reference only. The direction of the attached schema. Therefore, the directional terms used are used to explain and understand this application, not to limit this application. In the figure, similarly structured units are denoted by the same reference numerals.
本申请针对现有技术的WOLED背板,存在相邻像素间产生漏光或混色的技术问题,本实施例能够解决该缺陷。This application is directed to the existing WOLED backplane, which has the technical problem of light leakage or color mixing between adjacent pixels. This embodiment can solve this defect.
如图1所示,为本申请实施例提供的WOLED背板的制备方法流程图。结合图2A~2D所示,为本申请实施例提供的WOLED背板的制备过程示意图。所述方法包括以下步骤:As shown in FIG. 1, it is a flowchart of a method for preparing a WOLED backplane provided by an embodiment of the present application. With reference to Figs. 2A to 2D, a schematic diagram of a manufacturing process of a WOLED backplane provided by an embodiment of the present application is shown. The method includes the following steps:
步骤S10,提供一形成有底层薄膜晶体管层的基板,在所述底层薄膜晶体管层上形成图案化的彩膜,所述彩膜包括对应子像素呈间隔分布的子彩膜单元。In step S10, a substrate on which an underlying thin film transistor layer is formed is provided. A patterned color film is formed on the underlying thin film transistor layer, and the color film includes sub-color film units corresponding to sub-pixels spaced apart from each other.
具体如图2A所示,在基板201上形成有底层薄膜晶体管层202;在所述底层薄膜晶体管层202上形成图案化的彩膜203。其中,所述彩膜203包括子彩膜单元203A,且相邻两所述子彩膜单元203A之间存在间隔203B。所述子彩膜单元203A包括但不限于红色子彩膜单元、绿色子彩膜单元以及蓝色子彩膜单元。Specifically, as shown in FIG. 2A, an underlying thin film transistor layer 202 is formed on a substrate 201; and a patterned color film 203 is formed on the underlying thin film transistor layer 202. The color film 203 includes a sub color film unit 203A, and a gap 203B exists between two adjacent sub color film units 203A. The sub-color film unit 203A includes, but is not limited to, a red sub-color film unit, a green sub-color film unit, and a blue sub-color film unit.
步骤S20,在所述彩膜上形成平坦层,并对所述平坦层进行图案化,形成对应相邻两所述子彩膜单元之间间隔位置的凹槽。In step S20, a flat layer is formed on the color film, and the flat layer is patterned to form a groove corresponding to a spaced position between two adjacent sub color film units.
结合图2B所示,在所述彩膜203上形成平坦层204,对所述平坦层204进行图案化,所述平坦层204包括完全保留区域204B和部分保留区域204C,所述平坦层204的所述完全保留区域204B对应所述子彩膜单元203A,所述部分保留区域204C对应相邻两所述子彩膜单元203A之间的所述间隔203B位置。在图案化制程中对对应所述完全保留区域204B的所述平坦层204进行完全遮挡,对对应所述部分保留区域204C的所述平坦层204进行半曝光。图案化之后,形成对应所述间隔203B位置的凹槽204A。2B, a flat layer 204 is formed on the color film 203, and the flat layer 204 is patterned. The flat layer 204 includes a fully reserved area 204B and a partially reserved area 204C. The completely reserved area 204B corresponds to the sub-color film unit 203A, and the partially reserved area 204C corresponds to the position 203B between two adjacent sub-color film units 203A. In the patterning process, the flat layer 204 corresponding to the completely reserved area 204B is completely blocked, and the flat layer 204 corresponding to the partially reserved area 204C is half-exposed. After patterning, a groove 204A corresponding to the position of the space 203B is formed.
在一种实施例中,所述凹槽204A可以为包围所述子彩膜单元203A的网格状结构。In one embodiment, the groove 204A may be a grid-like structure surrounding the sub-color film unit 203A.
步骤S30,在所述平坦层上形成对应所述子彩膜单元的图案化的阳极。In step S30, a patterned anode corresponding to the sub-color film unit is formed on the flat layer.
结合图2C所示,在所述平坦层204上制备阳极金属层,所述阳极金属层图案化后形成多个对应所述子彩膜单元203A的阳极205,所述阳极205露出所述凹槽204A。As shown in FIG. 2C, an anode metal layer is prepared on the flat layer 204. After the anode metal layer is patterned, a plurality of anodes 205 corresponding to the sub-color film unit 203A are formed, and the anodes 205 expose the grooves. 204A.
步骤S40,在所述凹槽位置形成图案化的像素定义层,所述像素定义层定义出像素区域,其中,所述像素定义层的材料为吸光材料。In step S40, a patterned pixel definition layer is formed at the position of the groove, and the pixel definition layer defines a pixel area, wherein a material of the pixel definition layer is a light-absorbing material.
结合图2D所示,在所述阳极205上形成图案化的像素定义层206,所述像素定义层206采用黑色吸光材料,且位于所述凹槽204A的位置,所述像素定义层206定义出像素区域207。As shown in FIG. 2D, a patterned pixel definition layer 206 is formed on the anode 205. The pixel definition layer 206 uses a black light-absorbing material and is located at the position of the groove 204A. The pixel definition layer 206 defines Pixel area 207.
在所述步骤S40之后,所述方法还包括以下步骤:After the step S40, the method further includes the following steps:
步骤S50,在所述像素区域形成有机发光层;Step S50: forming an organic light emitting layer in the pixel region;
步骤S60,在所述有机发光层上形成阴极层。In step S60, a cathode layer is formed on the organic light emitting layer.
其中,形成所述有机发光层的有机发光材料可以是蒸镀材料,也可以是打印发光材料。与其对应的所述像素定义层206分别为常规非疏水性材料和疏水性材料。The organic light-emitting material forming the organic light-emitting layer may be an evaporation material or a printing light-emitting material. The corresponding pixel definition layers 206 are conventional non-hydrophobic materials and hydrophobic materials, respectively.
本实施例由于所述像素定义层既可以定义出所述像素区域,又可以作为相邻两所述子彩膜单元间的遮光柱,使得设于彩膜上的平坦层的内部通过吸光材料将不同所述子彩膜单元间隔开,从而避免了不同像素间产生漏光或混色的问题。In this embodiment, the pixel definition layer can both define the pixel area and also serve as a light-shielding column between two adjacent sub-color film units, so that the inside of the flat layer provided on the color film is light-absorbing material. Different sub-color film units are spaced apart, thereby avoiding the problem of light leakage or color mixing between different pixels.
本申请还提供一种WOLED背板,如图3所示,所述WOLED背板包括:基板301;底层薄膜晶体管层302,制备于所述基板301上;彩膜303,制备于所述底层薄膜晶体管层302上,所述彩膜303包括间隔分布的子彩膜单元303A;平坦层304,制备于所述彩膜303上,且在对应相邻两所述子彩膜单元303A之间的间隔303B的位置设置有凹槽304A;阳极305,对应所述子彩膜单元303A制备于所述平坦层304上;所述阳极305位于所述平坦层304对应相邻两所述凹槽304A之间的部位,使得露出所述凹槽304A;图案化的像素定义层306,对应所述凹槽304A的位置制备于所述平坦层304上,并定义出像素区域307;其中,所述像素定义层306的材料为吸光材料;所述像素区域307内可以制备有机发光层,所述有机发光层上制备有阴极层。This application also provides a WOLED backplane. As shown in FIG. 3, the WOLED backplane includes: a substrate 301; an underlying thin film transistor layer 302 prepared on the substrate 301; and a color film 303 prepared on the underlying film. On the transistor layer 302, the color film 303 includes sub-color film units 303A spaced apart from each other; a flat layer 304 is prepared on the color film 303 and corresponds to an interval between two adjacent sub-color film units 303A. A groove 304A is provided at the position of 303B; an anode 305 is prepared on the flat layer 304 corresponding to the sub-color film unit 303A; the anode 305 is located between the two flat grooves 304A corresponding to the two adjacent grooves 304A Part of the groove so that the groove 304A is exposed; a patterned pixel definition layer 306 is prepared on the flat layer 304 corresponding to the position of the groove 304A and defines a pixel area 307; wherein the pixel definition layer The material of 306 is a light absorbing material; an organic light emitting layer can be prepared in the pixel region 307, and a cathode layer is prepared on the organic light emitting layer.
所述凹槽304A与所述子彩膜单元303A之间以所述平坦层304隔开。所述凹槽304A的开槽深度、尺寸可根据实际需求设计,可以用半色调光罩制程,也可以是普通光罩制程。The groove 304A and the sub-color film unit 303A are separated by the flat layer 304. The depth and size of the groove 304A can be designed according to actual needs. The half-tone mask process can also be used, or the ordinary mask process can be used.
所述像素定义层306包括插入部306A和间隔部306B,所述插入部306A插入到所述凹槽304A内,所述间隔部306B凸出所述平坦层304并将相邻两所述像素区域307间隔开。所述插入部306A与所述间隔部306B为一体式设计,所述间隔部306B与所述阳极305接触的部位延伸至所述阳极305的边缘部位。以此避免所述像素定义层306与所述阳极305之间形成间隙从而产生漏光。所述WOLED背板还可以包括其他常规膜层,比如薄膜封装层等,此处不再赘述。The pixel definition layer 306 includes an insertion portion 306A and a spacer portion 306B. The insertion portion 306A is inserted into the groove 304A. The spacer portion 306B protrudes from the flat layer 304 and connects two adjacent pixel regions. 307 are spaced apart. The inserting portion 306A and the spacer portion 306B are integrally designed, and a portion of the spacer portion 306B that is in contact with the anode 305 extends to an edge portion of the anode 305. In this way, a gap is formed between the pixel defining layer 306 and the anode 305 to prevent light leakage. The WOLED backplane may further include other conventional film layers, such as a thin film encapsulation layer, etc., and details are not described herein again.
在本申请的一种实施例中,所述子彩膜单元303A包括但不限于红色子彩膜单元、绿色子彩膜单元以及蓝色子彩膜单元。In an embodiment of the present application, the sub-color film unit 303A includes, but is not limited to, a red sub-color film unit, a green sub-color film unit, and a blue sub-color film unit.
本申请的所述像素定义层306的材料为对光透过率极低的材料,能起到挡光作用,具体不做限制。The material of the pixel definition layer 306 in the present application is a material having extremely low light transmittance and can play a role of blocking light, which is not specifically limited.
在本申请的实施例中,如图中箭头所示,光线透光所述阳极305以及所述平坦层304射向所述子彩膜单元303A,由于底发光的所述平坦层304一般是高穿透有机材料,又由于光线传播的多向性,往往会导致不需要发光的像素由于相邻的像素发光而发光,表现出漏光或混色现象。本申请通过对所述像素定义层306的设计,使得所述像素定义层306的所述插入部306A位于所述平坦层304中,并且位于相邻两所述子彩膜单元303A之间,可以有效的将进入所述平坦层304并射向相邻所述子彩膜单元303A的光线遮挡住,从而避免相邻像素间产生漏光或混色的现象。In the embodiment of the present application, as shown by an arrow in the figure, light is transmitted through the anode 305 and the flat layer 304 to the sub-color film unit 303A. Since the flat layer 304 that emits light at the bottom is generally high Penetrating organic materials, and due to the multi-directional nature of light propagation, pixels that do not need to emit light often emit light due to the emission of adjacent pixels, showing light leakage or color mixing. Through the design of the pixel definition layer 306 in this application, the insertion portion 306A of the pixel definition layer 306 is located in the flat layer 304 and is located between two adjacent sub-color film units 303A. The light entering the flat layer 304 and directed to the adjacent sub-color film unit 303A is effectively blocked, so as to avoid light leakage or color mixing between adjacent pixels.
综上所述,虽然本申请已以优选实施例揭露如上,但上述优选实施例并非用以限制本申请,本领域的普通技术人员,在不脱离本申请的精神和范围内,均可作各种更动与润饰,因此本申请的保护范围以权利要求界定的范围为准。In summary, although the present application has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Those skilled in the art can make various modifications without departing from the spirit and scope of the present application. This modification and retouching, therefore, the scope of protection of this application shall be based on the scope defined by the claims.

Claims (17)

  1. 一种WOLED背板的制备方法,其中,所述方法包括以下步骤:A method for preparing a WOLED backplane, wherein the method includes the following steps:
    步骤S10,提供一形成有底层薄膜晶体管层的基板,在所述底层薄膜晶体管层上形成图案化的彩膜,所述彩膜包括对应子像素呈间隔分布的子彩膜单元;Step S10, providing a substrate having a bottom thin film transistor layer formed thereon, and forming a patterned color film on the bottom thin film transistor layer, the color film including sub color film units corresponding to the sub pixels in a spaced distribution;
    步骤S20,在所述彩膜上形成平坦层,并对所述平坦层进行图案化,形成对应相邻两所述子彩膜单元之间间隔位置的凹槽;Step S20: forming a flat layer on the color film, and patterning the flat layer to form a groove corresponding to a spaced position between two adjacent sub color film units;
    步骤S30,在所述平坦层上形成对应所述子彩膜单元的图案化的阳极;Step S30: forming a patterned anode corresponding to the sub-color film unit on the flat layer;
    步骤S40,在所述凹槽位置形成图案化的像素定义层,所述像素定义层定义出像素区域,其中,所述像素定义层的材料为吸光材料。In step S40, a patterned pixel definition layer is formed at the position of the groove, and the pixel definition layer defines a pixel area, wherein a material of the pixel definition layer is a light-absorbing material.
  2. 根据权利要求1所述的制备方法,其中,所述子彩膜单元包括红色彩膜单元、绿色彩膜单元以及蓝色彩膜单元。The method according to claim 1, wherein the sub-color film unit comprises a red color film unit, a green color film unit, and a blue color film unit.
  3. 根据权利要求1所述的制备方法,其中,所述平坦层包括完全保留区域和部分保留区域,在所述步骤S20中的图案化制程中对对应所述完全保留区域的所述平坦层进行完全遮挡,对对应所述部分保留区域的所述平坦层进行半曝光。The manufacturing method according to claim 1, wherein the flat layer includes a fully reserved area and a partially reserved area, and the flat layer corresponding to the fully reserved area is completely completed in the patterning process in step S20. Occlusion, and half-exposing the flat layer corresponding to the partially reserved area.
  4. 根据权利要求3所述的制备方法,其中,所述平坦层的所述完全保留区域对应所述子彩膜单元,所述部分保留区域对应相邻两所述子彩膜单元之间的间隔位置。The manufacturing method according to claim 3, wherein the completely reserved area of the flat layer corresponds to the sub-color film unit, and the partial reserved area corresponds to a space position between two adjacent sub-color film units. .
  5. 根据权利要求1所述的制备方法,其中,在所述步骤S40之后,所述方法还包括以下步骤:The method according to claim 1, wherein after the step S40, the method further comprises the following steps:
    步骤S50,在所述像素区域形成有机发光层;Step S50: forming an organic light emitting layer in the pixel region;
    步骤S60,在所述有机发光层上形成阴极层。In step S60, a cathode layer is formed on the organic light emitting layer.
  6. 一种WOLED背板,其包括:A WOLED backplane includes:
    基板;Substrate
    底层薄膜晶体管层,制备于所述基板上;A bottom thin film transistor layer is prepared on the substrate;
    彩膜,制备于所述底层薄膜晶体管层上,所述彩膜包括间隔分布的子彩膜单元;以及A color film prepared on the underlying thin film transistor layer, the color film including sub-color film units spaced apart from each other; and
    平坦层,制备于所述彩膜上,且在对应相邻两所述子彩膜单元之间的间隔位置设置有凹槽;A flat layer prepared on the color film and provided with a groove at a position corresponding to an interval between two adjacent color film units;
    阳极,对应所述子彩膜单元阵列的制备于所述平坦层上,所述阳极位于所述平坦层对应相邻两所述凹槽之间的部位,且露出所述凹槽;An anode, which is prepared on the flat layer corresponding to the sub-color film unit array, and the anode is located at a position between the flat layer corresponding to two adjacent grooves, and the grooves are exposed;
    像素定义层,对应所述凹槽的位置制备于所述平坦层上,并定义出像素区域;A pixel definition layer, prepared on the flat layer corresponding to the position of the groove, and defining a pixel area;
    其中,所述像素定义层的材料为吸光材料。The material of the pixel definition layer is a light absorbing material.
  7. 根据权利要求6所述的WOLED背板,其中,所述凹槽与所述子彩膜单元之间以所述平坦层隔开。The WOLED backplane according to claim 6, wherein the groove and the sub-color film unit are separated by the flat layer.
  8. 根据权利要求6所述的WOLED背板,所述凹槽为包围所述子彩膜单元的网格状结构。The WOLED backplane according to claim 6, wherein the groove is a grid-like structure surrounding the sub-color film unit.
  9. 根据权利要求6所述的WOLED背板,其中,所述像素定义层包括插入部和间隔部,所述插入部插入到所述凹槽内,所述间隔部凸出所述平坦层并将相邻两所述像素区域间隔开。The WOLED backplane according to claim 6, wherein the pixel defining layer includes an insertion portion and a spacer portion, the insertion portion is inserted into the groove, and the spacer portion projects from the flat layer and forms The two adjacent pixel regions are spaced apart.
  10. 根据权利要求9所述的WOLED背板,其中,所述间隔部延伸至所述阳极的边缘部位。The WOLED backplane according to claim 9, wherein the spacer portion extends to an edge portion of the anode.
  11. 根据权利要求9所述的WOLED背板,其中,所述插入部与所述间隔部为一体式设计。The WOLED backplane according to claim 9, wherein the inserting portion and the spacer portion are integrally designed.
  12. 一种WOLED背板,其包括:A WOLED backplane includes:
    基板;Substrate
    底层薄膜晶体管层,制备于所述基板上;A bottom thin film transistor layer is prepared on the substrate;
    彩膜,制备于所述底层薄膜晶体管层上,所述彩膜包括间隔分布的子彩膜单元;以及A color film prepared on the underlying thin film transistor layer, the color film including sub-color film units spaced apart from each other; and
    平坦层,制备于所述彩膜上,且在对应相邻两所述子彩膜单元之间的间隔位置设置有凹槽;A flat layer prepared on the color film and provided with a groove at a position corresponding to an interval between two adjacent color film units;
    阳极,对应所述子彩膜单元阵列的制备于所述平坦层上;The anode is prepared on the flat layer corresponding to the sub-color film unit array;
    像素定义层,对应所述凹槽的位置制备于所述平坦层上,并定义出像素区域;A pixel definition layer, prepared on the flat layer corresponding to the position of the groove, and defining a pixel area;
    其中,所述像素定义层的材料为吸光材料。The material of the pixel definition layer is a light absorbing material.
  13. 根据权利要求12所述的WOLED背板,其中,所述凹槽与所述子彩膜单元之间以所述平坦层隔开。The WOLED backplane according to claim 12, wherein the groove and the sub-color film unit are separated by the flat layer.
  14. 根据权利要求12所述的WOLED背板,所述凹槽为包围所述子彩膜单元的网格状结构。The WOLED backplane according to claim 12, wherein the groove is a grid-like structure surrounding the sub-color film unit.
  15. 根据权利要求12所述的WOLED背板,其中,所述像素定义层包括插入部和间隔部,所述插入部插入到所述凹槽内,所述间隔部凸出所述平坦层并将相邻两所述像素区域间隔开。The WOLED backplane according to claim 12, wherein the pixel defining layer includes an insertion portion and a spacer portion, the insertion portion is inserted into the groove, and the spacer portion protrudes from the flat layer and forms a phase. The two adjacent pixel regions are spaced apart.
  16. 根据权利要求15所述的WOLED背板,其中,所述间隔部延伸至所述阳极的边缘部位。The WOLED backplane according to claim 15, wherein the spacer portion extends to an edge portion of the anode.
  17. 根据权利要求15所述的WOLED背板,其中,所述插入部与所述间隔部为一体式设计。The WOLED backplane according to claim 15, wherein the inserting portion and the spacer portion are integrally designed.
PCT/CN2018/109625 2018-09-21 2018-10-10 Woled back plate and preparation method therefor WO2020056809A1 (en)

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