WO2020019805A1 - Circuit de source de courant et son procédé de mise en œuvre - Google Patents

Circuit de source de courant et son procédé de mise en œuvre Download PDF

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Publication number
WO2020019805A1
WO2020019805A1 PCT/CN2019/084981 CN2019084981W WO2020019805A1 WO 2020019805 A1 WO2020019805 A1 WO 2020019805A1 CN 2019084981 W CN2019084981 W CN 2019084981W WO 2020019805 A1 WO2020019805 A1 WO 2020019805A1
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WIPO (PCT)
Prior art keywords
current
mos tube
circuit
temperature coefficient
gate
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PCT/CN2019/084981
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English (en)
Chinese (zh)
Inventor
耿玮生
郭晓锋
李林喜
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广州金升阳科技有限公司
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Publication of WO2020019805A1 publication Critical patent/WO2020019805A1/fr

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/463—Sources providing an output which depends on temperature

Definitions

  • the invention relates to the technical field of integrated circuits, in particular to a current source circuit and an implementation method thereof, and in particular to an arbitrary temperature coefficient current source circuit and an implementation method thereof.
  • the commonly used current source circuit is one of the very important circuits in the design of integrated circuits. It provides the necessary bias current for the normal operation of other modules in the chip. Its performance greatly affects the overall performance of the chip.
  • the existing current source circuit usually generates a current with a fixed positive temperature coefficient and a fixed negative temperature coefficient, or superposes two types of temperature coefficient currents to generate an approximately zero temperature coefficient current required by the subsequent stage.
  • the fixed positive temperature coefficient, negative temperature coefficient, or zero temperature coefficient current is constant, because the temperature coefficient is unchanged.
  • this current source circuit often cannot meet the design needs, or the temperature coefficient. Too large or too small temperature coefficient. Therefore, a current source with an arbitrary temperature coefficient is required to better match the temperature characteristics of the subsequent circuit.
  • the object of the present invention is to provide a current source circuit and an implementation method thereof.
  • the current source can be an arbitrary temperature coefficient or have two temperature coefficients in a full temperature range, so as to meet the temperature characteristic requirement of the subsequent stage circuit for the bias current. Its structure is simple, and it can realize high-performance current source with less area.
  • the present invention provides a current source circuit capable of generating an arbitrary temperature coefficient characteristic, including: a first current generating circuit, a second current generating circuit, a first proportional current circuit, a second proportional current circuit, and a first Three-ratio current circuit, where,
  • An input terminal of the first current generating circuit is connected to a power supply voltage VDD, an output terminal of the first current generating circuit is connected to an input terminal of the first proportional current circuit, and the first proportional current circuit outputs a current IP1. ;
  • An input terminal of the second current generating circuit is connected to a power supply voltage VDD, and an output current of an output terminal of the second current generating circuit is subtracted from an output current IP1 of the first proportional current circuit, and is output to a second proportional current.
  • An input terminal of the third proportional current circuit is connected to a zero temperature coefficient current, and an output terminal of the third proportional current circuit outputs a current IP3;
  • the output current IP2 of the second proportional current circuit is added to the output current IP3 of the third proportional current circuit, and a final current is output.
  • the second current generating circuit is a zero temperature coefficient current circuit
  • the second current generating circuit is a positive temperature coefficient current circuit.
  • the positive temperature coefficient current circuit includes a MOS tube PM1, a MOS tube PM2, a MOS tube PM3, a MOS tube PM4, a MOS tube NM1, a MOS tube NM2, a resistor R1, a transistor Q1, and a transistor Q2;
  • the source of MOS tube PM1, the source of MOS tube PM2, the source of MOS tube PM3, and the source of MOS tube PM4 are connected to the supply voltage VCC, the gate of MOS tube PM1, the gate of MOS tube PM2, and MOS tube PM3.
  • the gate of the MOS transistor PM4 is connected to the gate of the MOS transistor PM4.
  • the drain of the MOS transistor PM2 is connected to the gate of the MOS transistor PM2 and connected to the drain of the MOS transistor NM2.
  • the drain of the MOS transistor PM1 is connected to the drain of the MOS transistor NM1.
  • the gate of MOS tube NM1 is connected to the drain of MOS tube NM1 and the gate of MOS tube NM2, the source of MOS tube NM1 is connected to the emitter of transistor Q1, and the source of MOS tube NM2 is connected to one end of resistor R1.
  • the other end of resistor R1 is connected to the emitter of transistor Q2; the base of transistor Q1 is connected to the base of transistor Q2, the collector of transistor Q1 is connected to the collector of transistor Q2; the drain of MOS transistor PM3 is used as a positive temperature coefficient current circuit
  • the output terminal outputs a current IPTAT1, and the drain of the MOS tube PM4 outputs a positive temperature coefficient current IPTAT2 to the zero temperature coefficient current circuit.
  • the zero temperature coefficient current circuit includes a resistor R2, a transistor Q3, an operational amplifier, a MOS tube NM3, a resistor R3, and a current mirror unit composed of a MOS tube PM5, a MOS tube PM6, and a MOS tube PM7;
  • the base of the transistor Q3 and the collector are grounded, and the emitter of the transistor Q3 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to the positive temperature coefficient current IPTAT2 and output to the positive input end of the operational amplifier; the operational amplifier The negative input terminal is connected to the source of the MOS tube NM3 and one end of the resistor R3, and the other end of the resistor R3 is grounded; the output end of the operational amplifier is connected to the gate of the MOS tube NM3; the drain of the MOS tube NM3 Connected to the drain of MOS tube PM5 and the gate of MOS tube PM5, the gate of MOS tube PM5, the gate of MOS tube PM6 and the gate of MOS tube PM7 are connected, the source of MOS tube PM5, and the gate of MOS tube PM6 The source and the source of the MOS tube PM7 are connected to the supply voltage VDD in common.
  • the drain of the MOS tube PM6 is used as the output terminal of the zero temperature coefficient current circuit.
  • the first proportional current circuit is composed of a mirror image of the MOS tube NM4 and the MOS tube NM5; the source of the MOS tube NM4 and the source of the MOS tube NM5 are grounded; The input terminal of a proportional current circuit; the gate of the MOS tube NM5 is connected to the gate of the MOS tube NM4, and the drain of the MOS tube NM5 outputs the current IP1;
  • the second proportional current circuit is composed of the MOS tube NM6 and the MOS tube NM7.
  • the source of the MOS tube NM6 and the source of the MOS tube NM7 are grounded.
  • the drain and the gate of the MOS tube NM6 are connected and used as the second proportional current.
  • the input end of the circuit; the gate of the MOS tube NM7 is connected to the gate of the MOS tube NM6, and the drain of the MOS tube NM7 outputs the current IP2;
  • the third proportional current circuit is composed of the MOS tube NM8 and the MOS tube NM9.
  • the source of the MOS tube NM9 and the source of the MOS tube NM8 are grounded.
  • the drain and the gate of the MOS tube NM9 are connected and used as the third proportional current.
  • the input end of the circuit; the gate of the MOS tube NM8 is connected to the gate of the MOS tube NM9, and the drain of the MOS tube NM8 outputs an IP3 current.
  • the present invention also provides a method for implementing a current source circuit, which realizes any positive temperature coefficient current or a current with two temperature coefficients in a full temperature range, including the following steps:
  • Step 1 The positive temperature coefficient current generating circuit generates two positive temperature coefficient currents IPTAT1 and IPTAT2.
  • Step 2 output the positive temperature coefficient current IPTAT2 to the zero temperature coefficient current generating circuit, and the zero temperature coefficient current generating circuit generates two zero temperature coefficient currents IZTC1 and IZTC2;
  • Step three use the first proportional current circuit to mirror the zero temperature coefficient current IZTC1 as the current IP1; and subtract it from the positive temperature coefficient current IPTAT1 to obtain the current IP21 input to the input terminal of the second proportional current circuit;
  • Step four use the second proportional current circuit to mirror the IP21 current as the current IP2;
  • Step 5 Use a third proportional current circuit to mirror the zero temperature coefficient current IZTC2 as the current IP3; the IP2 current and the IP3 current are added to generate and output the arbitrary positive temperature coefficient current or have two temperatures in the entire temperature range Coefficient of current.
  • Achieving any negative temperature coefficient current or current with two temperature coefficients over the full temperature range includes the following steps:
  • Step 1 The positive temperature coefficient current generating circuit generates two positive temperature coefficient currents IPTAT1 and IPTAT2.
  • Step 2 output the positive temperature coefficient current IPTAT2 to the zero temperature coefficient current generating circuit, and the zero temperature coefficient current generating circuit generates two zero temperature coefficient currents IZTC1 and IZTC2;
  • Step three use the first proportional current circuit to mirror the positive temperature coefficient current ITPAT1 as the current IP1; and subtract it from the zero temperature coefficient current IZTC1 to obtain the current IP21 input to the input terminal of the second proportional current circuit;
  • Step four use the second proportional current circuit to mirror the IP21 current as the current IP2;
  • Step 5 Use a third proportional current circuit to mirror the zero temperature coefficient current IZTC2 as the current IP3; the IP2 current and the IP3 current are added to generate and output the arbitrary negative temperature coefficient current or have two temperatures in the entire temperature range Coefficient of current.
  • a current source circuit and an implementation method thereof according to the present invention generate a desired arbitrary temperature coefficient current by recombining a positive temperature coefficient current and a zero temperature coefficient current.
  • the circuit is simple to implement and is suitable for use in the future. Generation of various temperature coefficient currents.
  • FIG. 1 is a schematic block diagram of a first embodiment of the present invention
  • FIG. 2 is a circuit structural diagram of a first embodiment of the present invention
  • FIG. 4 is a characteristic curve diagram of a positive temperature coefficient output current according to a first embodiment of the present invention.
  • FIG. 5 is a circuit configuration diagram of a second embodiment of the present invention.
  • FIG. 6 is a graph of output current characteristics with two temperature coefficients according to a second embodiment of the present invention.
  • FIG. 7 is a characteristic curve diagram of a negative temperature coefficient output current according to a second embodiment of the present invention.
  • FIG. 1 is a schematic block diagram of a current source circuit according to an embodiment of the present invention. As shown in FIG. 1, it includes a first current generating circuit 10, a second current generating circuit 11, a first proportional current circuit 12, a second proportional current circuit 13, a third proportional current circuit 14, a current subtraction node 13A, and a current phase Add node 14A.
  • the first current generating circuit 10 outputs a first current IZTC1 and a third current IZTC2 with zero temperature coefficient; the second current generating circuit outputs a second current IPTAT1 which is proportional to the temperature; the first proportional current circuit configures the first current IZTC1 as required After the scaling factor, the IP1 current is output; the second current IPTAT1 and the first proportional current circuit output IP1 are collected at node 13A, subtracted and output the IP21 current to the second proportional current circuit.
  • the second proportional current circuit configures the IP21 current to a required proportionality factor, and then outputs the IP2 current.
  • the third proportional current circuit configures the third current IZTC2 to a required proportionality factor, and outputs an IP3 current.
  • the IP2 current and the IP3 current are collected at the node 14A, and after adding, the required positive temperature coefficient current IOUT is output.
  • FIG. 2 is a circuit configuration diagram of the first embodiment.
  • the second current generating circuit 11 generates positive temperature coefficient currents IPTAT1 and IPTAT2, including MOS transistors PM1, PM2, PM3, PM4, NM1, NM2, resistors R1, and transistors Q1 and Q2.
  • the source of PM1, the source of PM2, the source of PM3, and the source of PM4 are connected to the supply voltage VCC.
  • the gate of PM1, the gate of PM2, the gate of PM3, and the gate of PM4 are connected, and the drain of PM2 is connected.
  • the electrode is connected to the drain of NM2 after being connected to the gate of PM2; the drain of PM1 is connected to the drain of NM1, the gate of NM1 is connected to the drain of NM1 and the gate of NM2, and the source of NM1 is connected to Q1
  • the emitter of NM2 is connected to one end of resistor R1, and the other end of resistor R1 is connected to the emitter of Q2; the base of Q1 is connected to the base of Q2, and the collector of Q1 is connected to the collector of Q2; the drain of PM3 Output the second current IPTAT1 to the current subtraction node 13A, and the drain of PM4 outputs the current IPTAT2 to the first current generation circuit;
  • IPTAT1 and IPTAT2 are positive temperature coefficient currents.
  • the first current generating circuit 10 generates zero temperature coefficient currents IZTC1 and IZTC2.
  • the first current generating circuit 10 includes MOS transistors PM5, PM6, PM7, NM3, operational amplifier OPA, resistors R2 and R3, NPN transistor Q3, the base and collector of transistor Q3 are grounded, and the emitter of transistor Q3 is connected to one end of R2 ;
  • the other end of R2 is connected to the current IPTAT2 and is connected to the positive input end of the operational amplifier;
  • the negative input end of the operational amplifier is connected to the source of MOS tube NM3 and one end of R3, and the other end of R3 is grounded;
  • the operational amplifier The output end is connected to the tube gate of NM3;
  • the drain of NM3 is connected to the drain and gate of PM5, the gate of PM5, the gate of PM6 and the gate of PM7 are connected, the source of PM5 and the source of PM6
  • the source of PM7 is connected to the supply voltage VDD.
  • the drain of PM6 outputs the first current IZTC1 to the input terminal of the first proportional current circuit
  • the drain of PM7 outputs the third current IZTC2 to the input terminal of the third proportional current circuit.
  • the PM5 tube is mirrored to the sixth PMOS tube and the seventh PMOS tube, and outputs the first and second zero temperature coefficient currents; the fifth PMOS tube, the sixth PMOS tube, and the seventh PMOS tube form a current mirroring unit.
  • the second current generating circuit generates a voltage reference circuit that is proportional to the temperature IPTAT2 and resistor R2 and transistor Q3; IPTAT2 is connected to one end of R2 resistor; the other end of R2 resistor is connected to the emitter of transistor Q3, and the base and collector of transistor Q3 are grounded; Voltage VREF1 proportional to temperature;
  • the reference voltage VREF1 is output to the OPA positive terminal.
  • the output of the op amp is connected to the gate of the NMOS tube NM3.
  • the NM3 source is connected to one end of the resistor R3 and output to the negative phase input of the op amp.
  • the other end of the resistor R3 is grounded.
  • the drain of N3 is used as the current.
  • the current mirror unit consists of three PMOSs PM5, PM6 and PM7.
  • the device size is set according to 1: 1: 1.
  • the output currents IZTC1 and IZTC2 are as follows:
  • R1 and R2 are the same type of resistor, and their temperature characteristics are the same; k 'is a temperature independent coefficient.
  • the first proportional current circuit 12 is composed of a fourth NMOS transistor NM4 and a fifth NMOS transistor NM5.
  • the second proportional current circuit 13 is composed of a sixth NMOS transistor NM6 and a seventh NMOS transistor NM7.
  • the source of NM6 and the source of NM7 are grounded.
  • the drain of NM6 is connected to the gate and connected to the second current generating circuit current IPTAT1 and the current subtracting node 13A of the first proportional current circuit output IP1;
  • the third proportional current circuit 14 is composed of an eighth NMOS transistor NM8 and a ninth NMOS transistor NM9.
  • the source of NM9 and the source of NM8 are grounded.
  • the drain and gate of NM9 are connected and connected to the first current generating circuit current IZTC2; the gate of NM8 is connected to the gate of NM9, and the drain of NM8 mirrors the output IP3 current;
  • the output of the second proportional current circuit IP2 and the third proportional current circuit IP3 are collected at the node 14A, and the output current IOUT is added after the addition.
  • IP21 currents with different temperature characteristics can be obtained:
  • IP2 currents with different temperature coefficients can be obtained:
  • FIG. 1 Another embodiment of the present invention. Its structural block diagram is the same as that of the first embodiment, as shown in FIG. 1. It includes a first current generating circuit 10, a second current generating circuit 11, a first proportional current circuit 12, a second proportional current circuit 13, a third proportional current circuit 14, a current subtraction node 13A, and a current addition node 14A.
  • the difference from the first embodiment is that the first current generating circuit 10 generates a positive temperature coefficient current, the first current IPTAT1 and the current IPTAT2; the second current generating circuit 11 generates a zero temperature coefficient second current IZTC1 and a current IZTC2; the first ratio The input current of the current circuit is the first current IPTAT1; the input current IP21 of the second proportional current circuit is obtained by subtracting the output IZTC1 of the second current generating circuit from the output IP1 of the first proportional current circuit; the input current IZTC2 of the third proportional current circuit is obtained by the second Generated by the current generation circuit.
  • the output current IOUT is still obtained by adding the IP2 current and the IP3 current, and the output current IOUT is a negative temperature coefficient current.
  • FIG. 5 is a circuit configuration diagram of the second embodiment.
  • the first current generating circuit 10 is a positive temperature coefficient current generating circuit, and the structure is the same as that of the second current generating circuit of the first embodiment, and the principle is not described again.
  • the second current generating circuit 11 is a zero temperature coefficient current generating circuit, which is the same as the first current generating circuit of the first embodiment, and the principle is not described again.
  • the structure of the third proportional current circuit 14 is completely the same as that of the first embodiment. Its output current IP3 is
  • the output of the second proportional current circuit IP2 and the third proportional current circuit IP3 are collected at the node 14A, and the output current IOUT is added after the addition.
  • IP21 currents with different temperature characteristics can be obtained:
  • IP2 currents with different temperature coefficients can be obtained:

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un circuit de source de courant et son procédé de mise en œuvre, qui peuvent générer un courant ayant un coefficient de température arbitraire, et peuvent également générer un courant ayant deux coefficients de température dans une plage de température entière, répondant à l'exigence de propriété de température d'un circuit de post-étage pour un courant de polarisation. Le circuit de source de courant comprend : un premier circuit de génération de courant (10) pour générer un courant à coefficient de température positif ou un courant à coefficient de température nul ; et un deuxième circuit de génération de courant (11) pour générer un courant à coefficient de température nul ou un courant à coefficient de température positif. Le résultat de la soustraction entre les deux courants à coefficient de température est obtenu, soumis à un ajustement proportionnel, puis ajouté au courant à coefficient de température nul, de façon à générer le courant de sortie final souhaité.
PCT/CN2019/084981 2018-07-24 2019-04-29 Circuit de source de courant et son procédé de mise en œuvre WO2020019805A1 (fr)

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CN201810820249.5A CN108762358A (zh) 2018-07-24 2018-07-24 一种电流源电路及其实现方法
CN201810820249.5 2018-07-24

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CN108762358A (zh) * 2018-07-24 2018-11-06 广州金升阳科技有限公司 一种电流源电路及其实现方法
CN113467567A (zh) * 2021-07-28 2021-10-01 深圳市中科蓝讯科技股份有限公司 一种基准源电路及芯片
CN113885643B (zh) * 2021-10-28 2022-10-11 中国电子科技集团公司第二十四研究所 一种针对基准电压的修调电路及修调方法
CN114815950B (zh) * 2022-05-27 2024-03-12 浙江地芯引力科技有限公司 电流产生电路、芯片及电子设备
CN116414170B (zh) * 2023-03-03 2023-10-10 西安航天民芯科技有限公司 一种零温度系数电流产生电路
CN116149420A (zh) * 2023-03-10 2023-05-23 上海艾为电子技术股份有限公司 一种零温漂电流产生电路

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