WO2020015125A1 - 一种高中低阶闪存的分类方法 - Google Patents

一种高中低阶闪存的分类方法 Download PDF

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WO2020015125A1
WO2020015125A1 PCT/CN2018/105856 CN2018105856W WO2020015125A1 WO 2020015125 A1 WO2020015125 A1 WO 2020015125A1 CN 2018105856 W CN2018105856 W CN 2018105856W WO 2020015125 A1 WO2020015125 A1 WO 2020015125A1
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flash memory
medium
low
test
write
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PCT/CN2018/105856
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English (en)
French (fr)
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蔡定国
李庭育
黄中柱
许豪江
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江苏华存电子科技有限公司
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Publication of WO2020015125A1 publication Critical patent/WO2020015125A1/zh

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits

Definitions

  • the present invention relates to the technical field of flash memory classification methods, and in particular to a method for classifying high-, medium-, and low-level flash memories.
  • Flash memory is a kind of long-life non-volatile memory (which can retain the stored data information even in the case of power failure). Data deletion is not a single byte but a fixed block. Unit (Note: NOR Flash is byte storage.) The block size is generally 256KB to 20MB. Flash memory is a variant of electronic erasable read-only memory (EEPROM). Unlike flash memory, EEPROM can delete and rewrite at the byte level instead of the entire chip. Most of the flash memory chips require block erasure. except. Because it can still save data when power is off, flash memory is usually used to save setting information, such as saving data in the computer's BIOS (basic program), PDA (personal digital assistant), and digital camera.
  • BIOS basic program
  • PDA personal digital assistant
  • Flash memory is composed of blocks. Each block is divided into multiple pages. Each page is composed of multiple columns. In addition, pages that cannot be read and written normally belong to bad pages. All pages that are bad are called bad blocks.
  • the general classification method can only separate high-level or low-level flash particles. If a group of particles needs to be clearly classified into high-level, low-level, and two-level methods, two sets of methods will be used, which will take nearly twice the time. In particular, the particle capacity is gradually increasing, and the time cost is very amazing. Therefore, an improved technology is urgently needed to solve this problem in the existing technology.
  • the purpose of the present invention is to provide a method for classifying high-, medium-, and low-level flash memories, which can efficiently classify high-, medium-, and low-level flash memories.
  • the classification rate is increased by nearly two times, so as to solve the problems mentioned in the background art.
  • the present invention provides the following technical solution: a method for classifying high-, medium-, and low-level flash memories, including the following steps:
  • Step 1 First, use the method of automatically judging the test flash data rate, and set the dual data rate or single data rate according to the results;
  • Step 2 For the single-data-rate route, first perform a bad row test, set the flash memory to single-plane detection mode, then erase the flash memory, perform a read-write comparison classification test, and finally classify it as a low-level flash memory. ;
  • Step 3 For the dual-data-rate route, first perform a bad row test, set the flash memory to the multi-plane detection mode, then erase the flash memory and record the failed blocks, perform a read-write comparison classification test, and Record write failed blocks;
  • Step 4 Determine whether there are any blocks that failed to be erased. If there are any, they are classified as intermediate-level flash memory. If not, proceed to the next step.
  • Step 5 Determine whether there are any blocks that failed to write. If there are any, they are classified as intermediate flash memory. If not, proceed to the next step.
  • Step 6 Determine if there are any bad rows. If so, classify them as intermediate flash memory. If not, go to the next step.
  • Step 7 Determine whether the block is greater than or equal to 98%. If it is not, it is classified as a medium-level flash memory. If it is, it is classified as a high-level flash memory.
  • the flash memory in step 1 is a non-erasable memory device, which is composed of blocks, each block is further divided into multiple pages, and each page is composed of multiple columns.
  • the method for automatically judging the test flash data rate in step 1 is judged by flash read, write, and erase transfer speed.
  • the bad row test in step 2 or 3 is tested by using one of Kingsound, MyDiskTest, Check Flash, and DieSorting.
  • FIG. 1 is a schematic flowchart of a classification method according to the present invention.
  • the present invention provides a technical solution: a method for classifying high-, medium-, and low-level flash memories, including the following steps:
  • Step 1 First, use the method of automatically judging the test flash data rate, and set the dual data rate or single data rate according to the results;
  • Step 2 For the single-data-rate route, first perform a bad row test, set the flash memory to single-plane detection mode, then erase the flash memory, perform a read-write comparison classification test, and finally classify it as a low-level flash memory. ;
  • Step 3 For the dual-data-rate route, first perform a bad row test, set the flash memory to the multi-plane detection mode, then erase the flash memory and record the blocks that failed to be erased. Record write failed blocks;
  • Step 4 Determine whether there are any blocks that failed to be erased. If there are any, they are classified as intermediate-level flash memory. If not, proceed to the next step.
  • Step 5 Determine whether there are any blocks that failed to write. If there are any, they are classified as intermediate flash memory. If not, proceed to the next step.
  • Step 6 Determine if there are any bad rows. If so, classify them as intermediate flash memory. If not, go to the next step.
  • Step 7 Determine whether the block is greater than or equal to 98%. If it is not, it is classified as a medium-level flash memory. If it is, it is classified as a high-level flash memory.

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  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)

Abstract

一种高中低阶闪存的分类方法，包括以下步骤：首先使用自动判断测试闪存数据速率的方法，依照结果设定双数据速率或单数据速率；设定为单数据速率路线的，首先进行坏行测试，将闪存设定为单平面检测模式，接着对闪存进行擦除，进行读写比对分类测试，最后将分类为低阶闪存；设定为双数据速率路线的，首先进行坏行测试，将闪存设定为多平面检测模式，接着对闪存进行擦除并记录擦除失败的块，进行读写比对分类测试并记录写入失败的块；判断是否有擦除失败的块；判断是否有写入失败的块；判断是否有使用坏行，分别分类为中阶闪存、高阶闪存，该方法可以高效的将高中低阶闪存分类，较传统分类方法，分类速率提高近两倍。

Description

一种高中低阶闪存的分类方法 技术领域
本发明涉及闪存分类方法技术领域，具体为一种高中低阶闪存的分类方法。
背景技术
闪存(Flash Memory)是一种长寿命的非易失性(在断电情况下仍能保持所存储的数据信息)的存储器，数据删除不是以单个的字节为单位而是以固定的区块为单位(注意：NOR Flash为字节存储。)，区块大小一般为256KB到20MB。闪存是电子可擦除只读存储器(EEPROM)的变种，闪存与EEPROM不同的是，EEPROM能在字节水平上进行删除和重写而不是整个芯片擦写，而闪存的大部分芯片需要块擦除。由于其断电时仍能保存数据，闪存通常被用来保存设置信息，如在电脑的BIOS(基本程序)、PDA(个人数字助理)、数码相机中保存资料等。
闪存，由块组成，每个块又分成多个页，每个页会有多个列组合而成，此外，不能正常读写的页则属于坏页，所有页都坏的称为坏块，一般的分类方式只能单纯分出高阶或中低阶的闪存颗粒，如果需要将一组颗粒明确的分出高中低阶的等级，则会使用两套方法，花上将近两倍时间。尤其颗粒容量日益渐大，所花上的时间成本是很惊人的，因此，亟待一种改进的技术来解决现有技术中所存在的这一问题。
发明内容
本发明的目的在于提供一种高中低阶闪存的分类方法，可以高效 的将高中低阶闪存分类，较传统分类方法，分类速率提高近两倍，以解决上述背景技术中提出的问题。
为实现上述目的，本发明提供如下技术方案：一种高中低阶闪存的分类方法，包括以下步骤：
步骤一：首先使用自动判断测试闪存数据速率的方法，依照结果设定双数据速率或单数据速率；
步骤二：设定为单数据速率路线的，首先进行坏行测试，将闪存设定为单平面检测模式，接着对闪存进行擦除，进行读写比对分类测试，最后将分类为低阶闪存；
步骤三：设定为双数据速率路线的，首先进行坏行测试，将闪存设定为多平面检测模式，接着对闪存进行擦除并记录擦除失败的块，进行读写比对分类测试并记录写入失败的块；
步骤四：判断是否有擦除失败的块，如果有，分类为中阶闪存，如果没有，进入下一步；
步骤五：判断是否有写入失败的块，如果有，分类为中阶闪存，如果没有，进入下一步；
步骤六：判断是否有使用坏行，如果有，分类为中阶闪存，如果没有，进入下一步；
步骤七：判断好块是否大于等于98％，如果没有，分类为中阶闪存，如果有，则分类为高阶闪存。
优选的，步骤一中闪存为非消失性的存储器装置，由块组成，每个块又分成多个页，每个页会有多个列组合而成。
优选的，步骤一中自动判断测试闪存数据速率的方法通过闪存读写、擦除传输速度判定。
优选的，步骤二或三中坏行测试通过Kingsound、MyDiskTest、Check Flash、DieSorting其中一种工具进行测试。
与现有技术相比，本发明的有益效果是：
可以高效的将高中低阶闪存分类，较传统分类方法，分类速率提高近两倍。
附图说明
图1为本发明分类方法流程示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图1，本发明提供一种技术方案：一种高中低阶闪存的分类方法，包括以下步骤：
步骤一：首先使用自动判断测试闪存数据速率的方法，依照结果设定双数据速率或单数据速率；
步骤二：设定为单数据速率路线的，首先进行坏行测试，将闪存设定为单平面检测模式，接着对闪存进行擦除，进行读写比对分类测试，最后将分类为低阶闪存；
步骤三：设定为双数据速率路线的，首先进行坏行测试，将闪存设定为多平面检测模式，接着对闪存进行擦除并记录擦除失败的块，进行读写比对分类测试并记录写入失败的块；
步骤四：判断是否有擦除失败的块，如果有，分类为中阶闪存，如果没有，进入下一步；
步骤五：判断是否有写入失败的块，如果有，分类为中阶闪存，如果没有，进入下一步；
步骤六：判断是否有使用坏行，如果有，分类为中阶闪存，如果没有，进入下一步；
步骤七：判断好块是否大于等于98％，如果没有，分类为中阶闪存，如果有，则分类为高阶闪存。
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。

Claims (4)

  1. 一种高中低阶闪存的分类方法，其特征在于：包括以下步骤：
    步骤一：首先使用自动判断测试闪存数据速率的方法，依照结果设定双数据速率或单数据速率；
    步骤二：设定为单数据速率路线的，首先进行坏行测试，将闪存设定为单平面检测模式，接着对闪存进行擦除，进行读写比对分类测试，最后将分类为低阶闪存；
    步骤三：设定为双数据速率路线的，首先进行坏行测试，将闪存设定为多平面检测模式，接着对闪存进行擦除并记录擦除失败的块，进行读写比对分类测试并记录写入失败的块；
    步骤四：判断是否有擦除失败的块，如果有，分类为中阶闪存，如果没有，进入下一步；
    步骤五：判断是否有写入失败的块，如果有，分类为中阶闪存，如果没有，进入下一步；
    步骤六：判断是否有使用坏行，如果有，分类为中阶闪存，如果没有，进入下一步；
    步骤七：判断好块是否大于等于98％，如果没有，分类为中阶闪存，如果有，则分类为高阶闪存。
  2. 根据权利要求1所述的一种高中低阶闪存的分类方法，其特征在于：所述步骤一中闪存为非消失性的存储器装置，由块组成，每个块又分成多个页，每个页会有多个列组合而成。
  3. 根据权利要求1所述的一种高中低阶闪存的分类方法，其特征在于：所述步骤一中自动判断测试闪存数据速率的方法通过闪存读 写、擦除传输速度判定。
  4. 根据权利要求1所述的一种高中低阶闪存的分类方法，其特征在于：所述步骤二或三中坏行测试通过Kingsound、MyDiskTest、Check Flash、DieSorting其中一种工具进行测试。
PCT/CN2018/105856 2018-07-20 2018-09-14 一种高中低阶闪存的分类方法 WO2020015125A1 (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116880782A (zh) * 2023-09-08 2023-10-13 合肥康芯威存储技术有限公司 一种内嵌式存储器及其测试方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113053450A (zh) * 2021-03-05 2021-06-29 深圳三地一芯电子有限责任公司 一种应用于Flash智能分析检测的检测方法、系统、智能终端以及计算机可读存储介质

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060216841A1 (en) * 2003-10-31 2006-09-28 M-Systems Flash Disk Pioneers Ltd. Method, system and computer-readable code for testing of flash memory
CN101369463A (zh) * 2007-08-17 2009-02-18 芯邦科技（深圳）有限公司 闪存检测分类方法
CN101441891A (zh) * 2007-11-19 2009-05-27 芯邦科技（深圳）有限公司 一种利用闪存的方法
CN102890971A (zh) * 2012-10-22 2013-01-23 上海宏力半导体制造有限公司 存储器的可靠性测试方法
US20160125959A1 (en) * 2014-10-31 2016-05-05 Infineon Technologies Ag Health state of non-volatile memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101789259B (zh) * 2009-01-22 2013-05-08 银灿科技股份有限公司 应用于快闪存储器的阶层化分层处理数据的方法及其装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060216841A1 (en) * 2003-10-31 2006-09-28 M-Systems Flash Disk Pioneers Ltd. Method, system and computer-readable code for testing of flash memory
CN101369463A (zh) * 2007-08-17 2009-02-18 芯邦科技（深圳）有限公司 闪存检测分类方法
CN101441891A (zh) * 2007-11-19 2009-05-27 芯邦科技（深圳）有限公司 一种利用闪存的方法
CN102890971A (zh) * 2012-10-22 2013-01-23 上海宏力半导体制造有限公司 存储器的可靠性测试方法
US20160125959A1 (en) * 2014-10-31 2016-05-05 Infineon Technologies Ag Health state of non-volatile memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116880782A (zh) * 2023-09-08 2023-10-13 合肥康芯威存储技术有限公司 一种内嵌式存储器及其测试方法
CN116880782B (zh) * 2023-09-08 2023-12-05 合肥康芯威存储技术有限公司 一种内嵌式存储器及其测试方法

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