WO2020000490A1 - 一种极化码译码方法及装置 - Google Patents

一种极化码译码方法及装置 Download PDF

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Publication number
WO2020000490A1
WO2020000490A1 PCT/CN2018/093928 CN2018093928W WO2020000490A1 WO 2020000490 A1 WO2020000490 A1 WO 2020000490A1 CN 2018093928 W CN2018093928 W CN 2018093928W WO 2020000490 A1 WO2020000490 A1 WO 2020000490A1
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Prior art keywords
sequence
polarization code
data structure
decoding
polar code
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PCT/CN2018/093928
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English (en)
French (fr)
Inventor
游治
张玉伦
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华为技术有限公司
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Priority to CN201880089124.8A priority Critical patent/CN111699643B/zh
Priority to PCT/CN2018/093928 priority patent/WO2020000490A1/zh
Publication of WO2020000490A1 publication Critical patent/WO2020000490A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a method and a device for decoding a polar code.
  • the rapid evolution of wireless communication indicates that the fifth generation (5G) communication system will present some new features.
  • the three most typical communication scenarios include enhanced mobile Internet (eMBB) and massive machine connections.
  • Communication massive machine type communication, mMTC) and high-reliability low-latency communication (URLLC).
  • mMTC massive machine type communication
  • URLLC high-reliability low-latency communication
  • LTE long-term evolution
  • channel coding is one of the important research objects to meet the needs of 5G communication.
  • Polar codes are selected as the control channel coding method in the 5G standard.
  • Polar code which can also be called Polar code, is the first and also the only known channel coding method that can be rigorously proven to "reach" channel capacity. Under different code lengths, especially for limited codes, the performance of polarized codes is far superior to Turbo codes and low density parity check (LDPC) codes. In addition, polar codes have lower computational complexity in terms of coding and decoding. These advantages make polar codes have great development and application prospects in 5G.
  • the present application provides a method and a device for decoding a polar code, which are used to solve the technical problem that the process of decoding a polar code is complicated and has low efficiency.
  • an embodiment of the present application provides a method for decoding a polar code, where the method includes:
  • the pre-stored data structure is used to represent the K (K is a positive integer) information bits of the polarization code corresponding to each of the multiple values of the sequence parameters of the polarization code. Therefore, based on the pre-stored structure, the position of the information bit of the polarization code corresponding to the value of the sequence parameter of the polarization code can be directly determined, and further no readjustment operation is required during the decoding process, which can effectively Simplify the encoding and decoding process, and improve the encoding and decoding efficiency.
  • sequence parameters of the polarization code further include the length of the encoded output bit sequence.
  • the pre-stored data structure is a two-dimensional table.
  • the data structure for storage may also be an array or the like, which is not specifically limited.
  • the pre-stored data structure includes node types of multiple nodes of the polarization code corresponding to each of multiple values of the sequence parameters of the polarization code, and the multiple The node type of any one of the nodes is used to indicate the bit type corresponding to one or more consecutive positions in the encoded output bit sequence.
  • a node may include one or more consecutive bits, a required storage space can be effectively saved by storing a node type of multiple nodes.
  • performing polar code decoding includes: performing polar code decoding with the node as a minimum decoding granularity, thereby improving the delay benefit of parallel decoding.
  • performing polar code decoding includes: for any one of the plurality of nodes, using a decoding algorithm corresponding to a node type of the any node to decode the node. .
  • an embodiment of the present application provides a polar code encoding method, where the method includes:
  • the pre-stored data structure is used to represent the positions of the K information bits of the polar code corresponding to each of the multiple values of the sequence parameters of the polar code, based on the The stored structure can directly determine the position of the information bit of the polarization code corresponding to the value of the sequence parameter of the polarization code, and then no readjustment operation is needed in the encoding process, which can effectively simplify the encoding and decoding process and improve Codec efficiency.
  • sequence parameters of the polarization code further include the length of the encoded output bit sequence.
  • the pre-stored data structure is a two-dimensional table.
  • the pre-stored data structure includes node types of multiple nodes of the polarization code corresponding to each of multiple values of the sequence parameters of the polarization code, and the multiple The node type of any one of the nodes is used to indicate the bit type corresponding to one or more consecutive positions in the encoded output bit sequence.
  • an embodiment of the present application provides a polar code decoding device, where the device includes:
  • a processing unit configured to determine a value of a sequence parameter of the polarization code, where the sequence parameter of the polarization code includes a length of an encoding input bit sequence and a length of a rate-matching output sequence; and determining the data structure based on a data structure stored in a storage unit The position of the information bit of the polarization code corresponding to the value of the sequence parameter of the polarization code; and performing polarization code decoding according to the position of the information bit of the polarization code;
  • the storage unit is configured to store a data structure, where the data structure is used to represent positions of the K information bits of the polarization code corresponding to each of multiple values of the sequence parameters of the polarization code.
  • sequence parameters of the polarization code further include the length of the encoded output bit sequence.
  • the pre-stored data structure is a two-dimensional table.
  • the pre-stored data structure includes node types of multiple nodes of the polarization code corresponding to each of multiple values of the sequence parameters of the polarization code, and the multiple The node type of any one of the nodes is used to indicate the bit type corresponding to one or more consecutive positions in the encoded output bit sequence.
  • an embodiment of the present application provides a polar code encoding device, where the device includes:
  • a processing unit configured to determine a value of a sequence parameter of the polarization code, where the sequence parameter of the polarization code includes a length of an encoded input bit sequence and a length of a rate-matched output sequence; and determining the The position of the information bit of the polarization code corresponding to the value of the sequence parameter of the polarization code; and performing polarization code encoding according to the position of the information bit of the polarization code;
  • the storage unit is configured to store a data structure, where the data structure is used to represent positions of the K information bits of the polarization code corresponding to each of multiple values of the sequence parameters of the polarization code.
  • sequence parameters of the polarization code further include the length of the encoded output bit sequence.
  • the pre-stored data structure is a two-dimensional table.
  • the pre-stored data structure includes node types of multiple nodes of the polarization code corresponding to each of multiple values of the sequence parameters of the polarization code, and the multiple The node type of any one of the nodes is used to indicate the bit type corresponding to one or more consecutive positions in the encoded output bit sequence.
  • an embodiment of the present application provides a polar code decoding device, including a processor and a memory; wherein the memory is used to store a program and a data structure, and the data structure is used to represent a sequence of the polar code The position of the K information bits of the polarization code corresponding to each value of the various values of the parameter; the processor is configured to execute the program stored in the memory, and when the program is executed, make the The polar code decoding device performs the method in the first aspect and any of its possible designs. In a possible design, the polar code decoding device is a chip or an integrated circuit.
  • an embodiment of the present application provides a polar code encoding device, including a processor and a memory, where the memory is used to store a program and a data structure, and the data structure is used to represent a sequence parameter of the polar code.
  • the transcoding device executes the method in the second aspect and any of its possible designs.
  • the polar code encoding device is a chip or an integrated circuit.
  • an embodiment of the present application provides a polar code decoding device, including: an input interface circuit for obtaining a coded output sequence; and a logic circuit for performing the first aspect and its possible based on the obtained coded output sequence.
  • an embodiment of the present application provides a polar code encoding device, including: an input interface circuit for obtaining a coded output sequence; and a logic circuit for performing the second aspect and any of its possible based on the obtained coded output sequence.
  • a design method to obtain the decoding result an output interface circuit for outputting the decoding result.
  • an embodiment of the present application provides a computer storage medium for storing a computer program, where the computer program includes instructions for executing the method in the first aspect or the second aspect and any of its possible designs.
  • an embodiment of the present application provides a computer program product containing instructions, which when executed on a computer, causes the computer to execute the method described in the first aspect or the second aspect and any possible design thereof.
  • FIG. 1 is a schematic diagram of a communication system applicable to an embodiment of the present application
  • FIG. 2a is a schematic diagram of a polar code encoding and decoding process
  • FIG. 2b is a schematic diagram of a coding matrix
  • FIG. 3a is an example diagram of an encoding process
  • FIG. 3b is an example diagram of a decoding process
  • FIG. 3c is another example diagram of the encoding process
  • FIG. 3d is another example diagram of a decoding process
  • FIG. 4 is a schematic flowchart of a polarization code decoding method according to an embodiment of the present application.
  • FIG. 5 is another schematic diagram of a polar code decoding process according to an embodiment of the present application.
  • FIG. 6 is a schematic flowchart of a polar code encoding process according to an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a decoding device according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of still another decoding device according to an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of still another decoding device according to an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of still another decoding device according to an embodiment of the present application.
  • Figure 1 shows a schematic diagram of a communication system.
  • the communication system 100 applied in the embodiment of the present application includes a sending end 101 and a receiving end 102.
  • the transmitting end 101 may also be called an encoding end, and the receiving end 102 may also be called a decoding end.
  • the sending end 101 may be a network device, and the receiving end 102 is a terminal device; or, the sending end 101 is a terminal device, and the receiving end 102 is a network device.
  • the network device may be any type of device with wireless transceiver functions, including but not limited to: base stations (for example, base station NodeB, eNodeB eNodeB, base stations in the fifth generation (5G) communication system, and future communication systems Base stations or network devices, access nodes, wireless relay nodes, wireless backhaul nodes, etc. in a WiFi system).
  • the network device may also be a wireless controller in a cloud radio access network (CRAN) scenario.
  • the network device may also be a network device in a 5G network or a network device in a future evolved network; it may also be a wearable device or a vehicle-mounted device.
  • the network equipment may also be a small station, a transmission node (TRP), and the like. Of course, not applying is not limited to this.
  • a terminal device is a device with wireless transceiver capabilities that can be deployed on land, including indoor or outdoor, handheld, wearable, or vehicle-mounted; it can also be deployed on the water (such as a ship, etc.); it can also be deployed in the air (such as an airplane, a balloon, etc.) And satellites).
  • the terminal device may be a mobile phone, a tablet, a computer with a wireless transmitting and receiving function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, or an industrial control device.
  • wireless terminal in industrial control wireless terminal in self driving, wireless terminal in remote medical, wireless terminal in smart grid, transportation safety Wireless terminals, wireless terminals in smart cities, wireless terminals in smart homes, and so on.
  • Terminal equipment can also be referred to as user equipment (UE), access terminal equipment, UE unit, UE station, mobile station, mobile station, remote station, remote terminal device, mobile device, UE terminal device, terminal device, Wireless communication equipment, UE agent or UE device, etc.
  • UE user equipment
  • access terminal equipment UE unit
  • UE station mobile station
  • mobile station mobile station
  • remote station remote terminal device
  • mobile device UE terminal device
  • terminal device Wireless communication equipment
  • Wireless communication equipment UE agent or UE device, etc.
  • Step 201 The transmitting end obtains a code input bit sequence (coding sequence input for coding). Is the information bit sequence to be encoded.
  • Step 202 The sending end performs check coding to obtain a check code word.
  • Step 203 The sending end performs a distributed cyclic redundancy check (D-CRC) interleaving operation on the check codeword.
  • D-CRC distributed cyclic redundancy check
  • Step 204 The transmitting end performs polar code encoding on the check code word after the interleaving operation to obtain a coded output bit sequence (a bit sequence output).
  • step 205 the sending end performs rate matching on a rate matching input sequence (that is, the encoded output bit sequence obtained in step 204) to obtain a rate matching output sequence (a rate matching output sequence).
  • step 206 The receiving end performs de-rate matching on the received data to be decoded to obtain a bit sequence to be decoded (that is, a rate-matching input sequence or an encoded output bit sequence).
  • steps 207 and 207 the receiving end performs polarization code decoding on the bit sequence to be decoded.
  • Step 208 The receiving end performs a deinterleaving operation on the decoded sequence.
  • Step 209 The receiving end judges whether the decoding result is successfully decoded through a CRC check.
  • an 8 ⁇ 8 encoding matrix is shown, where the vector u is represented by (0, 0, 0, U 4 , 0, U 6 , U 7 , U 8 ), and after the encoding matrix, The encoded bits are represented by vectors (X 1 , X 2 , X 3 , X 4 , X 5 , X 6 , X 7 , X 8 ). It can be seen from FIG. 2b that during the encoding process of the Polar code, some bits in u are used to carry information, which is called information bits.
  • the set of index of these bits is recorded as The other part of the bit is set to a fixed value agreed in advance by the receiving end and the transmitting end, which is called a fixed bit set or frozen bits set.
  • the index set is used Complement Means.
  • the process of constructing a Polar code is a collection The selection process determines the performance of the Polar code.
  • the construction process of the Polar code is usually as follows: According to the length (N) of the coded output bit sequence, there are N polarized channels, corresponding to the N rows of the coding matrix, and the reliability of the polarized channel is calculated. Index of K polarized channels as set Element, the indexes corresponding to the remaining (NK) polarization channels are used as the index set of the fixed bits Elements of the collection Determines the position of the information bits, the set Determines the position of the fixed bit.
  • a possible implementation manner is: construct a pattern sequence table according to the length (K) of the encoded input bit sequence and the length (N) of the encoded output bit sequence, and the pattern sequence table is used to characterize N Reliability of two polarized channels; among them, the pattern sequence table has the following characteristics: it satisfies the simple nesting feature, that is, when the pattern sequence table of the maximum mother code length is determined, the sequence order of the maximum mother code length can be determined. List to get a list of pattern sequences of other shorter mother code lengths.
  • the transmitting end may first determine the length of the encoded input bit sequence and the length of the encoded output bit sequence, and then query the pattern sequence table to determine K highly reliable polarized channels (that is, K information bits Position), and then map the K information bits to K highly reliable polarized channels, and fill the frozen bits to other NK polarized channels to complete the encoding, as shown in Figure 3a; correspondingly, the decoding
  • the process can be seen as the inverse of the encoding process.
  • the receiving end can first determine the length of the encoding input bit sequence (that is, the information bit sequence) and the encoding output bit sequence, and then query the pattern sequence table to determine the K information bits. Position, and then extract the information bits from the encoded output bit sequence to complete the decoding, as shown in Figure 3b.
  • the encoded output bit sequence is the bit sequence to be decoded or is called the decoded input bit sequence
  • the encoded input bit sequence is the information bit sequence or is called the decoded output bit. sequence. It can be understood that the name is not limited in the embodiments of the present application.
  • 5G NR uses the Polar code pattern sequence list, it also uses a rate matching scheme that integrates the solutions of multiple communication vendors.
  • the encoding process is shown in Figure 3c. From the process shown in Figure 3c, it can be seen that during the encoding process, after the sender queries the pattern sequence table, the mapping relationship between the information bits and the polarized channel (that is, the position of the information bits) needs to be re-connected online in combination with the length (E) of the rate matching output bit sequence Adjust to complete coding. Correspondingly, the decoding process is shown in FIG. 3d.
  • the decoding process (the inverse process of the encoding process)
  • the receiver queries the pattern sequence table the mapping relationship between the information bits and the polarization channel needs to be readjusted. Then complete decoding. According to the above, it is known that in the encoding process and the decoding process, after querying the pattern sequence list, it needs to be readjusted online, which is relatively inefficient.
  • the network device in addition to the data itself, there is also an instruction interaction between the network device and the terminal device.
  • the network device completes the scheduling of the terminal device through the instruction and transmits the scheduling format information.
  • the network equipment often does not send or sends some scheduling signaling, but the terminal equipment itself monitors whether there is scheduling in accordance with certain rules.
  • the terminal device needs to perform blind detection and decoding without knowing the exact format. Because there are many possibilities for blind detection decoding, the above-mentioned decoding process needs to be performed multiple times, and each table needs to complete the table lookup and readjustment actions, and the calculation volume and operation delay are very large.
  • the embodiments of the present application provide a method for decoding a polar code, which is used to solve the technical problem of a complicated decoding process and low efficiency.
  • FIG. 4 is a schematic flowchart of a decoding method according to an embodiment of the present application. As shown in FIG. 4, it includes:
  • Step 401 Determine a value of a sequence parameter of the polarization code, where the sequence parameter of the polarization code includes a length of an encoded input bit sequence and a length of a rate-matched output sequence.
  • Step 402 Determine the position of the information bit of the polarization code corresponding to the value of the sequence parameter of the polarization code based on the pre-stored data structure.
  • Step 403 Perform polarization code decoding according to the position of the information bits of the polarization code.
  • the pre-stored data structure may be used to represent the positions of the K information bits of the polar code corresponding to each of the multiple values of the sequence parameters of the polar code.
  • the stored structure can directly determine the position of the information bit of the polarization code corresponding to the value of the sequence parameter value of the polarization code, and then no readjustment operation is required in the decoding process, which can effectively simplify the decoding process, and Improve decoding efficiency.
  • the polarization code decoding method provided in the embodiment of the present application may be performed by a receiving end, and specifically, may be performed by a network device or may be performed by a terminal device. This method can be applied to various wireless communication scenarios, such as a blind detection scenario. In the blind detection scenario, the above decoding method can be executed by a terminal device.
  • the receiver when the receiver performs the blind detection decoding process, it first lists the values of the sequence parameters of all possible polarization codes, and decodes each possible value.
  • the decoding result passes Check to determine the right or wrong, continue this process until the correct decoding result is searched or all possible values are traversed or a certain preset condition is reached.
  • the parameters of the polarization code sequence have m + 1 possible values, specifically: (K0, E0), (K1, E1), (K2, E2), ..., (Km, Em), then receive The terminal can decode according to m + 1 possible values.
  • each group can be calculated in an offline manner.
  • the possible values are the positions of the K information bits of the polarization code, and the static information is stored through the data structure.
  • the receiving end can directly use the data structure to obtain the position of the information bits during the decoding process.
  • the data structure in the embodiments of the present application may refer to a method used for storing static information and static information.
  • a two-dimensional table (bivariate table), an array (array), a stack (stack), a queue (linked), a linked list (graph), or a graph.
  • the hash table (hash) and the like are not specifically limited.
  • the data structure is used to indicate the positions of the K information bits of the polarization code corresponding to each of the multiple values of the sequence parameters of the polarization code.
  • It may refer to: the position of the K information bits of the polarization code corresponding to each of the various possible values (such as m + 1) of the sequence parameters of the polarization code in the data structure.
  • the positions of the K information bits of the polarization code corresponding to each of the multiple values of the sequence parameters of the polarization code can be encoded to output the bit type corresponding to each position in the bit sequence.
  • the bit type corresponding to any position is used to indicate that the bit at the position is an information bit or a frozen bit.
  • each value of the sequence parameters of the polarization code corresponds to one or more rows of data in Table 1.
  • the value of the sequence parameter can be indexed, and the corresponding bit type of each position in the encoded output bit sequence can be read to the corresponding line or lines, and K pieces of information can be determined according to the bit type corresponding to each position. Bit position.
  • the number of rows corresponding to each value of the sequence parameter of the polarization code in Table 2 may be uncertain.
  • the specific value identifier of the sequence parameter of the polarization code can be searched in Table 2 first, and then the corresponding bit at each position in the encoded output bit sequence is read to one or more lines corresponding to the specific value identifier.
  • Type, and the position of the K information bits can be determined according to the bit type corresponding to each position.
  • the identification of the value of the sequence parameter of the polarization code is information that can uniquely identify the value. For example, it can be the number of the sequence parameter of the polarization code or directly the value of the sequence parameter. No restrictions.
  • the bit type (information bit or frozen bit) corresponding to each position can be represented by "0" or "1", where “0" represents the frozen bit and “1” represents the information bit, or it can also be “0"
  • Information bit, "1" means frozen bit; in other possible implementations, there may be other representations, which are not specifically limited.
  • the positions of the K information bits of the polarization code corresponding to each of the multiple values of the sequence parameters of the polarization code may be determined by the node types of multiple nodes of the polarization code.
  • An indication wherein a node type of any one of the plurality of nodes is used to indicate a bit type corresponding to one or more consecutive positions in the encoded output bit sequence.
  • any node may include one or more consecutive bits in a coded output bit sequence. Therefore, it can also be said that the type of any node is used to indicate that the node includes one or more consecutive bits. Bit type.
  • multiple node types may be defined in advance, as shown in Table 3, which is an example of multiple possible node types.
  • the GoodBit described in Table 3 specifically refers to a high-reliability bit.
  • it can be directly decoded according to the result of the hard decision to save the amount of calculation.
  • each value of the sequence parameters of the polarization code corresponds to one or more rows of data in Table 1.
  • the value of the sequence parameter can be indexed, and the node type of each node can be read in the corresponding row or rows, and then the positions of the K information bits can be determined according to the node type of each node.
  • the number of rows corresponding to each value of the sequence parameter of the polarization code in Table 2 may be uncertain.
  • the identifier of the specific value of the sequence parameter of the polarization code can be searched in Table 2 first, and then the node type of each node can be read in one or more rows corresponding to the identifier of the specific value, and can be based on each The node type of the node determines the position of the K information bits.
  • each node in Table 4 and Table 5 can be represented by the node type numbers shown in Table 3; for example, when the value of the polarization code sequence parameter is (K0, E0), each Each node includes 8 consecutive bits to be decoded. If the node type of node 1 is Rate_8, the corresponding box in Table 3 can be filled with the number of Rate_8, or other information used to identify the node type is Rate_8. No restrictions.
  • each node when the value of the polarization code sequence parameter is (K0, E0), each node includes 8 consecutive bits to be decoded. If the node type of node 1 is GoodBitAll_8, the nodes of node 2, node 3, and node 4 The types are also GoodBitAll_8, that is, the node type GoodBitAll_8 appears three times consecutively after node 1. In this way, the box after the node type of node 1 in Table 6 can be filled with the node type GoodBitAll_8 that appears continuously after node 1.
  • the node type of each node may occupy 6 bits, and the number of consecutive occurrences of the node type may occupy 2 bits.
  • a node is introduced, and the bit type of one or more consecutive bits included in the node is characterized by the node type.
  • the node when decoding, the node can be used as the minimum decoding granularity to facilitate Improve the latency benefits of parallel decoding.
  • a decoding algorithm corresponding to each node type may also be defined in advance, so that when decoding, the decoding algorithm corresponding to the node type of the node is directly used to decode the node. In this way, multiple possibilities can be provided for the polarization code acceleration algorithm. For example, there are fast decoding algorithms for multiple consecutive frozen bits. In the embodiment of the present application, if this decoding algorithm is to be supported, it is only necessary to define a translation algorithm. The node type corresponding to the coding algorithm is sufficient, which can effectively improve the decoding efficiency.
  • the data structure includes the positions of the K information bits of the polarizing code corresponding to each of the multiple values of the sequence parameters of the polarizing code. As shown in Table 7, it is another example of the data structure.
  • the positions of the K information bits of the polarization code corresponding to the value (K0, E0) are the x1th position, the x2th position, the x3th position, the x4th position, the x5th position, and the x6th position Positions,..., XK0th positions, positions other than these positions are all frozen bit positions. In this way, only the positions of the information bits are enumerated, so that storage space can be effectively saved, and the positions of the information bits can be determined more quickly based on the above data structure.
  • the sequence parameters of the polarization code may further include the length of the encoded output bit sequence, where the length of the encoded output bit sequence may be calculated by encoding the length of the input bit sequence and the rate matching the length of the output sequence.
  • the length of the encoded output bit sequence may be calculated by encoding the length of the input bit sequence and the rate matching the length of the output sequence.
  • the parameters (K0, E0), (K1, E1), (K2, E2), ..., (Km, Em) of the above-mentioned polarization code sequence can also be expressed as (K0, N0, E0) , (K1, N1, E1), (K2, N2, E2), ..., (Km, Nm, Em).
  • the parameters of the polarization code sequence in various examples of the data structure can be replaced. Taking the above table 2 as an example, it can also be expressed as shown in the following table 8. Other various examples can be referred to, and no longer here Specific enumeration.
  • the pre-stored data structure when performing decoding, can be queried according to the value of the sequence parameter of the polar code, and the position of the information bit can be determined to complete the translation. In this way, there is no need to store the pattern sequence table, and it is possible to avoid online readjustment operations, which can save computing power and reduce decoding delay.
  • FIG. 6 is a schematic flowchart of a coding method according to an embodiment of the present application. As shown in FIG. 6, it includes:
  • Step 601 Determine a value of a sequence parameter of the polarization code, where the sequence parameter of the polarization code includes a length of a coded input bit sequence and a length of a rate-matched output sequence.
  • Step 602 Determine the position of the information bit of the polarization code corresponding to the value of the sequence parameter of the polarization code based on the pre-stored data structure;
  • Step 603 Perform polarization code encoding according to the position of the information bits of the polarization code.
  • the pre-stored data structure may be used to represent the positions of the K information bits of the polar code corresponding to each of the multiple values of the sequence parameters of the polar code.
  • the stored structure can directly determine the position of the information bit of the polarization code corresponding to the value of the sequence parameter of the polarization code, and then no readjustment operation is required in the encoding process, which can effectively simplify the encoding process and improve Coding efficiency.
  • the encoding method shown in FIG. 6 and the decoding method shown in FIG. 4 can be used in combination.
  • the sending end uses the encoding method shown in FIG. 6 to send information after encoding, and the receiving end receives the information.
  • the decoding method shown in FIG. 4 can be used for decoding.
  • the two can be used separately, for example, the sending end uses the encoding method shown in FIG. 6 to encode the information, and the receiving end can use the existing decoding method to decode the information after receiving the information;
  • the transmitting end uses the existing encoding method to encode the information and sends the information, and after receiving the information, the receiving end can use the decoding method illustrated in FIG. 4 to perform the decoding.
  • each device in the foregoing embodiments may include a hardware structure and / or a software module corresponding to each function.
  • Those skilled in the art should easily realize that the present invention can be implemented in the form of hardware or a combination of hardware and computer software by combining the units and algorithm steps of each example described in the embodiments disclosed herein. Whether a certain function is performed by hardware or computer software-driven hardware depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
  • FIG. 7 shows a possible exemplary block diagram of a polar code decoding device involved in an embodiment of the present invention, and the device 700 may exist in the form of software.
  • the apparatus 700 may include a storage unit 701 and a processing unit 702.
  • the storage unit 701 is configured to store a program code and a data structure of the device 700, where the data structure is used to represent the K information bits of the polarization code corresponding to each of multiple values of the sequence parameters of the polarization code. s position.
  • the storage unit 701 may be a memory.
  • the processing unit 702 may be a processor or a controller, for example, it may be a general-purpose central processing unit (CPU), a general-purpose processor, digital signal processing (DSP), application-specific integrated circuits (application-specific integrated circuits, ASIC), field programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It may implement or execute various exemplary logical blocks, modules, and circuits described in connection with the present disclosure.
  • the processor may also be a combination that implements a computing function, for example, including a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.
  • the apparatus 700 may be a receiving-end device (such as a terminal device) involved in this application, or may also be a chip in the receiving-end device.
  • the processing unit 702 may support the device 700 to perform the actions in the method example shown in FIG. 4.
  • the processing unit 702 is configured to support the device 700 to perform steps 401 to 403 in FIG. 4.
  • the sequence parameter of the polarization code further includes a length of an encoded output bit sequence.
  • the pre-stored data structure is a two-dimensional table.
  • the pre-stored data structure includes node types of multiple nodes of the polarization code corresponding to each value of multiple values of the sequence parameters of the polarization code, where The node type of any one of the multiple nodes is used to indicate the bit type corresponding to one or more consecutive positions in the encoded output bit sequence.
  • an embodiment of the present application further provides a polar code decoding device 800.
  • the polar code decoding device 800 is configured to execute the method shown in FIG. 4. Part or all of the method shown in FIG. 4 can be implemented by hardware or software.
  • the polar code decoding device 800 includes: an input interface circuit 801 for acquiring a coded output bit sequence.
  • Logic circuit 802 is configured to perform the method shown in FIG. 4 based on the obtained coded output bit sequence. For details, refer to the description in the foregoing method embodiment, which is not repeated here; output interface circuit 803 is used for output decoding result.
  • the polarization code decoding device 800 may be a chip or an integrated circuit in a specific implementation.
  • the polarization code decoding device 800 includes: a memory 901, which is used to store programs and data. Structure, the data structure is used to represent the position of the K information bits of the polarization code corresponding to each of the multiple values of the sequence parameters of the polarization code; the processor 902 is configured to execute the storage of the memory 901 When the program is executed, the polar code decoding apparatus 800 can implement the method provided in FIG. 4 described above.
  • the foregoing memory 901 may be a physically independent unit, or as shown in FIG. 10, the memory 901 and the processor 902 are integrated together.
  • the data structure in the embodiment of the present application may be stored in the memory of the polar code decoding device before the polar code decoding device leaves the factory, or it may be after the polar code decoding device is shipped from the factory Before the above decoding process is performed, the data is stored into the memory of the polar code decoding device in an offline manner.
  • the embodiment of the present application does not specifically limit the time for storing the data structure.
  • the data structure may be stored in the memory by a solidified manner, or stored in the memory by a software program, which is not specifically limited.
  • the polarization code decoding device 800 may also include only the processor 902, and the memory 901 for storing programs and data structures is located in the polarization Outside the code decoding device 800, the processor 902 is connected to the memory 901 through a circuit / wire, and is used to read and execute a program stored in the memory 901.
  • the processor 902 may include a central processing unit (CPU). At this time, the CPU may perform steps 401 to 403 described above. In another example, the processor 902 may include a polar code decoding accelerator. At this time, the above steps 401 to 403 may be performed by the polar code decoding accelerator. Further, the processor 902 may further include a CPU. In the blind detection scenario, the CPU can control the blind detection process as a whole, and the polarization code decoding accelerator decodes each value of the sequence parameters of the polarization code.
  • the processor 902 may further include a hardware chip.
  • the above hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof.
  • the PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a general array logic (GAL), or any combination thereof.
  • the memory 901 may include volatile memory (for example, random-access memory (RAM); the memory 901 may also include non-volatile memory (for example, flash memory) memory), hard disk (HDD) or solid-state drive (SSD); memory 901 may also include a combination of the above types of memory.
  • volatile memory for example, random-access memory (RAM)
  • non-volatile memory for example, flash memory
  • HDD hard disk
  • SSD solid-state drive
  • memory 901 may also include a combination of the above types of memory.
  • An embodiment of the present application further provides a computer storage medium storing a computer program, where the computer program includes a method for executing the method shown in FIG. 4.
  • An embodiment of the present application further provides a computer program product containing instructions, which when executed on a computer, causes the computer to execute the method shown in FIG. 4.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be from a website site, a computer, a server, or a data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, a data center, or the like that includes one or more available medium integration.
  • the available medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (Solid State Disk (SSD)), and the like.
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to work in a specific manner such that the instructions stored in the computer-readable memory produce a manufactured article including an instruction device, the instructions
  • the device implements the functions specified in one or more flowcharts and / or one or more blocks of the block diagram.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of steps can be performed on the computer or other programmable device to produce a computer-implemented process, which can be executed on the computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more flowcharts and / or one or more blocks of the block diagrams.

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Abstract

一种极化码译码方法及装置，其中方法包括：确定极化码的序列参数的取值，极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度；基于预先存储的数据结构，确定极化码的序列参数的取值对应的极化码的信息比特的位置；以及，根据极化码的信息比特的位置，进行极化码译码。本申请实施例中，预先存储的数据结构可以用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，因此，基于预先存储的结构，便可直接确定出极化码的序列参数的取值对应的极化码的信息比特的位置，进而在译码过程中无需再进行重调整操作，从而能够有效简化译码过程、并提高译码效率。

Description

一种极化码译码方法及装置 技术领域
本申请涉及通信技术领域，尤其涉及一种极化码译码方法及装置。
背景技术
无线通信的快速演进预示着未来第五代(5th generation，5G)通信系统将呈现出一些新的特点，最典型的三个通信场景包括增强型移动互联网(enhance mobile broadband，eMBB)、海量机器连接通信(massive machine type communication，mMTC)和高可靠低延迟通信(ultra reliable low latency communication，URLLC)，这些通信场景的需求将对现有长期演进(long term evolution，LTE)技术提出新的挑战。信道编码作为最基本的无线接入技术，是满足5G通信需求的重要研究对象之一。
极化码(Polar Codes)在5G标准中被选作控制信道编码方式。极化码也可以称为Polar码，是第一种、也是已知的唯一能够被严格证明“达到”信道容量的信道编码方法。在不同码长下，尤其对于有限码，极化码的性能远优于Turbo码和低密度奇偶校验码(low density parity check，LDPC)码。另外，极化码在编译码方面具有较低的计算复杂度。这些优点让极化码在5G中具有很大的发展和应用前景。
目前，如何提高极化码在译码方面的效率，仍需进一步研究。
发明内容
本申请提供一种极化码译码方法及装置，用于解决极化码译码过程较为复杂、效率较低的技术问题。
第一方面，本申请实施例提供一种极化码译码方法，所述方法包括：
确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度；基于预先存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；根据所述极化码的信息比特的位置，进行极化码译码。
本申请实施例中，由于预先存储的数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K(K为正整数)个信息比特的位置，因此，基于预先存储的结构，便可直接确定出极化码的序列参数的取值对应的极化码的信息比特的位置，进而在译码过程中无需再进行重调整操作，能够有效简化编译码过程、并提高编译码效率。
在一种可能的设计中，所述极化码的序列参数还包括编码输出比特序列的长度。
在一种可能的设计中，所述预先存储的数据结构为二维表。
本申请实施例中，存储存储的数据结构还可以为数组等，具体不做限定。
在一种可能的设计中，所述预先存储的数据结构包括所述极化码的序列参数的多种取值中每种取值对应的极化码的多个节点的节点类型，所述多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。
如此，由于节点可以包括一个或多个连续的比特，从而通过存储多个节点的节点类型能够有效节省所需的存储空间。
在一种可能的设计中，进行极化码译码，包括：以所述节点为最小译码颗粒度，进行极化码译码，从而能够提高并行译码的延迟收益。
在一种可能的设计中，进行极化码译码，包括：针对所述多个节点中的任一节点，使用所述任一节点的节点类型对应的译码算法对所述节点进行译码。
采用这种方式，能够为极化码加速算法提供多种可能性，比如连续多个冻结比特有快速译码算法，本申请实施例中如果要支持这种译码算法只需定义一种与该译码算法对应的节点类型即可，从而能够有效提高译码效率。
第二方面，本申请实施例提供一种极化码编码方法，所述方法包括：
确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度；基于预先存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；根据所述极化码的信息比特的位置，进行极化码编码。
本申请实施例中，由于预先存储的数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，因此，基于预先存储的结构，便可直接确定出极化码的序列参数的取值对应的极化码的信息比特的位置，进而在编码过程中无需再进行重调整操作，能够有效简化编译码过程、并提高编译码效率。
在一种可能的设计中，所述极化码的序列参数还包括编码输出比特序列的长度。
在一种可能的设计中，所述预先存储的数据结构为二维表。
在一种可能的设计中，所述预先存储的数据结构包括所述极化码的序列参数的多种取值中每种取值对应的极化码的多个节点的节点类型，所述多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。
第三方面，本申请实施例提供一种极化码译码装置，所述装置包括：
处理单元，用于确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度；基于存储单元存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；以及，根据所述极化码的信息比特的位置，进行极化码译码；
存储单元，用于存储数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置。
在一种可能的设计中，所述极化码的序列参数还包括编码输出比特序列的长度。
在一种可能的设计中，所述预先存储的数据结构为二维表。
在一种可能的设计中，所述预先存储的数据结构包括所述极化码的序列参数的多种取值中每种取值对应的极化码的多个节点的节点类型，所述多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。
第四方面，本申请实施例提供一种极化码编码装置，所述装置包括：
处理单元，用于确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度；基于存储单元存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；以及，根据所述极化码的信息比特的位置，进行极化码编码；
存储单元，用于存储数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置。
在一种可能的设计中，所述极化码的序列参数还包括编码输出比特序列的长度。
在一种可能的设计中，所述预先存储的数据结构为二维表。
在一种可能的设计中，所述预先存储的数据结构包括所述极化码的序列参数的多种取 值中每种取值对应的极化码的多个节点的节点类型，所述多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。
第五方面，本申请实施例提供一种极化码译码装置，包括处理器和存储器；其中，存储器，用于存储程序和数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置；处理器，用于执行所述存储器存储的所述程序，当所述程序被执行时，使得所述极化码译码装置执行第一方面及其可能的任一设计中的方法。在一种可能的设计中，所述极化码译码装置为芯片或集成电路。
第六方面，本申请实施例提供一种极化码编码装置，包括处理器和存储器；其中，存储器，用于存储程序和数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置；处理器，用于执行所述存储器存储的所述程序，当所述程序被执行时，使得所述极化码译码装置执行第二方面及其可能的任一设计中的方法。在一种可能的设计中，所述极化码编码装置为芯片或集成电路。
第七方面，本申请实施例提供一种极化码译码装置，包括：输入接口电路，用于获取编码输出序列；逻辑电路，用于基于获取的编码输出序列执行第一方面及其可能的任一设计中的方法，得到译码结果；输出接口电路，用于输出译码结果。
第八方面，本申请实施例提供一种极化码编码装置，包括：输入接口电路，用于获取编码输出序列；逻辑电路，用于基于获取的编码输出序列执行第二方面及其可能的任一设计中的方法，得到译码结果；输出接口电路，用于输出译码结果。
第九方面，本申请实施例提供一种计算机存储介质，用于存储计算机程序，该计算机程序包括用于执行第一方面或第二方面及其可能的任一设计中的方法的指令。
第十方面，本申请实施例提供一种包含指令的计算机程序产品，当其在计算机上运行时，使得计算机执行上述第一方面或第二方面及其可能的任一设计中所述的方法。
附图说明
图1为本申请实施例适用的一种通信系统示意图；
图2a为极化码编译码流程示意图；
图2b为编码矩阵示意图；
图3a为编码流程的一种示例图；
图3b为译码流程的一种示例图；
图3c为编码流程的又一种示例图；
图3d为译码流程的又一种示例图；
图4为本申请实施例提供的一种极化码译码方法对应的流程示意图；
图5为本申请实施例提供的极化码译码流程的另一种示意图；
图6为本申请实施例提供的极化码编码流程示意图；
图7为本申请实施例提供的一种译码装置的结构示意图；
图8为本申请实施例提供的又一种译码装置的结构示意图；
图9为本申请实施例提供的又一种译码装置的结构示意图；
图10为本申请实施例提供的又一种译码装置的结构示意图。
具体实施方式
下面将结合附图对本申请实施例作进一步地详细描述。其中，方法和装置是基于同一发明构思的，由于方法及设备解决问题的原理相似，因此装置与方法的实施可以相互参见，重复之处不再赘述。
图1给出了一种通信系统示意图。如图1所示，本申请实施例应用的通信系统100中包括发送端101和接收端102。发送端101也可以称为编码端，接收端102也可以称为译码端。其中，发送端101可以为网络设备，接收端102为终端设备；或者，发送端101为终端设备，接收端102为网络设备。
网络设备可以是任意一种具有无线收发功能的设备，包括但不限于：基站(例如，基站NodeB、演进型基站eNodeB、第五代(the fifth generation，5G)通信系统中的基站、未来通信系统中的基站或网络设备、WiFi系统中的接入节点、无线中继节点、无线回传节点)等。网络设备还可以是云无线接入网络(cloud radio access network，CRAN)场景下的无线控制器。网络设备还可以是5G网络中的网络设备或未来演进网络中的网络设备；还可以是可穿戴设备或车载设备等。网络设备还可以是小站，传输节点(transmission reference point，TRP)等。当然不申请不限于此。
终端设备是一种具有无线收发功能的设备可以部署在陆地上，包括室内或室外、手持、穿戴或车载；也可以部署在水面上(如轮船等)；还可以部署在空中(例如飞机、气球和卫星上等)。所述终端设备可以是手机(mobile phone)、平板电脑(Pad)、带无线收发功能的电脑、虚拟现实(Virtual Reality，VR)终端设备、增强现实(Augmented Reality，AR)终端设备、工业控制(industrial control)中的无线终端、无人驾驶(self driving)中的无线终端、远程医疗(remote medical)中的无线终端、智能电网(smart grid)中的无线终端、运输安全(transportation safety)中的无线终端、智慧城市(smart city)中的无线终端、智慧家庭(smart home)中的无线终端等等。本申请的实施例对应用场景不做限定。终端设备有时也可以称为用户设备(user equipment，UE)、接入终端设备、UE单元、UE站、移动站、移动台、远方站、远程终端设备、移动设备、UE终端设备、终端设备、无线通信设备、UE代理或UE装置等。
以5G新无线(new radio，NR)通信系统为例，其采用的极化码编译码流程如图2a所示，包括：步骤201、发送端获取编码输入比特序列(a bit sequence input for coding)，即为待编码的信息比特序列。步骤202、发送端进行校验编码，获得校验编码码字。步骤203、发送端对校验编码码字进行分布式循环冗余校验(distributed cyclic redundancy check，D-CRC)交织操作。步骤204、发送端对交织操作后的校验编码码字进行极化码编码，得到编码输出比特序列(a bit sequence output for coding)。步骤205，发送端对速率匹配输入序列(a rate matching input sequence)(即为步骤204中得到的编码输出比特序列)进行速率匹配，得到速率匹配输出序列(a rate matching output sequence)。步骤206、接收端对接收到的待译码数据进行解速率匹配，得到待译码比特序列(即为速率匹配输入序列或编码输出比特序列)。步骤与207，接收端对待译码比特序列进行极化码译码。步骤208、接收端对译码后的序列进行解交织操作。步骤209，接收端通过CRC校验判断译码结果是否译码成功。
进一步地，如图2b所示，展示了一个8×8的编码矩阵，其中向量u用(0，0，0，U 4，0，U 6，U 7，U 8)表示，经过编码矩阵，编码后的比特以向量(X 1，X 2，X 3，X 4，X 5，X 6， X 7，X 8)表示。根据图2b可以看出，在Polar码的编码过程中，u中的一部分比特用来携带信息，称为信息比特集合(information bits)，这些比特的索引的集合记作
Figure PCTCN2018093928-appb-000001
另外的一部分比特设置为接收端和发送端预先约定的固定值，称之为固定比特集合或冻结比特集合(frozen bits)，其索引的集合用
Figure PCTCN2018093928-appb-000002
的补集
Figure PCTCN2018093928-appb-000003
表示。Polar码的构造过程即集合
Figure PCTCN2018093928-appb-000004
的选取过程，决定了Polar码的性能。Polar码的构造过程通常是：根据编码输出比特序列的长度(N)确定共存在N个极化信道，分别对应编码矩阵的N个行，计算极化信道可靠度，将可靠度较高的前K个极化信道的索引作为集合
Figure PCTCN2018093928-appb-000005
的元素，剩余(N-K)个极化信道对应的索引作为固定比特的索引集合
Figure PCTCN2018093928-appb-000006
的元素，其中，集合
Figure PCTCN2018093928-appb-000007
决定了信息比特的位置，集合
Figure PCTCN2018093928-appb-000008
决定了固定比特的位置。
针对于上述构造过程，一种可能的实现方式为：根据编码输入比特序列的长度(K)和编码输出比特序列的长度(N)，构建码型序列表，该码型序列表用于表征N个极化信道的可靠度；其中，码型序列表具有以下特点：满足简单的嵌套特征，即当最大母码长度的码型序列表确定后，可以根据最大母码码长的码型序列表获得其它较短母码长度的码型序列表。具体实施过程中，发送端可首先确定出编码输入比特序列的长度和编码输出比特序列的长度，然后查询码型序列表，确定出K个可靠度较高的极化信道(即K个信息比特的位置)，进而将K个信息比特映射到K个可靠度较高的极化信道，并将冻结比特填充到其它N-K个极化信道，完成编码，如图3a所示；相应地，译码过程可看成是编码过程的逆过程，接收端可首先确定出编码输入比特序列的长度(即信息比特序列)和编码输出比特序列的长度，然后查询码型序列表，确定出K个信息比特的位置，进而从编码输出比特序列中提取出信息比特，完成译码，如图3b所示。
需要说明的是，从接收端来看，比如编码输出比特序列即为待译码比特序列或者称为译码输入比特序列，又比如编码输入比特序列即为信息比特序列或者称为译码输出比特序列。可以理解的，本申请实施例中对名称不做限定。
然而，由于5G NR在采用了Polar码码型序列表的同时，还采用了一种融合多家通信厂商方案的速率匹配方案，其编码流程如图3c所示，从图3c所示意的流程可以看出：在编码过程中，发送端查询码型序列表后，还需结合速率匹配输出比特序列的长度(E)对信息比特和极化信道的映射关系(即信息比特的位置)在线进行重新调整，进而完成编码。相应地，译码流程如图3d所示，在译码过程(编码过程的逆过程)中，接收端查询码型序列表后，也需对信息比特和极化信道的映射关系进行重新调整，进而完成译码。根据上述内容可知，在编码过程和译码过程中，查询码型序列表后，均还需在线进行重新调整，效率较低。
进一步地，在5G通信系统中，网络设备和终端设备之间除了数据本身的交互外，还有指令的交互，网络设备通过指令完成对终端设备的调度，以及传递调度的格式信息。为了降低指令交互的开销，网络设备常常不发送或者少发送某些调度信令，而由终端设备按照一定规则自行监听是否存在调度。在监听过程中，终端设备需要在不知道确切格式的情况下做盲检测译码。由于盲检测译码存在多种可能，因此需要多次执行上述译码流程，而且每次译码均需要完成查表动作和重调整动作，运算量和运算延迟都很大。
基于此，本申请实施例提供一种极化码译码方法，用于解决译码过程较为复杂、效率较低的技术问题。
图4为本申请实施例提供的一种译码方法所对应的流程示意图，如图4所示，包括：
步骤401，确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度。
步骤402，基于预先存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；
步骤403，根据所述极化码的信息比特的位置，进行极化码译码。
本申请实施例中，预先存储的数据结构可以用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，因此，基于预先存储的结构，便可直接确定出极化码的序列参数的取值对应的极化码的信息比特的位置，进而在译码过程中无需再进行重调整操作，能够有效简化译码过程、并提高译码效率。
本申请实施例提供的极化码译码方法可以由接收端来执行，具体来说，可以由网络设备来执行或者也可以由终端设备来执行。该方法可以适用于各种无线通信场景，比如盲检测场景，在盲检测场景中，上述译码方法可以由终端设备来执行。
下面以上述译码方法应用于盲检测场景为例来进行描述。
在盲检测场景中，接收端执行盲检测译码流程时，首先列出所有可能的极化码的序列参数的取值，并针对于每一种可能的取值进行译码，译码结果通过校验来判断对错，持续这个过程直到搜索到正确的译码结果或遍历全部可能的取值或达到某个预设条件。比如，极化码序列的参数共有m+1种可能的取值，具体为：(K0,E0)、(K1,E1)、(K2,E2)、……、(Km,Em)，则接收端可以根据m+1种可能的取值进行译码。
考虑到对于极化码的序列参数的每一种可能的取值，其对应的极化码的K个信息比特的位置为静态信息，因此，本申请实施例可以通过离线方式计算得到每一组可能的取值对应的极化码的K个信息比特的位置，并通过数据结构存储该静态信息，如此，接收端在译码过程中，可以直接使用该数据结构，获取到信息比特的位置。需要说明的是，本申请实施例中的数据结构可以是指存储静态信息所使用的方式以及静态信息。
进一步地，存储静态信息所使用的方式可以有多种，比如二维表(bivariate table)、数组(array)、堆栈(stack)、队列(queue)、链表(linked list)、图(graph)或者散列表(hash)等，具体不做限定。
需要说明的是，本申请实施例中，数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，在一个示例中，可以是指：数据结构用于表示所述极化码的序列参数的各种可能的取值(比如m+1种)中每种取值对应的极化码的K个信息比特的位置，本申请实施例主要以此种情形为例进行描述。
下面结合表格示意来描述数据结构的几种可能的示例。
在一种可能的实现方式中，极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置可以通过编码输出比特序列中各个位置对应的比特类型来指示，其中，任一位置对应的比特类型用于指示该位置上的比特为信息比特或冻结比特。
该种实现方式中，如表1所示，为预先存储的数据结构的一种示例。
表1：数据结构示例1
Figure PCTCN2018093928-appb-000009
Figure PCTCN2018093928-appb-000010
采用上述数据结构，极化码的序列参数的每一种取值在表1中对应一行或多行数据。具体实施中，可以以序列参数的取值为索引，到对应的一行或多行读取编码输出比特序列中各个位置对应的比特类型，进而可以根据各个位置对应的比特类型，确定出K个信息比特的位置。
该种实现方式中，如表2所示，为预先存储的数据结构的又一种示例。
表2：数据结构示例2
Figure PCTCN2018093928-appb-000011
Figure PCTCN2018093928-appb-000012
采用上述数据结构，极化码的序列参数的每一种取值在表2中对应的行数可以是不确定的。具体实施中，可以先在表2中搜索极化码的序列参数的特定取值的标识，进而到该特定取值的标识对应的一行或多行读取编码输出比特序列中各个位置对应的比特类型，并可以根据各个位置对应的比特类型，确定出K个信息比特的位置。
举个例子，若极化码的序列参数的取值为(K0,E0)，则可先在表2中搜索(K0,E0)的标识，进而查询(K0,E0)所对应的两行数据，得到编码输出比特序列中第1位置至第N0位置对应的比特类型，进而根据第1位置至第N0位置对应的比特类型，确定出K个信息比特的位置。
需要说明的是：极化码的序列参数的取值的标识为能够唯一标识该取值的信息，比如可以为极化码的序列参数的取值的编号或者也可以直接为该取值，具体不做限定。各个位置对应的比特类型(信息比特或冻结比特)可以采用“0”或“1”来表示，其中，“0”表示冻结比特，“1”表示信息比特，或者，也可以是“0”表示信息比特，“1”表示冻结比特；在其它可能的实现方式中，也可以有其它表示形式，具体不做限定。
又一种可能的实现方式中，极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置可以通过极化码的多个节点的节点类型来指示，其中，多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。本申请实施例中，任一节点可以包括编码输出比特序列中的一个或多个连续的比特，因此，也可以说任一节点的类型用于指示所述节点包括的一个或多个连续的比特的比特类型。
本申请实施例中，可以预先定义多种节点类型，比如表3所示，为多种可能的节点类型示例。
表3：多种可能的节点类型
Figure PCTCN2018093928-appb-000013
Figure PCTCN2018093928-appb-000014
其中，表3中所描述的GoodBit具体是指高可靠度的比特，对高可靠度的比特进行译码时，可以直接按硬判决结果来译码，节省运算量。
该种实现方式中，如表4所示，为预先存储的数据结构的一种示例。
表4：数据结构示例3
Figure PCTCN2018093928-appb-000015
采用上述数据结构，极化码的序列参数的每一种取值在表1中对应一行或多行数据。具体实施中，可以以序列参数的取值为索引，到对应的一行或多行读取各个节点的节点类型，进而可以根据各个节点的节点类型，确定出K个信息比特的位置。
该种实现方式中，如表5所示，为预先存储的数据结构的又一种示例。
表5：数据结构示例4
Figure PCTCN2018093928-appb-000016
采用上述数据结构，极化码的序列参数的每一种取值在表2中对应的行数可以是不确定的。具体实施中，可以先在表2中搜索极化码的序列参数的特定取值的标识，进而到该特定取值的标识对应的一行或多行读取各个节点的节点类型，并可以根据各个节点的节点类型，确定出K个信息比特的位置。
需要说明的是，表4和表5中各个节点的节点类型可以通过表3中所示意出的节点类型编号来表示；比如，极化码序列参数的取值为(K0,E0)时，每个节点包括8个连续的待译码比特，若节点1的节点类型为Rate_8，则表3中对应的方格内可以填入Rate_8的编号，或者其它用于标识节点类型为Rate_8的信息，具体不做限定。
如此，采用表3所示意的方式，由于节点类型可以指示一个或多个连续的位置对应的比特类型，从而通过存储多个节点的节点类型能够有效节省所需的存储空间。
该种实现方式中，如表6所示，为预先存储的数据结构的又一种示例。
表6：数据结构示例5
Figure PCTCN2018093928-appb-000017
比如，极化码序列参数的取值为(K0,E0)时，每个节点包括8个连续的待译码比特，若节点1的节点类型为GoodBitAll_8，节点2、节点3和节点4的节点类型也均为GoodBitAll_8，即GoodBitAll_8这一节点类型在节点1之后连续出现3次，如此，表6中节点1的节点类型之后的方格内可填入GoodBitAll_8这一节点类型在节点1之后连续出现的次数(即3)；节点5的节点类型为Rate_8，则表4中对应的方格内(节点a1的节点类型)可以填入Rate_8的编号，节点6和节点7的节点类型也均为Rate_8，则之后的方格内可填入Rate_8这一节点类型在节点5之后连续出现的次数(即2)；以此类推，直到最后一个节点。如此可知，采用表4中的方式，无需一一列举出每个节点的节点类型，从而能够进一步节省存储空间。
在一个示例中，表6中，各个节点的节点类型可以占用6比特，该节点类型连续出现的次数可以占用2比特。
本申请实施例中，通过引入节点，并通过节点类型来表征节点包括的一个或多个连续的比特的比特类型，如此，在进行译码时，可以以节点为最小译码颗粒度，以便于提高并行译码的延迟收益。进一步地，还可以预先定义每个节点类型对应的译码算法，从而在译码时，直接使用该节点的节点类型对应的译码算法对该节点进行译码。采用这种方式能够为极化码加速算法提供多种可能性，比如连续多个冻结比特有快速译码算法，本申请实施例中如果要支持这种译码算法只需定义一种与该译码算法对应的节点类型即可，从而能够有效提高译码效率。
又一种可能的情形中，数据结构包括极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置。如表7所示，为数据结构的又一种示例。
表7：数据结构示例6
Figure PCTCN2018093928-appb-000018
从表7中可以看出，取值(K0,E0)对应的极化码的K个信息比特的位置为第x1位置、第x2位置、第x3位置、第x4位置、第x5位置、第x6位置、……、第xK0位置，除这些位置之外的位置均为冻结比特的位置。采用这种方式，仅列举出各个信息比特的位置，从而能够有效节省存储空间，且基于上述数据结构也能够更加快速地确定出信息比特的位置。
本申请实施例中，极化码的序列参数还可以包括编码输出比特序列的长度，其中，编码输出比特序列的长度可以是通过编码输入比特序列的长度和速率匹配输出序列的长度计算得到的，具体计算方式可以参见现有技术，此处不再赘述。
此种情形下，上述极化码序列的参数(K0,E0)、(K1,E1)、(K2,E2)、……、(Km,Em)， 也可以表示为(K0,N0,E0)、(K1,N1,E1)、(K2,N2,E2)、……、(Km,Nm,Em)。相应地，数据结构的各种示例中极化码序列的参数可以进行替换，以上述表2为例，其还可以表示为如下表8所示，其它各种示例均可参照，此处不再具体列举。
表8：数据结构示例7
Figure PCTCN2018093928-appb-000019
综合上述描述，结合图5可以看出，本申请实施例在进行译码时，可以根据极化码的序列参数的取值，查询预先存储的数据结构，确定出信息比特的位置，进而完成译码；采用这种方式，无需再存储码型序列表，并能够避免在线进行重调整操作，从而能够节省运算功耗，降低译码延迟。
图6为本申请实施例提供的一种编码方法所对应的流程示意图，如图6所示，包括：
步骤601，确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度。
步骤602，基于预先存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；
步骤603，根据所述极化码的信息比特的位置，进行极化码编码。
本申请实施例中，预先存储的数据结构可以用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，因此，基于预先存储的结构，便可直接确定出极化码的序列参数的取值对应的极化码的信息比特的位置，进而在编码过程中无需再进行重调整操作，从而能够有效简化编码过程、并提高编码效率。
此处，图6所示意的编码方法中涉及的数据结构可以参见上述图4所示意的译码方法中涉及的数据结构的描述，此处不再赘述。
需要说明的是，图6所示意的编码方法和图4所示意的译码方法可以结合使用，比如，发送端使用图6所示意的编码方法进行编码后发送信息，而接收端在接收到信息后，可以使用图4所示意的译码方法进行译码。或者，二者也可以分别单独使用，比如，发送端使用图6所示意的编码方法进行编码后发送信息，而接收端在接收到信息后，可以使用现有的译码方法进行译码；又比如，发送端使用现有的编码方法进行编码后发送信息，而接收端在接收到信息后，可以使用图4所示意的译码方法进行译码。
可以理解的是，上述实施例中的各个设备为了实现相应的功能，其可以包括执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，本发明能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
在采用集成的单元的情况下，图7示出了本发明实施例中所涉及的极化码译码装置的可能的示例性框图，该装置700可以以软件的形式存在。装置700可以包括：存储单元701和处理单元702。存储单元701用于存储装置700的程序代码和数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置。
其中，存储单元701可以是存储器。处理单元702可以是处理器或控制器，例如可以是通用中央处理器(central processing unit，CPU)，通用处理器，数字信号处理(digital signal processing，DSP)，专用集成电路(application specific integrated circuits，ASIC)，现场可编程门阵列(field programmable gate array，FPGA)或者其他可编程逻辑器件、晶体管逻辑器件、硬件部件或者其任意组合。其可以实现或执行结合本发明公开内容所描述的各种示例性的逻辑方框，模块和电路。所述处理器也可以是实现计算功能的组合，例如包括一个或多个微处理器组合，DSP和微处理器的组合等等。
该装置700可以是本申请所涉及的接收端设备(比如终端设备)，或者还可以为接收端设备中的芯片。处理单元702可以支持装置700执行上文中图4所示意的方法示例中的动作，比如，处理单元702用于支持装置700执行图4中的步骤401至步骤403。
在一种可能的实现方式中，所述极化码的序列参数还包括编码输出比特序列的长度。
在一种可能的实现方式中，所述预先存储的数据结构为二维表。
在一种可能的实现方式中，所述预先存储的数据结构包括所述极化码的序列参数的多种取值中每种取值对应的极化码的多个节点的节点类型，所述多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。
如图8所示，本申请实施例还提供一种极化码译码装置800，极化码译码装置800用于执行图4所示的方法。图4所示的方法中的部分或全部可以通过硬件来实现也可以通过软件来实现，当通过硬件实现时，极化码译码装置800包括：输入接口电路801，用于获取编码输出比特序列；逻辑电路802，用于基于获取的编码输出比特序列执行上述图4所示的方法，具体请见前面方法实施例中的描述，此处不再赘述；输出接口电路803，用于输出译码结果。
可选的，极化码译码装置800在具体实现时可以是芯片或者集成电路。
可选的，当上述实施例的极化码译码方法中的部分或全部通过软件来实现时，如图9所示，极化码译码装置800包括：存储器901，用于存储程序和数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置；处理器902，用于执行存储器901存储的程序，当程序被执行时，使得极化码译码装置800可以实现上述图4提供的方法。
可选的，上述存储器901可以是物理上独立的单元，也可以如图10所示，存储器901与处理器902集成在一起。
需要说明的是，本申请实施例中的数据结构可以是在极化码译码装置出厂前存储到极化码译码装置的存储器中，或者，也可以是在极化码译码装置出厂后，执行上述译码过程之前通过离线方式存储到极化码译码装置的存储器中，本申请实施例对存储数据结构的时间不做具体限定。进一步地，存储数据结构的具体方式可以有多种，比如，可以将数据结构通过固化方式存储到存储器中，或者，是通过软件程序的方式存储到存储器中，具体不做限定。
可选的，当上述图4所示的方法中的部分或全部通过软件实现时，极化码译码装置800也可以只包括处理器902，用于存储程序和数据结构的存储器901位于极化码译码装置800之外，处理器902通过电路/电线与存储器901连接，用于读取并执行存储器901中存储的程序。
在一个示例中，处理器902可以包括中央处理器(central processing unit，CPU)，此时，可以由CPU来执行上述步骤401至步骤403。在又一个示例中，处理器902可以包括极化码译码加速器，此时，可以由极化码译码加速器来执行上述步骤401至步骤403，进一步地，处理器902还可以包括CPU，在盲检测场景中，可以由CPU从整体上控制盲检测过程，而由极化码译码加速器针对极化码的序列参数的每一种取值译码。
处理器902还可以进一步包括硬件芯片。上述硬件芯片可以是专用集成电路(application-specific integrated circuit，ASIC)，可编程逻辑器件(programmable logic device，PLD)或其组合。上述PLD可以是复杂可编程逻辑器件(complex programmable logic device，CPLD)，现场可编程逻辑门阵列(field-programmable gate array，FPGA)，通用阵列逻辑(generic array logic,GAL)或其任意组合。
存储器901可以包括易失性存储器(volatile memory)，例如随机存取存储器(random-access memory，RAM)；存储器901也可以包括非易失性存储器(non-volatile memory)，例如快闪存储器(flash memory)，硬盘(hard disk drive，HDD)或固态硬盘(solid-state drive，SSD)；存储器901还可以包括上述种类的存储器的组合。
本申请实施例还提供了一种计算机存储介质，存储有计算机程序，该计算机程序包括用于执行图4所示的方法。
本申请实施例还提供了一种包含指令的计算机程序产品，当其在计算机上运行时，使得计算机执行图4所示的方法。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质 中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘Solid State Disk(SSD))等。
本申请是参照根据本申请的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
显然，本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (11)

  1. 一种极化码译码方法，其特征在于，所述方法包括：
    确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度；
    基于预先存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；
    根据所述极化码的信息比特的位置，进行极化码译码；
    其中，所述预先存储的数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，K为正整数。
  2. 根据权利要求1所述的方法，其特征在于：
    所述极化码的序列参数还包括编码输出比特序列的长度。
  3. 根据权利要求1所述的方法，其特征在于：
    所述预先存储的数据结构为二维表。
  4. 根据权利要求1至3中任一项所述的方法，其特征在于，所述预先存储的数据结构包括所述极化码的序列参数的多种取值中每种取值对应的极化码的多个节点的节点类型，所述多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。
  5. 一种极化码译码装置，其特征在于，所述装置包括：
    处理单元，用于确定极化码的序列参数的取值，所述极化码的序列参数包括编码输入比特序列的长度和速率匹配输出序列的长度；基于存储单元存储的数据结构，确定所述极化码的序列参数的取值对应的极化码的信息比特的位置；以及，根据所述极化码的信息比特的位置，进行极化码译码；
    存储单元，用于存储数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，K为正整数。
  6. 根据权利要求5所述的极化码译码装置，其特征在于：
    所述极化码的序列参数还包括编码输出比特序列的长度。
  7. 根据权利要求5所述的极化码译码装置，其特征在于：
    所述预先存储的数据结构为二维表。
  8. 根据权利要求5至7中任一项所述的极化码译码装置，其特征在于，所述预先存储的数据结构包括所述极化码的序列参数的多种取值中每种取值对应的极化码的多个节点的节点类型，所述多个节点中任一节点的节点类型用于指示编码输出比特序列中的一个或多个连续的位置对应的比特类型。
  9. 一种极化码译码装置，其特征在于，包括处理器和存储器；
    存储器，用于存储程序和数据结构，所述数据结构用于表示所述极化码的序列参数的多种取值中每种取值对应的极化码的K个信息比特的位置，K为正整数；
    处理器，用于执行所述存储器存储的所述程序，当所述程序被执行时，使得所述极化码译码装置执行权利要求1-4中任一所述的方法。
  10. 根据权利要求9所述的装置，其特征在于，所述极化码译码装置为芯片或集成电路。
  11. 一种极化码译码装置，其特征在于，包括：
    输入接口电路，用于获取编码输出序列；
    逻辑电路，用于基于获取的编码输出序列执行所述权利要求1～4任一项所述的方法，得到译码结果；
    输出接口电路，用于输出译码结果。
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