WO2019223415A1 - 有机发光二极管oled显示基板及其制作方法、显示装置 - Google Patents

有机发光二极管oled显示基板及其制作方法、显示装置 Download PDF

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WO2019223415A1
WO2019223415A1 PCT/CN2019/079476 CN2019079476W WO2019223415A1 WO 2019223415 A1 WO2019223415 A1 WO 2019223415A1 CN 2019079476 W CN2019079476 W CN 2019079476W WO 2019223415 A1 WO2019223415 A1 WO 2019223415A1
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conductive pattern
layer
base substrate
driving circuit
oled display
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PCT/CN2019/079476
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English (en)
French (fr)
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张�浩
刘利宾
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京东方科技集团股份有限公司
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Priority to US16/499,697 priority Critical patent/US11296182B2/en
Publication of WO2019223415A1 publication Critical patent/WO2019223415A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • H10K59/1315Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L2021/775Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate comprising a plurality of TFTs on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment

Definitions

  • the present disclosure relates to the field of display technology, and particularly to an organic light-emitting diode (OLED) display substrate, a manufacturing method thereof, and a display device.
  • OLED organic light-emitting diode
  • the cathode layer in the OLED display screen in the related art is a whole layer, and the cathode layer is connected to the signal input terminal through a VSS signal line located on one side of the display area.
  • an OLED display substrate including a base substrate, a conductive pattern, a driving circuit layer, an anode layer, a light emitting layer, and a cathode layer; wherein,
  • the driving circuit layer, the anode layer, the cathode layer, and the light emitting layer are located on the same side of the base substrate; the conductive pattern is located between the base substrate and the driving circuit layer, and, The conductive pattern is electrically connected to the cathode layer through a plurality of via holes.
  • the conductive pattern is made of metal.
  • the conductive pattern includes a first portion and a second portion, and the first portion is electrically connected to the cathode layer through the plurality of vias.
  • the second portion includes a plurality of hollowed-out areas.
  • the first portion is insulated from the second portion.
  • the driving circuit layer includes a plurality of driving thin film transistors
  • the conductive pattern includes a plurality of hollowed-out areas corresponding to each driving thin film transistor
  • the driving thin film transistor is on the base substrate.
  • the orthographic projection falls within the orthographic projection of the corresponding hollowed-out area on the substrate.
  • the driving circuit layer includes a plurality of signal traces, and the orthographic projection of the conductive pattern on the base substrate falls into the orthography of the plurality of signal traces on the base substrate. Within the projection.
  • the OLED display substrate includes a display area and a non-display area surrounding the display area, wherein the plurality of vias are disposed in the non-display area.
  • the OLED display substrate further includes an insulating layer, wherein the insulating layer is disposed between the conductive pattern and the driving circuit layer.
  • An embodiment of the present disclosure further provides a method for manufacturing an OLED display substrate, including:
  • a cathode layer is formed on a side of the light emitting layer remote from the base substrate, wherein the cathode layer is electrically connected to the conductive pattern through the via hole.
  • forming the conductive pattern includes:
  • Forming the conductive pattern including a first portion and a second portion on one side of the base substrate;
  • the forming a plurality of vias exposing the conductive pattern includes:
  • a plurality of vias are formed exposing the first portion.
  • the method further includes:
  • the forming a conductive pattern including a first portion and a second portion on one side of the base substrate includes:
  • a plurality of first hollowed-out areas are formed in the second portion.
  • the forming a conductive pattern on one side of the base substrate includes:
  • a plurality of hollowed-out areas corresponding to the driving thin film transistors are formed in the conductive pattern, wherein the driving circuit layer includes a plurality of the driving thin film transistors, and the driving thin film transistors on the base substrate
  • the orthographic projection falls into the orthographic projection of the corresponding hollowed-out area on the base substrate.
  • the driving circuit layer includes a plurality of signal traces, and an orthographic projection of the conductive pattern on the base substrate falls within an orthographic projection of the signal traces on the base substrate.
  • the method further includes: forming an insulating layer between the conductive pattern and the driving circuit layer.
  • An embodiment of the present disclosure further provides a display device including the OLED display substrate as described above.
  • FIG. 1 is a schematic diagram of an OLED display substrate provided by some embodiments of the present disclosure.
  • FIG. 2 is a flowchart of a method for manufacturing an OLED display substrate provided by some embodiments of the present disclosure.
  • the cathode layer is a whole film layer, when the cathode layer is connected to the signal input terminal through the VSS signal line on the display area side, the cathode has a certain resistance. Therefore, the cathode layer (that is, the cathode) is close to the signal input terminal. There is a voltage drop in a direction away from the signal input end, resulting in uneven brightness of the OLED display.
  • the following embodiments of the present disclosure provide an OLED display substrate, a method for manufacturing the same, and a display device, which reduce the equivalent resistance of the cathode layer and improve the uneven brightness of the display screen caused by the voltage drop of the cathode.
  • the OLED display substrate includes a driving circuit layer, an anode layer, a cathode layer, and a light emitting layer on a base substrate.
  • the OLED display substrate further includes a conductive pattern located between the base substrate and the driving circuit layer, wherein the conductive pattern is electrically connected to the cathode layer through a plurality of via holes.
  • the conductive pattern in the OLED display substrate is connected in parallel with the cathode layer.
  • the equivalent resistance of the cathode layer (resistance of the conductive pattern * resistance of the cathode layer) / (resistance of the conductive pattern + resistance of the cathode layer) reduces the cathode.
  • the equivalent resistance of the layer makes the voltage drop of the cathode layer close to 0V from the direction close to the signal input end to the distance away from the signal input end, which improves the uneven brightness of the display due to the cathode voltage drop.
  • the arrangement of the conductive pattern reduces the equivalent resistance of the cathode layer, so that the width of the peripheral VSS signal line is reduced, which is beneficial to achieving a narrow frame of the display device.
  • the OLED display substrate further includes an insulating layer disposed between the conductive pattern and the driving circuit layer.
  • the conductive pattern is located between the driving circuit layer and the base substrate, and an insulating layer is separated between the conductive pattern and the driving circuit layer, so that the conductive pattern and the driving circuit layer are insulated.
  • the conductive pattern is made of metal.
  • the conductive pattern is made of other conductive materials, such as a transparent conductive material.
  • metal has better conductivity, that is, the resistance of the metal is lower than that of the transparent conductive material.
  • the conductive pattern made of metal in parallel with the cathode layer has a lower equivalent resistance than the conductive pattern made of the transparent conductive material.
  • the equivalent resistance of the cathode layer after the cathode layers are connected in parallel. Therefore, the voltage drop of the cathode layer in parallel with the conductive pattern made of metal is smaller than that of the cathode layer in parallel with the conductive pattern made of transparent conductive material.
  • the conductive pattern includes a first portion and a second portion, and the first portion is electrically connected to the cathode layer through the plurality of vias.
  • the first portion is remote from the signal input.
  • the cathode layer is connected to the signal input terminal through the VSS signal line, the voltage drop ratio between the cathode layer far from the signal input terminal and the signal input terminal, and the voltage drop between the cathode layer close to the signal input terminal and the signal input terminal is large.
  • the first portion of the plurality of vias electrically connected to the cathode layer is disposed away from the signal input end, which reduces the equivalent resistance of the remote cathode layer after the portion of the cathode layer (remote cathode layer) far from the signal input end is connected in parallel with the conductive pattern. The pressure drop at the distal cathode layer is reduced.
  • the second portion includes a plurality of first hollowed-out areas.
  • the second part of the conductive pattern is provided with a plurality of first hollowed areas.
  • the light reflected by the user's fingerprint valley passes through the first hollowed area to the fingerprint recognition module on the back of the OLED display substrate to realize fingerprint recognition Features.
  • the first portion is insulated from the second portion.
  • the first part is connected in parallel with the cathode layer, the first part is connected to the VSS signal.
  • the first part is insulated from the second part, and the second part is not connected to the electrical signal, The second part does not affect the driving circuit layer.
  • the driving circuit layer includes a plurality of driving thin film transistors
  • the conductive pattern includes a plurality of second hollowed-out areas corresponding to the driving thin film transistors
  • the driving thin film transistors are on the base substrate.
  • the orthographic projection falls within the orthographic projection of the corresponding second hollowed-out area on the base substrate.
  • the plurality of second hollowed out regions reduces the influence of the VSS signal on the driving thin film transistor when the conductive pattern is connected to the VSS signal.
  • the driving circuit layer includes a plurality of signal traces, and an orthographic projection of the conductive pattern on the base substrate falls into an orthographic projection of the plurality of signal traces on the base substrate.
  • the projection of the conductive pattern on the substrate falls within the projection of the signal traces on the substrate in other layers in the OLED display substrate, such as
  • the projection of the conductive pattern on the base substrate coincides with the projection of the signal traces in the other layers in the OLED display substrate on the base substrate.
  • the OLED display substrate includes a display area and a non-display area surrounding the display area, and the plurality of vias connecting the conductive pattern and the cathode layer are disposed outside the display area (ie, the non-display area).
  • the via hole is disposed outside the display area, which prevents the via hole from affecting the display image of the display substrate.
  • the OLED display substrate 1 includes a cathode layer 2, a VSS signal line 3, a conductive pattern 4, and a signal input terminal 5.
  • the conductive pattern 4 includes a first portion 41 and a second portion 42. A portion 41 is located on the side away from the signal input terminal 5, and a second portion 42 is located on the side closer to the signal input terminal 5.
  • first portion 41 and the second portion 42 of the conductive pattern 4 are connected to the signal input terminal 5 through the VSS signal line 3, since the signal input terminal 5 connected to the VSS signal line 3 is close to the second portion 42, it is parallel to the second portion 42
  • the voltage drop of the cathode layer portion is smaller than that of the cathode layer portion in parallel with the first portion 41.
  • the second portion 42 is not connected to the cathode layer 2.
  • the fingerprint recognition module is generally also designed on one side of the OLED display substrate, a plurality of first hollowed-out areas are provided in the second portion 42 so that when the user touches the OLED display substrate, the light reflected by the user's fingerprint valleys passes through the first hollowed-out The area reaches the fingerprint recognition module on the back of the OLED display substrate to realize the fingerprint recognition function.
  • the pressure drop of the cathode layer portion in parallel with the first portion 41 is greater than the pressure drop of the cathode layer portion in parallel with the second portion 42. Therefore, the first portion 41 is connected in parallel with the cathode layer 2 through a plurality of vias, reducing the connection with the first portion 41
  • the equivalent resistance of the cathode layers 2 connected in parallel makes the voltage drop of the cathode layer from 0 V to the signal input terminal to be away from the signal input terminal, which basically improves the uneven brightness of the display due to the cathode voltage drop.
  • Some embodiments of the present disclosure provide a method for manufacturing an OLED display substrate, which includes sequentially forming a driving circuit layer, an anode layer, a light emitting layer, and a cathode layer on a base substrate.
  • the manufacturing method further includes:
  • the manufacturing method further includes:
  • the method for manufacturing an OLED display substrate in the above embodiment includes steps 110, 120, 130, 140, and 150.
  • step 110 a base substrate is provided.
  • step 120 a conductive pattern is formed on one side of the base substrate.
  • step 130 a driving circuit layer, an anode layer, and a light emitting layer are sequentially formed on a side of the conductive pattern remote from the base substrate.
  • step 140 a plurality of via holes are formed to expose the conductive pattern.
  • a cathode layer is formed on a side of the light emitting layer remote from the base substrate, wherein the cathode layer is electrically connected to the conductive pattern through the plurality of via holes.
  • a conductive pattern in parallel with the cathode layer is formed in the OLED display substrate, which reduces the equivalent resistance of the cathode layer, so that the voltage drop of the cathode layer from the direction close to the signal input terminal to the distance away from the signal input terminal is basically 0, improving uneven display brightness due to cathode voltage drop.
  • the arrangement of the conductive pattern reduces the equivalent resistance of the cathode layer, so that the width of the peripheral VSS signal line is reduced, which is beneficial to achieving a narrow frame of the display device.
  • the OLED display substrate further includes an insulating layer, and the conductive pattern is located between the driving circuit layer and the substrate substrate, and the insulating layer is spaced between the conductive pattern and the driving circuit layer, thereby realizing the conductive pattern and the driving circuit layer. Insulation.
  • the conductive pattern is made of metal.
  • the conductive pattern is made of other conductive materials, such as a transparent conductive material.
  • metal has better conductivity, that is, the resistance of the metal is lower than that of the transparent conductive material.
  • the conductive pattern made of metal in parallel with the cathode layer has a lower equivalent resistance than the conductive pattern made of the transparent conductive material.
  • the equivalent resistance of the cathode layer after the cathode layers are connected in parallel. Therefore, the voltage drop of the cathode layer in parallel with the conductive pattern made of metal is smaller than that of the cathode layer in parallel with the conductive pattern made of transparent conductive material.
  • forming the conductive pattern on one side of the substrate includes:
  • a conductive pattern including a first portion and a second portion is formed on one side of the base substrate, wherein the second portion includes a plurality of first hollowed-out regions.
  • the forming a plurality of vias exposing the conductive pattern includes:
  • a plurality of vias are formed exposing the first portion.
  • the first portion is remote from the signal input.
  • the cathode layer is connected to the signal input terminal through the VSS signal line, the voltage drop ratio between the cathode layer far from the signal input terminal and the signal input terminal, and the voltage drop between the cathode layer close to the signal input terminal and the signal input terminal is large.
  • the first portion of the plurality of vias electrically connected to the cathode layer is disposed away from the signal input end, which reduces the equivalent resistance of the remote cathode layer after the portion of the cathode layer (remote cathode layer) far from the signal input end is connected in parallel with the conductive pattern. The pressure drop at the distal cathode layer is reduced.
  • the second part of the conductive pattern is provided with a plurality of first hollowed-out areas.
  • the light reflected by the user's fingerprint valley passes through the first hollowed-out area to the fingerprint recognition module on the back of the OLED display substrate to realize fingerprint recognition.
  • the method further includes:
  • the conductive pattern at the boundary of the first part and the second part is oxidized, so that the first part is insulated from the second part, wherein the conductive pattern is made of metal.
  • the first part is connected in parallel with the cathode layer, the first part is connected to the VSS signal.
  • the first part is insulated from the second part and the second part is not connected to the electrical signal, The second part does not affect the driving circuit layer.
  • the conductive pattern is made of metal, the first portion is insulated from the second portion by oxidizing the conductive pattern at the boundary of the first portion and the second portion.
  • the forming a conductive pattern on one side of the substrate includes:
  • a plurality of second hollowed-out regions corresponding to the driving thin film transistors are formed in the conductive pattern, wherein the driving circuit layer includes a plurality of the driving thin film transistors, and The orthographic projection falls into the orthographic projection of the corresponding second hollowed-out area on the base substrate.
  • the method further includes: forming an insulating layer between the conductive pattern and the driving circuit layer.
  • Some embodiments of the present disclosure provide a display device including the OLED display substrate as described above.
  • the display device is any product or component having a display function, such as a television, a display, a digital photo frame, a mobile phone, or a tablet computer.
  • the display device further includes a flexible circuit board, a printed circuit board, and a back plate.
  • the display device includes an OLED display substrate 1 as shown in FIG. 1.
  • the OLED display substrate includes a conductive pattern in parallel with the cathode layer, which reduces the equivalent resistance of the cathode layer, so that the voltage drop of the cathode layer decreases from the direction close to the signal input end to the direction far from the signal input end. It is basically 0V, which improves uneven display brightness caused by the cathode voltage drop.
  • the conductive pattern reduces the equivalent resistance of the cathode layer, the width of the peripheral VSS signal line is reduced, which is beneficial to achieving a narrow frame of the display device.

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Abstract

提供了一种有机发光二极管OLED显示基板及其制作方法、显示装置。OLED显示基板包括衬底基板、驱动电路层、阳极层、阴极层、发光层以及导电图形。所述驱动电路层、所述阳极层、所述阴极层以及所述发光层均位于所述衬底基板同一侧。所述导电图形位于所述衬底基板和所述驱动电路层之间。所述导电图形通过所述多个过孔与所述阴极层电连接。

Description

有机发光二极管OLED显示基板及其制作方法、显示装置
相关申请的交叉引用
本申请主张在2018年5月24日在中国提交的中国专利申请号No.201810509909.8的优先权,其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域,特别是指一种有机发光二极管(Organic Light-Emitting Diode,OLED)显示基板及其制作方法、显示装置。
背景技术
相关技术中的OLED显示屏中的阴极层为一整层,阴极层通过位于显示区域一侧的VSS信号线与信号输入端连接。
发明内容
提供一种OLED显示基板,包括衬底基板、导电图形、驱动电路层、阳极层、发光层以及阴极层;其中,
所述驱动电路层、所述阳极层、所述阴极层以及所述发光层位于所述衬底基板同一侧;所述导电图形位于所述衬底基板和所述驱动电路层之间,以及,所述导电图形通过多个过孔与所述阴极层电连接。
一些实施例中,所述导电图形采用金属制成。
一些实施例中,所述导电图形包括第一部分和第二部分,以及所述第一部分通过所述多个过孔与所述阴极层电连接。
一些实施例中,所述第二部分包括多个镂空区域。
一些实施例中,所述第一部分与所述第二部分绝缘。
一些实施例中,所述驱动电路层包括多个驱动薄膜晶体管,所述导电图形包括多个与每个驱动薄膜晶体管一一对应的镂空区域,以及所述驱动薄膜晶体管在所述衬底基板上的正投影落入相应的镂空区域在所述衬底基板上的正投影内。
一些实施例中,所述驱动电路层包括多条信号走线,以及所述导电图形在所述衬底基板上的正投影落入所述多条信号走线在所述衬底基板上的正投影内。
一些实施例中,所述OLED显示基板包括显示区域和包围所述显示区域的非显示区域,其中,所述多个过孔设置在非显示区域。
一些实施例中,所述OLED显示基板还包括绝缘层,其中,所述绝缘层设置在所述导电图形和所述驱动电路层之间。
本公开实施例还提供了一种OLED显示基板的制作方法,包括:
提供一衬底基板;
在所述衬底基板一侧形成导电图形;
在所述导电图形远离所述衬底基板一侧依次形成驱动电路层、阳极层以及发光层;
形成多个暴露出所述导电图形的过孔;以及
在所述发光层远离所述衬底基板一侧形成阴极层,其中,所述阴极层通过所述过孔与所述导电图形电连接。
一些实施例中,形成所述导电图形包括:
在所述衬底基板一侧形成包括第一部分和第二部分的所述导电图形;
所述形成多个暴露出所述导电图形的过孔包括:
形成多个暴露出所述第一部分的过孔。
一些实施例中,所述形成包括第一部分和第二部分的所述导电图形之后,所述方法还包括:
氧化所述第一部分和所述第二部分交界处,使得所述第一部分与所述第二部分绝缘,其中,所述导电图形采用金属制成。
一些实施例中,所述在所述衬底基板一侧形成包括第一部分和第二部分的导电图形,包括:
在所述第二部分中形成多个第一镂空区域。
一些实施例中,所述在所述衬底基板一侧形成导电图形,包括:
在所述导电图形中形成多个与驱动薄膜晶体管一一对应的镂空区域,其中,所述驱动电路层包括多个所述驱动薄膜晶体管,以及所述驱动薄膜晶体 管在所述衬底基板上的正投影落入相应的镂空区域在所述衬底基板上的正投影内。
一些实施例中,所述驱动电路层包括多条信号走线,以及所述导电图形在所述衬底基板上的正投影落入所述信号走线在所述衬底基板上的正投影内。
一些实施例中,所述方法还包括:在所述导电图和所述驱动电路层之间形成绝缘层。
本公开实施例还提供了一种显示装置,包括如上任一所述的OLED显示基板。
附图说明
图1为本公开一些实施例提供的OLED显示基板的示意图;以及
图2为本公开一些实施例提供的OLED显示基板的制作方法的流程图。
具体实施方式
为使本公开的技术方案和特点更加清楚,下面将结合附图描述本公开的实施例。
由于阴极层为一个整体的膜层,当阴极层通过位于显示区域一侧的VSS信号线与信号输入端连接时,阴极具有一定的电阻,因此,阴极层(即阴极)在从靠近信号输入端到远离信号输入端的方向上存在压降,导致OLED显示屏的亮度不均。
本公开的以下实施例提供一种OLED显示基板及其制作方法、显示装置,减小了阴极层的等效电阻,改善了由于阴极的压降引起的显示屏亮度不均。
本公开一些实施例提供一种OLED显示基板,所述OLED显示基板包括位于衬底基板上的驱动电路层、阳极层、阴极层和发光层。所述OLED显示基板还包括位于所述衬底基板和所述驱动电路层之间的导电图形,其中,所述导电图形通过多个过孔与所述阴极层电连接。
上述实施例中,OLED显示基板中的导电图形与阴极层并联,阴极层的等效电阻=(导电图形的电阻*阴极层电阻)/(导电图形的电阻+阴极层电阻),减小了阴极层的等效电阻,使得从靠近信号输入端到远离信号输入端的方向 上,阴极层的压降接近于0V,改善了由于阴极压降引起的显示亮度不均。
导电图形的设置减小了阴极层的等效电阻,使得外围VSS信号线的宽度减小,有利于实现显示装置的窄边框。
一些实施例中,OLED显示基板还包括绝缘层,所述绝缘层设置在导电图形和驱动电路层之间。
导电图形位于驱动电路层和衬底基板之间,导电图形和驱动电路层之间间隔有绝缘层,使得导电图形和驱动电路层之间绝缘。
一些实施例中,所述导电图形采用金属制成。
一些实施例中,导电图形采用其他导电材料,比如透明导电材料制成。
相比透明导电材料,金属的导电性能更好,即金属的电阻小于透明导电材料的电阻,金属制成的导电图形并联阴极层后阴极层的等效电阻小于,透明导电材料制成的导电图形并联阴极层后阴极层的等效电阻,因此,与金属制成的导电图形并联的阴极层的压降小于,与透明导电材料制成的导电图形并联的阴极层的压降。
一些实施例中,所述导电图形包括第一部分和第二部分,所述第一部分通过所述多个过孔与所述阴极层电连接。
一些实施例中,第一部分远离信号输入端。
若阴极层通过VSS信号线与信号输入端连接,远离信号输入端的阴极层与信号输入端之间的压降比,靠近信号输入端的阴极层与信号输入端之间的压降大,因此,通过多个过孔与阴极层电连接的第一部分设置在远离信号输入端的位置,减小了远离信号输入端的阴极层部分(远端阴极层)与导电图形并联后远端阴极层的等效电阻,减小了远端阴极层的压降。
一些实施例中,所述第二部分包括多个第一镂空区域。
导电图形的第二部分设置有多个第一镂空区域,在用户触摸OLED显示基板时,用户指纹谷脊反射的光穿过第一镂空区域到达OLED显示基板背面的指纹识别模组,实现指纹识别功能。
一些实施例中,所述第一部分与所述第二部分绝缘。
由于第一部分与阴极层并联,因此,第一部分接入VSS信号,为了降低导电图形上VSS信号对驱动电路层的影响,第一部分与第二部分绝缘设置, 第二部分不接入电信号,使得第二部分不影响驱动电路层。
一些实施例中,所述驱动电路层包括多个驱动薄膜晶体管,所述导电图形包括多个与驱动薄膜晶体管一一对应的第二镂空区域,以及所述驱动薄膜晶体管在所述衬底基板上的正投影落入对应的第二镂空区域在所述衬底基板上的正投影内。
所述多个第二镂空区域,降低了导电图形接入VSS信号时VSS信号对驱动薄膜晶体管的影响。
一些实施例中,所述驱动电路层包括多条信号走线,所述导电图形在所述衬底基板上的正投影落入所述多条信号走线在所述衬底基板上的正投影内。
为了降低导电图形接入VSS信号时VSS信号对驱动薄膜晶体管的影响,导电图形在衬底基板上的投影落入OLED显示基板中其它层中信号走线在衬底基板上的投影之内,例如,导电图形在衬底基板上的投影与OLED显示基板中其它层中信号走线在衬底基板上的投影重合。
一些实施例中,OLED显示基板包括显示区域和包围所述显示区域的非显示区域,以及连接导电图形和阴极层的所述多个过孔设置在显示区域外(即,非显示区域)。
所述过孔设置在显示区域外,避免了过孔对影响显示基板显示画面。
一实施例中,如图1所示,OLED显示基板1包括阴极层2、VSS信号线3、导电图形4以及信号输入端5,其中,导电图形4包括第一部分41和第二部分42,第一部分41位于远离信号输入端5一侧,第二部分42位于靠近信号输入端5一侧。
若导电图形4的第一部分41和第二部分42通过VSS信号线3与信号输入端5连接,由于VSS信号线3连接的信号输入端5靠近第二部分42,因此,与第二部分42并联的阴极层部分的压降小于与第一部分41并联的阴极层部分的压降,一些实施例中,第二部分42不连接阴极层2。
由于指纹识别模组一般也设计在OLED显示基板一侧,因此,在第二部分42设置多个第一镂空区域,这样在用户触摸OLED显示基板时,用户指纹谷脊反射的光通过第一镂空区域到达OLED显示基板背面的指纹识别模组,实现指纹识别功能。
与第一部分41并联的阴极层部分的压降大于与第二部分42并联的阴极层部分的压降,因此,第一部分41通过多个过孔与阴极层2并联,减小了与第一部分41并联的阴极层2的等效电阻,使得从靠近信号输入端到远离信号输入端的方向上,阴极层的压降基本为0V,改善了由于阴极压降引起的显示亮度不均。
本公开一些实施例提供了一种OLED显示基板的制作方法,包括在衬底基板上依次形成驱动电路层、阳极层、发光层和阴极层。
在形成所述驱动电路层的步骤之前,所述制作方法还包括:
形成导电图形。
形成所述阴极层的步骤之前,所述制作方法还包括:
形成多个暴露出所述导电图形的过孔,使得所述阴极层能够通过所述多个过孔与所述导电图形电连接。
即,如图2所示,上述实施例中OLED显示基板的制作方法包括步骤110、步骤120、步骤130、步骤140以及步骤150。
在步骤110中,提供一衬底基板。
在步骤120中,在衬底基板一侧形成导电图形。
在步骤130中,在所述导电图形远离所述衬底基板一侧依次形成驱动电路层、阳极层以及发光层。
在步骤140中,形成多个暴露出所述导电图形的过孔。
在步骤150中,在所述发光层远离所述衬底基板一侧形成阴极层,其中,所述阴极层通过所述多个过孔与所述导电图形电连接。
上述方法实施例中,OLED显示基板中形成有与阴极层并联的导电图形,减少了阴极层的等效电阻,使得从靠近信号输入端到远离信号输入端的方向上,阴极层的压降基本为0,改善了由于阴极压降引起的显示亮度不均。
导电图形的设置减小了阴极层的等效电阻,使得外围VSS信号线的宽度减小,有利于实现显示装置的窄边框。
一些实施例中,OLED显示基板还包括绝缘层,导电图形位于驱动电路层和衬底基板之间,导电图形和驱动电路层之间间隔有所述绝缘层,从而实现导电图形和驱动电路层之间的绝缘。
一些实施例中,所述导电图形采用金属制成。
一些实施例中,导电图形采用其他导电材料,比如透明导电材料制成。
相比透明导电材料,金属的导电性能更好,即金属的电阻小于透明导电材料的电阻,金属制成的导电图形并联阴极层后阴极层的等效电阻小于,透明导电材料制成的导电图形并联阴极层后阴极层的等效电阻,因此,与金属制成的导电图形并联的阴极层的压降小于,与透明导电材料制成的导电图形并联的阴极层的压降。
一些实施例中,在衬底基板一侧形成所述导电图形包括:
在所述衬底基板一侧形成包括第一部分和第二部分的导电图形,其中,所述第二部分包括多个第一镂空区域。
一些实施例中,所述形成多个暴露出所述导电图形的过孔包括:
形成多个暴露出所述第一部分的过孔。
一些实施例中,第一部分远离信号输入端。
若阴极层通过VSS信号线与信号输入端连接,远离信号输入端的阴极层与信号输入端之间的压降比,靠近信号输入端的阴极层与信号输入端之间的压降大,因此,通过多个过孔与阴极层电连接的第一部分设置在远离信号输入端的位置,减小了远离信号输入端的阴极层部分(远端阴极层)与导电图形并联后远端阴极层的等效电阻,减小了远端阴极层的压降。
导电图形的第二部分设置有多个第一镂空区域,在用户触摸OLED显示基板时,用户指纹谷脊反射的光穿过第一镂空区域到达OLED显示基板背面的指纹识别模组,实现指纹识别功能。
一些实施例中,所述形成包括第一部分和第二部分的导电图形之后,所述方法还包括:
氧化所述第一部分和所述第二部分交界处的导电图形,使得所述第一部分与所述第二部分绝缘,其中,所述导电图形采用金属制成。
由于第一部分与阴极层并联,因此,第一部分接入VSS信号,为了降低导电图形上VSS信号对驱动电路层的影响,第一部分与第二部分绝缘设置,第二部分不接入电信号,使得第二部分不影响驱动电路层。在导电图形采用金属制成时,通过氧化所述第一部分和所述第二部分交界处的所述导电图形, 使得所述第一部分与所述第二部分绝缘。
一些实施例中,所述在衬底基板一侧形成导电图形,包括:
在导电图形中形成多个与驱动薄膜晶体管一一对应的第二镂空区域,其中,所述驱动电路层包括多个所述驱动薄膜晶体管,以及所述驱动薄膜晶体管在所述衬底基板上的正投影落入相应的第二镂空区域在所述衬底基板上的正投影内。
一些实施例中,所述方法还包括:在所述导电图和所述驱动电路层之间形成绝缘层。
本公开一些实施例提供了一种显示装置,包括如上任一所述的OLED显示基板。
一些实施例中,所述显示装置为:电视、显示器、数码相框、手机或平板电脑等任何具有显示功能的产品或部件。
一些实施例中,所述显示装置还包括柔性电路板、印刷电路板和背板。
一些实施例中,显示装置包括如图1所示的OLED显示基板1。
上述实施例中的显示装置中,OLED显示基板包括与阴极层并联的导电图形,减小了阴极层的等效电阻,使得从靠近信号输入端到远离信号输入端的方向上,阴极层的压降基本为0V,改善了由于阴极压降引起的显示亮度不均。另外,由于导电图形降低了阴极层的等效电阻,因此缩小了外围VSS信号线的宽度,从而有利于实现显示装置的窄边框。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。
当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。以上所述是本公开的一些实施方式,应当指出,对于本技术领域的普 通技术人员来说,在不脱离本公开所述原理的前提下,还可以作出若干改进和润饰。

Claims (17)

  1. 一种有机发光二极管OLED显示基板,包括衬底基板、导电图形、驱动电路层、阳极层、发光层以及阴极层;其中,
    所述驱动电路层、所述阳极层、所述阴极层以及所述发光层位于所述衬底基板同一侧;所述导电图形位于所述衬底基板和所述驱动电路层之间,以及,所述导电图形通过多个过孔与所述阴极层电连接。
  2. 根据权利要求1所述的OLED显示基板,其中,所述导电图形采用金属制成。
  3. 根据权利要求2所述的OLED显示基板,其中,所述导电图形包括第一部分和第二部分,以及所述第一部分通过所述多个过孔与所述阴极层电连接。
  4. 根据权利要求3所述的OLED显示基板,其中,所述第二部分包括多个镂空区域。
  5. 根据权利要求3或4所述的OLED显示基板,其中,所述第一部分与所述第二部分绝缘。
  6. 根据权利要求1所述的OLED显示基板,其中,
    所述驱动电路层包括多个驱动薄膜晶体管,所述导电图形包括多个与每个驱动薄膜晶体管一一对应的镂空区域,以及所述驱动薄膜晶体管在所述衬底基板上的正投影落入相应的镂空区域在所述衬底基板上的正投影内。
  7. 根据权利要求1所述的OLED显示基板,其中,所述驱动电路层包括多条信号走线,以及所述导电图形在所述衬底基板上的正投影落入所述多条信号走线在所述衬底基板上的正投影内。
  8. 根据权利要求1所述的OLED显示基板,包括显示区域和包围所述显示区域的非显示区域,其中,所述多个过孔设置在非显示区域。
  9. 根据权利要求1所述的OLED显示基板,还包括:
    绝缘层,设置在所述导电图形和所述驱动电路层之间。
  10. 一种OLED显示基板的制作方法,包括:
    提供一衬底基板;
    在所述衬底基板一侧形成导电图形;
    在所述导电图形远离所述衬底基板一侧依次形成驱动电路层、阳极层以及发光层;
    形成多个暴露出所述导电图形的过孔;以及
    在所述发光层远离所述衬底基板一侧形成阴极层,其中,所述阴极层通过所述过孔与所述导电图形电连接。
  11. 根据权利要求10所述方法,其中,
    所述在所述衬底基板一侧形成所述导电图形包括:
    在所述衬底基板一侧形成包括第一部分和第二部分的所述导电图形;
    所述形成多个暴露出所述导电图形的过孔包括:
    形成多个暴露出所述第一部分的过孔。
  12. 根据权利要求11所述的方法,所述形成包括第一部分和第二部分的所述导电图形之后,所述方法还包括:
    氧化所述第一部分和所述第二部分交界处,使得所述第一部分与所述第二部分绝缘,其中,所述导电图形采用金属制成。
  13. 根据权利要求11所述方法,其中,所述在所述衬底基板一侧形成包括第一部分和第二部分的导电图形,包括:
    在所述第二部分中形成多个镂空区域。
  14. 根据权利要求10所述方法,其中,所述在所述衬底基板一侧形成导电图形,包括:
    在所述导电图形中形成多个与驱动薄膜晶体管一一对应的镂空区域,其中,所述驱动电路层包括多个所述驱动薄膜晶体管,以及所述驱动薄膜晶体管在所述衬底基板上的正投影落入相应的镂空区域在所述衬底基板上的正投影内。
  15. 根据权利要求10所述方法,其中,所述驱动电路层包括多条信号走线,以及所述导电图形在所述衬底基板上的正投影落入所述信号走线在所述衬底基板上的正投影内。
  16. 根据权利要求10所述方法,还包括:
    在所述导电图和所述驱动电路层之间形成绝缘层。
  17. 一种显示装置,其中,包括如权利要求1-9中任一项所述的OLED显示基板。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101814522A (zh) * 2009-02-24 2010-08-25 乐金显示有限公司 顶部发光倒置型有机发光二极管显示设备及其制造方法
CN106653797A (zh) * 2015-10-30 2017-05-10 乐金显示有限公司 有机发光显示装置
US20170207423A1 (en) * 2008-12-23 2017-07-20 Samsung Display Co., Ltd. Organic light emitting diode display
CN108766978A (zh) * 2018-05-24 2018-11-06 京东方科技集团股份有限公司 Oled显示基板及其制作方法、显示装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104952905A (zh) * 2015-05-06 2015-09-30 京东方科技集团股份有限公司 有机发光显示面板及其制备方法、显示装置
KR102317553B1 (ko) * 2015-08-28 2021-10-25 엘지디스플레이 주식회사 유기 발광 표시 장치

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170207423A1 (en) * 2008-12-23 2017-07-20 Samsung Display Co., Ltd. Organic light emitting diode display
CN101814522A (zh) * 2009-02-24 2010-08-25 乐金显示有限公司 顶部发光倒置型有机发光二极管显示设备及其制造方法
CN106653797A (zh) * 2015-10-30 2017-05-10 乐金显示有限公司 有机发光显示装置
CN108766978A (zh) * 2018-05-24 2018-11-06 京东方科技集团股份有限公司 Oled显示基板及其制作方法、显示装置

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