WO2019085508A1 - 显示面板 - Google Patents

显示面板 Download PDF

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Publication number
WO2019085508A1
WO2019085508A1 PCT/CN2018/092005 CN2018092005W WO2019085508A1 WO 2019085508 A1 WO2019085508 A1 WO 2019085508A1 CN 2018092005 W CN2018092005 W CN 2018092005W WO 2019085508 A1 WO2019085508 A1 WO 2019085508A1
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WO
WIPO (PCT)
Prior art keywords
circuit
line
display panel
display
auxiliary
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Application number
PCT/CN2018/092005
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English (en)
French (fr)
Inventor
宋艳芹
Original Assignee
昆山国显光电有限公司
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Filing date
Publication date
Application filed by 昆山国显光电有限公司 filed Critical 昆山国显光电有限公司
Publication of WO2019085508A1 publication Critical patent/WO2019085508A1/zh
Priority to US16/429,285 priority Critical patent/US11038007B2/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes

Definitions

  • the present application relates to a structure of a display device, and more particularly to a display panel.
  • AMOLED active matrix organic light-emitting diode
  • AMOLED circuit layout since the display area of the screen is continuously increased, the space of the non-display area is continuously squeezed and reduced, thereby causing the space in the non-display area to be left to pass through the line to be narrow.
  • the space that can be used to set the line is usually not large, which causes the resistance of the line to be too large, and the brightness of the display panel on the side close to the signal end is high, and the brightness of the display panel on the other side away from the signal end is poor, resulting in overall The brightness of the display panel is inconsistent.
  • the technical problem to be solved by the present application cannot be solved by conventional techniques. It is known that the screen of the active matrix organic light emitting diode has a large display area, and the relative non-display area space is compressed, and the space available for setting the line is small, the line is relatively small, and the amount of current that the line can pass. not much.
  • the above may cause the power of the display panel near the power supply side to be good, so the brightness of the display panel can be high, and the power intensity of the display panel away from the power supply side is poor, so the brightness of the display panel can be low, so that the display The panel produces uneven display.
  • the present application provides a display panel including a display substrate having a display area and a non-display area, and a first circuit and a first extension extending to the display area are disposed in the non-display area a second circuit; wherein a first auxiliary circuit electrically connected in parallel with the first circuit and/or a second auxiliary circuit electrically connected in parallel with the second circuit are further disposed in the non-display area.
  • the first circuit includes a first line and a second line, and the first auxiliary circuit is connected to the first line and the second line.
  • the second circuit includes a third line and a fourth line
  • the second auxiliary circuit is electrically connected in parallel to the third line
  • the second auxiliary circuit is electrically connected in parallel The fourth line.
  • the second auxiliary circuit is electrically connected to the third line in parallel and the second auxiliary circuit is electrically connected in parallel to the fourth line.
  • the second auxiliary circuit is electrically connected to the third line in parallel and the second auxiliary circuit is electrically connected in parallel to the fourth line.
  • the first circuit is an anode (VDD) trace.
  • the first auxiliary circuit is an anode (VDD) auxiliary trace.
  • the second circuit is a cathode (VSS) trace.
  • the second auxiliary circuit is an anode (VDD) auxiliary trace.
  • the display substrate has a binding area, and the first circuit and the second circuit are connected to the binding area.
  • the present application is to add an auxiliary circuit to the first circuit or/and the second circuit in the non-display area, so that the increase of the line can effectively increase the amount of current passing, in other words, can be reduced.
  • the resistance of the anode (VDD) and cathode (VSS) traces which in turn reduces the IR drop, thus improving the display unevenness of the display panel.
  • FIG. 1 is a schematic view of a display panel of the present application
  • FIG. 3 is still another schematic diagram of the display panel of the present application.
  • FIG. 1 is a schematic diagram of a display panel of the present application.
  • the present embodiment provides a display panel 1 that averages the display brightness of the display panel by increasing the electrical parallel lines of the non-display area of the display substrate.
  • the display panel 1 includes a display substrate 11, a first circuit 15, a second circuit 17, and at least one auxiliary circuit 19, wherein at least one of the auxiliary circuits 19 includes a first auxiliary circuit 19A and a second auxiliary circuit 19B.
  • the display substrate 11 has a display area 113 and a non-display area 115, and the first circuit 15 and the second circuit 17 respectively extending to the display area 113 are disposed in the non-display area 115; wherein, in the non-display area 115 A first auxiliary circuit 19A electrically connected in parallel with the first circuit 15 and/or a second auxiliary circuit 19B electrically connected in parallel with the second circuit 17 are also disposed.
  • the first auxiliary circuit 19A electrically connected in parallel to the first circuit 15 or the second auxiliary circuit 19B electrically connected in parallel to the second circuit 17 can be used simultaneously.
  • the display substrate 11 has a package region 111.
  • the inner side of the package area 111 is the display area 113, the outer side is the non-display area 115, and the non-display area 115 is ring-arranged on the display area 113.
  • the binding area 13 is located on the display substrate 11 and is located on one side of the package area 111.
  • At least one auxiliary circuit 19 is added to the first circuit 15 and the second circuit 17, thereby improving the resistance drop (IR drop) of the first circuit 15 and the second circuit 17, that is, when the current passes through the first circuit 15 and the second circuit 17 The resistance voltage drop is not too different, thereby ensuring the stability of the voltage value in the display panel and reducing the power consumption of the screen.
  • the first circuit 15 is an anode (VDD) trace that provides an anode voltage to the organic light emitting diode (OLED).
  • the first circuit 15 has a first line 151 and a second line 153. One ends of the first line 151 and the second line 153 are respectively connected to the binding area 13. The other ends of the first line 151 and the second line 153 respectively extend through a portion of the non-display area 115 in the package area 111, and are distributed in the package.
  • the first circuit 15 and the second line 153, in which the first circuit 15 is distributed in the display area 113, are parallel to each other.
  • the wiring inside the package region 111 is connected to the simple line in the present embodiment, and the layout of the wiring in the package region 111 does not affect the implementation of the present embodiment. Therefore, the present invention is not directed to the inside of the package region 111.
  • the layout of the line is described in detail.
  • the at least one auxiliary circuit 19 is the first auxiliary circuit 19A, and the first auxiliary circuit 19A is connected between the first line 151 and the second line 153 outside the package area 111. In this way, the current flow rate of the first circuit 15 can be directly increased, thereby reducing the resistance of the first circuit 15 and improving the brightness uniformity of the entire screen in the display state. Further, the added first auxiliary circuit 19A is disposed outside the package region 111, thus also reducing the change and influence on the trace line in the package region 111.
  • the second circuit 17 is a cathode (VSS) trace that provides a cathode voltage to the organic light emitting diode (OLED).
  • the second circuit 17 has a third line 171 and a fourth line 173, and the third line 171 and the fourth line 173 are respectively located on both sides of the first circuit 15.
  • One ends of the third line 171 and the fourth line 173 are respectively connected to the binding area 13, and the other ends of the third line 171 and the fourth line 173 are respectively distributed in the non-display area 115 and the display area 113, in other words, the second circuit.
  • the main lines distributed in the non-display area 115 are inverted U-shaped.
  • the at least one auxiliary circuit 19 is a second auxiliary circuit 19B.
  • One end of the second auxiliary circuit 19B is connected to the third line 171 outside the package area 111, and the other end of the second auxiliary circuit 19B is connected to the second part of the package area 111.
  • the other second auxiliary circuit 19B has one end connected to the fourth line 173 outside the package area 111, and the other end of the other second auxiliary circuit 19B is connected to the fourth line 173 in the package area 111.
  • the line lengths of the two auxiliary circuits 19B are the same as the line cross-sectional areas. In this way, the current flow rate of the second circuit 15 can be directly increased, thereby reducing the resistance of the second circuit 17, so that the screen is in the display state, and the brightness uniformity of the entire screen is improved.
  • the added second auxiliary circuit 19B is disposed outside the package region 111 and at a position adjacent to the package boundary in the package region 111, thus also reducing the change and influence on the trace line in the package region 111.
  • FIG. 2 is another schematic diagram of the display panel of the present application.
  • the difference between the present embodiment and the first embodiment is that the second auxiliary circuit 19B of at least one auxiliary circuit 19 is omitted.
  • the first auxiliary circuit 19A is connected to the first line 151 and the second line 153 outside the package area 111, and the connection relationship and efficiency of the structure of the first auxiliary circuit 19 are the same as the first implementation. The method is described, so it will not be described here.
  • FIG. 3 is still another schematic diagram of the display panel of the present application.
  • the difference between the present embodiment and the first embodiment is that the first auxiliary circuit 19A of at least one auxiliary circuit 19 is omitted.
  • the connection between the third line 171 and the fourth line 173 outside the package area 111 is performed by the two second auxiliary circuits 19B, and the connection relationship and the efficiency of the structure of the second auxiliary circuit 19B are the same.
  • the first embodiment is described, and therefore, details are not described herein.
  • the embodiment provides a display panel including a display substrate, a binding area, a first circuit, and a second circuit.
  • the display panel is used to further increase the anode (VDD) and cathode (VSS) traces outside the package area, that is, to add parallel auxiliary circuits on the original traces of the anode (VDD) and the cathode (VSS), thus increasing the line.
  • the method can effectively increase the amount of current passed, in other words, reduce the resistance of the anode (VDD) and cathode (VSS) traces, thereby reducing the IR drop, thus improving the brightness uniformity of the display panel.
  • the added auxiliary circuitry is placed outside of the package area, which also reduces interference with routing lines within the package area.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种显示面板（1），包含显示基板（11），显示基板具有显示区（113）和非显示区（115），在非显示区内布设有分别延伸到显示区的第一电路（15）和第二电路（17）。其中，在非显示区内还布设与第一电路并联电连接的第一辅助电路（19A）和／或与第二电路并联电连接的第二辅助电路（19B）。于第一电路或第二电路增加并联电连接的辅助电路能有效提升通过的电流量，可减小阳极（ＶＤＤ）与阴极（ＶＳＳ）走线的电阻，进而能降低电阻压降，改善显示面板的亮度显示不均的问题。

Description

显示面板
交互参考
本申请要求2017年10月31日递交的申请号为201721426897.X、名称为“显示面板”的中国专利的优先权，本申请参考引用了如上所述申请的全部内容。
技术领域
本申请涉及一种显示装置的结构，尤其涉及一种显示面板。
背景技术
随着电子产业的高速发展，电子产品的普及率更是越来越高，如计算机、平板或手机等等。上述的电子产品已变成人们日常生活的必需品。AMOLED(即主动矩阵有机发光二极体)为一种高色度、高对比度、宽视角、自发光与可柔性显示等等优点，其已经被广泛的应用。当前的AMOLED的电路布局中，由于屏幕的显示区域不断的增大，而非显示区域的空间则不断被挤压缩小，进而导致非显示区域内能留给线路通过的空间狭小，如此情况下，能够用于设置线路的空间通常不大，其会导致线路的电阻过大，而导致显示面板于靠近信号端的一侧显示亮度高，而显示面板于远离信号端的另一侧亮度较差，导致整体显示面板的亮度不一致。
申请内容
有鉴于此，本申请所要解决的技术问题为无法通过习知技术解决。习知有关于主动矩阵有机发光二极的屏幕由于显示区域大，则相对的非显示区域空间被压缩，而可用于设置线路的空间小，则线路也相对的变小，线路能通过的电流量不多。上述会导致靠近电源端一侧的显示面板的电源强度好，所以显示面板能呈现的亮度高，而远离电源端一侧的显示面板的电源强度差，所以显示面板能呈现的亮度低，使显示面板产生显示不均的现象。
为了解决上述问题，本申请提供一种显示面板，其包含显示基板，显示基板具有显示区和非显示区，在所述非显示区内布设有分别延伸到所述显示区的第一电路和第二电路；其中，在所述非显示区内还布设与所述第一电路并联电连接的第一辅助电路和/或与所述第二电路并联电连接的第二辅助电路。
根据本申请的一实施方式，上述的所述第一电路包含第一线路与第二线路，所述第一辅助电路连接于所述第一线路与所述第二线路。
根据本申请的一实施方式，上述的所述第二电路包含第三线路与第四线路，所述第二辅助电路并联电连接所述第三线路，所述第二辅助电路并联电连接所述第四线路。
根据本申请的一实施方式，上述的所述第二辅助电路并联电连接所述第三线路的线路与所述第二辅助电路并联电连接所述第四线路的线路长度相同。
根据本申请的一实施方式，上述的所述第二辅助电路并联电连接所述第三线路的线路与所述第二辅助电路并联电连接所述第四线路的线路的截面积相同。
根据本申请的一实施方式，上述的所述第一电路为阳极(VDD)走线。
根据本申请的一实施方式，上述的所述第一辅助电路为阳极(VDD)辅助走线。
根据本申请的一实施方式，上述的所述第二电路为阴极(VSS)走线。
根据本申请的一实施方式，上述的所述第二辅助电路为阳极(VDD)辅助走线。
根据本申请的一实施方式，上述的所述显示基板具有绑定区，所述第一电路与所述第二电路连接于所述绑定区。
通过此种显示面板改良习知技术的缺点，本申请是采用于非显示区的第一电路或/与第二电路增加辅助电路，如此增加线路能有效提升通过的电流量，换言之，可减小阳极(VDD)与阴极(VSS)走线的电阻，进而能降低电阻压降(IR drop)，如此改善显示面板的亮度显示不均的问题。
附图说明
此处所说明的附图用来提供对本申请的进一步理解，构成本申请的一部分，本申请的示意性实施方式及其说明用于解释本申请，并不构成对本申请的不当限定。在附图中：
图1其为本申请的显示面板的示意图；
图2其为本申请的显示面板的另一示意图；以及
图3其为本申请的显示面板的又一示意图。
具体实施方式
以下将以图式揭露本申请的多个实施方式，为明确说明起见，许多实务上的细节将在以下叙述中一并说明。然而，应了解到，这些实务上的细节不应用以限制本申请。也就是说，在本申请的部分实施方式中，这些实务上的细节是非必要的。此外，为简化图式起见，一些习知惯用的结构与组件在图式中将以简单的示意的方式绘示的。
请参阅图1，其为本申请的显示面板的示意图。如图所示，本实施方式提供一种显示面板1，其藉由增加显示基板的非显示区的电并联线路，使显示面板的显示亮度平均。显示面板1包含显示基板11、第一电路15、第二电路17与至少一辅助电路19，其中至少一辅助电路19包含第一辅助电路19A与第二辅助电路19B。
承上所述，显示基板11具有显示区113和非显示区115，在非显示区115内布设有分别延伸到显示区113的第一电路15和第二电路17；其中，在非显示区115内还布设与第一电路15并联电连接的第一辅助电路19A和/或与第二电路17并联电连接的第二辅助电路19B。换言之，于本实施方式可为第一电路15并联电连接的第一辅助电路19A，或是第二电路17并联电连接的第二辅助电路19B，抑或是上述两种情况同时使用。
于本实施方式中，显示基板11具有封装区域111。封装区域111的内侧为显示区113，外侧为非显示区115，非显示区115环设于显示区113。绑定区13位于显示基板11上，并位于封装区域111的一侧。至少一辅助电路19增添于第一电路15与第二电路17，进而改良第一电路15与第二电路17的电阻压降(IR drop)，即电流通过第一电路15与第二电路17时，电阻压降不致于差异太大，从而保证显示面板内的电压值的稳定，也减少屏幕的功耗。
于本实施方式中，第一电路15为阳极(VDD)走线，其对有机发光二极体(OLED)提供阳极电压。第一电路15具有第一线路151与第二线路153。第一线路151与第二线路153的一端分别连接于绑定区13，第一线路151与第二线路153的另一端分别延伸通过封装区域111内的部分的非显示区115，而分布于封装区域111的显示区113。其中第一电路15分布于显示区113内的第一线路151与第二线路153呈互相平行的线路。于本实施方式中，封装区域111内部的线路与本实施方式作单纯的线路连接，封装区域111内部的线路布局方式并不影响本实施方式的实施，故，于此不针对于封装区域111内部的线路布局加以赘述。至少一辅助电路19为第一辅助电路19A,而第一辅助电路19A连接于封装区域111外的第一线路151与第二线路153间。如此能够直接的增加第一电路15的电流流量，进而减小第一电路15的电阻，使屏幕于显示状态下，改善屏幕整体的亮度均一性。又，将增加的第一辅助电路19A设置于封装区域111之外，如此也减少对于封装区域111内的走线线路的改变与影响。
于本实施方式中，第二电路17为阴极(VSS)走线，其对有机发光二极体(OLED)提供阴极电压。第二电路17具有第三线路171与第四线路173，第三线路171与第四线路173分别位于第一电路15的两侧。第三线路171与第四线路173的一端分别连接于绑定区13，第三线路171与第四线路173的另一端分别延伸分布于非显示区115与显示区113内，换言之，第二电路17分布于非显示区115内的主线路为倒U型。至少一辅助电路19为二条第二辅助电路19B，其中一条第二辅助电路19B的一端连接于封装区域111外的第三线 路171，第二辅助电路19B的另一端连接于封装区域111内的第三线路171。另一条第二辅助电路19B的一端连接于封装区域111外的第四线路173，另一条第二辅助电路19B的另一端连接于封装区域111内的第四线路173。其中所述二条辅助电路19B的线路长度与线路截面积皆相同。如此能够直接的增加第二电路15的电流流量，进而减小第二电路17的电阻，使屏幕于显示状态下，改善屏幕整体的亮度均一性。又，将增加的第二辅助电路19B设置于封装区域111之外与封装区域111内邻近封装边界的位置，如此也减少对于封装区域111内的走线线路的改变与影响。
请一并参阅图2，其为本申请的显示面板的另一示意图。如图所示，本实施方式与第一实施方式的差异在于省略至少一辅助电路19的第二辅助电路19B。于本实施方式中，其利用第一辅助电路19A连接于封装区域111外的第一线路151与第二线路153，而有关于第一辅助电路19结构的连接关系与功效皆相同于第一实施方式所述，故，于此不再赘述。
请一并参阅图3，其为本申请的显示面板的又一示意图。如图所示，本实施方式与第一实施方式的差异在于省略至少一辅助电路19的第一辅助电路19A。于本实施方式中，其利用二条第二辅助电路19B分别进行封装区域111外的第三线路171与第四线路173的连接，而有关于第二辅助电路19B结构的连接关系与功效皆相同于第一实施方式所述，故，于此不再赘述。
综上所述，本实施例提供一种显示面板，其包含显示基板、绑定区、第一电路与第二电路。显示面板是采用于封装区域外进一步增加阳极(VDD)与阴极(VSS)的走线，即于阳极(VDD)与阴极(VSS)的原有走线上再增加并联的辅助电路，如此增加线路的方式能有效提升通过的电流量，换言之，可减小阳极(VDD)与阴极(VSS)走线的电阻，进而能降低电阻压降(IR drop)，如此提升显示面板的亮度均一性。又，将增加的辅助电路设置于封装区域之外，如此也减少对于封装区域内的走线线路的干扰。
上述说明示出并描述了本申请的若干优选实施方式，但如前所述，应当理 解本申请并非局限于本文所披露的形式，不应看作是对其他实施方式的排除，而可用于各种其他组合、修改和环境，并能够在本文所述申请构想范围内，通过上述教导或相关领域的技术或知识进行改动。而本领域人员所进行的改动和变化不脱离本申请的精神和范围，则都应在本申请所附权利要求的保护范围内。

Claims (10)

  1. 一种显示面板，包括：
    显示基板，其具有显示区和非显示区，在所述非显示区内布设有分别延伸到所述显示区的第一电路和第二电路，
    其中，在所述非显示区内还布设与所述第一电路并联电连接的第一辅助电路和/或与所述第二电路并联电连接的第二辅助电路。
  2. 如权利要求1所述的显示面板，其中所述第一电路包含第一线路与第二线路，所述第一辅助电路连接于所述第一线路与所述第二线路。
  3. 如权利要求1所述的显示面板，其中所述第二电路包含第三线路与第四线路，所述第二辅助电路并联电连接所述第三线路，所述第二辅助电路并联电连接所述第四线路。
  4. 如权利要求3所述的显示面板，其中所述第二辅助电路并联电连接所述第三线路的线路与所述第二辅助电路并联电连接所述第四线路的线路长度相同。
  5. 如权利要求3所述的显示面板，其中所述第二辅助电路并联电连接所述第三线路的线路与所述第二辅助电路并联电连接所述第四线路的线路的截面积相同。
  6. 如权利要求1所述的显示面板，其中所述第一电路为阳极(VDD)走线。
  7. 如权利要求6所述的显示面板，其中所述第一辅助电路为阳极(VDD)辅助走线。
  8. 如权利要求1所述的显示面板，其中所述第二电路为阴极(VSS)走线。
  9. 如权利要求8所述的显示面板，其中所述第二辅助电路为阳极(VDD)辅助走线。
  10. 如权利要求1所述的显示面板，其中所述显示基板具有绑定区，所述第一电路与所述第二电路连接于所述绑定区。
PCT/CN2018/092005 2017-10-31 2018-06-20 显示面板 WO2019085508A1 (zh)

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CN108628048B (zh) * 2018-05-14 2021-09-14 昆山国显光电有限公司 显示面板及其显示装置
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CN110970478A (zh) * 2019-11-26 2020-04-07 深圳市华星光电半导体显示技术有限公司 一种显示面板及显示装置
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