WO2019223410A1 - 像素电路及其驱动方法、显示面板、制作方法和显示装置 - Google Patents

像素电路及其驱动方法、显示面板、制作方法和显示装置 Download PDF

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Publication number
WO2019223410A1
WO2019223410A1 PCT/CN2019/078645 CN2019078645W WO2019223410A1 WO 2019223410 A1 WO2019223410 A1 WO 2019223410A1 CN 2019078645 W CN2019078645 W CN 2019078645W WO 2019223410 A1 WO2019223410 A1 WO 2019223410A1
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Prior art keywords
driving transistor
gate
voltage
transistor
pixel circuit
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PCT/CN2019/078645
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English (en)
French (fr)
Inventor
冯宇
刘利宾
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京东方科技集团股份有限公司
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Priority to US16/642,447 priority Critical patent/US20200258452A1/en
Publication of WO2019223410A1 publication Critical patent/WO2019223410A1/zh

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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a pixel circuit and a driving method thereof, a display panel, a manufacturing method, and a display device.
  • the existing display panel may be a partially transparent display panel, that is, the display panel may be provided with a transparent display area and a normal display area (the normal display area is also a non-transparent display area).
  • the pixel circuit provided in the transparent display area usually does not have a threshold compensation function.
  • the data voltage ranges of the transparent display area and the normal display area are different, there is a difference between the brightness of the transparent display area and the brightness of the normal display area (the brightness of the transparent display area is smaller), so the IC (Integrated Circuit, Integrated circuit) to perform complex data compensation, which disadvantageously results in higher requirements for IC functions.
  • an embodiment of the present disclosure provides a pixel circuit including: a light emitting element, a data writing sub-circuit, a storage sub-circuit, and a driving transistor, wherein the driving transistor is a double-gate transistor;
  • the double-gate transistor includes a top-gate, a bottom-gate, a first pole, and a second pole;
  • the data writing subcircuits are respectively connected to a gate line, a data line, and a top-gate of the driving transistor, and are used for Under control, the connection between the data line and the top gate of the driving transistor is turned on or off;
  • the storage subcircuit is connected to the top gate of the driving transistor and is used to control the top of the driving transistor.
  • the bottom gate of the driving transistor is connected to a first voltage input terminal; a first pole of the driving transistor is connected to a power voltage input terminal, and a second pole of the driving transistor is connected to a first of the light emitting element
  • the first voltage input terminal is used to input a first voltage; the second electrode of the light-emitting element is connected to a second voltage input terminal; and the second voltage input terminal is used to input a second voltage.
  • the driving transistor is a P-type transistor, and the first voltage is a positive voltage.
  • the driving transistor is an N-type transistor, and the first voltage is a negative voltage.
  • the data writing sub-circuit includes a data writing transistor, a gate is connected to the gate line, a first pole is connected to the data line, and a second pole is connected to the driving transistor. Top grid connection.
  • the storage sub-circuit includes a storage capacitor; a first end of the storage capacitor is connected to a top gate of the driving transistor, and a second end of the storage capacitor is connected to the driving transistor. Second pole connected.
  • the pixel circuit further includes a light emission control sub-circuit
  • the light emitting control sub-circuit is respectively connected to a light emitting control terminal, a second pole of the driving transistor, and a first pole of the light emitting element, and is configured to turn on or off the driving under the control of the light emitting control terminal.
  • the light emission control sub-circuit includes: a light emission control transistor, a gate is connected to the light emission control terminal, a first pole is connected to a second pole of the driving transistor, and a second pole is connected to all of the driving transistors. The first pole of the light-emitting element is connected.
  • the light emitting element is an organic light emitting diode OLED.
  • the data writing transistor and the light emission control transistor are both P-type transistors.
  • the double-gate transistor is a P-type transistor, and the first voltage is a constant positive voltage with a higher voltage value.
  • the double gate transistor is an N-type transistor
  • the first voltage is a constant negative voltage having a lower voltage value
  • the pixel circuit is disposed in a transparent display area included in the display panel.
  • an embodiment of the present disclosure provides a driving method of a pixel circuit, which is applied to the pixel circuit as described in the first aspect, wherein the driving method of the pixel circuit includes: Display cycle,
  • the first voltage input terminal inputs a first voltage to the bottom gate of the driving transistor; the data writing sub-circuit controls the writing of the data voltage output by the data line to the top of the driving transistor under the control of the first gate line.
  • the gate and the storage sub-circuit control the potential of the top gate of the driving transistor, thereby controlling the driving of the driving transistor to drive the light emitting element to emit light.
  • the pixel circuit further includes a light emission control sub-circuit
  • the driving phase includes a data writing time period and a light emission time period sequentially set
  • the driving method of the pixel circuit includes: Driving phase
  • the first voltage input terminal inputs the first voltage to the bottom gate of the driving transistor; the data line outputs the data voltage, and the data writing sub-circuit controls the writing of the data voltage under the control of the gate line
  • the top gate of the driving transistor controls maintaining the potential of the top gate of the driving transistor; the light-emitting control sub-circuit disconnects between the second pole of the driving transistor and the first pole of the light-emitting element under the control of the light-emitting control line.
  • the first voltage input terminal inputs a first voltage to the bottom gate of the driving transistor; the data writing sub-circuit disconnects the connection between the data line and the top gate of the driving transistor under the control of the gate line
  • the light-emitting control sub-circuit is connected to the second pole of the driving transistor and the first pole of the light-emitting element under the control of the light-emitting control line; the storage sub-circuit controls the potential of the top gate of the driving transistor Thereby, the driving transistor is controlled to be turned on to drive the light emitting element to emit light.
  • an embodiment of the present disclosure provides a display panel including a normal display area and a transparent display area, wherein the transparent display area of the display panel is provided with pixels as described in the first aspect. Circuit.
  • an embodiment of the present disclosure provides a method for manufacturing a display panel for manufacturing the display panel according to the third aspect, wherein the method for manufacturing the display panel includes:
  • a bottom gate, an active layer, a top gate, and a source and a drain of the driving transistor are sequentially fabricated in a transparent display area of the display panel.
  • the bottom gate is made of an opaque conductive material, and the active layer The orthographic projection on the plane where the bottom grid is located falls into the bottom grid.
  • an embodiment of the present disclosure provides a display device including the display panel according to the third aspect.
  • FIG. 1 is a structural diagram of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 2 is a structural diagram of a pixel circuit according to another embodiment of the present disclosure.
  • FIG. 3 is a circuit diagram of a pixel circuit according to a specific embodiment of the present disclosure.
  • FIG. 4 is an operation timing diagram of the specific embodiment of the pixel circuit shown in FIG. 3 according to the present disclosure
  • FIG. 5 is a schematic diagram of area division of a display panel according to an embodiment of the present disclosure.
  • FIG. 6 is a circuit diagram of a pixel circuit having a threshold compensation function provided in the normal display area 52.
  • FIG. 7 is a schematic structural diagram of a driving transistor included in a pixel circuit of a transparent display region included in a display panel according to an embodiment of the present disclosure.
  • the transistors used in all embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics.
  • one of the poles in order to distinguish the two poles of the transistor other than the gate, one of the poles is called a first pole and the other pole is called a second pole.
  • the first pole may be a drain
  • the second pole may be a source
  • the first pole may be a source
  • the second pole may be a drain.
  • the pixel circuit according to the embodiment of the present disclosure includes a light-emitting element.
  • the pixel circuit further includes a data writing sub-circuit, a storage sub-circuit, and a driving transistor.
  • the driving transistor is a double-gate transistor;
  • the double-gate transistor includes a top gate, a bottom gate, a first pole, and a second pole;
  • the data writing sub-circuit is respectively connected to a gate line, a data line, and a top gate of the driving transistor, and is used to control the data line and the driving transistor to be turned on or off under the control of the gate line. Connection between the top grids
  • the storage sub-circuit is connected to the top gate of the driving transistor and is used to control the potential of the top gate of the driving transistor;
  • a bottom gate of the driving transistor is connected to a first voltage input terminal; a first pole of the driving transistor is connected to a power voltage input terminal; a second pole of the driving transistor is connected to a first pole of the light emitting element;
  • the second pole of the light-emitting element is connected to a second voltage input terminal.
  • the pixel circuit according to the embodiment of the present disclosure uses a double gate transistor (the double gate transistor includes a top gate and a bottom gate) as a driving transistor, and controls the bottom gate to be connected to a first voltage input terminal to reduce the driving transistor's
  • the threshold voltage can increase the driving current when the driving transistor is turned on, increase the light-emitting brightness of the light-emitting element, and can compensate the brightness difference between the transparent display area and the normal display area.
  • the pixel circuit provided in the transparent display area does not have the threshold voltage compensation capability, resulting in the brightness of the normal display area (that is, the opaque display area) is brighter than that of the transparent display area.
  • the brightness of the pixel is high, so the pixel circuit described in the embodiment of the present disclosure is applied to a transparent display area, and a double gate transistor is used as a driving transistor to compensate for the difference in brightness between the transparent display area and the normal display area.
  • the first voltage input terminal is used to input a first voltage to reduce a threshold voltage of the driving transistor, thereby increasing the turn-on degree of the driving transistor, and further increasing the driving current of the driving transistor.
  • the voltage amplitude of the first voltage may be correspondingly set according to actual needs, and details are not described herein again.
  • the driving transistor is a P-type transistor
  • the first voltage is a positive voltage to reduce a threshold voltage of the driving transistor
  • the driving transistor is an N-type transistor
  • the first voltage is a negative voltage to reduce a threshold voltage of the driving transistor.
  • the pixel circuit includes a light-emitting element EL, and the pixel circuit further includes a data writing sub-circuit 11, a storage sub-circuit 12, and a driving transistor DTFT.
  • the driving transistor DTFT is a double gate transistor
  • the data writing sub-circuit 11 is respectively connected to a gate line Gate (not shown in FIG. 1), a data line Data, and a top gate of the driving transistor DTFT. Turning on or off the connection between the data line Data and a top gate of the driving transistor DTFT;
  • the storage sub-circuit 12 is connected to the top gate of the driving transistor DTFT, and is used to control the potential of the top gate of the driving transistor DTFT;
  • a bottom gate of the driving transistor DTFT is connected to a first voltage input terminal; a source of the driving transistor DTFT is connected to a power voltage input terminal, and a drain of the driving transistor is connected to a first electrode of the light emitting element EL;
  • the first voltage input terminal is used to input a first voltage V1
  • the power supply voltage input terminal is used to input a power supply voltage VDD;
  • a second electrode of the light-emitting element EL is connected to a second voltage input terminal; the second voltage input terminal is used to input a second voltage V2.
  • the embodiment of the pixel circuit of the present disclosure as shown in FIG. 1 is applied to, for example, a transparent display area of a display panel.
  • the light emitting element EL may be an organic light emitting diode
  • a first pole of the light emitting element EL may be an anode
  • a second pole of the light emitting element EL may be a cathode
  • the second voltage V2 may be Low voltage, but not limited to this.
  • the DTFT is a P-type transistor.
  • the first voltage V1 may be a constant positive voltage with a higher voltage value, so as to reduce the threshold voltage of the driving transistor.
  • the DTFT may also be an N-type transistor.
  • V1 may be a constant negative voltage with a lower voltage value to reduce the threshold voltage of the driving transistor.
  • the driving transistor included in the pixel circuit in the normal display area does not include the bottom gate.
  • the driving transistor included in the pixel circuit in the normal display area does not include the bottom gate.
  • the top gate of the driving transistor in the normal display area and the driving transistor included in the pixel circuit in the transparent display area are included.
  • connecting the first voltage through the bottom gate attached to the transparent display region can make the conduction current of the driving transistor in the transparent region larger.
  • the embodiment of the present disclosure as shown in FIG. 1 uses a double-gate transistor (the double-gate transistor includes, for example, a top gate and a bottom gate) as a driving transistor DTFT.
  • the bottom gate of the driving transistor DTFT is connected to a first voltage input terminal. Reducing the threshold voltage of the driving transistor DTFT, increasing the driving current when the driving transistor DTFT is turned on, and increasing the light emitting brightness of the light emitting element EL can compensate the brightness difference between the transparent display area and the normal display area.
  • the data writing sub-circuit may include a data writing transistor, a gate connected to the gate line, a first pole connected to the data line, and a second pole connected to a top gate of the driving transistor.
  • the pixel circuit described in the embodiment of the present disclosure may further include a light emission control sub-circuit 13;
  • the light emission control sub-circuit 13 is respectively connected to a light emission control terminal EM, a drain of the driving transistor DTFT, and a first electrode of the light emitting element EL, and is configured to be turned on or under the control of the light emission control terminal EM.
  • the connection between the drain of the driving transistor DTFT and the first electrode of the light emitting element EL is disconnected.
  • the embodiment of the pixel circuit shown in FIG. 2 in the present disclosure adds a light-emitting control sub-circuit 13, and the light-emitting control sub-circuit 13 disconnects the drain of the DTFT under the control of the EM during the data writing period included in the driving stage. Connection between the electrode and the first electrode of the EL; during the light-emitting period included in the driving phase, the light-emitting control sub-circuit 13 is under the control of the light-emitting control terminal EM to turn on the drain of the DTFT and the first of the EL The connection between the poles, so that the DTFT can drive the EL to emit light;
  • the light-emitting control sub-circuit 13 may include a light-emitting control transistor, a gate of which is connected to the light-emitting control terminal EM, a first pole of which is connected to a second pole of the driving transistor DTFT, and a second pole of which is connected to The first electrode of the light-emitting element EL is connected.
  • the storage subcircuit includes a storage capacitor
  • a first end of the storage capacitor is connected to a top gate of the driving transistor, and a second end of the storage capacitor is connected to a second electrode of the driving transistor.
  • the pixel circuit described in the present disclosure is described below through a specific embodiment.
  • a specific embodiment of the pixel circuit described in this disclosure includes a light emitting element, a data writing sub-circuit 11, a storage sub-circuit 12, a light-emitting control sub-circuit 13, and a driving transistor DTFT.
  • the light emitting element is an organic light emitting diode OLED
  • the driving transistor DTFT is a double gate transistor
  • the bottom gate of the driving transistor DTFT is connected to a high voltage input terminal; the source of the driving transistor DTFT is connected to a power voltage input terminal; the high voltage input terminal is used to input a high voltage VGH, and the power voltage input terminal is used to At the input power voltage VDD;
  • a cathode of the organic light emitting diode OLED is connected to a low voltage input terminal; the low voltage input terminal is used to input a low voltage VSS;
  • the data writing sub-circuit 11 includes a data writing transistor T1, a gate connected to the gate line Gate, a source connected to the data line Data, and a drain connected to a top gate of the driving transistor DTFT;
  • the storage sub-circuit 12 includes: a storage capacitor C1; a first end of the storage capacitor C1 is connected to a top gate of the driving transistor DTFT, and a second end of the storage capacitor C1 is connected to a drain of the driving transistor DTFT connection;
  • the light emission control sub-circuit 13 includes a light emission control transistor T2;
  • the gate of T2 is connected to the light emitting control terminal EM, the source of T2 is connected to the drain of the driving transistor DTFT, and the drain of T2 is connected to the anode of the organic light emitting diode OLED.
  • both T1 and T2 are P-type transistors, but not limited thereto.
  • the DTFT is a P-type transistor, but is not limited thereto.
  • the bottom gate of the DTFT is connected to a high voltage VGH to reduce the threshold voltage of the DTFT.
  • the driving cycle includes a data writing time period S1 and a light emitting time period S2 that are sequentially set;
  • EM In the data writing time period S1, EM outputs a high level, Gate outputs a low level, the bottom gate of the DTFT is connected to VGH, and the data output data voltage Vdata, T1 is turned on to write Vdata to the top gate of the DTFT, C1 Control to maintain the potential of the top gate of the DTFT and T2 is turned off to disconnect the drain between the DTFT and the anode of the OLED;
  • EM In the light-emitting stage S2, EM outputs a low level, Gate outputs a high level, the bottom gate of the DTFT is connected to VGH, T1 is turned off, and C1 controls the potential of the top gate of the DTFT to control the DTFT to be turned on and T2 to be turned on.
  • the DTFT drives the OLED to emit light; in the specific embodiment of the pixel circuit shown in FIG.
  • the DTFT is a double gate transistor, and the bottom gate of the DTFT is connected to a high voltage VGH In order to reduce the threshold voltage of the DTFT, the DTFT is turned on more, and the driving current of the DTFT in the light-emitting stage is increased, thereby improving the light-emitting brightness of the OLED.
  • the driving method of a pixel circuit according to the embodiment of the present disclosure is applied to the above-mentioned pixel circuit.
  • the driving method of the pixel circuit includes: at each display cycle,
  • the first voltage input terminal inputs a first voltage to the bottom gate of the driving transistor; the data writing sub-circuit controls the writing of the data voltage output by the data line to the top of the driving transistor under the control of the first gate line.
  • the gate and the storage sub-circuit control the potential of the top gate of the driving transistor, thereby controlling the driving of the driving transistor to drive the light emitting element to emit light.
  • the driving method of the pixel circuit according to the embodiment of the present disclosure adopts a double gate transistor (the double gate transistor includes, for example, a top gate and a bottom gate) as a driving transistor, and controls the bottom gate to be connected to a first voltage input terminal, so that Lowering the threshold voltage of the driving transistor can increase the driving current when the driving transistor is turned on, increase the luminous brightness of the light-emitting element, and can compensate the brightness difference between the transparent display area and the normal display area.
  • the double gate transistor includes, for example, a top gate and a bottom gate
  • the pixel circuit further includes a light emission control sub-circuit
  • the driving phase includes a data writing time period and a light emission time period sequentially set
  • the driving method of the pixel circuit includes: in the driving phase,
  • the first voltage input terminal inputs the first voltage to the bottom gate of the driving transistor; the data line outputs the data voltage, and the data writing sub-circuit controls the writing of the data voltage under the control of the gate line
  • the top gate of the driving transistor, the storage sub-circuit controls and maintains the potential of the top gate of the driving transistor; the light-emitting control sub-circuit turns off (OFF) the second electrode of the driving transistor and the first Connection between poles;
  • the first voltage input terminal inputs a first voltage to the bottom gate of the driving transistor; the data writing sub-circuit disconnects the connection between the data line and the top gate of the driving transistor under the control of the gate line , The light-emitting control sub-circuit turns on (ON) the connection between the second pole of the driving transistor and the first pole of the light-emitting element under the control of the light-emitting control line; the storage sub-circuit controls the top gate of the driving transistor , Thereby controlling the driving transistor to be turned on to drive the light emitting element to emit light.
  • the display panel according to the embodiment of the present disclosure includes a transparent display area and a normal display area.
  • the transparent display area of the display panel is, for example, provided with the pixel circuit described above.
  • the display panel 50 may include a transparent display area 51 and a normal display area 52, where the normal display area 52 is a non-transparent display area;
  • the pixel circuit according to the embodiment of the present disclosure is provided in the transparent display area 51, and the normal display area 52 is provided with an existing pixel circuit having a threshold compensation function, for example.
  • the embodiments of the present disclosure are not limited thereto.
  • a pixel circuit having a threshold compensation function provided in the normal display area 52 may include a first transistor P1, a second transistor P2, and a third transistor P3 (in FIG. 6, P3 is a driving transistor) ,
  • EM is a light emitting control terminal
  • Vref is a reference voltage
  • VDD is a power supply voltage
  • VSS is a low voltage
  • Vinit is the initial voltage
  • Vdata is the data voltage
  • Re is the reset control terminal.
  • the driving transistor included in the pixel circuit provided in the transparent display region 51 is set as a double-gate transistor, and the bottom gate of the driving transistor is controlled to be connected to a first voltage to reduce the threshold voltage of the driving transistor, thereby improving the light-emitting element. Luminous brightness, thereby compensating the brightness difference between the transparent display area 51 and the normal display area 52.
  • the method for manufacturing a display panel according to the embodiment of the present disclosure is used for manufacturing the above display panel.
  • the method for manufacturing the display panel includes:
  • a bottom gate, an active layer, a top gate, and a source and a drain of the driving transistor are sequentially fabricated in a transparent display area of the display panel.
  • the bottom gate is made of an opaque conductive material, and the active layer The orthographic projection on the plane where the bottom grid is located falls into the bottom grid.
  • FIG. 7 illustrates a driving transistor included in a pixel circuit provided in a transparent display region.
  • the number 70 is a display substrate
  • the number LS is a light shielding layer
  • the number Poly is an active layer
  • the number Gate is a gate metal layer
  • the number SD is a source-drain metal layer.
  • the reference numeral 71 is an insulating layer; wherein the light shielding layer LS is used as the bottom gate and the gate metal layer Gate is used as the top grid.
  • the light shielding layer LS is made of an opaque conductive material.
  • the light shielding layer LS can protect the transparent display area. The channel of the transistor is protected from the underlying device.
  • the light blocking layer LS is controlled by an independent voltage.
  • the display device includes the display panel described above.
  • the display device provided in the embodiments of the present disclosure may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

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Abstract

本公开文本实施例提供一种像素电路及其驱动方法、显示面板、制作方法和显示装置。该像素电路包括发光元件、数据写入子电路、存储子电路和驱动晶体管，所述驱动晶体管为双栅晶体管。数据写入子电路在栅线的控制下，控制导通或断开数据线与驱动晶体管的顶栅之间的连接。存储子电路用于控制驱动晶体管的顶栅的电位。所述驱动晶体管的底栅与第一电压输入端连接。所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接。所述发光元件的第二极与第二电压输入端连接。

Description

像素电路及其驱动方法、显示面板、制作方法和显示装置
相关申请的交叉引用
本申请主张在2018年5月21日在中国提交的中国专利申请号No.201810489559.3的优先权，其全部内容通过引用包含于此。
技术领域
本公开文本涉及显示技术领域，尤其涉及一种像素电路及其驱动方法、显示面板、制作方法和显示装置。
背景技术
现有的显示面板上可以为局部透明显示的显示面板，也即该显示面板上可以设置有透明显示区域和正常显示区域(所述正常显示区域也即非透明显示区域)。为了提高透明显示区域的透过率，设于透明显示区域中的像素电路通常不具备阈值补偿功能。并且由于透明显示区域和正常显示区域各自的数据电压范围不同，从而导致透明显示区域的亮度和正常显示区域的亮度之间存在差异(透明显示区域的亮度较小)，需要在IC(Integrated Circuit，集成电路)端进行复杂的数据补偿，由此不利地造成对IC功能要求较高。
发明内容
在第一个方面中，本公开文本实施例提供了一种像素电路，包括：发光元件、数据写入子电路、存储子电路和驱动晶体管，其中，所述驱动晶体管为双栅晶体管；所述双栅晶体管包括顶栅、底栅、第一极和第二极；所述数据写入子电路分别与栅线、数据线、所述驱动晶体管的顶栅连接，用于在所述栅线的控制下，控制导通或断开所述数据线与所述驱动晶体管的顶栅之间的连接；所述存储子电路与所述驱动晶体管的顶栅连接，用于控制所述驱动晶体管的顶栅的电位；所述驱动晶体管的底栅与第一电压输入端连接；所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接；所述第一电压输入端用于输入第一电压；所述发 光元件的第二极与第二电压输入端连接；所述第二电压输入端用于输入第二电压。
根据本公开文本的一些实施例，所述驱动晶体管为P型晶体管，所述第一电压为正电压。
根据本公开文本的一些实施例，所述驱动晶体管为N型晶体管，所述第一电压为负电压。
根据本公开文本的一些实施例，所述数据写入子电路包括：数据写入晶体管，栅极与所述栅线连接，第一极与所述数据线连接，第二极与所述驱动晶体管的顶栅连接。
根据本公开文本的一些实施例，所述存储子电路包括存储电容；所述存储电容的第一端与所述驱动晶体管的顶栅连接，所述存储电容的第二端与所述驱动晶体管的第二极连接。
根据本公开文本的一些实施例，所述像素电路还包括发光控制子电路；
所述发光控制子电路分别与发光控制端、所述驱动晶体管的第二极和所述发光元件的第一极连接，用于在所述发光控制端的控制下，导通或断开所述驱动晶体管的第二极与所述发光元件的第一极之间的连接。
根据本公开文本的一些实施例，所述发光控制子电路包括：发光控制晶体管，栅极与所述发光控制端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光元件的第一极连接。
根据本公开文本的一些实施例，所述发光元件是有机发光二极管OLED。
根据本公开文本的一些实施例，所述数据写入晶体管和所述发光控制晶体管都是P型晶体管。
根据本公开文本的一些实施例，所述双栅晶体管是P型晶体管，所述第一电压是电压值较高的恒定正电压。
根据本公开文本的一些实施例，所述双栅晶体管是N型晶体管，所述第一电压是电压值较低的恒定负电压。
根据本公开文本的一些实施例，所述像素电路被设置在显示面板所包括的透明显示区域内。
在第二个方面中，本公开文本实施例提供了一种像素电路的驱动方法， 应用于如第一个方面中所述的像素电路，其中，所述像素电路的驱动方法包括：在每一显示周期，
在驱动阶段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入子电路在第一栅线的控制下，控制将数据线输出的数据电压写入驱动晶体管的顶栅，存储子电路控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通，以驱动发光元件发光。
根据本公开文本的一些实施例，所述像素电路还包括发光控制子电路，所述驱动阶段包括依次设置的数据写入时间段和发光时间段，所述像素电路的驱动方法包括：在所述驱动阶段，
在数据写入时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据线输出数据电压，数据写入子电路在栅线的控制下控制将所述数据电压写入驱动晶体管的顶栅，存储子电路控制维持所述驱动晶体管的顶栅的电位；发光控制子电路在发光控制线的控制下断开所述驱动晶体管的第二极与发光元件的第一极之间的连接；
在发光时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入子电路在栅线的控制下断开数据线与所述驱动晶体管的顶栅之间的连接，发光控制子电路在发光控制线的控制下导通所述驱动晶体管的第二极与发光元件的第一极之间的连接；所述存储子电路控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通以驱动所述发光元件发光。
在第三个方面中，本公开文本实施例提供了一种显示面板，包括：正常显示区域和透明显示区域，其中，所述显示面板的透明显示区域设置有如第一个方面中所述的像素电路。
在第四个方面中，本公开文本实施例提供了一种显示面板的制作方法，用于制作如第三个方面所述的显示面板，其中，所述显示面板的制作方法包括：
在所述显示面板的透明显示区域依次制作所述驱动晶体管的底栅、有源层、顶栅和源极、漏极，所述底栅采用不透明导电材料制成，所述有源层在所述底栅所在平面上的正投影落入所述底栅内。
在第五个方面中，本公开文本实施例提供了一种显示装置，包括如第三 个方面所述的显示面板。
附图说明
为了更清楚地说明本公开文本实施例或相关技术中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开文本的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本公开文本实施例所述的像素电路的结构图；
图2是本公开文本另一实施例所述的像素电路的结构图；
图3是本公开文本所述的像素电路的一具体实施例的电路图；
图4是本公开文本所述的关于图3所示的像素电路的该具体实施例的工作时序图；
图5是本公开文本实施例所述的显示面板的区域划分示意图；
图6是设置于正常显示区域52中的具有阈值补偿功能的像素电路的电路图；以及
图7是本公开文本实施例所述的显示面板包括的设置于透明显示区域的像素电路中的驱动晶体管的结构示意图。
具体实施方式
下面将结合本公开文本实施例中的附图，对本公开文本实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开文本一部分实施例，而不是全部的实施例。基于本公开文本中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开文本保护的范围。
本公开文本所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。在本公开文本实施例中，为区分晶体管除栅极之外的两极，将其中一极称为第一极，另一极称为第二极。在实际操作时，所述第一极可以为漏极，所述第二极可以为源极；或者，所述第一极可以为源极，所述第二极可以为漏极。
本公开文本实施例所述的像素电路，包括发光元件，所述像素电路还包括数据写入子电路、存储子电路和驱动晶体管，其中，
所述驱动晶体管为双栅晶体管；所述双栅晶体管包括顶栅、底栅、第一极和第二极；
所述数据写入子电路分别与栅线、数据线、所述驱动晶体管的顶栅连接，用于在所述栅线的控制下，控制导通或断开所述数据线与所述驱动晶体管的顶栅之间的连接；
所述存储子电路与所述驱动晶体管的顶栅连接，用于控制所述驱动晶体管的顶栅的电位；
所述驱动晶体管的底栅与第一电压输入端连接；所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接；
所述发光元件的第二极与第二电压输入端连接。
本公开文本实施例所述的像素电路采用双栅晶体管(所述双栅晶体管包括顶栅和底栅)作为驱动晶体管，并控制所述底栅与第一电压输入端连接，以降低驱动晶体管的阈值电压，从而可以提升驱动晶体管导通时的驱动电流，提升发光元件的发光亮度，能够补偿透明显示区域与正常显示区域的亮度差异。
在局部透明显示装置中，为了提高透明显示区域的透过率，设置于透明显示区域中的像素电路不具有阈值电压补偿能力，导致正常显示区域(也即不透明显示区域)的亮度比透明显示区域的亮度高，因此本公开文本实施例所述的像素电路应用于透明显示区域，采用双栅晶体管作为驱动晶体管，以补偿透明显示区域与正常显示区域的亮度差异。
在具体实施时，所述第一电压输入端用于输入第一电压，以降低所述驱动晶体管的阈值电压，从而使得驱动晶体管的开启程度加大，进而提升驱动晶体管的驱动电流。另外，所述第一电压的电压幅值可以根据实际需要来相应的设置，在此不再赘述。
根据一种具体实施方式，所述驱动晶体管为P型晶体管，所述第一电压为正电压，以降低所述驱动晶体管的阈值电压。
根据另一种具体实施方式，所述驱动晶体管为N型晶体管，所述第一电压为负电压，以降低所述驱动晶体管的阈值电压。
如图1所示，本公开文本实施例所述的像素电路包括发光元件EL，所述像素电路还包括数据写入子电路11、存储子电路12和驱动晶体管DTFT，其中，
所述驱动晶体管DTFT为双栅晶体管；
所述数据写入子电路11分别与栅线Gate(图1中未示出)、数据线Data、所述驱动晶体管DTFT的顶栅连接，用于在所述栅线Gate的控制下，控制导通或断开所述数据线Data与所述驱动晶体管DTFT的顶栅之间的连接；
所述存储子电路12与所述驱动晶体管DTFT的顶栅连接，用于控制所述驱动晶体管DTFT的顶栅的电位；
所述驱动晶体管DTFT的底栅与第一电压输入端连接；所述驱动晶体管DTFT的源极与电源电压输入端连接，所述驱动晶体管的漏极与所述发光元件EL的第一极连接；所述第一电压输入端用于输入第一电压V1，所述电源电压输入端用于输入电源电压VDD；
所述发光元件EL的第二极与第二电压输入端连接；所述第二电压输入端用于输入第二电压V2。
如上所述，本公开文本如图1所示的像素电路的实施例例如应用于显示面板的透明显示区域。
在具体实施时，所述发光元件EL可以为有机发光二极管，所述发光元件EL的第一极可以为阳极，所述发光元件EL的第二极可以为阴极，所述第二电压V2可以为低电压，但不以此为限。
在图1所示的实施例中，DTFT为P型晶体管，此时所述第一电压V1可以为电压值较高的恒定正电压，以降低所述驱动晶体管的阈值电压。
在实际操作时，DTFT也可以为N型晶体管，此时V1可以为电压值较低的恒定负电压，以降低所述驱动晶体管的阈值电压。
正常显示区域中的像素电路包括的驱动晶体管不包含底栅，在驱动阶段包括的发光时间段，当正常显示区域中的所述驱动晶体管的顶栅与透明显示区域中的像素电路包括的驱动晶体管的顶栅输入相同电压时，通过透明显示 区域附加的底栅接入第一电压可以使透明区域的驱动晶体管的导通电流更大。
本公开文本如图1所示的实施例采用双栅晶体管(该双栅晶体管例如包括顶栅和底栅)作为驱动晶体管DTFT，所述驱动晶体管DTFT的底栅与第一电压输入端连接，以降低所述驱动晶体管DTFT的阈值电压，提升驱动晶体管DTFT导通时的驱动电流，提升发光元件EL的发光亮度，能够补偿透明显示区域与正常显示区域之间的亮度差异。
具体的，所述数据写入子电路可以包括：数据写入晶体管，栅极与所述栅线连接，第一极与所述数据线连接，第二极与所述驱动晶体管的顶栅连接。
可选的，如图2所示，本公开文本实施例所述的像素电路还可以包括发光控制子电路13；
所述发光控制子电路13分别与发光控制端EM、所述驱动晶体管DTFT的漏极和所述发光元件EL的第一极连接，用于在所述发光控制端EM的控制下，导通或断开所述驱动晶体管DTFT的漏极与所述发光元件EL的第一极之间的连接。
本公开文本如图2所示的像素电路的实施例增设了发光控制子电路13，在驱动阶段包括的数据写入时间段所述发光控制子电路13在EM的控制下，断开DTFT的漏极与EL的第一极之间的连接；在驱动阶段包括的发光时间段，所述发光控制子电路13在所述发光控制端EM的控制下，导通DTFT的漏极与EL的第一极之间的连接，以使得DTFT能够驱动EL发光；
在具体实施时，所述发光控制子电路13可以包括：发光控制晶体管，栅极与所述发光控制端EM连接，第一极与所述驱动晶体管DTFT的第二极连接，第二极与所述发光元件EL的第一极连接。
具体的，所述存储子电路包括可以存储电容；
所述存储电容的第一端与所述驱动晶体管的顶栅连接，所述存储电容的第二端与所述驱动晶体管的第二极连接。
下面通过一具体实施例来说明本公开文本所述的像素电路。
如图3所示，本公开文本所述的像素电路的一具体实施例包括发光元件、数据写入子电路11、存储子电路12、发光控制子电路13和驱动晶体管DTFT，其中，
所述发光元件为有机发光二极管OLED；
所述驱动晶体管DTFT为双栅晶体管；
所述驱动晶体管DTFT的底栅与高电压输入端连接；所述驱动晶体管DTFT的源极与电源电压输入端连接；所述高电压输入端用于输入高电压VGH，所述电源电压输入端用于输入电源电压VDD；
所述有机发光二极管OLED的阴极与低电压输入端连接；所述低电压输入端用于输入低电压VSS；
所述数据写入子电路11包括：数据写入晶体管T1，栅极与栅线Gate连接，源极与数据线Data连接，漏极与所述驱动晶体管DTFT的顶栅连接；
所述存储子电路12包括；存储电容C1；所述存储电容C1的第一端与所述驱动晶体管DTFT的顶栅连接，所述存储电容C1的第二端与所述驱动晶体管DTFT的漏极连接；
所述发光控制子电路13包括发光控制晶体管T2；
T2的栅极与发光控制端EM连接，T2的源极所述驱动晶体管DTFT的漏极连接，T2的漏极与所述有机发光二极管OLED的阳极连接。
在图3所示的具体实施例中，T1和T2都为P型晶体管，但不以此为限。
在图3所示的像素电路的具体实施例中，DTFT为P型晶体管，但不以此为限。
在图3所示的像素电路的具体实施例中，DTFT的底栅接入高电压VGH，以降低DTFT的阈值电压。
本公开文本如图3所示的像素电路的具体实施例在工作时，如图4所示，驱动周期包括依次设置的数据写入时间段S1和发光时间段S2；
在所述数据写入时间段S1，EM输出高电平，Gate输出低电平，DTFT的底栅接入VGH，Data输出数据电压Vdata，T1开启，以将Vdata写入DTFT的顶栅，C1控制维持DTFT的顶栅的电位，T2关断，以断开DTFT的漏极与OLED的阳极之间的连接；
在所述发光阶段S2，EM输出低电平，Gate输出高电平，DTFT的底栅接入VGH，T1关断，C1控制维持DTFT的顶栅的电位，以控制DTFT导通，T2开启，以导通DTFT的漏极与OLED的阳极之间的连接，DTFT驱动OLED 发光；在图3所示的像素电路的具体实施例中，DTFT是双栅晶体管，DTFT的底栅接入高电压VGH，以降低DTFT的阈值电压，使得DTFT的开启程度更大，提升DTFT在发光阶段的驱动电流，从而能够提升OLED的发光亮度。
本公开文本实施例所述的像素电路的驱动方法，应用于上述的像素电路，所述像素电路的驱动方法包括：在每一显示周期，
在驱动阶段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入子电路在第一栅线的控制下，控制将数据线输出的数据电压写入驱动晶体管的顶栅，存储子电路控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通，以驱动发光元件发光。
本公开文本实施例所述的像素电路的驱动方法采用双栅晶体管(所述双栅晶体管例如包括顶栅和底栅)作为驱动晶体管，并控制所述底栅与第一电压输入端连接，以降低驱动晶体管的阈值电压，从而可以提升驱动晶体管导通时的驱动电流，提升发光元件的发光亮度，能够补偿透明显示区域与正常显示区域的亮度差异。
具体的，所述像素电路还包括发光控制子电路，所述驱动阶段包括依次设置的数据写入时间段和发光时间段，所述像素电路的驱动方法包括：在所述驱动阶段，
在数据写入时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据线输出数据电压，数据写入子电路在栅线的控制下控制将所述数据电压写入驱动晶体管的顶栅，存储子电路控制维持所述驱动晶体管的顶栅的电位；发光控制子电路在发光控制线的控制下断开(OFF)所述驱动晶体管的第二极与发光元件的第一极之间的连接；
在发光时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入子电路在栅线的控制下断开数据线与所述驱动晶体管的顶栅之间的连接，发光控制子电路在发光控制线的控制下导通(ON)所述驱动晶体管的第二极与发光元件的第一极之间的连接；所述存储子电路控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通以驱动所述发光元件发光。
本公开文本实施例所述的显示面板，包括透明显示区域和正常显示区域，所述显示面板的透明显示区域例如设置有上述的像素电路。
在具体实施时，如图5所示，本公开文本实施例所述的显示面板50可以包括透明显示区域51和正常显示区域52，其中，所述正常显示区域52即为非透明显示区域；
本公开文本实施例所述的像素电路例如设置于所述透明显示区域51中，所述正常显示区域52中例如设置有现有的具有阈值补偿功能的像素电路。当然，本公开文本各个实施例并不以此为限。
例如，如图6所示，设置于正常显示区域52中的具有阈值补偿功能的像素电路可以包括第一晶体管P1、第二晶体管P2、第三晶体管P3(在图6中，P3为驱动晶体管)、第四晶体管P4、第五晶体管P5、第六晶体管P6、第七晶体管P7、存储电容C1和有机发光二极管OLED，EM为发光控制端，Vref为参考电压，VDD为电源电压，VSS为低电压，Vinit为初始电压，Vdata为数据电压，Re为重置控制端。
比较图6和图3可知，设置于正常显示区域52中的图6所示的像素电路采用的晶体管的个数多，具有阈值补偿功能。图6所示的像素电路在工作时，在发光阶段流过OLED的电流Ioled＝K(Vdata-VDD-Vth)2；其中，K为P3的电流系数，Vth为P3的阈值电压。而本公开文本实施例所述的显示面板为了保证透明显示区域51中的透过率，不能在设于透明显示区域51中的像素电路设置用于阈值电压补偿的晶体管，则本公开文本实施例通过将设置于透明显示区域51中的像素电路包括的驱动晶体管设置为双栅晶体管，并控制所述驱动晶体管的底栅接入第一电压以降低所述驱动晶体管阈值电压，而提升发光元件的发光亮度，从而补偿透明显示区域51和正常显示区域52的亮度差异。
本公开文本实施例所述的显示面板的制作方法，用于制作上述的显示面板，所述显示面板的制作方法包括：
在所述显示面板的透明显示区域依次制作所述驱动晶体管的底栅、有源层、顶栅和源极、漏极，所述底栅采用不透明导电材料制成，所述有源层在所述底栅所在平面上的正投影落入所述底栅内。
图7示出了设置于透明显示区域的像素电路包括的驱动晶体管。
如图7所示，标号为70的为显示基板，标号为LS的为光遮挡层、标号 为Poly的为有源层，标号为Gate的为栅金属层，标号为SD的为源漏金属层，标号为71的为绝缘层；其中，光遮挡层LS作为底栅，栅金属层Gate作为顶栅，所述光遮挡层LS由不透明导电材料制成，光遮挡层LS可以保护透明显示区域的晶体管的沟道免受下方器件的影响。
在实际操作时，光遮挡层LS受独立电压控制，
本公开文本实施例所述的显示装置包括上述的显示面板。
本公开文本实施例所提供的显示装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上所述仅仅是本公开文本的一些实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开文本所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开文本的保护范围。

Claims (17)

  1. 一种像素电路，包括：发光元件、数据写入子电路、存储子电路和驱动晶体管，其中，
    所述驱动晶体管为双栅晶体管；所述双栅晶体管包括顶栅、底栅、第一极和第二极；
    所述数据写入子电路分别与栅线、数据线、所述驱动晶体管的顶栅连接，用于在所述栅线的控制下，控制导通或断开所述数据线与所述驱动晶体管的顶栅之间的连接；
    所述存储子电路与所述驱动晶体管的顶栅连接，用于控制所述驱动晶体管的顶栅的电位；
    所述驱动晶体管的底栅与第一电压输入端连接；所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接；所述第一电压输入端用于输入第一电压；
    所述发光元件的第二极与第二电压输入端连接；所述第二电压输入端用于输入第二电压。
  2. 如权利要求1所述的像素电路，其中，所述驱动晶体管为P型晶体管，所述第一电压为正电压。
  3. 如权利要求1所述的像素电路，其中，所述驱动晶体管为N型晶体管，所述第一电压为负电压。
  4. 如权利要求1至3中任一项所述的像素电路，其中，所述数据写入子电路包括：数据写入晶体管，栅极与所述栅线连接，第一极与所述数据线连接，第二极与所述驱动晶体管的顶栅连接。
  5. 如权利要求1至4中任一项所述的像素电路，其中，所述存储子电路包括存储电容；所述存储电容的第一端与所述驱动晶体管的顶栅连接，所述存储电容的第二端与所述驱动晶体管的第二极连接。
  6. 如权利要求1至5中任一项所述的像素电路，其中，所述像素电路还包括发光控制子电路；
    所述发光控制子电路分别与发光控制端、所述驱动晶体管的第二极和所 述发光元件的第一极连接，用于在所述发光控制端的控制下，导通或断开所述驱动晶体管的第二极与所述发光元件的第一极之间的连接。
  7. 如权利要求6所述的像素电路，其中，所述发光控制子电路包括：发光控制晶体管，栅极与所述发光控制端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光元件的第一极连接。
  8. 如权利要求1至7中任一项所述的像素电路，其中，所述发光元件是有机发光二极管OLED。
  9. 如权利要求7所述的像素电路，其中，所述数据写入晶体管和所述发光控制晶体管都是P型晶体管。
  10. 如权利要求1至9中任一项所述的像素电路，其中，所述双栅晶体管是P型晶体管，所述第一电压是电压值较高的恒定正电压。
  11. 如权利要求1至9中任一项所述的像素电路，其中，所述双栅晶体管是N型晶体管，所述第一电压是电压值较低的恒定负电压。
  12. 如权利要求1至11中任一项所述的像素电路，其中，所述像素电路被设置在显示面板所包括的透明显示区域内。
  13. 一种像素电路的驱动方法，应用于如权利要求1至12中任一项所述的像素电路，其中，所述像素电路的驱动方法包括：在每一显示周期，
    在驱动阶段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入子电路在第一栅线的控制下，控制将数据线输出的数据电压写入驱动晶体管的顶栅，存储子电路控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通，以驱动发光元件发光。
  14. 如权利要求13所述的像素电路的驱动方法，其中，所述像素电路还包括发光控制子电路，所述驱动阶段包括依次设置的数据写入时间段和发光时间段，所述像素电路的驱动方法包括：在所述驱动阶段，
    在数据写入时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据线输出数据电压，数据写入子电路在栅线的控制下控制将所述数据电压写入驱动晶体管的顶栅，存储子电路控制维持所述驱动晶体管的顶栅的电位；发光控制子电路在发光控制线的控制下断开所述驱动晶体管的第二极与发光元件的第一极之间的连接；
    在发光时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入子电路在栅线的控制下断开数据线与所述驱动晶体管的顶栅之间的连接，发光控制子电路在发光控制线的控制下导通所述驱动晶体管的第二极与发光元件的第一极之间的连接；所述存储子电路控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通以驱动所述发光元件发光。
  15. 一种显示面板，包括：正常显示区域和透明显示区域，其中，所述显示面板的透明显示区域设置有如权利要求1至12中任一项所述的像素电路。
  16. 一种显示面板的制作方法，用于制作如权利要求15所述的显示面板，其中，所述显示面板的制作方法包括：
    在所述显示面板的透明显示区域依次制作所述驱动晶体管的底栅、有源层、顶栅和源极、漏极，所述底栅采用不透明导电材料制成，所述有源层在所述底栅所在平面上的正投影落入所述底栅内。
  17. 一种显示装置，包括如权利要求15所述的显示面板。
PCT/CN2019/078645 2018-05-21 2019-03-19 像素电路及其驱动方法、显示面板、制作方法和显示装置 WO2019223410A1 (zh)

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