WO2019210647A1 - 雪崩光电二极管的制备方法 - Google Patents

雪崩光电二极管的制备方法 Download PDF

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WO2019210647A1
WO2019210647A1 PCT/CN2018/110439 CN2018110439W WO2019210647A1 WO 2019210647 A1 WO2019210647 A1 WO 2019210647A1 CN 2018110439 W CN2018110439 W CN 2018110439W WO 2019210647 A1 WO2019210647 A1 WO 2019210647A1
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layer
wafer
mesa
ohmic contact
contact electrode
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French (fr)
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周幸叶
冯志红
吕元杰
谭鑫
王元刚
宋旭波
李佳
房玉龙
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中国电子科技集团公司第十三研究所
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Priority to DE112018007554.0T priority Critical patent/DE112018007554T5/de
Publication of WO2019210647A1 publication Critical patent/WO2019210647A1/zh
Priority to US17/030,470 priority patent/US11342474B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H01L31/1075Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022416Electrodes for devices characterised by at least one potential jump barrier or surface barrier comprising ring electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264Inorganic materials
    • H01L31/0312Inorganic materials including, apart from doping materials or other impurities, only AIVBIV compounds, e.g. SiC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Definitions

  • the sacrificial layer of the upper surface of the mesa of the wafer is removed.
  • the wafer is, in order from bottom to top, a substrate, a silicon carbide P + layer, and a silicon carbide N layer.
  • the ohmic contact electrode is prepared by removing the ohmic contact electrode region of the wafer after removing the sacrificial layer of the ohmic contact electrode region, including:
  • the wafer after vapor deposition of the metal layer was annealed in a nitrogen atmosphere to prepare an ohmic contact electrode.
  • a sacrificial layer is grown on the upper surface of the wafer after the preparation of the mesa and the side of the mesa, and the sacrificial layer of the ohmic contact electrode region of the wafer is removed, after removing the sacrificial layer of the ohmic contact electrode region.
  • the mesa may be a vertical mesa or an inclined mesa inclined by a predetermined inclination angle.
  • the table top is a table top inclined by a predetermined tilt angle, and the table top tilted by the preset tilt angle can effectively suppress the early breakdown of the device.
  • an ohmic contact electrode 207 is prepared in the ohmic contact electrode region of the wafer.
  • the ohmic contact electrode includes an ohmic contact electrode of the non- mesa region and an ohmic contact electrode of the mesa region, the ohmic contact electrode of the non- mesa region is a P-type electrode, the ohmic contact electrode of the mesa region is an N-type electrode, and the ohmic contact electrode of the non- mesa region It is a ring electrode that surrounds the table top.
  • the passivation layer 208 is epitaxially grown on the wafer by an epitaxial process.
  • the passivation layer 208 is a combination of one or more of a silicon oxide layer, an aluminum oxide layer, a chromium oxide layer, a hafnium oxide layer, and a silicon nitride layer.
  • the passivation layer 208 has a thickness of 50 nm to 500 nm.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Light Receiving Elements (AREA)

Abstract

一种雪崩光电二极管的制备方法,该方法包括:在晶片上制备台面(S101);在晶片上表面和所述台面的侧面生长牺牲层(S102);去除所述晶片欧姆接触电极区的牺牲层(S103);在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极(S104);去除制备欧姆接触电极后的晶片非台面区和台面的侧面的牺牲层,所述非台面区为所述晶片中除所述台面以外的剩余区域(S105);在去除非台面区和台面的侧面的牺牲层后的晶片上表面和台面的侧面生长钝化层(S106);去除所述晶片台面的上表面的钝化层和所述晶片非台面区与所述欧姆接触电极区对应区域的钝化层(S107);去除所述晶片台面的上表面的牺牲层(S108)。该雪崩光电二极管的制备方法能够保护器件的光敏面不受损伤,从而减小器件的漏电流,并提高器件的量子效率和响应度。

Description

雪崩光电二极管的制备方法
本申请申明享有2018年5月4日递交的申请号为201810421573.X、名称为“雪崩光电二极管的制备方法”中国专利申请的优先权,该中国专利申请的整体内容以参考的方式结合在本申请中。
技术领域
本申请属于半导体技术领域,尤其涉及一种雪崩光电二极管的制备方法。
背景技术
基于宽禁带半导体的雪崩光电二极管紫外探测器,具有高增益、高量子效率、低暗电流、体积小、便于集成等优点,在紫外通信、天文研究、火灾监测、高压设备电晕监测等领域有着非常重要的应用前景。为了抑制碳化硅基紫外探测用雪崩光电二极管的表面泄漏电流,通常是通过高温热氧化工艺在器件表面生长氧化硅对器件进行钝化,但是高温热氧化生长氧化硅容易形成碳团簇,从而导致雪崩光电二极管在高温工作条件下邻近击穿电压时的暗电流急剧增大,并且,全覆盖的钝化层会导致雪崩光电二极管的响应度降低。为解决这一问题,常用的方法是刻蚀掉器件光敏区域的钝化层,形成光敏窗口。但是,对钝化层进行刻蚀会使器件光敏区域表面损伤,形成表面缺陷,导致紫外光子被表面缺陷吸收,从而降低器件的量子效率和响应度。
技术问题
有鉴于此,本申请实施例提供了一种雪崩光电二极管的制备方法,以解决现有技术中对钝化层进行刻蚀会使器件光敏区域表面损伤,形成表面缺陷,导致紫外光子被表面缺陷吸收,从而降低器件的量子效率和响应度的问题。
技术解决方案
本申请实施例提供了一种雪崩光电二极管的制备方法,包括:
在晶片上制备台面;
在所述晶片的上表面和所述台面的侧面生长牺牲层;
去除所述晶片的欧姆接触电极区的牺牲层;
在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极;
去除制备欧姆接触电极后的晶片的非台面区和台面侧面的牺牲层,所述非台面区为所述晶片中除所述台面以外的剩余区域;
在去除非台面区和台面侧面的牺牲层后的晶片的上表面和台面的侧面生长钝化层;
去除生长钝化层后的晶片的台面的上表面的钝化层,以及非台面区与所述欧姆接触电极区对应的钝化层;
去除晶片的台面的上表面的牺牲层。
可选的,所述晶片从下至上依次为衬底、碳化硅P +层、碳化硅N层、碳化硅N -层和碳化硅N +层;或
所述晶片从下至上依次为衬底、碳化硅P +层、碳化硅N -层和碳化硅N +层;或
所述晶片从下至上依次为衬底、碳化硅P +层和碳化硅N层。
进一步的,所述在晶片上制备台面,包括:
通过光刻和刻蚀工艺刻蚀晶片的非台面区,刻蚀至所述碳化硅P +层的上表面。
进一步的,所述衬底为碳化硅衬底。
可选的,所述在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极,包括:
在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区蒸镀金属层;
将蒸镀金属层后的晶片在氮气气氛中进行退火处理,制备欧姆接触电极。
可选的,所述台面为具有预设倾斜角度的倾斜台面。
可选的,所述牺牲层为氧化硅层、氧化铝层、氧化铬层、氧化钇层和氮化硅层中的一种或多种的组合。
可选的,所述钝化层为氧化硅层、氧化铝层、氧化铬层、氧化钇层和氮化硅层中的一种或多种的组合。
可选的,所述牺牲层的厚度为10纳米至300纳米;所述钝化层的厚度为50纳米至500纳米。
可选的,所述欧姆接触电极的材料为镍、钛、铝、金中的一种或多种的组合。
有益效果
本申请实施例通过在晶片上制备台面,在制备台面后的晶片上表面和所述台面的侧面生长牺牲层,去除所述晶片欧姆接触电极区的牺牲层,在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极,去除制备欧姆接触电极后的晶片非台面区和台面的侧面的牺牲层,在去除非台面区和台面侧面的牺牲层后的晶片上表面和台面的侧面生长钝化层,去除所述晶片台面上表面的钝化层和所述晶片非台面区与所述欧姆接触电极区对应区域的钝化层,去除所述晶片台面上表面的牺牲层,制备出具有光敏窗口的雪崩光电二极管。本申请实施例通过在晶片上表面生长牺牲层,并分两步将牺牲层去除,在制备光敏窗口时,能够保护器件的光敏面不受损伤,从而减小器件的漏电流,并提高器件的量子效率和响应度。
附图说明
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的雪崩光电二极管的制备方法的实现流程示意图;
图2是本申请实施例提供的雪崩光电二极管的制备方法的结构剖视图。
本申请的实施方式
以下描述中,为了说明而不是为了限定,提出了诸如特定系统结构、技术之类的具体细节,以便透彻理解本申请实施例。然而,本领域的技术人员应当清楚,在没有这些具体细节的其它实施例中也可以实现本申请。在其它情况中,省略对众所周知的系统、装置、电路以及方法的详细说明,以免不必要的细节妨碍本申请的描述。
为了说明本申请所述的技术方案,下面通过具体实施例来进行说明。
请参考图1,雪崩光电二极管的制备方法包括:
步骤S101,在晶片上制备台面。
在本申请实施例中,晶片为碳化硅晶片、氮化镓晶片或其他能制备雪崩光电二极管的晶片。优选的,晶片为碳化硅晶片。碳化硅材料由于具有禁带宽度大、热导性能好、电子饱和漂移速度高、化学性能稳定和低的缺陷密度等优点,是制备紫外光电探测器件的优选材料,具体的,晶片的材料为4H-SiC。
可选的,所述晶片从下至上依次为衬底、碳化硅P +层、碳化硅N层、碳化硅N -层和碳化硅N +层;或所述晶片从下至上依次为衬底、碳化硅P +层、碳化硅N -层和碳化硅N +层;或所述晶片从下至上依次为衬底、碳化硅P +层和碳化硅N层。
在本申请实施例中,碳化硅P +层为重掺杂碳化硅P型层,碳化硅N -层为轻掺杂碳化硅N型层,碳化硅N +层为重掺杂碳化硅N型层。一种实现方式中,晶片从下至上依次为衬底、碳化硅P +层、碳化硅N层、碳化硅N -层和碳化硅N +层,其中,碳化硅P +层的掺杂浓度为1×10 18cm -3至1×10 20cm -3,碳化硅N层的掺杂浓度为1×10 17cm -3至5×10 18 cm -3,碳化硅N -层的掺杂浓度为1×10 15cm -3至1×10 17cm -3,碳化硅N +层的掺杂浓度为1×10 18cm -3至1×10 20cm -3。另一种实现方式中,晶片从下至上依次为衬底、碳化硅P +层、碳化硅N -层和碳化硅N +层,形成PIN结构,其中,碳化硅P +层的掺杂浓度为1×10 18cm -3至1×10 20cm -3,碳化硅N -层的掺杂浓度为1×10 15cm -3至1×10 17cm -3,碳化硅N +层的掺杂浓度为1×10 18cm -3至1×10 20cm -3。另一种实现方式中,晶片从下至上依次为衬底、碳化硅P +层和碳化硅N层,形成PN结构,其中,碳化硅P +层的掺杂浓度为1×10 18cm -3至1×10 20cm -3,碳化硅N层的掺杂浓度为5×10 17cm -3至1×10 20 cm -3
进一步的,步骤S101的实现方式为:通过光刻和刻蚀工艺刻蚀晶片的非台面区,刻蚀至所述碳化硅P +层的上表面。
在本申请实施例中,将晶片分为台面区和非台面区,台面区为制备的台面所在的区域,非台面区为晶片中除台面区以外的区域。如图2所示,在晶片上制备台面的具体方式为:通过光刻工艺,在晶片的台面区覆盖光刻胶,通过刻蚀工艺,依次刻蚀晶片的碳化硅N +层205、碳化硅N -层204和碳化硅N层203,最后去除光刻胶,在晶片上制备出台面。
在本申请实施例中,台面可以为垂直台面也可以为倾斜预设倾斜角度的倾斜台面。优选的,台面为倾斜预设倾斜角度的台面,倾斜预设倾斜角度的台面能够有效抑制器件提前击穿。在制备具有预设倾斜角度的倾斜台面时,通过光刻胶回流工艺进行光刻,在晶片的台面区覆盖具有预设倾斜角度的光刻胶层,再通过刻蚀工艺进行刻蚀。
可选的,所述衬底为碳化硅衬底。
在本申请实施例中,衬底选用碳化硅衬底,通过同质外延工艺在碳化硅衬底上生长碳化硅外延层,能够降低晶格失配,得到高质量的晶片。
步骤S102,在所述晶片的上表面和所述台面的侧面生长牺牲层。
在本申请实施例中,如图2所示,通过外延工艺在晶片的上表面和台面的侧面外延牺牲层206。牺牲层206为氧化硅层、氧化铝层、氧化铬层、氧化钇层和氮化硅层中的一种或多种的组合。牺牲层206的厚度为10纳米至300纳米。
步骤S103,去除所述晶片的欧姆接触电极区的牺牲层。
在本申请实施例中,如图2所示,去除晶片欧姆接触电极区的牺牲层206,欧姆接触电极区为器件的欧姆接触电极所在的区域。步骤S103的具体实现方式为:通过光刻工艺在晶片除欧姆接触电极区以外的区域涂覆光刻胶,通过刻蚀工艺去除欧姆接触电极区的牺牲层206,除欧姆接触电极区以外的区域由于有光刻胶保护,牺牲层不会被去除。
步骤S104,在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极。
可选的,步骤S104的实现方式为:在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区蒸镀金属层;将蒸镀金属层后的晶片在氮气气氛中进行退火处理,制备欧姆接触电极
在本申请实施例中,如图2所示,在晶片的欧姆接触电极区制备欧姆接触电极207。欧姆接触电极包括非台面区的欧姆接触电极和台面区的欧姆接触电极,非台面区的欧姆接触电极为P型电极,台面区的欧姆接触电极为N型电极,且非台面区的欧姆接触电极为环绕台面的环形电极。制备欧姆接触电极的实现方式为:通过光刻工艺在晶片除欧姆接触电极区以外的区域涂覆光刻胶,通过金属蒸发工艺在晶片的上表面蒸镀金属层,去除光刻胶,则光刻胶上表面的金属层一并被去除,最后,将晶片在氮气气氛中进行退火处理,形成欧姆接触电极。
步骤S105,去除制备欧姆接触电极后的晶片的非台面区和台面侧面的牺牲层,所述非台面区为所述晶片中除所述台面以外的剩余区域。
在本申请实施例中,如图2所示,通过刻蚀工艺去除晶片的非台面区的牺牲层206和台面侧面的牺牲层206,只有在晶片的台面上表面剩余有牺牲层206。具体实现方式为:首先通过光刻工艺在晶片的台面上表面涂覆光刻胶层,然后通过刻蚀工艺刻蚀牺牲层206。
步骤S106,在去除非台面区和台面侧面的牺牲层后的晶片的上表面和台面的侧面生长钝化层。
在本申请实施例中,如图2所示,通过外延工艺在晶片上外延钝化层208。钝化层208为氧化硅层、氧化铝层、氧化铬层、氧化钇层和氮化硅层中的一种或多种的组合。钝化层208的厚度为50纳米至500纳米。
步骤S107,去除生长钝化层后的晶片的台面上表面的钝化层,以及非台面区与所述欧姆接触电极区对应的钝化层。
在本申请实施例中,如图2所示,通过光刻工艺和刻蚀工艺去除台面上表面的钝化层和非台面区与欧姆接触电极区对应区域的钝化层,在晶片的台面侧面和非台面区除欧姆接触电极区以外的区域形成钝化层。
步骤S108,去除晶片的台面的上表面的牺牲层。
在本申请实施例中,如图2所示,通过光刻和刻蚀工艺去除晶片台面上表面的牺牲层206,在晶片上形成光敏窗口,制备出具有光敏窗口的雪崩光电二极管。
本申请实施例通过在晶片上制备台面,在制备台面后的晶片上表面和所述台面的侧面生长牺牲层,去除所述晶片欧姆接触电极区的牺牲层,在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极,去除制备欧姆接触电极后的晶片非台面区和台面的侧面的牺牲层,在去除非台面区和台面侧面的牺牲层后的晶片上表面和台面的侧面生长钝化层,去除所述晶片台面上表面的钝化层和所述晶片非台面区与所述欧姆接触电极区对应区域的钝化层,去除所述晶片台面上表面的牺牲层,制备出具有光敏窗口的雪崩光电二极管。本申请实施例通过在晶片上表面生长牺牲层,并分两步将牺牲层去除,在制备光敏窗口时,能够保护器件的光敏面不受损伤,从而减小器件的漏电流,并提高器件的量子效率和响应度。
应理解,上述实施例中各步骤的序号的大小并不意味着执行顺序的先后,各过程的执行顺序应以其功能和内在逻辑确定,而不应对本申请实施例的实施过程构成任何限定。
以上所述实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述实施例对本申请进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围,均应包含在本申请的保护范围之内。

Claims (10)

  1. 一种雪崩光电二极管的制备方法,其特征在于,包括:
    在晶片上制备台面;
    在所述晶片的上表面和所述台面的侧面生长牺牲层;
    去除所述晶片的欧姆接触电极区的牺牲层;
    在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极;
    去除制备欧姆接触电极后的晶片的非台面区和台面侧面的牺牲层,所述非台面区为所述晶片中除所述台面以外的剩余区域;
    在去除非台面区和台面侧面的牺牲层后的晶片的上表面和台面的侧面生长钝化层;
    去除生长钝化层后的晶片的台面的上表面的钝化层,以及非台面区与所述欧姆接触电极区对应的钝化层;
    去除晶片的台面的上表面的牺牲层。
  2. 如权利要求1所述的雪崩光电二极管的制备方法,其特征在于,所述晶片从下至上依次为衬底、碳化硅P +层、碳化硅N层、碳化硅N -层和碳化硅N +层;或
    所述晶片从下至上依次为衬底、碳化硅P +层、碳化硅N -层和碳化硅N +层;或
    所述晶片从下至上依次为衬底、碳化硅P +层和碳化硅N层。
  3. 如权利要求2所述的雪崩光电二极管的制备方法,其特征在于,所述在晶片上制备台面,包括:
    通过光刻和刻蚀工艺刻蚀晶片的非台面区,刻蚀至所述碳化硅P +层的上表面。
  4. 如权利要求2所述的雪崩光电二极管的制备方法,其特征在于,所述衬底为碳化硅衬底。
  5. 如权利要求1所述的雪崩光电二极管的制备方法,其特征在于,所述在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区制备欧姆接触电极,包括:
    在去除欧姆接触电极区牺牲层后的晶片的欧姆接触电极区蒸镀金属层;
    将蒸镀金属层后的晶片在氮气气氛中进行退火处理,制备欧姆接触电极。
  6. 如权利要求1所述的雪崩光电二极管的制备方法,其特征在于,所述台面为倾斜预设倾斜角度的台面。
  7. 如权利要求1所述的雪崩光电二极管的制备方法,其特征在于,所述牺牲层为氧化硅层、氧化铝层、氧化铬层、氧化钇层和氮化硅层中的一种或多种的组合。
  8. 如权利要求1所述的雪崩光电二极管的制备方法,其特征在于,所述钝化层为氧化硅层、氧化铝层、氧化铬层、氧化钇层和氮化硅层中的一种或多种的组合。
  9. 如权利要求1所述的雪崩光电二极管的制备方法,其特征在于,所述牺牲层的厚度为10纳米至300纳米;所述钝化层的厚度为50纳米至500纳米。
  10. 如权利要求1所述的雪崩光电二极管的制备方法,其特征在于,所述欧姆接触电极的材料为镍、钛、铝、金中的一种或多种的组合。
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