WO2019183987A1 - 传输数据的方法和转发设备 - Google Patents

传输数据的方法和转发设备 Download PDF

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Publication number
WO2019183987A1
WO2019183987A1 PCT/CN2018/081495 CN2018081495W WO2019183987A1 WO 2019183987 A1 WO2019183987 A1 WO 2019183987A1 CN 2018081495 W CN2018081495 W CN 2018081495W WO 2019183987 A1 WO2019183987 A1 WO 2019183987A1
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WIPO (PCT)
Prior art keywords
data
segment
transmitted
value
forwarding device
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PCT/CN2018/081495
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English (en)
French (fr)
Inventor
王童童
王心远
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to BR112020019811-0A priority Critical patent/BR112020019811A2/pt
Priority to CN202210006728.XA priority patent/CN114374476A/zh
Priority to JP2020552816A priority patent/JP7087106B2/ja
Priority to CN201880091993.4A priority patent/CN111937329B/zh
Priority to CN202210006674.7A priority patent/CN114374475A/zh
Priority to EP18911405.1A priority patent/EP3767851B1/en
Priority to PCT/CN2018/081495 priority patent/WO2019183987A1/zh
Publication of WO2019183987A1 publication Critical patent/WO2019183987A1/zh
Priority to US17/038,790 priority patent/US11387940B2/en
Priority to JP2022092991A priority patent/JP7346662B2/ja
Priority to US17/850,027 priority patent/US11799587B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0076—Distributed coding, e.g. network coding, involving channel coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0072—Error control for data other than payload data, e.g. control data
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0079—Formats for control data
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/66—Layer 2 routing, e.g. in Ethernet based MAN's
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/50—Network services
    • H04L67/56—Provisioning of proxy services
    • H04L67/563—Data redirection of data network streams
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/324—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the data link layer [OSI layer 2], e.g. HDLC
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/40—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass for recovering from a failure of a protocol instance or entity, e.g. service redundancy protocols, protocol state redundancy or protocol service redirection

Definitions

  • the present application relates to the field of mobile communications and, more particularly, to a method and a forwarding device for transmitting data in the field of communications.
  • Industrial IoT and car networking often include many forwarding devices.
  • the data sent by the source device is forwarded through multiple forwarding devices to reach the destination device.
  • Multiple forwarding devices can form a chained network or a ring network.
  • each forwarding device may introduce some delay.
  • the above delays make the end-to-end delay of the delay not meet the requirements of some application scenarios.
  • Cut-through forwarding technology reduces end-to-end latency.
  • the forwarding device can start transmitting the received segment to the next hop forwarding device without receiving the complete Ethernet frame.
  • Ethernet frame 1 includes segment 1, segment 2, and segment 3.
  • the forwarding device 1 can transmit the segment 1 to the forwarding device 2 when only the segment 1 is received and the segment 2 and the segment 3 have not been received.
  • Ethernet frames may have errors during transmission.
  • the destination device may not detect the Ethernet frame inclusion error by performing a cyclic redundancy check (CRC) check on the received Ethernet frame.
  • CRC cyclic redundancy check
  • the present application provides a method for transmitting data, which helps to improve the success rate of the destination device detecting an error in the Ethernet frame.
  • a method for transmitting data comprising: a first forwarding device receiving a plurality of segments of an Ethernet frame, the plurality of segments including a first segment and a first segment, the first segment including a destination medium An access control (MAC) address field; the first forwarding device determines a frame check sequence (FCS) value of the Ethernet frame according to the plurality of segments; the first forwarding device determines the based on the FCS value An error occurs in the Ethernet frame.
  • FCS frame check sequence
  • the first forwarding device modifies the first segment to a second segment in response to the erroneous determination of the Ethernet frame, the first segment including the first type indication information and the The second segment includes the second type of indication information and the second to-be-transmitted data, the first type of indication information is used to indicate the type of the first data to be transmitted, and the second type of indication information And indicating that the type of the second to-be-transmitted data is a control word, the value of the first to-be-transmitted data is not equal to a value of the second to-be-transmitted data, and the second to-be-transmitted data is used to indicate that the An error occurs in the Ethernet frame; the first forwarding device sends the second fragment to the destination device, where the value of the destination MAC address field is equal to the MAC address of the destination device, and the MAC address of the destination device is not equal to The MAC address of the first forwarding device.
  • the forwarding device performs an CRC check on the Ethernet frame to find that the Ethernet frame is faulty.
  • the forwarding device modifies the segment of the received Ethernet frame, so that the modified segment (second segment) indicates that the Ethernet frame has an error.
  • the second segment can contain an error control word.
  • the error control word is used to indicate that an error has occurred in the Ethernet frame.
  • the forwarding device sends the second segment to the destination device.
  • the above causes the PHY circuit of the destination device to determine that an error has occurred in the received Ethernet frame based on the second segment.
  • the PHY circuit of the destination device includes a PCS receiver.
  • the second segment contains an error control word.
  • the PCS receiver determines that an Ethernet frame has an error based on the error control word. For example, the PCS receiver enters the RX_E state based on the error control word. The PCS receiver in the RX_E state generates a signal. The signal contains an RxC field with a value equal to one and an RxD field with a value equal to 0xFE. The PCS receiver transmits the signal to the MAC circuit of the destination device through the MII. The MAC circuit of the destination device can determine that an Ethernet frame has an error based on the signal. Furthermore, the MAC circuit of the destination device can discard the Ethernet frame. That is to say, the MAC circuit of the destination device does not need to perform CRC check on the received Ethernet frame, so that an error occurs in the Ethernet frame.
  • the above technical solution helps to improve the success rate of the Ethernet frame containing the error in the Ethernet frame by determining the CRC of the Ethernet frame to determine the error of the Ethernet frame.
  • the characteristics of the CRC algorithm determine that when the Ethernet frame contains fewer errors, the CRC check is easier to detect the error of the Ethernet frame.
  • the CRC check may not detect the error of the Ethernet frame.
  • the process of transmitting Ethernet frames from the source device to the destination device may introduce more errors. In particular, when an Ethernet frame needs to be forwarded via multiple forwarding devices, there is a high possibility of occurrence of many errors.
  • the forwarding device may recalculate the FCS value of the Ethernet frame and carry the recalculated FCS value in the FCS field of the Ethernet frame.
  • the forwarding device may recalculate the FCS value of the Ethernet frame, the domain outside the FCS domain in the Ethernet frame is taken as a parameter. The above means that if an error occurs in the Ethernet frame, these errors will also be used as parameters for recalculating the FCS value of the Ethernet frame. This makes it impossible for the next hop forwarding device or the destination device to detect that the received Ethernet frame contains an error through the CRC check.
  • the PHY circuit of the destination device may determine that an Ethernet frame has an error based on the modified domain.
  • the destination device does not need to rely on the CRC check to determine if an Ethernet frame has an error. Therefore, the technical solution of the present application helps to improve the destination device to detect the success rate of the error contained in the Ethernet frame. .
  • the first forwarding device in response to the erroneous determination that the Ethernet frame is incorrect, modifying the first segment to the second segment includes: When the value of the first type indication information is not equal to the value of the second type indication information, the first forwarding device sets the first type indication information in the first fragment and the first to The transmission data is respectively modified into the second type indication information and the second to-be-transmitted data; or, when the value of the first type indication information is equal to the value of the second type indication information, the first forwarding The device modifies the first to-be-transmitted data in the first segment to the second to-be-transmitted data.
  • the modified value of the data to be transmitted can be used to indicate to the destination device that an error occurs in the transmission of the Ethernet frame, so that the destination device receives the Ethernet frame according to the modified first segment (second segment). , to determine that the Ethernet frame has an error during transmission.
  • the second segment includes an RxC domain and an RxD domain, where the RxC domain is configured to carry the second type indication information, where the RxD domain is The value is the second data to be transmitted.
  • the value of the RxC field Indicates, by using the value of the RxC field, the value of the RxD field to the control byte, and causes the value of the RxD field to indicate to the destination device that the Ethernet frame has an error during transmission, so that the destination device determines the RxD domain.
  • the value is a control byte
  • the value of the control code of the RxD domain is further checked, and finally, according to the value of the control code of the RxD domain, it is determined that an error occurs in the transmission of the Ethernet frame, and the Ethernet is discarded. frame.
  • the value of the RxC field is 1, and the value of the RxD field is equal to 0xFE.
  • the second segment includes a synchronization header field, a block type domain, and a plurality of to-be-transmitted data, where the plurality of to-be-transmitted data includes the first
  • the second type of indication information includes the synchronization header field and the block type field, and the second type indication information is used to indicate that the type of the second data to be transmitted is a control word,
  • the second type indication information is further used to indicate a location of the second to-be-transmitted data in the plurality of to-be-transmitted data.
  • the value of the data to be transmitted corresponding to the location is further checked, and finally, according to the value of the data to be transmitted corresponding to the location, it is determined that an error occurs in the transmission of the Ethernet frame, and then the Ethernet is discarded. frame.
  • the value of the second data to be transmitted is equal to 0x1e.
  • the data to be transmitted in the first segment includes an FCS domain, or the first segment does not include an FCS domain.
  • the first forwarding device determines that the Ethernet frame has an error based on the FCS value, including: the FCS value is not equal to the When the value of the FCS field is reached, the first forwarding device determines that an error has occurred in the Ethernet frame.
  • a second aspect provides a method for transmitting data, including: a second forwarding device receives a first segment and a first segment, where the first segment includes type indication information and data to be transmitted, and the type indication information is used to indicate The type of the data to be transmitted, the type of the data to be transmitted is a control word, the data to be transmitted is used to indicate that an error occurs in the Ethernet frame, and the Ethernet frame includes the first fragment, the first The fragment includes a destination MAC address field, the value of the destination MAC address field is equal to the MAC address of the destination device, the MAC address of the second forwarding device is not equal to the value of the destination MAC address field, and the second forwarding device is The destination device sends the first segment.
  • the forwarding device performs an CRC check on the Ethernet frame to find that the Ethernet frame is faulty.
  • the forwarding device modifies the segment of the received Ethernet frame, so that the modified segment (second segment) indicates that the Ethernet frame has an error.
  • the second segment can contain an error control word.
  • the error control word is used to indicate that an error has occurred in the Ethernet frame.
  • the forwarding device sends the second segment to the destination device.
  • the above causes the PHY circuit of the destination device to determine that an error has occurred in the received Ethernet frame based on the second segment.
  • the PHY circuit of the destination device includes a PCS receiver.
  • the second segment contains an error control word.
  • the PCS receiver determines that an Ethernet frame has an error based on the error control word. For example, the PCS receiver enters the RX_E state based on the error control word. The PCS receiver in the RX_E state generates a signal. The signal contains an RxC field with a value equal to one and an RxD field with a value equal to 0xFE. The PCS receiver transmits the signal to the MAC circuit of the destination device through the MII. The MAC circuit of the destination device can determine that an Ethernet frame has an error based on the signal. Furthermore, the MAC circuit of the destination device can discard the Ethernet frame. That is to say, the MAC circuit of the destination device does not need to perform CRC check on the received Ethernet frame, so that an error occurs in the Ethernet frame.
  • the above technical solution helps to improve the success rate of the Ethernet frame containing the error in the Ethernet frame by determining the CRC of the Ethernet frame to determine the error of the Ethernet frame.
  • the characteristics of the CRC algorithm determine that when the Ethernet frame contains fewer errors, the CRC check is easier to detect the error of the Ethernet frame.
  • the CRC check may not detect the error of the Ethernet frame.
  • the process of transmitting Ethernet frames from the source device to the destination device may introduce more errors. In particular, when an Ethernet frame needs to be forwarded via multiple forwarding devices, there is a high possibility of occurrence of many errors.
  • the forwarding device may recalculate the FCS value of the Ethernet frame and carry the recalculated FCS value in the FCS field of the Ethernet frame.
  • the forwarding device may recalculate the FCS value of the Ethernet frame, the domain outside the FCS domain in the Ethernet frame is taken as a parameter. The above means that if an error occurs in the Ethernet frame, these errors will also be used as parameters for recalculating the FCS value of the Ethernet frame. This makes it impossible for the next hop forwarding device or the destination device to detect that the received Ethernet frame contains an error through the CRC check.
  • the PHY circuit of the destination device may determine that an Ethernet frame has an error based on the modified domain.
  • the destination device does not need to rely on the CRC check to determine if an Ethernet frame has an error. Therefore, the technical solution of the present application helps to improve the destination device to detect the success rate of the error contained in the Ethernet frame.
  • the Ethernet frame further includes a second segment, and before the second forwarding device receives the first segment, The Ethernet frame performs a CRC check to determine that an error has occurred in the Ethernet frame, and the second segment is modified to the first segment.
  • the method further includes: the second forwarding device determines, according to the destination MAC address field, that a MAC address of the second forwarding device is not equal to a value of the destination MAC address field; the second forwarding The sending, by the device, the first fragment to the destination device includes: determining, by the second forwarding device, that the MAC address of the second forwarding device is not equal to a value of the destination MAC address field, the second forwarding device Sending the first segment to the destination device.
  • the second forwarding device includes a physical coding sublayer receiver PCS receiver, and after the second forwarding device receives the first segment, the The method also includes, in response to the data to be transmitted, the PCS receiver entering an RX_E state.
  • the first segment includes an RxC domain and an RxD domain, where the RxC domain carries the type indication information, where the RxD domain carries the to-be-transmitted data.
  • the value of the RxC field Indicates, by using the value of the RxC field, the value of the RxD field to the control byte, and causes the value of the RxD field to indicate to the destination device that the Ethernet frame has an error during transmission, so that the destination device determines the RxD domain.
  • the value is a control byte
  • the value of the control code of the RxD domain is further checked, and finally, according to the value of the control code of the RxD domain, it is determined that an error occurs in the transmission of the Ethernet frame, and the Ethernet is discarded. frame.
  • the value of the RxC field is equal to 1, and the value of the RxD field is equal to 0xFE.
  • the first segment includes a synchronization header field, a block type domain, and a plurality of to-be-transmitted data, where the plurality of to-be-transmitted data includes the to-be-transmitted data Transmitting data
  • the type indication information includes the synchronization header field and the block type field
  • the type indication information is used to indicate that the type of the data to be transmitted is a control word
  • the type indication information is further used to indicate Determining the location of the transmission data in the plurality of data to be transmitted.
  • the value of the data to be transmitted corresponding to the location is further checked, and finally, according to the value of the data to be transmitted corresponding to the location, it is determined that an error occurs in the transmission of the Ethernet frame, and then the Ethernet is discarded. frame.
  • the value of the synchronization header field is equal to 0x10, and the value of the data to be transmitted is equal to 0x1E.
  • the data to be transmitted in the second segment includes a frame check sequence FCS field of an Ethernet frame, or the second segment does not include an Ethernet The frame check sequence FCS field of the net frame.
  • a forwarding device comprising means for performing the steps of the method of transmitting data in the first aspect and the implementations of the first aspect described above.
  • a fourth aspect provides a forwarding device, including a receiving circuit, a processing circuit, and a transmitting circuit, where the receiving circuit is configured to receive multiple segments of an Ethernet frame, where the multiple segments include a first segment and a first segment
  • the first segment includes a destination media access control MAC address field; processing circuitry for determining a frame check sequence FCS value of the Ethernet frame according to the plurality of segments; determining the Ethernet based on the FCS value An error occurs in the frame; and, in response to the erroneous determination of the Ethernet frame, the first segment is modified into a second segment, the first segment including the first type indication information and the first data to be transmitted,
  • the second segment includes second type indication information and a second data to be transmitted, the first type indication information is used to indicate a type of the first data to be transmitted, and the second type indication information is used to indicate the
  • the type of the second data to be transmitted is a control word, the value of the first data to be transmitted is not equal to the value of the second data to be transmitted, and
  • a forwarding device comprising a processor and a memory, the processor being configured to invoke a program stored by the memory to perform a first aspect or a possible implementation manner of any aspect of the first aspect The method of transferring data.
  • a computer program product comprising: computer program code, when the computer program code is run by a processing module, a communication module or a processor, and a transceiver of the forwarding device, causing the forwarding device to perform the above A method of transmitting data in any of the first aspect and its various implementations.
  • a computer readable storage medium in a seventh aspect, storing a program causing the forwarding device to perform the method of transmitting data in any of the first aspect and various implementations thereof.
  • a chip system comprising a memory and a processor, the memory for storing a computer program, the processor for calling and running the computer program from the memory, such that the forwarding device mounted with the chip system performs the above A method of transmitting data in any of the first aspect and its various implementations.
  • a forwarding apparatus comprising means for performing the steps of the method of transmitting data in the implementations of the second aspect and the second aspect described above.
  • a tenth aspect provides a forwarding device, including a receiving circuit and a transmitting circuit, the receiving circuit configured to receive a first segment and a first segment, where the first segment includes type indication information and data to be transmitted, the type The indication information is used to indicate the type of the data to be transmitted, the type of the data to be transmitted is a control word, the data to be transmitted is used to indicate that an error occurs in an Ethernet frame, and the Ethernet frame includes the first fragment.
  • the first fragment includes a destination MAC address field, the value of the destination MAC address field is equal to the MAC address of the destination device, and the MAC address of the second forwarding device is not equal to the value of the destination MAC address field;
  • a circuit configured to send the first segment to the destination device.
  • a forwarding device comprising a processor and a memory, the processor for invoking a program stored by the memory to perform a possible implementation of any of the second aspect or the second aspect The method of transferring data in the way.
  • a computer program product comprising: computer program code, when the computer program code is executed by a processing module, a communication module or a processor of the destination device, and a transceiver, causing the destination device to execute A method of transmitting data in any of the above second aspects and various implementations thereof.
  • a thirteenth aspect a computer readable storage medium storing a program for causing a destination device to perform the method of transmitting data according to any of the second aspect and various implementations thereof .
  • a chip system comprising a memory and a processor for storing a computer program for calling and running the computer program from the memory such that the destination device on which the chip system is installed executes A method of transmitting data in any of the above second aspects and various implementations thereof.
  • a system comprising the forwarding device of the third aspect, and the forwarding device of the ninth aspect, or the system includes the forwarding device of the fourth aspect and the forwarding device of the tenth aspect, or The system includes the forwarding device of the fifth aspect and the forwarding device of the eleventh aspect.
  • FIG. 1 is a schematic block diagram of an Ethernet system 100 suitable for use in an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a forwarding device or a destination device according to an embodiment of the present disclosure.
  • FIG. 3 is a schematic flowchart of a method for transmitting data according to an embodiment of the present application.
  • FIG. 4 is another schematic flowchart of a method for transmitting data according to an embodiment of the present application.
  • FIG. 5 is a schematic block diagram of a forwarding device according to an embodiment of the present application.
  • FIG. 6 is another schematic block diagram of a forwarding device according to an embodiment of the present application.
  • FIG. 7 is a schematic block diagram of a forwarding device according to an embodiment of the present application.
  • FIG. 8 is another schematic block diagram of a forwarding device according to an embodiment of the present application.
  • the PHY circuit in this application refers to a circuit for performing the functions of the physical layer defined by the Ethernet standard.
  • the Ethernet standard can be an Ethernet standard published by the IEEE.
  • the Ethernet standard can be IEEE802.3-2015.
  • the functions of the physical layer may include the functions of a physical coding sublayer (PCS) and the functions of a physical medium attachment (PMA) sublayer.
  • PCS physical coding sublayer
  • PMA physical medium attachment
  • the MAC circuit in the present application refers to a circuit for performing the function of media access control (MAC) defined by the Ethernet standard.
  • the Ethernet standard can be an Ethernet standard published by the IEEE.
  • the Ethernet standard can be IEEE802.3-2015.
  • the function of the MAC is located at the data link layer.
  • the function of logical link control (LLC) is also located at the data link layer.
  • the MAC circuit and the PHY circuit can communicate through a media independent interface (MII).
  • MII can be a ten gigabit media independent interface (XGMII).
  • XGMII ten gigabit media independent interface
  • the functionality of the physical layer may also include the functionality of a reconciliation sublayer (RS).
  • the MAC circuit can communicate with the PHY circuit via the RS circuit and MII.
  • the RS circuit refers to a circuit for performing the function of the RS.
  • the Ethernet frame in this application includes a frame header, a payload, and an FCS domain.
  • the frame header starts from the destination MAC address field and ends in an Ethernet type (Ethertype) field or a length (length) field.
  • the frame header does not include a preamble field and a Start of frame delimiter (SFD) field.
  • Ethernet frames do not include preamble fields and SFD fields.
  • the FCS field is used to perform CRC check on Ethernet frames.
  • the fields outside the FCS field in the Ethernet frame are the parameters that need to be used to calculate the FCS value of the Ethernet frame. When the calculated FCS value is not equal to the value of the FCS field, an Ethernet frame is considered to have an error.
  • For the format of the Ethernet frame refer to the description of IEEE802.3.
  • a fragment in this application refers to a fragment of an Ethernet frame. After the Ethernet frame is encoded by the physical layer, a block can be obtained.
  • the fragment in the present application may be a block obtained by physical layer encoding processing. For example, the fragment can be a 64B/66B block.
  • the PHY circuit transmits an Ethernet frame to the MAC circuit through the MII
  • the RxC domain and the RxD domain can be transmitted to the MAC circuit through the MII.
  • the fragments in this application may also be an RxC domain and an RxD domain associated with the RxC domain.
  • IEEE802.3 For the meaning of the technical terms involved in the present application and specific implementation manners, reference may be made to the description of IEEE802.3. For example, reference can be made to the description of IEEE802.3-2015.
  • the above technical terms include but are not limited to a control character, a data character, a control octet, a data octet, a control code, and a synchronization header.
  • Sync header 64B/66B block (64B/66B block), control block, data block, PCS receiver, block type field, receive control ( Receive control, RxC) domain and receive data (RxD) domain.
  • the Ethernet system 100 includes a source device 101, a forwarding device 102, a forwarding device 103, and a destination device 104.
  • the source device 101, the forwarding device 102, the forwarding device 103, and the destination device 104 are serially connected.
  • the Ethernet frame to be transmitted is sent by the source device 101, passes through the forwarding device 102 and the forwarding device 103, and finally reaches the destination device 104.
  • FIG. 1 only shows two forwarding devices: the forwarding device 102 and the forwarding device 103.
  • at least 3 forwarding devices may be included between the source device 101 and the destination device 104.
  • the Ethernet frame to be transmitted is sent by the source device 101, forwarded via at least three forwarding devices, and finally reaches the destination device 104.
  • the Ethernet system 100 is applied in a through-transfer Cut-through application scenario.
  • the Cut-through technique will be described below in conjunction with the Ethernet system 100 of FIG.
  • the source device 101 issues an Ethernet frame, and when the forwarding device 102 receives a portion of the Ethernet frame instead of all, it forwards the received portion of the Ethernet frame.
  • a portion of an Ethernet frame can be a fragment of an Ethernet frame.
  • the forwarding device there is no need to wait until a complete Ethernet frame is received before forwarding. The above solution causes the Ethernet frame to pass through the forwarding device to the destination device 104 with a small delay.
  • FIG. 2 shows a possible structural diagram of the forwarding device 102 or the forwarding device 103 shown in FIG. 1.
  • the forwarding device includes a Physical Layer (PHY) circuit 201, a MAC circuit 202, a MAC circuit 203, and a PHY circuit 204.
  • PHY circuit 201 and MAC circuit 202 can be included in the same chip.
  • PHY circuit 201 and MAC circuit 202 can each be in different chips.
  • the forwarding device may also include other components.
  • the forwarding device can also include a network processor (not shown).
  • the network processor can be implemented by an ASIC or an FPGA.
  • the receive port of the network processor is coupled to the transmit port of the MAC circuit 202.
  • the transmit port of the network processor is coupled to the transmit port of the MAC circuit 203.
  • the network processor can obtain the destination MAC address from the Ethernet frame provided by the MAC circuit 202.
  • the network processor may look up the destination port for forwarding the Ethernet frame in the MAC table with the destination MAC address as the lookup key.
  • the transmit port includes a MAC circuit 203 and a PHY circuit 204.
  • the network processor can provide an Ethernet frame to the MAC circuit 203 such that the PHY circuit 204 transmits an Ethernet frame to the next hop device.
  • the PHY circuit 201 and the MAC circuit 202 are configured to receive a segment sent by a neighboring device (for example, a source device or a forwarding device), and the MAC circuit 203 and the PHY circuit 204 are configured to send the segment received from the MAC circuit 202. To the next neighbor (for example, the next hop forwarding device or destination device).
  • a neighboring device for example, a source device or a forwarding device
  • the MAC circuit 203 and the PHY circuit 204 are configured to send the segment received from the MAC circuit 202.
  • the next neighbor for example, the next hop forwarding device or destination device.
  • the PHY circuit 201 can send the received segments to the MAC circuit 202 in two transmission formats, which are respectively described below:
  • the PHY circuit 201 parses the received bit stream, and obtains a plurality of segments including 66 bits from the bit stream.
  • Each segment containing 66 bits includes a 2-bit sync header field, a 1-byte block type field, and n bytes (n ⁇ 7) of data to be transmitted.
  • the 2-bit synchronization header field is used to indicate whether the n-byte data to be transmitted in the 66-bit fragment contains data to be transmitted of the type control word, and the block type field is used to indicate the n bytes.
  • the type of data to be transmitted in the data to be transmitted is the position of the data to be transmitted of the control word in the n bytes of data to be transmitted.
  • the 66-bit fragment in this application may be a 64B/66B block.
  • the data to be transmitted in this application may be an 8-bit data byte.
  • the data to be transmitted in this application may also be a 7-bit control word.
  • the PHY circuit 201 formats the 66-bit segment before transmitting the 66-bit segment to the MAC circuit 202. Specifically, the 66-bit fragment is converted into a fragment conforming to a media independent interface (MII) format. The 66-bit segment is converted to 8 segments by format conversion. Each segment includes a 1-bit RxC field and an 8-bit RxD field. And the value of the RxC field in each segment indicates the type of the RxD field in the segment, for example, the value of the RxC field can indicate that the type of the value of the RxD field is a control word or a data word. The PHY circuit 201 transmits the eight segments to the MAC circuit 202 in a serial or parallel transmission method.
  • MII media independent interface
  • the PHY circuit 201 parses the received bit stream, and obtains a plurality of segments including 66 bits from the bit stream.
  • Each 66-bit segment contains a 2-bit sync header field, a 1-byte block type field, and n bytes of data to be transmitted.
  • the 2-bit synchronization header field is used to indicate whether the n-byte data to be transmitted in the 66-bit fragment contains data to be transmitted of the type control word.
  • the block type field is used to indicate the location of the n-byte data to be transmitted in the n-byte data to be transmitted in the n-byte data to be transmitted.
  • the PHY circuit 201 does not perform format conversion on the 66-bit segment before transmitting the 66-bit segment to the MAC circuit 202, but directly to the MAC circuit. 202 sends the 66-bit segment.
  • FIG. 3 is a schematic flowchart of a method 300 for transmitting data according to an embodiment of the present application, where the method includes 301 to 304.
  • the method 300 can be performed by the forwarding device 102 shown in FIG. 1 or 2.
  • the first forwarding device receives multiple segments of an Ethernet frame, where the multiple segments include a first segment and a first segment, where the first segment includes a destination media access control MAC address field.
  • Ethernet frames can be transmitted to the forwarding device 102 through the transmission medium.
  • Ethernet frames can be transmitted in the form of a bit stream in a transmission medium.
  • the PHY circuit 201 in the forwarding device 102 can receive the bitstream through the transmission medium. The plurality of segments are included in the bitstream.
  • the PHY circuit 201 can be located in the receive Ethernet port of the forwarding device 102.
  • the receiving Ethernet port may also include a MAC circuit 202.
  • the transmission medium can be a cable or an optical fiber.
  • the first forwarding device determines an FCS value of the Ethernet frame according to the multiple segments.
  • the PHY circuit 201 of the forwarding device 102 receives from the previous device (eg, the previous device may be the source device 101 or is located between the source device 101 and the forwarding device 102).
  • the other forwarding device transmits a plurality of segments of the Ethernet frame and transmits the plurality of segments to the MAC circuit 202.
  • the plurality of segments includes a first segment of the Ethernet frame and a first segment.
  • the first segment is any one of the plurality of segments except the first segment.
  • the first fragment includes the destination MAC address field.
  • the value of the destination MAC address field is equal to the MAC address of the destination device 103.
  • the MAC circuit 202 calculates the FCS value of the Ethernet frame based on the received plurality of segments from the PHY circuit 201.
  • the MAC circuit 202 can calculate the FCS value of the Ethernet frame using a CRC algorithm.
  • the CRC algorithm can be a CRC32 algorithm.
  • the multiple segments arrive at the MAC circuit 202 of the forwarding device 102 at different times.
  • the MAC circuit 202 may begin to calculate the FCS value of the Ethernet frame upon receiving the first of the plurality of segments. After the forwarding device 102 receives all segments (eg, the plurality of segments) of the Ethernet frame, the MAC circuit 202 can complete the calculation of the FCS value, thereby determining the FCS value of the Ethernet frame. As can be seen from the above description, the MAC circuit 202 needs to use all segments of the Ethernet frame when calculating the FCS value of the Ethernet frame. Each segment participates in the calculation of the FCS value and provides parameters for the calculation of the FCS value.
  • the MAC circuit 202 can forward the segment. Alternatively, the MAC circuit 202 may also save the segment and then forward the segment. . When the MAC circuit 202 forwards a segment of an Ethernet frame, it can forward it according to the principle of first in, first out. That is, the earlier received segment needs to be forwarded earlier than the later received segment.
  • the first segment in the embodiment of the present application includes six RxC/RxD pairs.
  • the RxC/RxD pair in this application refers to a signal consisting of one RxC domain and one RxD domain.
  • One RxC field contains 1 bit.
  • One RxD field contains 8 bits.
  • the RxC domain in the RxC/RxD pair has a corresponding relationship with the RxD domain. Specifically, the RxC field in the RxC/RxD pair is used to indicate the type of the RxD field in the RxC/RxD pair. Therefore, the first fragment contains 6 RxC/RxD pairs.
  • the first fragment contains a 6-bit RxC field and a 6-byte RxD field.
  • the 6-byte RxD field is used to carry the value of the destination MAC address field. Except for the first fragment, all other fragments include an RxC/RxD pair.
  • each of the plurality of segments includes type indication information and data to be transmitted, and the value of the type indication information is used to indicate whether the type of the data to be transmitted is a control word.
  • the first forwarding device determines that an error occurs in the Ethernet frame based on the FCS value.
  • the MAC circuit 202 determines that the Ethernet frame has an error during transmission according to the FCS value of the Ethernet frame determined in 301.
  • the FCS field is included in the Ethernet frame.
  • the first forwarding device may determine that an error has occurred in the Ethernet frame.
  • Ethernet frames may be interfered with and an error occurs.
  • Ethernet frames may be subject to electromagnetic interference during transmission.
  • the error of the Ethernet frame may be that the value of one bit or multiple bits included in the Ethernet frame has changed. For example, the value of one bit in an Ethernet frame changes from 0 to 1. Or, the value of one bit in the Ethernet frame changes from 1 to 0.
  • the MAC circuit 202 will determine the FCS value of the determined Ethernet frame and the value of the FCS field included in the last segment. Compare.
  • the MAC circuit 202 determines that the Ethernet frame has an error during transmission.
  • the MAC circuit 202 determines that the Ethernet frame has not occurred an error during transmission.
  • the MAC circuit 202 calculates the FCS value of the Ethernet frame according to the received multiple segments from the PHY circuit 201, the plurality of segments does not include the last segment.
  • the first forwarding device modifies the first segment to a second segment, where the second segment includes second type indication information and second to-be-transmitted data, in response to the erroneous determination of the Ethernet frame.
  • the type indication information is used to indicate that the type of the second data to be transmitted is a control word, and the second data to be transmitted is used to indicate that an error occurs in the Ethernet frame.
  • the first segment includes first type indication information and a first to-be-transmitted data, where the first type indication information is used to indicate a type of the first to-be-transmitted data, where the value of the first to-be-transmitted data is not equal to the second The value of the data to be transmitted.
  • the MAC circuit 202 determines that an error occurs in the transmission of the Ethernet frame, the MAC circuit 202 treats one of the at least two segments of the plurality of to-be-segments that have not been transmitted (for example, The first segment is modified to obtain the second segment.
  • the type of the data to be transmitted (for example, the second data to be transmitted) in the second segment indicated by the type indication information (for example, the second type indication information) in the second segment is a control word
  • the value of the second to-be-transmitted data is not equal to the value of the data to be transmitted (for example, the first to-be-transmitted data) in the first segment
  • the type indication information (for example, the first type indication information) in the first segment is used for Indicates that the type of the first data to be transmitted is a control word or data.
  • the MAC circuit 202 When the value of the first type indication information is not equal to the value of the second type information, that is, the type of the first data to be transmitted indicated by the first type indication information is data, the MAC circuit 202 respectively determines the first type.
  • the indication information is modified with the first to-be-transmitted data, the value of the first type indication information is modified to the value of the second type indication information, and the value of the first to-be-transmitted data is modified to the second to-be-transmitted data.
  • the MAC circuit 202 When the value of the first type indication information is equal to the value of the second type information, that is, the type of the first data to be transmitted indicated by the first type indication information is a control word, the MAC circuit 202 only treats the first to The data is modified to modify the value of the first data to be transmitted to the value of the second data to be transmitted, thereby obtaining the second segment.
  • the first forwarding device sends the second segment to the destination device.
  • the value of the destination MAC address field is equal to the MAC address of the destination device, and the MAC address of the destination device is not equal to the MAC address of the first forwarding device.
  • the MAC circuit 202 may send the second segment to the destination device 104, where the destination MAC address is equal to the MAC address of the destination device 104, and the MAC address of the destination device 104 is not equal to The MAC address of the forwarding device 102.
  • the first forwarding device transmits the second segment to the destination device via other forwarding devices.
  • the other forwarding device may be a forwarding device or multiple forwarding devices. Other forwarding devices do not modify the second segment.
  • the other forwarding device transparently transmits the second segment.
  • the first forwarding device directly transmits the second segment to the destination device. The second segment does not need to reach the destination device via other forwarding devices.
  • the MAC circuit 202 first transmits the second segment to the MAC circuit 203, which transmits the second segment to the PHY circuit 204, and finally the PHY circuit 204 transmits the second segment to the destination device 104.
  • the first segment is any segment of the plurality of segments of the Ethernet frame except the first segment, for example, the first segment is the last segment of the plurality of segments of the Ethernet frame, At this time, the first segment includes the FCS domain.
  • the second segment includes an RxC domain and an RxD domain, and the value of the RxC domain is used to carry the second type. Indicates that the value of the RxD field is the second data to be transmitted.
  • the value of the RxC field when the value of the RxC field is 0x0, it indicates that the data to be transmitted is a data byte, that is, the type indicating the data to be transmitted is a data word.
  • the value of the RxC field is 0x1
  • it indicates that the data to be transmitted is a control byte, that is, the type indicating that the data to be transmitted is a control word
  • the value of the RxD field is 0xFE, indicating that the Ethernet frame is in the transmission process. An error has occurred in the middle.
  • the MAC circuit 202 of the forwarding device 102 needs to modify the value of the first type indication information to 1, and the first data to be transmitted is to be transmitted.
  • the value of the second fragment is changed to 0xFE, so that the value of the second type indication information of the second fragment is 1 and the value of the second data to be transmitted is 0xFE.
  • the destination device 104 receives the second segment, according to the value (0x1) of the RxC field in the second segment, the RxD field is determined to be a control byte, and the value of the data byte of the RxD field is further viewed ( 0xFE), finally determining that a new Ethernet frame has an error during transmission based on the value of the data byte of the RxD field.
  • the MAC circuit 202 of the forwarding device 102 only needs to modify the value of the first data to be transmitted to 0xFE, thereby obtaining the second fragment. That is, the value of the second type indication information of the second fragment is 1 and the value of the second data to be transmitted is 0xFE.
  • the destination device 104 receives the second segment, according to the value (0x1) of the RxC field in the second segment, the RxD field is determined to be a control byte, and the value of the data byte of the RxD field is further viewed ( 0xFE), finally determining that a new Ethernet frame has an error during transmission based on the value of the data byte of the RxD field.
  • the second segment is obtained by modifying the first type indication information and/or the first to-be-transmitted data in the first segment, so that the next forwarding device determines, according to the second segment, that the Ethernet frame is in the An error occurred during the transfer.
  • the destination device 104 may further view the second data to be transmitted.
  • the value of the data is determined based on the value of the second data to be transmitted to determine that the Ethernet frame has an error during transmission. Therefore, when the type of the second to-be-transmitted data indicated by the value of the second type indication information is data, the MAC circuit 202 needs to simultaneously perform the value of the second type indication information and the value of the second to-be-transmitted data. Modifying; when the type of the second data to be transmitted indicated by the value of the second type indication information is a control word, the MAC circuit 202 only needs to modify the value of the second data to be transmitted.
  • the second segment When the PHY circuit 201 transmits to the MAC circuit 202 that the format used by the first segment conforms to the above-described transmission format 2, the second segment includes a synchronization header field, a block type field, and n (n ⁇ 7) bytes of to-be.
  • the second type of indication information includes the synchronization header field and the block type field, and the second type indication information is used to indicate the second to-be-received data.
  • the type of the transmission data is a control word, and the second type indication information is further used to indicate the location of the second to-be-transmitted data in the plurality of to-be-transmitted data.
  • the format of the first segment received by the MAC circuit 202 from the PHY circuit 201 conforms to the above-described transmission format 2. That is, the second segment includes a 2-bit sync header field, a 1-byte block type field, and n bytes of data to be transmitted, and the second indication information is used to indicate that the type of the second data to be transmitted is a control word, The second type indication information is further used to indicate a location of the second to-be-transmitted data in the plurality of to-be-transmitted data.
  • the specific implementation is: the synchronization header field indicates whether the n-byte data to be transmitted includes data to be transmitted of the type control word, and the block type field is used to indicate that the second data to be transmitted is in the n bytes. The location in the data to be transferred.
  • the synchronization header field when the value of the synchronization header field is 01, it indicates that the synchronization header includes 8 bytes of data to be transmitted, and the 8 bytes of data to be transmitted. All of the data bytes, the 8 data bytes are D 0 to D 7 respectively ; when the value of the synchronization header field is 10, and the value of the block type field is 0x1e, it indicates that the block type field includes 8 after Bytes of data to be transmitted, and the 8 bytes of data to be transmitted are control codes, and the 8 control codes are respectively C 0 to C 7 , and the value of any one of the C 0 to C 7 control codes When it is 0x1e, it indicates that the Ethernet frame has an error during transmission; when the value of the synchronization header field is 10, and the value of the block type field is 0x33, it indicates that the block type field includes 8 bytes after the transmission.
  • Data to be transmitted, and the 8 data to be transmitted includes 4 control codes and 3 data bytes, and the 4 control codes are respectively C 0 to C 3 , and the 3 data bytes are D 5 to D 7 respectively.
  • the value of any one of C 0 to C 3 is 0x1e, it indicates that an error has occurred in the transmission of the Ethernet frame.
  • the MAC circuit 202 of the forwarding device 102 needs to modify the value of the first type indication information to 10, and 8 subsequent to the synchronization header field.
  • D 3 of the data bytes D 0 to D 7 is modified to the control code C 3 , and the value of the control code C 3 is 0x1e, thereby obtaining the second segment, that is, the value of the synchronization header field of the second segment is 10.
  • the eight data to be transmitted after the synchronization header field are D 0 , D 1 , D 2 , C 3 , D 4 , D 5 , D 6 , D 7, respectively, where C 3 is the second data to be transmitted. .
  • the destination device 104 when receiving the second segment, determines, according to the value (10) of the synchronization header field in the second segment, that the control data is included in the eight data to be transmitted after the synchronization header field, and further views the The value of the control code (0x1e), and finally based on the value of the control code, determines that a new Ethernet frame has an error during transmission.
  • the source device generates an Ethernet frame and transmits the Ethernet frame to the destination device via at least one forwarding device.
  • the forwarding device performs a CRC check on the received Ethernet frame to determine that an error has occurred in the Ethernet frame.
  • the forwarding device modified the received Ethernet frame.
  • the modified Ethernet frame contains the second segment.
  • the Ethernet frame received by the destination device is different from the Ethernet frame generated by the source device.
  • the present application refers to an Ethernet frame received by a destination device as a new Ethernet frame.
  • the MAC circuit 202 of the forwarding device 102 only needs to be in C 0 to C 3 or D 5 to D 7 after the block type field.
  • any modification to a value 0x1e e.g., in the C 0 ⁇ C 3 C 2 is 0x1e modified value, or the D 5 ⁇ D 7 D 6 C modify the control codes. 6
  • the second segment that is, the value of the synchronization header field of the second segment is 10
  • the value of C 2 in the 8 data to be transmitted after the synchronization header field is 0x1e, and the values of the remaining data to be transmitted are unchanged, C 2 For the second data to be transmitted.
  • the destination device 104 when receiving the second segment, determines, according to the value (10) of the synchronization header field in the second segment, that the control data is included in the eight data to be transmitted after the synchronization header field, and according to the block.
  • the value of the type field is 0x33, and the data to be transmitted at the positions C 0 to C 3 after the block type field is determined as a control code, and the value of the control code is further checked (0x1e), and finally the new value is determined according to the value of the control code.
  • the Ethernet frame has an error during the transfer.
  • the block type field is used to indicate the position of the control code in the 8 bytes of data to be transmitted in the 8 bytes to be transmitted, when in the D 5 to D 7 When D 6 is modified to control code C 6 , the value of the block type field is also modified accordingly.
  • the new Ethernet frame includes the second segment and an Ethernet frame of the plurality of segments except the first segment.
  • the second segment is obtained by modifying the first type indication information and/or the first to-be-transmitted data in the first segment, so that the next forwarding device determines, according to the second segment, that the Ethernet frame is in the An error occurred during the transfer.
  • the destination device 104 may further view the second data to be transmitted.
  • the value of the data is determined based on the value of the second data to be transmitted to determine that the Ethernet frame has an error during transmission. Therefore, when the type of the second to-be-transmitted data indicated by the value of the second type indication information is data, the MAC circuit 202 needs to simultaneously perform the value of the second type indication information and the value of the second to-be-transmitted data. Modifying; when the type of the second data to be transmitted indicated by the value of the second type indication information is a control word, the MAC circuit 202 only needs to modify the value of the second data to be transmitted.
  • the destination device 104 receives the second segment and a segment of the plurality of segments except the first segment; the destination device 104 determines that a new Ethernet frame has an error based on the second segment, the new Ethernet frame includes The second segment, and a segment of the plurality of segments except the first segment; the destination device 104 discards the new Ethernet frame in response to the erroneous determination of the Ethernet frame.
  • the PHY circuit 201 of the destination device 104 includes a physical coding sublayer receiver (PCS receiver), and the destination device determines that a new Ethernet frame has occurred based on the second fragment:
  • PCS receiver physical coding sublayer receiver
  • the destination device 104 is responsive to the second data to be transmitted in the second segment, the PCS receiver of the PHY circuit 201 enters the RX_E state, and the PCS receiver of the PHY circuit 201 in the RX_E state sends a signal to the MAC circuit 202:
  • the signal includes an RxC field having a value equal to 1, and an RxD field having a value equal to 0xFE, the MAC circuit 202 determining that the new Ethernet frame sent an error based on the value of the RxC field in the signal and the value of the RxD field; or
  • the signal comprises a sync header field having a value equal to 10, a block type field having a value equal to 0x33, and C 0 - C 3 and D 5 - D 7 , wherein the value of C 2 is 0x1e, and the MAC circuit 202 is based on synchronization in the signal
  • the value of the header field, the value of the block type field, and the value of C 2 determine that the new Ethernet frame sent an error.
  • the new Ethernet frame is discarded, including:
  • the MAC circuit 202 in the destination device 104 discards the new Ethernet frame.
  • the modified segment is directly sent by the forwarding device 102.
  • the second segment is sent by the forwarding device 102 to the forwarding device located thereafter, and then A subsequent forwarding device (eg, forwarding device 103) sends to destination device 104.
  • a method 400 for the forwarding device 103 to transmit a plurality of segments of an Ethernet frame received from the forwarding device 102 to the destination device 104 is described below.
  • FIG. 4 is a schematic flowchart of a method 400 for transmitting data according to an embodiment of the present application, where the method includes 401 and 402.
  • the method 400 can be performed by the forwarding device 103 shown in FIG. 1 or 2.
  • the second forwarding device receives the first segment and the first segment, where the first segment includes type indication information and data to be transmitted, where the type indication information is used to indicate a type of the data to be transmitted, and the type of the data to be transmitted is controlled. Word, the data to be transmitted is used to indicate that an error has occurred in the Ethernet frame.
  • the Ethernet frame includes the first fragment, and the first fragment includes a destination MAC address field, the value of the destination MAC address field is equal to the MAC address of the destination device, and the MAC address of the second forwarding device is not equal to the destination MAC address.
  • the value of the field is equal to the MAC address of the destination device.
  • the second forwarding device includes a receiving Ethernet port.
  • the receiving Ethernet port contains the PHY circuit.
  • the second forwarding device can receive the first segment and the first segment by using a PHY circuit included in the receiving Ethernet port.
  • a specific implementation of the 401 reference may be made to the description of the 301 in the embodiment shown in FIG. 3, and details are not described herein again.
  • the PHY circuit 201 of the forwarding device 103 receives the modified segment (e.g., the first segment) in the method 300 transmitted by the PHY circuit 204 of the forwarding device 102, and transmits the modified segment.
  • the modified segment e.g., the first segment
  • the modified segment includes type indication information and data to be transmitted, the type indication information is used to indicate that the type of the data to be transmitted is a control word, and the data to be transmitted is used to indicate that the Ethernet frame is in the An error occurs during transmission, wherein the Ethernet frame includes the first fragment, the first fragment includes a destination MAC address field, the value of the destination MAC address field is equal to the MAC address of the destination device 104, and the MAC of the forwarding device 103 The address is not equal to the value of the destination MAC address field.
  • the second forwarding device sends the first segment to the destination device.
  • the second forwarding device includes a transmitting Ethernet port.
  • a transmitting Ethernet port For a specific implementation of 402, reference may be made to the description of 305 in the embodiment shown in FIG. 3, and details are not described herein again.
  • the method 400 further includes:
  • the forwarding device 103 determines, based on the destination MAC address field, that the MAC address of the forwarding device 103 is not equal to the value of the destination MAC address field.
  • the forwarding device 103 sends the first segment to the destination device 104, including:
  • the forwarding device 103 sends the first segment to the destination device 104 in response to the determination that the MAC address of the forwarding device 103 is not equal to the value of the destination MAC address field.
  • the forwarding device 103 determines that the MAC address is not equal to the value of the destination MAC address field included in the first fragment, and further determines that the forwarding device 103 is not the destination device, and determines to The first segment is sent to the destination device 104.
  • the Ethernet frame further includes a second segment, and before the forwarding device 103 receives the first segment, determining that the Ethernet frame has an error in response to performing a CRC check on the Ethernet frame, The second segment is modified to the first segment.
  • the Ethernet frame further includes a second segment.
  • the forwarding device 102 determines that an error occurs in the Ethernet frame
  • the forwarding device 102 determines that the Ethernet frame has occurred by performing a CRC check on the Ethernet frame.
  • the second segment is modified to the first segment and the first segment is sent to the forwarding device 103.
  • the PHY circuit 201 of the forwarding device 103 includes a physical coding sublayer (PCS) receiver. After receiving the first segment, the PHY circuit 201 of the forwarding device 103 responds to the data to be transmitted in the first segment, and the PCS receiver enters the RX_E state. Further, the PHY circuit 201 can determine that the Ethernet frame has an error during transmission.
  • PCS physical coding sublayer
  • the first fragment includes an RxC domain and an RxD domain, the RxC domain carrying the type indication information, the RxD domain carrying the data to be transmitted.
  • the value of the RxC field is equal to 1, and the value of the RxD field is equal to 0xFE.
  • the first segment includes a synchronization header field, a block type field, and a plurality of data to be transmitted, where the plurality of data to be transmitted includes the data to be transmitted, and the synchronization header field and the block type domain carry the type.
  • the value of the sync header field is equal to 0x10 and the value of the data to be transmitted is equal to 0x1e.
  • the data to be transmitted in the second segment includes a frame check sequence FCS field of an Ethernet frame, or the second segment does not include a frame check sequence FCS field of an Ethernet frame.
  • the method for transmitting data provided by the embodiment of the present application is described above with reference to FIG. 1 to FIG. 4 .
  • the forwarding device, the forwarding device, the destination device, and the destination device provided by the embodiments of the present application are described below with reference to FIG. 5 to FIG.
  • FIG. 5 is a schematic block diagram of a forwarding device 500 according to an embodiment of the present disclosure.
  • the forwarding device 500 includes a receiving module 510, a processing module 520, and a sending module 530.
  • forwarding device 500 can be forwarding device 102 as shown in FIG. 1 or 2.
  • the forwarding device 500 can be used to perform the method illustrated in FIG.
  • the receiving module 510 is configured to receive multiple segments of an Ethernet frame, where the multiple segments include a first segment and a first segment, where the first segment includes a destination media access control MAC address field.
  • the receiving module 510 can be used to perform 301.
  • the receiving module 510 can be used to perform 301.
  • the processing module 520 is configured to determine, according to the plurality of segments, a frame check sequence FCS value of the Ethernet frame; determine, according to the FCS value, that an error occurs in the Ethernet frame; and determine an error in response to the Ethernet frame Modifying the first segment into a second segment, the first segment includes first type indication information and first to-be-transmitted data, the second segment includes second type indication information and second to-be-transmitted data, the first type The indication information is used to indicate the type of the first data to be transmitted, and the second type indication information is used to indicate that the type of the second data to be transmitted is a control word, and the value of the first data to be transmitted is not equal to the second to be transmitted. The value of the data to be used to indicate that an error has occurred in the Ethernet frame.
  • processing module 520 can be used to execute 302, 303, and 304.
  • processing module 520 reference may be made to the description of the corresponding embodiments 302, 303, and 304 of FIG.
  • the sending module 530 is configured to send the second fragment to the destination device, where the value of the destination MAC address field is equal to the MAC address of the destination device, and the MAC address of the destination device is not equal to the MAC address of the forwarding device.
  • the sending module 530 can be used to perform 305.
  • the sending module 530 reference may be made to the description of the embodiment 305 corresponding to FIG.
  • the processing module 520 is configured to: when the value of the first type indication information is not equal to the value of the second type indication information, the first type indication information in the first fragment and the first to Transmitting data is respectively modified into the second type indication information and the second to-be-transmitted data; or, when the value of the first type indication information is equal to the value of the second type indication information, the first one of the first fragments The data to be transmitted is modified into the second data to be transmitted.
  • the second segment includes an RxC domain and an RxD domain, where the RxC domain carries the second type indication information, where the RxD domain carries the second to-be-transmitted data.
  • the value of the RxC field is 1, and the value of the RxD field is equal to 0xFE.
  • the second segment includes a synchronization header field, a block type field, and a plurality of to-be-transmitted data, where the plurality of to-be-transmitted data includes the second to-be-transmitted data, and the second type indication information includes the synchronization header field and The block type field, the second type indication information is used to indicate that the type of the second data to be transmitted is a control word, and the second type of indication information is further used to indicate that the second data to be transmitted is in the plurality of data to be transmitted. s position.
  • the value of the second data to be transmitted is equal to 0x1e.
  • the data to be transmitted in the first segment includes an FCS domain, or the first segment does not include an FCS domain.
  • the processing module 520 is configured to: when the FCS value is not equal to the value of the FCS domain, determine that an error occurs in the Ethernet frame.
  • processing module 520 in the embodiment of the present invention may be implemented by a processor or a processor related circuit component
  • receiving module 510 and the transmitting module 530 may be implemented by a transceiver or a transceiver related circuit component.
  • FIG. 6 is a schematic block diagram of a forwarding device 600 according to an embodiment of the present disclosure.
  • the forwarding device 600 includes a receiving module 610 and a sending module 620.
  • the forwarding device 600 can be the forwarding device 103 shown in FIG. 1 or 2.
  • the forwarding device 600 can be used to perform the method illustrated in FIG.
  • the receiving module 610 is configured to receive the first segment and the first segment, where the first segment includes type indication information and data to be transmitted, where the type indication information is used to indicate the type of the data to be transmitted, and the type of the data to be transmitted is controlled. a word, the data to be transmitted is used to indicate that an error occurs in the Ethernet frame, the Ethernet frame includes the first fragment, and the first fragment includes a destination MAC address field, and the value of the destination MAC address field is equal to the MAC address of the destination device. The MAC address of the forwarding device is not equal to the value of the destination MAC address field.
  • the receiving module 610 can be used to execute 401.
  • the receiving module 610 can be used to execute 401.
  • the sending module 620 is configured to send the first segment to the destination device.
  • the sending module 620 can be used to perform 402.
  • the sending module 620 reference may be made to the description of 402 in the embodiment corresponding to FIG.
  • the Ethernet frame further includes a second segment, and before the receiving device receives the first segment, determining that the Ethernet frame has an error by performing a CRC check on the Ethernet frame, the second segment Modified to the first fragment.
  • the destination device 600 further includes a processing module 630, where the processing module 630 is configured to:
  • the receiving module 610 receives the first segment and the first segment, and before the sending module 620 sends the first segment to the destination device, determining, according to the destination MAC address field, that the MAC address of the forwarding device is not equal to the destination.
  • the sending module 620 is configured to:
  • the first segment is sent to the destination device in response to determining that the MAC address of the forwarding device is not equal to the value of the destination MAC address field.
  • the receiving module 610 includes a PCS receiver, and after the receiving module 610 receives the first segment, the PCS receiver enters an RX_E state in response to the data to be transmitted.
  • the first segment includes an RxC domain and an RxD domain, where the RxC domain carries the type indication information, where the RxD domain carries the data to be transmitted.
  • the value of the RxC field is equal to 1, and the value of the RxD field is equal to 0xFE.
  • the first segment includes a synchronization header field, a block type field, and a plurality of to-be-transmitted data, where the plurality of to-be-transmitted data includes the to-be-transmitted data, and the type indication information includes the synchronization header field and the block type domain.
  • the type indication information is used to indicate that the type of the data to be transmitted is a control word, and the type indication information is further used to indicate a location of the to-be-transmitted data in the plurality of to-be-transmitted data.
  • the value of the synchronization header field is equal to 0x10, and the value of the data to be transmitted is equal to 0x1E.
  • the data to be transmitted in the second segment includes a frame check sequence FCS field of the Ethernet frame, or the second segment does not include a frame check sequence FCS field of the Ethernet frame.
  • processing module 630 in the embodiment of the present invention may be implemented by a processor or a processor related circuit component
  • receiving module 610 and the transmitting module 620 may be implemented by a transceiver or a transceiver related circuit component.
  • FIG. 7 is a schematic block diagram of a forwarding device 700 according to an embodiment of the present disclosure.
  • the forwarding device 700 includes a receiving circuit 710, a processing circuit 720, and a sending circuit 730.
  • the forwarding device 700 can be the forwarding device 102 shown in FIG. 1 or 2.
  • the forwarding device 700 can be used to perform the method illustrated in FIG.
  • the receiving circuit 710 is configured to receive multiple segments of an Ethernet frame, where the multiple segments include a first segment and a first segment, where the first segment includes a destination MAC address field.
  • the receiving circuit 710 can be used to perform 301.
  • the receiving circuit 710 can be used to perform 301.
  • the processing circuit 720 is configured to determine, according to the plurality of segments, a frame check sequence FCS value of the Ethernet frame; determine, according to the FCS value, that an error occurs in the Ethernet frame; and determine an error in response to the Ethernet frame Modifying the first segment into a second segment, the first segment includes first type indication information and first to-be-transmitted data, the second segment includes second type indication information and second to-be-transmitted data, the first type The indication information is used to indicate the type of the first data to be transmitted, and the second type indication information is used to indicate that the type of the second data to be transmitted is a control word, and the value of the first data to be transmitted is not equal to the second to be transmitted. The value of the data to be used to indicate that an error has occurred in the Ethernet frame.
  • processing circuit 720 can be used to execute 302, 303, and 304.
  • processing circuit 720 reference may be made to the description of the corresponding embodiments 302, 303, and 304 of FIG.
  • the sending circuit 730 is configured to send the second fragment to the destination device, where the value of the destination MAC address field is equal to the MAC address of the destination device, and the MAC address of the destination device is not equal to the MAC address of the forwarding device.
  • the transmit circuit 730 can be used to perform 305.
  • the transmitting circuit 730 reference may be made to the description of the embodiment 305 corresponding to FIG.
  • the processing circuit 720 is configured to: when the value of the first type indication information is not equal to the value of the second type indication information, the first type indication information in the first fragment and the first to Transmitting data is respectively modified into the second type indication information and the second to-be-transmitted data; or, when the value of the first type indication information is equal to the value of the second type indication information, the first one of the first fragments The data to be transmitted is modified into the second data to be transmitted.
  • the second segment includes an RxC domain and an RxD domain, where the RxC domain carries the second type indication information, where the RxD domain carries the second to-be-transmitted data.
  • the value of the RxC field is 1, and the value of the RxD field is equal to 0xFE.
  • the second segment includes a synchronization header field, a block type field, and a plurality of to-be-transmitted data, where the plurality of to-be-transmitted data includes the second to-be-transmitted data, and the second type indication information includes the synchronization header field and The block type field, the second type indication information is used to indicate that the type of the second data to be transmitted is a control word, and the second type of indication information is further used to indicate that the second data to be transmitted is in the plurality of data to be transmitted. s position.
  • the value of the second data to be transmitted is equal to 0x1e.
  • the data to be transmitted in the first segment includes an FCS domain, or the first segment does not include an FCS domain.
  • the processing circuit 720 is configured to: when the FCS value is not equal to the value of the FCS domain, determine that an error occurs in the Ethernet frame.
  • FIG. 8 is a schematic block diagram of a forwarding device 800 according to an embodiment of the present disclosure.
  • the forwarding device 800 includes a receiving circuit 810, a sending circuit 820, and a processing circuit 830.
  • the forwarding device 800 can be the forwarding device 103 shown in FIG. 1 or 2. Forwarding device 800 can be used to perform the method illustrated in FIG. For a specific implementation manner of the forwarding device 800, reference may be made to the description of the embodiment corresponding to FIG. 4, and details are not described herein again.
  • the receiving circuit 810 is configured to receive the first segment and the first segment, where the first segment includes type indication information and data to be transmitted, where the type indication information is used to indicate the type of the data to be transmitted, and the type of the data to be transmitted is controlled. a word, the data to be transmitted is used to indicate that an error occurs in the Ethernet frame, the Ethernet frame includes the first fragment, and the first fragment includes a destination MAC address field, and the value of the destination MAC address field is equal to the MAC address of the destination device. The MAC address of the forwarding device is not equal to the value of the destination MAC address field.
  • receiving circuit 810 can be used to perform 401.
  • receiving circuit 810 reference may be made to the description of 401 in the embodiment corresponding to FIG.
  • the sending circuit 820 is configured to send the first segment to the destination device.
  • the transmit circuit 820 can be used to perform 402.
  • the transmitting circuit 820 reference may be made to the description of 402 in the embodiment corresponding to FIG.
  • the Ethernet frame further includes a second segment, and before the receiving device receives the first segment, determining that the Ethernet frame has an error by performing a CRC check on the Ethernet frame, the second segment Modified to the first fragment.
  • the destination device 600 further includes a processing circuit 830, the processing circuit 830 is configured to:
  • the receiving circuit 810 After the receiving circuit 810 receives the first segment and the first segment, and before the sending circuit 820 sends the first segment to the destination device, determining, according to the destination MAC address field, that the MAC address of the forwarding device is not equal to the purpose The value of the MAC address field;
  • the transmitting circuit 820 is configured to:
  • the first segment is sent to the destination device in response to determining that the MAC address of the forwarding device is not equal to the value of the destination MAC address field.
  • the receiving circuit 810 includes a physical coding sublayer receiver PCS receiver, and the PCS receiver is configured to: after the receiving circuit 810 receives the first segment, in response to the data to be transmitted, the PCS receiver enters an RX_E state.
  • the first segment includes an RxC domain and an RxD domain, where the RxC domain carries the type indication information, where the RxD domain carries the data to be transmitted.
  • the value of the RxC field is equal to 1, and the value of the RxD field is equal to 0xFE.
  • the first segment includes a synchronization header field, a block type field, and a plurality of to-be-transmitted data, where the plurality of to-be-transmitted data includes the to-be-transmitted data, and the type indication information includes the synchronization header field and the block type domain.
  • the type indication information is used to indicate that the type of the data to be transmitted is a control word, and the type indication information is further used to indicate a location of the to-be-transmitted data in the plurality of to-be-transmitted data.
  • the value of the synchronization header field is equal to 0x10, and the value of the data to be transmitted is equal to 0x1E.
  • the data to be transmitted in the second segment includes a frame check sequence FCS field of the Ethernet frame, or the second segment does not include a frame check sequence FCS field of the Ethernet frame.
  • processors mentioned in the embodiment of the present invention may be a central processing unit (CPU), and may also be other general-purpose processors, digital signal processors (DSPs), and application specific integrated circuits ( Application Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • the general purpose processor may be a microprocessor or the processor or any conventional processor or the like.
  • the memory referred to in the embodiments of the present invention may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory may be a read-only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (Erasable PROM, EPROM), or an electric Erase programmable read only memory (EEPROM) or flash memory.
  • the volatile memory can be a Random Access Memory (RAM) that acts as an external cache.
  • RAM Random Access Memory
  • many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (Synchronous DRAM). SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), Synchronous Connection Dynamic Random Access Memory (Synchlink DRAM, SLDRAM) ) and direct memory bus random access memory (DR RAM).
  • processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) is integrated in the processor.
  • memories described herein are intended to comprise, without being limited to, these and any other suitable types of memory.
  • the disclosed systems, devices, and methods may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product.
  • the technical solution of the present application which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present application.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like, which can store program codes. .

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Abstract

本申请提供了一种传输数据的方法，包括：第一转发设备接收以太网帧的多个片段，多个片段包括首个片段以及第一片段，首个片段包括目的媒体访问控制MAC地址域；第一转发设备根据多个片段确定以太网帧的帧校验序列FCS值；第一转发设备基于所述FCS值确定以太网帧发生了错误第一转发设备响应于以太网帧发生了错误的确定，将第一片段修改为第二片段，第二片段包括第二类型指示信息以及第二待传输数据，第二类型指示信息用于指示第二待传输数据的类型为控制字，第一待传输数据的值不等于第二待传输数据的值，第二待传输数据用于指示以太网帧发生了错误；第一转发设备向目的设备发送第二片段。本申请提供的该方法有助于提高目的设备检测出以太网帧中包含有错误的成功率。

Description

传输数据的方法和转发设备 技术领域
本申请涉及移动通信领域，并且更具体地，涉及通信领域中的传输数据的方法和转发设备。
背景技术
工业物联网以及车联网中通常包括很多台转发设备。源设备发送的数据经由多台转发设备进行转发，从而到达目的设备。多个转发设备可以形成一个链式网络或环状网络。
数据经由链式网络或环状网络进行转发时，每个转发设备都可能引入一些时延。以上使得时延端到端的时延不能满足某些应用场景的需求。
穿透式(Cut-through)转发技术能够降低端到端时延。例如，在Cut-through转发技术中，转发设备可以在没有接收到完整的以太网帧的情况下，就开始向下一跳转发设备发送已接收到的片段。具体来说，以太网帧1包括片段1、片段2以及片段3。转发设备1可以在仅接收到片段1，尚未接收到片段2和片段3时，向转发设备2发送片段1。
以太网帧在传输过程中，可能会发生错误。当目的设备接收到的以太网帧中包含的错误较多时，目的设备对接收到的以太网帧进行循环冗余校验(cyclic redundancy check，CRC)校验可能无法检测出以太网帧包含错误。以上将导致数据传输业务发生异常。
发明内容
本申请提供一种传输数据的方法，有助于提高目的设备检测出以太网帧中包含有错误的成功率。
第一方面，提供了一种传输数据的方法，包括：第一转发设备接收以太网帧的多个片段，所述多个片段包括首个片段以及第一片段，所述首个片段包括目的媒体访问控制(MAC)地址域；所述第一转发设备根据所述多个片段确定所述以太网帧的帧校验序列(FCS)值；所述第一转发设备基于所述FCS值确定所述以太网帧发生了错误所述第一转发设备响应于所述以太网帧发生了错误的确定，将所述第一片段修改为第二片段，所述第一片段包括第一类型指示信息以及第一待传输数据，所述第二片段包括第二类型指示信息以及第二待传输数据，所述第一类型指示信息用于指示所述第一待传输数据的类型，所述第二类型指示信息用于指示所述第二待传输数据的类型为控制字，所述第一待传输数据的值不等于所述第二待传输数据的值，所述第二待传输数据用于指示所述以太网帧发生了错误；所述第一转发设备向目的设备发送所述第二片段，所述目的MAC地址域的值等于所述目的设备的MAC地址，所述目的设备的MAC地址不等于所述第一转发设备的MAC地址。
以太网帧从源设备到目的设备进行传输的过程中，转发设备通过对以太网帧进行CRC校验，发现以太网帧出错。当转发设备发现以太网帧发生错误时，转发设备对接收到的以太网帧的片段进行修改，使得修改后的片段(第二片段)指示该以太网帧发生了错误。例 如，第二片段可以包含错误控制字。错误控制字用于指示以太网帧发生了错误。转发设备向目的设备发送所述第二片段。上述使得目的设备的PHY电路根据所述第二片段确定接收到的以太网帧发生了错误。具体地，目的设备的PHY电路包含了PCS receiver。所述第二片段包含错误控制字。PCS receiver根据错误控制字确定以太网帧发生了错误。例如，PCS receiver基于错误控制字，进入RX_E状态。处于RX_E状态的PCS receiver生成信号。所述信号包含值等于1的RxC域，以及值等于0xFE的RxD域。PCS receiver通过MII向目的设备的MAC电路发送所述信号。目的设备的MAC电路可以基于所述信号确定以太网帧发生了错误。进而，目的设备的MAC电路可以将以太网帧丢弃。也就是说，目的设备的MAC电路不需要对接收到的以太网帧进行CRC校验，即可确定以太网帧发生了错误。相对于目的设备通过对以太网帧进行CRC校验确定以太网帧发生错误的技术方案，上述技术方案有助于提高目的设备检测出以太网帧中包含有错误的成功率。具体来说，CRC算法的特点决定了当以太网帧包含较少错误时，CRC校验比较容易检测出以太网帧的错误。当以太网帧包含较多错误时，CRC校验有可能检测不出以太网帧的错误。以太网帧从源设备到目的设备进行传输的过程，可能会引入较多的错误。特别是，以太网帧需要经由多个转发设备进行转发时，发生较多错误的可能性比较大。另外，转发设备向下一跳转发设备或者目的设备发送以太网帧前，转发设备可能会重新计算以太网帧的FCS值，并将重新计算出的FCS值携带在以太网帧的FCS域。转发设备重新计算以太网帧的FCS值时，将以太网帧中FCS域之外的域作为参数。以上意味着如果以太网帧发生了错误，这些错误也将作为重新计算以太网帧的FCS值需要使用的参数。这使得下一跳转发设备或者目的设备无法通过CRC校验检测出接收到的以太网帧中包含了错误。
本申请提供的技术方案中，目的设备的PHY电路可以基于修改后的域确定以太网帧发生了错误。目的设备不需要依赖于CRC校验确定以太网帧是否发生了错误。因此，本申请的技术方案有助于提高目的设备检测出以太网帧中包含有错误的成功率。。
结合第一方面，在第一方面的一种可能的实现方式中，所述第一转发设备响应于所述以太网帧发生了错误的确定，将所述第一片段修改为第二片段包括：当所述第一类型指示信息的值不等于所述第二类型指示信息的值时，所述第一转发设备将所述第一片段中的所述第一类型指示信息以及所述第一待传输数据分别修改为所述第二类型指示信息以及所述第二待传输数据；或，当所述第一类型指示信息的值等于所述第二类型指示信息的值时，所述第一转发设备将所述第一片段中的所述第一待传输数据修改为所述第二待传输数据。
通过对第一片段中的类型指示信息进行修改，使得修改后的类型指示信息指示的第一片段中的待传输数据的类型为控制字，并对该第一片段中的待传输数据进行修改，使得修改后的待传输数据的值能够向目的设备指示以太网帧在传输过程中发生了错误，从而使得目的设备在接收到以太网帧时，根据修改后的该第一片段(第二片段)，确定该以太网帧在传输过程中发生了错误。
结合第一方面，在第一方面的一种可能的实现方式中，所述第二片段包含RxC域与RxD域，所述RxC域用于携带所述第二类型指示信息，所述RxD域的值为所述第二待传输数据。
通过RxC域的值向目的设备指示该RxD域的值为控制字节，并使得RxD域的值向目的设备指示该以太网帧在传输过程中发生了错误，使得目的设备在确定该RxD域的值的 为控制字节时，进一步去查看该RxD域的控制码的值，并最终根据该RxD域的控制码的值，确定该以太网帧在传输过程中发生了错误，进而丢弃该以太网帧。
结合第一方面，在第一方面的一种可能的实现方式中，所述RxC域的值为1，所述RxD域的值等于0xFE。
结合第一方面，在第一方面的一种可能的实现方式中，所述第二片段包含同步头域，块类型域以及多个待传输数据，所述多个待传输数据中包括所述第二待传输数据，所述第二类型指示信息包括所述同步头域与所述块类型域，所述第二类型指示信息用于指示所述第二待传输数据的类型为控制字，所述第二类型指示信息还用于指示所述第二待传输数据在所述多个待传输数据中的位置。
通过同步头域的值向目的设备指示该同步头域后面是否包括类型为控制字的待传输数据，并通过块类型域的值向目的设备指示该块类型域后面包括的类型为控制字的待传输数据在多个待传输数据中的位置，并使得该位置对应的待传输数据的值向目的设备指示该以太网帧在传输过程中发生了错误，使得目的设备在确定类型为控制字的待传输数据的位置后，进一步去查看该位置对应的待传输数据的值，并最终根据该位置对应的待传输数据的值，确定该以太网帧在传输过程中发生了错误，进而丢弃该以太网帧。
结合第一方面，在第一方面的一种可能的实现方式中，所述第二待传输数据的值等于0x1e。
结合第一方面，在第一方面的一种可能的实现方式中，所述第一片段中的待传输数据包括FCS域，或，所述第一片段不包括FCS域。
通过对该以太网帧中的除首个片段外的任意一个片段进行修改，使得目的设备在接收到该修改的片段时，根据该修改的片段，确定该以太网帧在传输过程中发生了错误，进而丢弃该以太网帧。
结合第一方面，在第一方面的一种可能的实现方式中，所述第一转发设备基于所述FCS值确定所述以太网帧发生了错误，包括：在所述FCS值不等于所述FCS域的值时，所述第一转发设备确定所述以太网帧发生了错误。
第二方面，提供了一种传输数据的方法，包括：第二转发设备接收首个片段以及第一片段，所述第一片段包括类型指示信息以及待传输数据，所述类型指示信息用于指示所述待传输数据的类型，所述待传输数据的类型为控制字，所述待传输数据用于指示以太网帧发生了错误，所述以太网帧包括所述首个片段，所述首个片段包括目的MAC地址域，所述目的MAC地址域的值等于目的设备的MAC地址，所述第二转发设备的MAC地址不等于所述目的MAC地址域的值；所述第二转发设备向所述目的设备发送所述第一片段。
以太网帧从源设备到目的设备进行传输的过程中，转发设备通过对以太网帧进行CRC校验，发现以太网帧出错。当转发设备发现以太网帧发生错误时，转发设备对接收到的以太网帧的片段进行修改，使得修改后的片段(第二片段)指示该以太网帧发生了错误。例如，第二片段可以包含错误控制字。错误控制字用于指示以太网帧发生了错误。转发设备向目的设备发送所述第二片段。上述使得目的设备的PHY电路根据所述第二片段确定接收到的以太网帧发生了错误。具体地，目的设备的PHY电路包含了PCS receiver。所述第二片段包含错误控制字。PCS receiver根据错误控制字确定以太网帧发生了错误。例如，PCS receiver基于错误控制字，进入RX_E状态。处于RX_E状态的PCS receiver生成信 号。所述信号包含值等于1的RxC域，以及值等于0xFE的RxD域。PCS receiver通过MII向目的设备的MAC电路发送所述信号。目的设备的MAC电路可以基于所述信号确定以太网帧发生了错误。进而，目的设备的MAC电路可以将以太网帧丢弃。也就是说，目的设备的MAC电路不需要对接收到的以太网帧进行CRC校验，即可确定以太网帧发生了错误。相对于目的设备通过对以太网帧进行CRC校验确定以太网帧发生错误的技术方案，上述技术方案有助于提高目的设备检测出以太网帧中包含有错误的成功率。具体来说，CRC算法的特点决定了当以太网帧包含较少错误时，CRC校验比较容易检测出以太网帧的错误。当以太网帧包含较多错误时，CRC校验有可能检测不出以太网帧的错误。以太网帧从源设备到目的设备进行传输的过程，可能会引入较多的错误。特别是，以太网帧需要经由多个转发设备进行转发时，发生较多错误的可能性比较大。另外，转发设备向下一跳转发设备或者目的设备发送以太网帧前，转发设备可能会重新计算以太网帧的FCS值，并将重新计算出的FCS值携带在以太网帧的FCS域。转发设备重新计算以太网帧的FCS值时，将以太网帧中FCS域之外的域作为参数。以上意味着如果以太网帧发生了错误，这些错误也将作为重新计算以太网帧的FCS值需要使用的参数。这使得下一跳转发设备或者目的设备无法通过CRC校验检测出接收到的以太网帧中包含了错误。
本申请提供的技术方案中，目的设备的PHY电路可以基于修改后的域确定以太网帧发生了错误。目的设备不需要依赖于CRC校验确定以太网帧是否发生了错误。因此，本申请的技术方案有助于提高目的设备检测出以太网帧中包含有错误的成功率。
结合第二方面，在第二方面的一种可能的实现方式中，所述以太网帧还包括第二片段，所述第二转发设备接收到所述第一片段前，响应于通过对所述以太网帧进行CRC校验确定所述以太网帧发生了错误，所述第二片段被修改为所述第一片段。
结合第二方面，在第二方面的一种可能的实现方式中，所述第二转发设备接收首个片段以及第一片段之后，以及，所述第二转发设备向所述目的设备发送所述第一片段之前，所述方法还包括：所述第二转发设备基于所述目的MAC地址域确定所述第二转发设备的MAC地址不等于所述目的MAC地址域的值；所述第二转发设备向所述目的设备发送所述第一片段包括：所述第二转发设备响应于所述第二转发设备的MAC地址不等于所述目的MAC地址域的值的确定，所述第二转发设备向所述目的设备发送所述第一片段。
结合第二方面，在第二方面的一种可能的实现方式中，所述第二转发设备包括物理编码子层接收机PCS receiver，所述第二转发设备接收所述第一片段之后，所述方法还包括：响应于所述待传输数据，所述PCS receiver进入RX_E状态。
结合第二方面，在第二方面的一种可能的实现方式中，所述第一片段包含RxC域与RxD域，所述RxC域携带所述类型指示信息，所述RxD域携带所述待传输数据。
通过RxC域的值向目的设备指示该RxD域的值为控制字节，并使得RxD域的值向目的设备指示该以太网帧在传输过程中发生了错误，使得目的设备在确定该RxD域的值的为控制字节时，进一步去查看该RxD域的控制码的值，并最终根据该RxD域的控制码的值，确定该以太网帧在传输过程中发生了错误，进而丢弃该以太网帧。
结合第二方面，在第二方面的一种可能的实现方式中，所述RxC域的值等于1，所述RxD域的值等于0xFE。
结合第二方面，在第二方面的一种可能的实现方式中，所述第一片段包含同步头域， 块类型域以及多个待传输数据，所述多个待传输数据中包括所述待传输数据，所述类型指示信息包括所述同步头域与所述块类型域，所述类型指示信息用于指示所述待传输数据的类型为控制字，所述类型指示信息还用于指示所述待传输数据在所述多个待传输数据中的位置。
通过同步头域的值向目的设备指示该同步头域后面是否包括类型为控制字的待传输数据，并通过块类型域的值向目的设备指示该块类型域后面包括的类型为控制字的待传输数据在多个待传输数据中的位置，并使得该位置对应的待传输数据的值向目的设备指示该以太网帧在传输过程中发生了错误，使得目的设备在确定类型为控制字的待传输数据的位置后，进一步去查看该位置对应的待传输数据的值，并最终根据该位置对应的待传输数据的值，确定该以太网帧在传输过程中发生了错误，进而丢弃该以太网帧。
结合第二方面，在第二方面的一种可能的实现方式中，所述同步头域的值等于0x10，所述待传输数据的值等于0x1E。
结合第二方面，在第二方面的一种可能的实现方式中，所述第二片段中的待传输数据包括以太网帧的帧校验序列FCS域，或，所述第二片段不包括以太网帧的帧校验序列FCS域。
通过对该以太网帧中的除首个片段外的任意一个片段进行修改，使得目的设备在接收到该修改的片段时，根据该修改的片段，确定该以太网帧在传输过程中发生了错误，进而丢弃该以太网帧。
第三方面，提供了一种转发装置，包括用于执行上述第一方面以及第一方面的各实现方式中的传输数据的方法的各步骤的模块。
第四方面，提供了一种转发设备，包括接收电路、处理电路与发送电路，所述接收电路，用于接收以太网帧的多个片段，所述多个片段包括首个片段以及第一片段，所述首个片段包括目的媒体访问控制MAC地址域；处理电路，用于根据所述多个片段确定所述以太网帧的帧校验序列FCS值；基于所述FCS值确定所述以太网帧发生了错误；以及，响应于所述以太网帧发生了错误的确定，将所述第一片段修改为第二片段，所述第一片段包括第一类型指示信息以及第一待传输数据，所述第二片段包括第二类型指示信息以及第二待传输数据，所述第一类型指示信息用于指示所述第一待传输数据的类型，所述第二类型指示信息用于指示所述第二待传输数据的类型为控制字，所述第一待传输数据的值不等于所述第二待传输数据的值，所述第二待传输数据用于指示所述以太网帧发生了错误；发送电路，用于向目的设备发送所述第二片段，所述目的MAC地址域的值等于所述目的设备的MAC地址，所述目的设备的MAC地址不等于所述第一转发设备的MAC地址。
第五方面，提供一种转发设备，所述转发设备包括处理器与存储器，所述处理器用于调用所述存储器存储的程序，以执行第一方面或第一方面的任一方面的可能实现方式中的传输数据的方法。
第六方面，提供了一种计算机程序产品，该计算机程序产品包括：计算机程序代码，当该计算机程序代码被转发设备的处理模块、通信模块或处理器、收发器运行时，使得转发设备执行上述第一方面及其各种实现方式中的任一种传输数据的方法。
第七方面，提供了一种计算机可读存储介质，该计算机可读存储介质存储有程序，该程序使得转发设备执行上述第一方面及其各种实现方式中的任一种传输数据的方法。
第八方面，提供了一种芯片系统，包括存储器和处理器，该存储器用于存储计算机程序，该处理器用于从存储器中调用并运行该计算机程序，使得安装有该芯片系统的转发设备执行上述第一方面及其各种实现方式中的任一种传输数据的方法。
第九方面，提供了一种转发装置，包括用于执行上述第二方面以及第二方面的各实现方式中的传输数据的方法的各步骤的模块。
第十方面，提供了一种转发设备，包括接收电路与发送电路，所述接收电路用于接收首个片段以及第一片段，所述第一片段包括类型指示信息以及待传输数据，所述类型指示信息用于指示所述待传输数据的类型，所述待传输数据的类型为控制字，所述待传输数据用于指示以太网帧发生了错误，所述以太网帧包括所述首个片段，所述首个片段包括目的MAC地址域，所述目的MAC地址域的值等于目的设备的MAC地址，所述第二转发设备的MAC地址不等于所述目的MAC地址域的值；所述发送电路，用于向所述目的设备发送所述第一片段。
第十一方面，提供一种转发设备，所述目的设备包括处理器与存储器，所述处理器用于调用所述存储器存储的程序，以执行第二方面或第二方面的任一方面的可能实现方式中的传输数据的方法。
第十二方面，提供了一种计算机程序产品，该计算机程序产品包括：计算机程序代码，当该计算机程序代码被目的设备的处理模块、通信模块或处理器、收发器运行时，使得目的设备执行上述第二方面及其各种实现方式中的任一种传输数据的方法。
第十三方面，提供了一种计算机可读存储介质，该计算机可读存储介质存储有程序，该程序使得目的设备执行上述第二方面及其各种实现方式中的任一种传输数据的方法。
第十四方面，提供了一种芯片系统，包括存储器和处理器，该存储器用于存储计算机程序，该处理器用于从存储器中调用并运行该计算机程序，使得安装有该芯片系统的目的设备执行上述第二方面及其各种实现方式中的任一种传输数据的方法。
第十五方面，提供了一种系统，该系统包括第三方面的转发装置与第九方面的转发装置，或者，该系统包括第四方面的转发设备与第十方面的转发设备，或者，该系统包括第五方面的转发设备与第十一方面的转发设备。
附图说明
图1为适用于本申请实施例的以太网系统100的示意性框图。
图2为本申请实施例提供的转发设备或目的设备的一种可能的结构示意图。
图3为本申请实施例提供的传输数据的方法的示意性流程图。
图4为本申请实施例提供的传输数据的方法的另一示意性流程图。
图5为本申请实施例提供的转发装置的示意性框图。
图6为本申请实施例提供的转发装置的另一示意性框图。
图7为本申请实施例提供的转发设备的示意性框图。
图8为本申请实施例提供的转发设备的另一示意性框图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
本申请中的PHY电路是指用于执行以太网标准定义的物理层的功能的电路。以太网标准可以是IEEE发布的以太网标准。例如，以太网标准可以是IEEE802.3-2015。举例来说，物理层的功能可以包括物理编码子层(physical coding sublayer，PCS)的功能以及物理媒介连接(physical medium attachment，PMA)子层的功能。
本申请中的MAC电路是指用于执行以太网标准定义的媒体访问控制(media access control，MAC)的功能的电路。以太网标准可以是IEEE发布的以太网标准。例如，以太网标准可以是IEEE802.3-2015。MAC的功能位于数据链路层。逻辑链路控制(logical link control，LLC)的功能也位于数据链路层。
本申请中，MAC电路和PHY电路可以通过媒体独立接口(media independent interface，MII)进行通信。例如，MII可以是十吉比特媒体独立接口(ten gigabit media independent interface，XGMII)。在一种可能的设计中，物理层的功能还可以包括协调子层(reconciliation sublayer，RS)的功能。MAC电路可以经由RS电路以及MII与PHY电路通信。RS电路是指用于执行RS的功能的电路。
本申请中的以太网帧包括帧头、净荷以及FCS域。帧头从目的MAC地址域开始，以以太网类型(Ethertype)域或者长度(length)域结束。帧头不包括前导码(preamble)域以及帧开始定界符(Start of frame delimiter，SFD)域。以太网帧不包括preamble域以及SFD域。FCS域用于对以太网帧进行CRC校验。以太网帧中FCS域之外的域是计算以太网帧的FCS值时需要使用的参数。当计算出的FCS值不等于FCS域的值时，认为以太网帧发生了错误。关于以太网帧的格式，可以参考IEEE802.3的描述。
本申请中的片段是指以太网帧的片段。以太网帧被物理层编码处理后，可以获得block。本申请中的片段可以是物理层编码处理获得的block。例如，片段可以是64B/66B block。另外，PHY电路通过MII向MAC电路发送以太网帧时，可以通过MII向MAC电路发送RxC域以及RxD域。本申请中的片段也可以是RxC域以及与RxC域关联的RxD域。
本申请中涉及的技术术语的含义以及具体实现方式，可以参考IEEE802.3的描述。例如，可以参考IEEE802.3-2015的描述。上述技术术语包含但不限于控制字(control character)，数据字(data character)，控制字节(control octet)，数据字节(data octet)，控制码(control code)，同步头(synchronization header，sync header)域，64B/66B块(64B/66B block)，控制块(control block)，数据块(data block)，PCS接收机(PCS receiver)，块类型域(block type field)，接收控制(receive control，RxC)域以及接收数据(receive data，RxD)域。
首先对本申请中涉及的以太网系统100进行介绍。如图1所示，该以太网系统100中包括源设备101、转发设备102、转发设备103以及目的设备104。源设备101、转发设备102、转发设备103与目的设备104之间串行连接。待传输的以太网帧由源设备101发出，经过转发设备102与转发设备103后，最终到达目的设备104。
需要说明的是，图1仅示出了两个转发设备：转发设备102与转发设备103。在一种可能的设计中，源设备101与目的设备104之间可以包括至少3个转发设备。待传输的以太网帧由源设备101发出，经由至少3个转发设备进行转发，最终到达目的设备104。
作为示例而非限定，在本申请中，该以太网系统100应用于穿透式转发Cut-through 应用场景中。下面结合图1中的以太网系统100对Cut-through技术进行说明。
源设备101将以太网帧发出，当转发设备102收到该以太网帧的部分，而不是全部时，便将接收到的该以太网帧的部分进行转发。例如，以太网帧的部分可以是以太网帧的片段。对于转发设备而言，无需等到接收到完整的以太网帧再进行转发。上述方案使得以太网帧以较小的时延穿过转发设备到达目的设备104。
图2示出了图1所示的转发设备102或转发设备103的一种可能的结构示意图。
该转发设备包括物理层(Physical Layer，PHY)电路201、MAC电路202、MAC电路203与PHY电路204。在一种可能的设计中，PHY电路201和MAC电路202可以被包含在同一个芯片中。在另一种可能的设计中，PHY电路201和MAC电路202可以分别是不同的芯片中。另外，转发设备还可以包括其他部件。例如，转发设备还可以包括网络处理器(图中未示出)。网络处理器可以通过ASIC或者FPGA实现。在一种可能的设计中，网络处理器的接收端口与MAC电路202的发送端口耦合。网络处理器的发送端口与MAC电路203的发送端口耦合。网络处理器可以从MAC电路202提供的以太网帧中获取目的MAC地址。网络处理器可以以目的MAC地址为查找关键字，在MAC表中查找用于转发以太网帧的发送端口。例如，所述发送端口包括MAC电路203以及PHY电路204。进而，网络处理器可以将以太网帧提供给MAC电路203，使得PHY电路204向下一跳设备发送以太网帧。
其中，该PHY电路201、该MAC电路202用于接收相邻设备(例如，源设备或转发设备)发送的片段，该MAC电路203与PHY电路204用于将从该MAC电路202接收的片段发送至下一个相邻设备(例如，下一跳转发设备或目的设备)。
在本申请实施例中，PHY电路201能够以两种传输格式向MAC电路202发送接收到的片段，下面分别进行说明：
传输格式1
PHY电路201对接收到的比特流进行解析，从该比特流获得多个包含66比特的片段。每一个包含66比特的片段均包含2比特的同步头域(sync header field)、1字节的块类型域(block type field)以及n个字节(n≥7)的待传输数据。其中，2比特的同步头域用于指示该66比特的片段中的n个字节的待传输数据是否包含类型为控制字的待传输数据，该块类型域用于指示该n个字节的待传输数据中的类型为控制字的待传输数据在该n个字节的待传输数据中的位置。本申请中的包含66比特的片段可以是64B/66B block。本申请中的待传输数据可以是8比特的数据字节。本申请中的待传输数据也可以是7比特的控制字。
PHY电路201在将该66比特的片段发送至MAC电路202之前，将该66比特的片段进行格式转换。具体地，将该66比特的片段转换为符合媒体独立接口(media independent interface，MII)格式的片段。通过格式转换，该66比特的片段被转换为8个片段。每一个片段中包括1个比特的RxC域与8个比特的RxD域。且每一个片段中的RxC域的值指示该片段中的RxD域的类型，例如，该RxC域的值能够指示该RxD域的值的类型为控制字或数据字。该PHY电路201将该8个片段采用串行或并行传输的方法传输至MAC电路202。
传输格式2
PHY电路201对接收到的比特流进行解析，从该比特流获得多个包含66比特的片段。每一个66比特的片段包含2比特的同步头域、1字节的块类型域以及n个字节的待传输数据。其中，2比特的同步头域用于指示该66比特的片段中的n个字节的待传输数据是否包含类型为控制字的待传输数据。该块类型域用于指示该n个字节的待传输数据中的类型为控制字的待传输数据在该n个字节的待传输数据中的位置。
与传输格式1的场景不同，在传输格式2的场景中，PHY电路201在将该66比特的片段发送至MAC电路202之前，并不对该66比特的片段进行格式转换，而是直接向MAC电路202发送该66比特的片段。
图3为本申请实施例提供的传输数据的方法300的示意性流程图，该方法包括301至304。该方法300可以由图1或者图2所示的转发设备102执行。
301，第一转发设备接收以太网帧的多个片段，该多个片段包括首个片段以及第一片段，该首个片段包括目的媒体访问控制MAC地址域。
例如，源设备101生成以太网帧后，可以通过传输介质向转发设备102发送该以太网帧。以太网帧可以以比特流的形式在传输介质中传输。转发设备102中的PHY电路201可以通过传输介质接收比特流。所述比特流中包含所述多个片段。PHY电路201可以位于转发设备102的接收以太网端口中。接收以太网端口还可以包含MAC电路202。所述传输介质可以是电缆或者光纤。
302，该第一转发设备根据该多个片段确定该以太网帧的FCS值。
具体地，转发设备102(例如，第一转发设备)的PHY电路201接收来自于上一设备(例如，该上一设备可以是源设备101，或者是位于源设备101与转发设备102之间的其他转发设备)发送的以太网帧的多个片段，并将该多个片段发送至MAC电路202。该多个片段包括以太网帧的首个片段以及第一片段。该第一片段为该多个片段中除该首个片段外的任意一个片段。该首个片段包括目的MAC地址域。该目的MAC地址域的值等于目的设备103的MAC地址。
MAC电路202根据接收到的来自于该PHY电路201的多个片段，计算该以太网帧的FCS值。MAC电路202可以采用CRC算法计算该以太网帧的FCS值。举例来说，CRC算法可以是CRC32算法。
需要说明的是，在Cut-through应用场景中，该多个片段是在不同时刻到达转发设备102的MAC电路202的。MAC电路202在接收到该多个片段中的首个片段时，可以开始计算以太网帧的FCS值。该转发设备102接收到该以太网帧的所有的片段(例如，该多个片段)后，该MAC电路202能够完成对FCS值的计算，从而，确定该以太网帧的FCS值。从上述描述可以看出，MAC电路202计算以太网帧的FCS值时需要用到以太网帧的所有片段。每个片段都参与了FCS值的计算过程，为FCS值的计算过程提供了参数。
该多个片段中的某一个片段为FCS值的计算过程提供了参数后，该MAC电路202便可以将该片段进行转发。或者，该MAC电路202也可以先保存该片段，然后转发该片段。。MAC电路202转发以太网帧的片段时，可以按照先进先出的原则进行转发。即，较早接收的片段需要早于较晚接收的片段进行转发。
需要说明的是，当PHY电路201按照上述传输格式1向MAC电路202发送接收到的片段时，本申请实施例中的该首个片段包含6个RxC/RxD对。本申请中的RxC/RxD对 是指由一个RxC域和一个RxD域组成的信号。一个RxC域包含1个比特。一个RxD域包含8个比特。其中，RxC/RxD对中的RxC域与RxD域具有对应关系。具体地，RxC/RxD对中的RxC域用于指示该RxC/RxD对中的RxD域的类型。因此，首个片段包含6个RxC/RxD对。这意味着首个片段包含6个比特的RxC域与6个字节的RxD域。该6个字节的RxD域用于承载该目的MAC地址域的值。除该首个片段以外，其他片段均包括一个RxC/RxD对。
还需要说明的是，该多个片段中的每个片段包括类型指示信息以及待传输数据，该类型指示信息的值用于指示该待传输数据的类型是否为控制字。
303，该第一转发设备基于该FCS值确定该以太网帧发生了错误。
具体地，该MAC电路202根据301中确定的该以太网帧的FCS值确定该以太网帧在传输过程中发生了错误。以太网帧中包含了FCS域。当第一转发设备确定FCS值与FCS域的值不相等时，该第一转发设备可以确定该以太网帧发生了错误。
可以理解，源设备101生成以太网帧后，该以太网帧从源设备101传输到目的设备101的过程中，以太网帧可能受到干扰而发生错误。例如，以太网帧在传输过程中可能受到电磁干扰。以太网帧发生错误具体可以是，以太网帧中包含的一个比特或者多个比特的值发生了变化。例如，以太网帧中的一个比特的值从0变成了1。或者，以太网帧中的一个比特的值从1变成了0。
作为示例而非限定，该以太网帧的多个片段中的最后一个片段中包括有FCS域，该MAC电路202将确定的以太网帧的FCS值与该最后一个片段中包括的FCS域的值进行比较。
若该FCS值与该FCS域的值不同，则该MAC电路202确定该以太网帧在传输过程中发生了错误。
若该FCS值与该FCS域的值相同，则该MAC电路202确定该以太网帧在传输过程中尚未发生错误。
还需要说明的是，该MAC电路202根据接收到的来自于该PHY电路201的多个片段计算该以太网帧的FCS值时，该多个片段不包括该最后一个片段。
304，该第一转发设备响应于该以太网帧发生了错误的确定，将该第一片段修改为第二片段，该第二片段包括第二类型指示信息以及第二待传输数据，该第二类型指示信息用于指示该第二待传输数据的类型为控制字，该第二待传输数据用于指示该以太网帧发生了错误。
其中，该第一片段包括第一类型指示信息以及第一待传输数据，该第一类型指示信息用于指示该第一待传输数据的类型，该第一待传输数据的值不等于该第二待传输数据的值。
具体地，在该MAC电路202确定该以太网帧在传输过程中发生了错误时，该MAC电路202便对该多个待片段中的尚未发送出去的至少两个片段中的一个片段(例如，第一片段)进行修改，获得该第二片段。
该第二片段中的类型指示信息(例如，第二类型指示信息)指示的该第二片段中的待传输数据(例如，第二待传输数据)的类型为控制字，该第二片段中的第二待传输数据的值不等于该第一片段中的待传输数据(例如，第一待传输数据)的值，该第一片段中的类 型指示信息(例如，第一类型指示信息)用于指示该第一待传输数据的类型为控制字或数据。
当该第一类型指示信息的值不等于该第二类型信息的值时，即该第一类型指示信息指示的该第一待传输数据的类型为数据，则MAC电路202分别对该第一类型指示信息与该第一待传输数据进行修改，将该第一类型指示信息的值修改为该第二类型指示信息的值，并将该第一待传输数据的值修改为该第二待传输数据的值，从而获得该第二片段；
当该第一类型指示信息的值等于该第二类型信息的值时，即该第一类型指示信息指示的该第一待传输数据的类型为控制字，则MAC电路202仅对该第一待传输数据进行修改，将该第一待传输数据的值修改为该第二待传输数据的值，从而获得该第二片段。
305，第一转发设备向目的设备发送该第二片段。
其中，该目的MAC地址域的值等于该目的设备的MAC地址，该目的设备的MAC地址不等于该第一转发设备的MAC地址。
具体地，该MAC电路202在获得了该第二片段后，便可以向目的设备104发送该第二片段，该目的MAC地址等于该目的设备104的MAC地址，该目的设备104的MAC地址不等于该转发设备102的MAC地址。在一种可能的设计中，第一转发设备经由其他转发设备向目的设备发送该第二片段。其他转发设备可以是一个转发设备，也可以是多个转发设备。其他转发设备不对第二片段进行修改。其他转发设备透传所述第二片段。在另一种可能的设计中，第一转发设备直接向目的设备发送该第二片段。第二片段不需要经由其他转发设备即可到达目的设备。
该MAC电路202首先将该第二片段发送至MAC电路203，由该MAC电路203将该第二片段发送至PHY电路204，最终由该PHY电路204将该第二片段发送至目的设备104。
需要说明的是，该第一片段为该以太网帧的多个片段中除该首个片段外的任意一个片段，例如，该第一片段为该以太网帧的多个片段的最后一个片段，此时，该第一片段包括该FCS域。
下面结合前面提到的PHY电路201向MAC电路202发送第一片段时使用的两种传输格式对MAC电路202对第一片段进行修改的两种情况进行说明。
情况1
当PHY电路201向MAC电路202发送该第一片段时使用的格式符合上述的传输格式1的情况下，该第二片段包含RxC域与RxD域，该RxC域的值用于携带该第二类型指示信息，该RxD域的值为该第二待传输数据。
作为示例而非限定，当该RxC域的值为0x0时，指示待传输数据为数据字节，即，该指示待传输数据的类型为数据字。当该RxC域的值为0x1时，指示待传输数据为控制字节，即，该指示该待传输数据的类型为控制字，当该RxD域的值为0xFE时，指示以太网帧在传输过程中发生了错误。
例如，当该第一片段中的第一类型指示信息的值为0时，则转发设备102的MAC电路202需要将该第一类型指示信息的值修改为1，并将该第一待传输数据的值修改为0xFE，从而获得该第二片段，即，该第二片段的第二类型指示信息的值为1，该第二待传输数据的值为0xFE。以便目的设备104在接收到该第二片段时，根据该第二片段中的RxC域的值(0x1)，确定该RxD域为控制字节，并进一步查看该RxD域的数据字节的值(0xFE)， 最终根据该RxD域的数据字节的值，确定新的以太网帧在传输过程中发生了错误。
还例如，当该第一片段中的第一类型指示信息的值为1时，则转发设备102的MAC电路202仅需要将该第一待传输数据的值修改为0xFE，从而获得该第二片段，即，该第二片段的第二类型指示信息的值为1，该第二待传输数据的值为0xFE。以便目的设备104在接收到该第二片段时，根据该第二片段中的RxC域的值(0x1)，确定该RxD域为控制字节，并进一步查看该RxD域的数据字节的值(0xFE)，最终根据该RxD域的数据字节的值，确定新的以太网帧在传输过程中发生了错误。
在本申请实施例中，通过修改第一片段中的第一类型指示信息和/或第一待传输数据，获得第二片段，从而使得下一转发设备根据该第二片段，确定以太网帧在传输过程中发生了错误。
需要说明的是，由于只有在该第二片段中的第二类型指示信息的值指示的第二待传输数据的类型为控制字时，目的设备104才有可能去进一步查看该第二待传输数据的值，则才有可能根据该第二待传输数据的值确定该以太网帧在传输过程中发生了错误。因此，当该第二类型指示信息的值指示的该第二待传输数据的类型为数据时，则MAC电路202需要同时对该第二类型指示信息的值与该第二待传输数据的值进行修改；当该第二类型指示信息的值指示的该第二待传输数据的类型为控制字时，则MAC电路202仅需要对该第二待传输数据的值进行修改。
情况2
当PHY电路201向MAC电路202发送该第一片段使用的格式符合上述的传输格式2的情况下，该第二片段包含同步头域，块类型域以及n(n≥7)个字节的待传输数据，该n个字节待传输数据中包括该第二待传输数据，该第二类型指示信息包括该同步头域与该块类型域，该第二类型指示信息用于指示该第二待传输数据的类型为控制字，该第二类型指示信息还用于指示该第二待传输数据在该多个待传输数据中的位置。
具体地，该MAC电路202从PHY电路201接收到的该第一片段的格式符合上述的传输格式2。即该第二片段包含2比特的同步头域、1字节的块类型域以及n个字节的待传输数据，该第二指示信息用于指示第二待传输数据的类型为控制字，该第二类型指示信息还用于指示该第二待传输数据在该多个待传输数据中的位置。具体实现时为：该同步头域指示该n个字节的待传输数据中是否包括类型为控制字的待传输数据，该块类型域用于指示该第二待传输数据在该n个字节的待传输数据中的位置。
需要说明是，关于该同步头域的取值、该块类型域的取值以及该n个字节的待传输数据的取值之间的对应关系请参照以太网标准IEEE802.3-2015中的49.2.4.4节中的图49-7(Figure 49-7)。
作为示例而非限定，从该图中可以看出，当该同步头域的值为01时，指示该同步头之后包括8个字节的待传输数据，且该8个字节的待传输数据均为数据字节，该8个数据字节分别为D 0～D 7；当该同步头域的值为10，且该块类型域的值为0x1e时，指示该块类型域之后包括8个字节的待传输数据，且该8个字节的待传输数据均为控制码，该8个控制码分别为C 0～C 7，当该C 0～C 7中的任意一个控制码的值为0x1e时，指示该以太网帧在传输过程中发生了错误；当该同步头域的值为10，且该块类型域的值为0x33时，指示该块类型域之后包括8个字节的待传输数据，且该8个待传输数据中包括4个控制码与3个数 据字节，该4个控制码分别为C 0～C 3，该3个数据字节分别为D 5～D 7，当该C 0～C 3中的任意一个控制码的值为0x1e时，指示以太网帧在传输过程中发生了错误。
例如，当该第一片段中的同步头域的值为01时，则转发设备102的MAC电路202需要将该第一类型指示信息的值修改为10，并将该同步头域之后的8个数据字节D 0～D 7中的D 3修改为控制码C 3，并且该控制码C 3的值为0x1e，从而获得该第二片段，即，该第二片段的同步头域的值为10，该同步头域之后的8个待传输数据分别为D 0、D 1、D 2、C 3、D 4、D 5、D 6、D 7，其中，C 3为该第二待传输数据。以便目的设备104在接收到该第二片段时，根据该第二片段中的同步头域的值(10)，确定该同步头域之后的8个待传输数据中包括控制码，并进一步查看该控制码的值(0x1e)，最终根据该控制码的值，确定新的以太网帧在传输过程中发生了错误。
本申请中，源设备生成以太网帧并经由至少一个转发设备向目的设备发送该以太网帧。转发设备对接收到的以太网帧进行CRC校验确定以太网帧发生了错误。转发设备对接收到的以太网帧进行了修改。修改后的以太网帧中包含了第二片段。目的设备接收到的以太网帧不同于源设备生成的以太网帧。为了对不同的对象进行区分，本申请将目的设备收到的以太网帧称为新的以太网帧。
还例如，例如，当该第一片段中的同步头域的值为10时，则转发设备102的MAC电路202仅需要将该块类型域之后的C 0～C 3或D 5～D 7中的任意一个的值修改为0x1e(例如，将该C 0～C 3中的C 2的值修改为0x1e，或者将D 5～D 7中的D 6修改为控制码C 6)，从而获得该第二片段，即，该第二片段的同步头域的值为10，该同步头域之后的8个待传输数据中的C 2的值为0x1e，其余待传输数据的值不变，C 2为该第二待传输数据。以便目的设备104在接收到该第二片段时，根据该第二片段中的同步头域的值(10)，确定该同步头域之后的8个待传输数据中包括控制码，并根据该块类型域的值0x33，确定该块类型域之后的C 0～C 3位置上的待传输数据为控制码，并进一步查看该控制码的值(0x1e)，最终根据该控制码的值，确定新的以太网帧在传输过程中发生了错误。
需要说明的是，由于块类型域用于指示其后的8个字节的待传输数据中的控制码在该8个字节待传输数据中的位置，因此当将D 5～D 7中的D 6修改为控制码C 6时，相应地也要对块类型域的值进行修改。
还需要说明的是，上述新的以太网帧为包括该第二片段以及该多个片段中除该第一片段的以太网帧。
在本申请实施例中，通过修改第一片段中的第一类型指示信息和/或第一待传输数据，获得第二片段，从而使得下一转发设备根据该第二片段，确定以太网帧在传输过程中发生了错误。
需要说明的是，由于只有在该第二片段中的第二类型指示信息的值指示的第二待传输数据的类型为控制字时，目的设备104才有可能去进一步查看该第二待传输数据的值，则才有可能根据该第二待传输数据的值确定该以太网帧在传输过程中发生了错误。因此，当该第二类型指示信息的值指示的该第二待传输数据的类型为数据时，则MAC电路202需要同时对该第二类型指示信息的值与该第二待传输数据的值进行修改；当该第二类型指示信息的值指示的该第二待传输数据的类型为控制字时，则MAC电路202仅需要对该第二待传输数据的值进行修改。
下面针对情况1与情况2中涉及的目的设备104确定新的以太网帧发生了错误的具体细节进行说明。
该目的设备104接收该第二片段，以及该多个片段中除该第一片段的片段；该目的设备104基于该第二片段确定新的以太网帧发生了错误，该新的以太网帧包含了该第二片段，以及该多个片段中除该第一片段的片段；该目的设备104响应于该以太网帧发生了错误的确定，将该新的以太网帧丢弃。
作为示例而非限定，该目的设备104的PHY电路201包括物理编码子层接收机(PCS receiver)，该目的设备基于该第二片段确定新的以太网帧发生了错误包括：
该目的设备104响应于该第二片段中的第二待传输数据，该PHY电路201的PCS receiver进入RX_E状态，处于RX_E状态的该PHY电路201的PCS receiver向该MAC电路202发送信号：
该信号包含值等于1的RxC域，以及值等于0xFE的RxD域，该MAC电路202基于该信号中的RxC域的值以及RxD域的值，确定该新的以太网帧发送了错误；或
该信号包含值等于10的同步头域，值等于0x33的块类型域，以及C 0～C 3与D 5～D 7，其中C 2的值为0x1e，该MAC电路202基于该信号中的同步头域的值，块类型域的值，以及C 2的值，确定该新的以太网帧发送了错误。
作为示例而非限定，当该目的设备104响应于该新的以太网帧发生了错误的确定，将该新的以太网帧丢弃，包括：
该目的设备104中的MAC电路202丢弃该新的以太网帧。
需要说明的是，当该转发设备102与该目的设备104相邻时，即，该转发设备102与该目的设备104之间不存在其他转发设备时，该修改的片段由该转发设备102直接发送至该目的设备104；或者，当该转发设备102与该目的设备104之间还包括其他转发设备时，该第二片段则是由该转发设备102先发送至位于其后的转发设备，再由后面的转发设备(例如，转发设备103)发送至目的设备104。
下面对转发设备103将从转发设备102接收的以太网帧的多个片段发送至目的设备104的方法400进行说明。
图4为本申请实施例提供的传输数据的方法400的示意性流程图，该方法包括401以及402。该方法400可以由图1或图2所示的转发设备103执行。
401，第二转发设备接收首个片段以及第一片段，该第一片段包括类型指示信息以及待传输数据，该类型指示信息用于指示该待传输数据的类型，该待传输数据的类型为控制字，该待传输数据用于指示以太网帧发生了错误。
其中，该以太网帧包括该首个片段，该首个片段包括目的MAC地址域，该目的MAC地址域的值等于目的设备的MAC地址，该第二转发设备的MAC地址不等于该目的MAC地址域的值。
例如，第二转发设备包含接收以太网端口。接收以太网端口中包含PHY电路。第二转发设备可以利用接收以太网端口中包含PHY电路接收首个片段以及第一片段。关于401的具体实现方式，可以参考图3所示的实施例对301的描述，此处不再赘述。
具体地，转发设备103(例如，第二转发设备)的PHY电路201接收转发设备102的PHY电路204发送的方法300中的修改的片段(例如，第一片段)，并将该修改的片 段发送至转发设备103的MAC电路202，该修改的片段包括类型指示信息与待传输数据，该类型指示信息用于指示该待传输数据的类型为控制字，该待传输数据用于指示以太网帧在传输过程中发生了错误，其中，该以太网帧包括该首个片段，该首个片段包括目的MAC地址域，该目的MAC地址域的值等于目的设备104的MAC地址，该转发设备103的MAC地址不等于该目的MAC地址域的值。
402，该第二转发设备向该目的设备发送该第一片段。
例如，第二转发设备包含发送以太网端口。关于402的具体实现方式，可以参考图3所示的实施例对305的描述，此处不再赘述。
作为示例而非限定，该转发设备103接收首个片段以及第一片段之后，以及，该转发设备103向该目的设备104发送该第一片段之前，该方法400还包括：
该转发设备103基于该目的MAC地址域确定该转发设备103的MAC地址不等于该目的MAC地址域的值。
该转发设备103向该目的设备104发送该第一片段，包括：
该转发设备103响应于该转发设备103的MAC地址不等于该目的MAC地址域的值的确定，该转发设备103向该目的设备104发送该第一片段。
具体地，转发设备103在向目的设备104发送该第一片段之前，确定其MAC地址不等于该首个片段包括的目的MAC地址域的值，进而确定转发设备103不是目的设备，并确定将该第一片段发送至目的设备104。
作为示例而非限定，该以太网帧还包括第二片段，该转发设备103接收到该第一片段前，响应于通过对该以太网帧进行CRC校验确定该以太网帧发生了错误，该第二片段被修改为该第一片段。
具体地，该以太网帧还包括第二片段，当转发设备102确定该以太网帧发生了错误时，该转发设备102响应于通过对该以太网帧进行CRC校验确定该以太网帧发生了错误，将该第二片段修改为该第一片段，并将该第一片段发送至该转发设备103。
作为示例而非限定，该转发设备103的PHY电路201包括物理编码子层接收机(physical coding sublayer，PCS)receiver。该转发设备103的PHY电路201接收到该第一片段之后，该PCS receiver响应于第一片段中的待传输数据，该PCS receiver进入RX_E状态。进而，PHY电路201可以确定该以太网帧在传输过程中发生了错误。
作为示例而非限定，该第一片段包含RxC域与RxD域，该RxC域携带该类型指示信息，该RxD域携带该待传输数据。
作为示例而非限定，该RxC域的值等于1，该RxD域的值等于0xFE。
作为示例而非限定，该第一片段包含同步头域，块类型域以及多个待传输数据，该多个待传输数据中包括该待传输数据，该同步头域与该块类型域携带该类型指示信息。
作为示例而非限定，该同步头域的值等于0x10，该待传输数据的值等于0x1e。
作为示例而非限定，该第二片段中的待传输数据包括以太网帧的帧校验序列FCS域，或，该第二片段不包括以太网帧的帧校验序列FCS域。
上文结合图1至图4，描述了本申请实施例提供的传输数据的方法，下面结合图5至图8描述本申请实施例提供的转发装置、转发设备、目的装置与目的设备。
图5为本申请实施例提供的转发装置500的示意性框图，该转发装置500包括接收模 块510、处理模块520与发送模块530。
举例来说，转发装置500可以是图1或图2所示的转发设备102。转发装置500可以用于执行图3所示的方法。关于转发装置500的具体实现方式，可以参考图3对应的实施例的说明，此处不再赘述。
接收模块510，用于接收以太网帧的多个片段，该多个片段包括首个片段以及第一片段，该首个片段包括目的媒体访问控制MAC地址域。
举例来说，接收模块510可以用于执行301。关于接收模块510的具体实现方式，可以参考图3对应的实施例对301的描述。
处理模块520，用于根据该多个片段确定该以太网帧的帧校验序列FCS值；基于该FCS值确定该以太网帧发生了错误；以及，响应于该以太网帧发生了错误的确定，将该第一片段修改为第二片段，该第一片段包括第一类型指示信息以及第一待传输数据，该第二片段包括第二类型指示信息以及第二待传输数据，该第一类型指示信息用于指示该第一待传输数据的类型，该第二类型指示信息用于指示该第二待传输数据的类型为控制字，该第一待传输数据的值不等于该第二待传输数据的值，该第二待传输数据用于指示该以太网帧发生了错误。
举例来说，处理模块520可以用于执行302、303以及304。关于处理模块520的具体实现方式，可以参考图3对应的实施例对302、303以及304的描述。
发送模块530，用于向目的设备发送该第二片段，该目的MAC地址域的值等于该目的设备的MAC地址，该目的设备的MAC地址不等于该转发设备的MAC地址。
举例来说，发送模块530可以用于执行305。关于发送模块530的具体实现方式，可以参考图3对应的实施例对305的描述。
可选地，该处理模块520用于：当该第一类型指示信息的值不等于该第二类型指示信息的值时，将该第一片段中的该第一类型指示信息以及该第一待传输数据分别修改为该第二类型指示信息以及该第二待传输数据；或，当该第一类型指示信息的值等于该第二类型指示信息的值时将该第一片段中的该第一待传输数据修改为该第二待传输数据。
可选地，该第二片段包含RxC域与RxD域，该RxC域携带该第二类型指示信息，该RxD域携带该第二待传输数据。
可选地，该RxC域的值为1，该RxD域的值等于0xFE。
可选地，该第二片段包含同步头域，块类型域以及多个待传输数据，该多个待传输数据中包括该第二待传输数据，该第二类型指示信息包括该同步头域与该块类型域，该第二类型指示信息用于指示该第二待传输数据的类型为控制字，该第二类型指示信息还用于指示该第二待传输数据在该多个待传输数据中的位置。
可选地，该第二待传输数据的值等于0x1e。
可选地，该第一片段中的待传输数据包括FCS域，或，该第一片段不包括FCS域。可选地，该处理模块520用于：在该FCS值不等于该FCS域的值时，确定该以太网帧发生了错误。
应理解，本发明实施例中的处理模块520可以由处理器或处理器相关电路组件实现，接收模块510与发送模块530可以由收发器或收发器相关电路组件实现。
图6为本申请实施例提供的转发装置600的示意性框图，该转发装置600包括接收模 块610与发送模块620。
举例来说，转发装置600可以是图1或图2所示的转发设备103。转发装置600可以用于执行图4所示的方法。关于转发装置600的具体实现方式，可以参考图4对应的实施例的说明，此处不再赘述。
接收模块610，用于接收首个片段以及第一片段，该第一片段包括类型指示信息以及待传输数据，该类型指示信息用于指示该待传输数据的类型，该待传输数据的类型为控制字，该待传输数据用于指示以太网帧发生了错误，该以太网帧包括该首个片段，该首个片段包括目的MAC地址域，该目的MAC地址域的值等于目的设备的MAC地址，该转发设备的MAC地址不等于该目的MAC地址域的值。
举例来说，接收模块610可以用于执行401。关于接收模块610的具体实现方式，可以参考图4对应的实施例中对401的描述。
发送模块620，用于向该目的设备发送该第一片段。
举例来说，发送模块620可以用于执行402。关于发送模块620的具体实现方式，可以参考图4对应的实施例中对402的描述。
可选地，该以太网帧还包括第二片段，该转发设备接收到该第一片段前，响应于通过对该以太网帧进行CRC校验确定该以太网帧发生了错误，该第二片段被修改为该第一片段。
可选地，该目的装置600还包括处理模块630，该处理模块630用于：
在该接收模块610接收首个片段以及第一片段之后，以及，在该发送模块620向该目的设备发送该第一片段之前，基于该目的MAC地址域确定该转发设备的MAC地址不等于该目的MAC地址域的值；
该发送模块620用于：
响应于该转发设备的MAC地址不等于该目的MAC地址域的值的确定，向该目的设备发送该第一片段。
可选地，该接收模块610包括PCS receiver，该PCS receiver用于：在该接收模块610接收该第一片段之后，响应于该待传输数据，该PCS receiver进入RX_E状态。
可选地，该第一片段包含RxC域与RxD域，该RxC域携带该类型指示信息，该RxD域携带该待传输数据。
可选地，该RxC域的值等于1，该RxD域的值等于0xFE。
可选地，该第一片段包含同步头域，块类型域以及多个待传输数据，该多个待传输数据中包括该待传输数据，该类型指示信息包括该同步头域与该块类型域，该类型指示信息用于指示该待传输数据的类型为控制字，该类型指示信息还用于指示该待传输数据在该多个待传输数据中的位置。
可选地，该同步头域的值等于0x10，该待传输数据的值等于0x1E。
可选地，该第二片段中的待传输数据包括以太网帧的帧校验序列FCS域，或，该第二片段不包括以太网帧的帧校验序列FCS域。
应理解，本发明实施例中的处理模块630可以由处理器或处理器相关电路组件实现，接收模块610、发送模块620可以由收发器或收发器相关电路组件实现。
图7为本申请实施例提供的转发设备700的示意性框图，该转发设备700包括接收电 路710、处理电路720与发送电路730。
举例来说，转发设备700可以是图1或图2所示的转发设备102。转发设备700可以用于执行图3所示的方法。关于转发设备700的具体实现方式，可以参考图3对应的实施例的说明，此处不再赘述。
接收电路710，用于接收以太网帧的多个片段，该多个片段包括首个片段以及第一片段，该首个片段包括目的MAC地址域。
举例来说，接收电路710可以用于执行301。关于接收电路710的具体实现方式，可以参考图3对应的实施例对301的描述。
处理电路720，用于根据该多个片段确定该以太网帧的帧校验序列FCS值；基于该FCS值确定该以太网帧发生了错误；以及，响应于该以太网帧发生了错误的确定，将该第一片段修改为第二片段，该第一片段包括第一类型指示信息以及第一待传输数据，该第二片段包括第二类型指示信息以及第二待传输数据，该第一类型指示信息用于指示该第一待传输数据的类型，该第二类型指示信息用于指示该第二待传输数据的类型为控制字，该第一待传输数据的值不等于该第二待传输数据的值，该第二待传输数据用于指示该以太网帧发生了错误。
举例来说，处理电路720可以用于执行302、303以及304。关于处理电路720的具体实现方式，可以参考图3对应的实施例对302、303以及304的描述。
发送电路730，用于向目的设备发送该第二片段，该目的MAC地址域的值等于该目的设备的MAC地址，该目的设备的MAC地址不等于该转发设备的MAC地址。
举例来说，发送电路730可以用于执行305。关于发送电路730的具体实现方式，可以参考图3对应的实施例对305的描述。
可选地，该处理电路720用于：当该第一类型指示信息的值不等于该第二类型指示信息的值时，将该第一片段中的该第一类型指示信息以及该第一待传输数据分别修改为该第二类型指示信息以及该第二待传输数据；或，当该第一类型指示信息的值等于该第二类型指示信息的值时将该第一片段中的该第一待传输数据修改为该第二待传输数据。
可选地，该第二片段包含RxC域与RxD域，该RxC域携带该第二类型指示信息，该RxD域携带该第二待传输数据。
可选地，该RxC域的值为1，该RxD域的值等于0xFE。
可选地，该第二片段包含同步头域，块类型域以及多个待传输数据，该多个待传输数据中包括该第二待传输数据，该第二类型指示信息包括该同步头域与该块类型域，该第二类型指示信息用于指示该第二待传输数据的类型为控制字，该第二类型指示信息还用于指示该第二待传输数据在该多个待传输数据中的位置。
可选地，该第二待传输数据的值等于0x1e。
可选地，该第一片段中的待传输数据包括FCS域，或，该第一片段不包括FCS域。可选地，该处理电路720用于：在该FCS值不等于该FCS域的值时，确定该以太网帧发生了错误。
图8为本申请实施例提供的转发设备800的示意性框图，该转发设备800包括接收电路810、发送电路820与处理电路830。
举例来说，转发设备800可以是图1或图2所示的转发设备103。转发设备800可以 用于执行图4所示的方法。关于转发设备800的具体实现方式，可以参考图4对应的实施例的说明，此处不再赘述。
接收电路810，用于接收首个片段以及第一片段，该第一片段包括类型指示信息以及待传输数据，该类型指示信息用于指示该待传输数据的类型，该待传输数据的类型为控制字，该待传输数据用于指示以太网帧发生了错误，该以太网帧包括该首个片段，该首个片段包括目的MAC地址域，该目的MAC地址域的值等于目的设备的MAC地址，该转发设备的MAC地址不等于该目的MAC地址域的值。
举例来说，接收电路810可以用于执行401。关于接收电路810的具体实现方式，可以参考图4对应的实施例中对401的描述。
发送电路820，用于向该目的设备发送该第一片段。
举例来说，发送电路820可以用于执行402。关于发送电路820的具体实现方式，可以参考图4对应的实施例中对402的描述。
可选地，该以太网帧还包括第二片段，该转发设备接收到该第一片段前，响应于通过对该以太网帧进行CRC校验确定该以太网帧发生了错误，该第二片段被修改为该第一片段。
可选地，该目的装置600还包括处理电路830，该处理电路830用于：
在该接收电路810接收首个片段以及第一片段之后，以及，在该发送电路820向该目的设备发送该第一片段之前，基于该目的MAC地址域确定该转发设备的MAC地址不等于该目的MAC地址域的值；
该发送电路820用于：
响应于该转发设备的MAC地址不等于该目的MAC地址域的值的确定，向该目的设备发送该第一片段。
可选地，该接收电路810包括物理编码子层接收机PCS receiver，该PCS receiver用于：在该接收电路810接收该第一片段之后，响应于该待传输数据，该PCS receiver进入RX_E状态。
可选地，该第一片段包含RxC域与RxD域，该RxC域携带该类型指示信息，该RxD域携带该待传输数据。
可选地，该RxC域的值等于1，该RxD域的值等于0xFE。
可选地，该第一片段包含同步头域，块类型域以及多个待传输数据，该多个待传输数据中包括该待传输数据，该类型指示信息包括该同步头域与该块类型域，该类型指示信息用于指示该待传输数据的类型为控制字，该类型指示信息还用于指示该待传输数据在该多个待传输数据中的位置。
可选地，该同步头域的值等于0x10，该待传输数据的值等于0x1E。
可选地，该第二片段中的待传输数据包括以太网帧的帧校验序列FCS域，或，该第二片段不包括以太网帧的帧校验序列FCS域。
应理解，本发明实施例中提及的处理器可以是中央处理单元(Central Processing Unit，CPU)，还可以是其他通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现成可编程门阵列(Field Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、 分立硬件组件等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
还应理解，本发明实施例中提及的存储器可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(Read-Only Memory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(Dynamic RAM，DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(Synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DR RAM)。
需要说明的是，当处理器为通用处理器、DSP、ASIC、FPGA或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件时，存储器(存储模块)集成在处理器中。
应注意，本文描述的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件执行，还是以计算机软件和电路硬件的结合执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而 前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。

Claims (34)

  1. 一种传输数据的方法，其特征在于，包括：
    第一转发设备接收以太网帧的多个片段，所述多个片段包括首个片段以及第一片段，所述首个片段包括目的媒体访问控制MAC地址域；
    所述第一转发设备根据所述多个片段确定所述以太网帧的帧校验序列FCS值，；
    所述第一转发设备基于所述FCS值确定所述以太网帧发生了错误；
    所述第一转发设备响应于所述以太网帧发生了错误的确定，将所述第一片段修改为第二片段，所述第一片段包括第一类型指示信息以及第一待传输数据，所述第二片段包括第二类型指示信息以及第二待传输数据，所述第一类型指示信息用于指示所述第一待传输数据的类型，所述第二类型指示信息用于指示所述第二待传输数据的类型为控制字，所述第一待传输数据的值不等于所述第二待传输数据的值，所述第二待传输数据用于指示所述以太网帧发生了错误；
    所述第一转发设备向目的设备发送所述第二片段，所述目的MAC地址域的值等于所述目的设备的MAC地址，所述目的设备的MAC地址不等于所述第一转发设备的MAC地址。
  2. 根据权利要求1所述的方法，其特征在于，所述第一转发设备响应于所述以太网帧发生了错误的确定，将所述第一片段修改为第二片段包括：
    当所述第一类型指示信息的值不等于所述第二类型指示信息的值时，所述第一转发设备将所述第一片段中的所述第一类型指示信息以及所述第一待传输数据分别修改为所述第二类型指示信息以及所述第二待传输数据；或，
    当所述第一类型指示信息的值等于所述第二类型指示信息的值时，所述第一转发设备将所述第一片段中的所述第一待传输数据修改为所述第二待传输数据。
  3. 根据权利要求1或2所述的方法，其特征在于，所述第二片段包含RxC域与RxD域，所述RxC域携带所述第二类型指示信息，所述RxD域携带所述第二待传输数据。
  4. 根据权利要求3所述的方法，其特征在于，所述RxC域的值为1，所述RxD域的值等于0xFE。
  5. 根据权利要求1或2所述的方法，其特征在于，
    所述第二片段包含同步头域，块类型域以及多个待传输数据，所述多个待传输数据中包括所述第二待传输数据，所述第二类型指示信息包括所述同步头域与所述块类型域，所述第二类型指示信息用于指示所述第二待传输数据的类型为控制字，所述第二类型指示信息还用于指示所述第二待传输数据在所述多个待传输数据中的位置。
  6. 根据权利要求5所述的方法，其特征在于，所述第二待传输数据的值等于0x1e。
  7. 根据权利要求1至6中任一项所述的方法，其特征在于，所述第一片段中的待传输数据包括FCS域，或，所述第一片段不包括FCS域。
  8. 根据权利要求7所述的方法，其特征在于，所述第一转发设备基于所述FCS值确定所述以太网帧发生了错误，包括：
    在所述FCS值不等于所述FCS域的值时，所述第一转发设备确定所述以太网帧发生 了错误。
  9. 一种传输数据的方法，其特征在于，包括：
    第二转发设备接收首个片段以及第一片段，所述第一片段包括类型指示信息以及待传输数据，所述类型指示信息用于指示所述待传输数据的类型，所述待传输数据的类型为控制字，所述待传输数据用于指示以太网帧发生了错误，所述以太网帧包括所述首个片段，所述首个片段包括目的MAC地址域，所述目的MAC地址域的值等于目的设备的MAC地址，所述第二转发设备的MAC地址不等于所述目的MAC地址域的值；
    所述第二转发设备向所述目的设备发送所述第一片段。
  10. 根据权利要求9所述的方法，其特征在于，所述以太网帧还包括第二片段，所述第二转发设备接收到所述第一片段前，响应于通过对所述以太网帧进行CRC校验确定所述以太网帧发生了错误，所述第二片段被修改为所述第一片段。
  11. 根据权利要求9或10所述的方法，其特征在于，所述第二转发设备接收首个片段以及第一片段之后，以及，所述第二转发设备向所述目的设备发送所述第一片段之前，所述方法还包括：
    所述第二转发设备基于所述目的MAC地址域确定所述转发设备的MAC地址不等于所述目的MAC地址域的值；
    所述第二转发设备向所述目的设备发送所述第一片段包括：
    所述第二转发设备响应于所述第二转发设备的MAC地址不等于所述目的MAC地址域的值的确定，所述第二转发设备向所述目的设备发送所述第一片段。
  12. 根据权利要求9至11中任一项所述的方法，其特征在于，所述第二转发设备包括物理编码子层接收机PCS receiver，所述第二转发设备接收所述第一片段之后，所述方法还包括：
    响应于所述待传输数据，所述PCS receiver进入RX_E状态。
  13. 根据权利要求9至12中任一项所述的方法，其特征在于，所述第一片段包含RxC域与RxD域，所述RxC域携带所述类型指示信息，所述RxD域携带所述待传输数据。
  14. 根据权利要求13所述的方法，其特征在于，所述RxC域的值等于1，所述RxD域的值等于0xFE。
  15. 根据权利要求9至12中任一项所述的方法，其特征在于，
    所述第一片段包含同步头域，块类型域以及多个待传输数据，所述多个待传输数据中包括所述待传输数据，所述类型指示信息包括所述同步头域与所述块类型域，所述类型指示信息用于指示所述待传输数据的类型为控制字，所述类型指示信息还用于指示所述待传输数据在所述多个待传输数据中的位置。
  16. 根据权利要求15所述的方法，其特征在于，所述同步头域的值等于0x10，所述待传输数据的值等于0x1E。
  17. 根据权利要求10至16中任一项所述的方法，其特征在于，所述第二片段中的待传输数据包括以太网帧的帧校验序列FCS域，或，所述第二片段不包括以太网帧的帧校验序列FCS域。
  18. 一种转发设备，其特征在于，包括：
    接收电路，用于接收以太网帧的多个片段，所述多个片段包括首个片段以及第一片段， 所述首个片段包括目的媒体访问控制MAC地址域；
    处理电路，用于根据所述多个片段确定所述以太网帧的帧校验序列FCS值；基于所述FCS值确定所述以太网帧发生了错误；以及，响应于所述以太网帧发生了错误的确定，将所述第一片段修改为第二片段，所述第一片段包括第一类型指示信息以及第一待传输数据，所述第二片段包括第二类型指示信息以及第二待传输数据，所述第一类型指示信息用于指示所述第一待传输数据的类型，所述第二类型指示信息用于指示所述第二待传输数据的类型为控制字，所述第一待传输数据的值不等于所述第二待传输数据的值，所述第二待传输数据用于指示所述以太网帧发生了错误；
    发送电路，用于向目的设备发送所述第二片段，所述目的MAC地址域的值等于所述目的设备的MAC地址，所述目的设备的MAC地址不等于所述转发设备的MAC地址。
  19. 根据权利要求18所述的转发设备，其特征在于，所述处理电路用于：
    当所述第一类型指示信息的值不等于所述第二类型指示信息的值时，将所述第一片段中的所述第一类型指示信息以及所述第一待传输数据分别修改为所述第二类型指示信息以及所述第二待传输数据；或，
    当所述第一类型指示信息的值等于所述第二类型指示信息的值时将所述第一片段中的所述第一待传输数据修改为所述第二待传输数据。
  20. 根据权利要求18或19所述的转发设备，其特征在于，所述第二片段包含RxC域与RxD域，所述RxC域携带所述第二类型指示信息，所述RxD域携带所述第二待传输数据。
  21. 根据权利要求20所述的转发设备，其特征在于，所述RxC域的值为1，所述RxD域的值等于0xFE。
  22. 根据权利要求18或19所述的转发设备，其特征在于，所述第二片段包含同步头域，块类型域以及多个待传输数据，所述多个待传输数据中包括所述第二待传输数据，所述第二类型指示信息包括所述同步头域与所述块类型域，所述第二类型指示信息用于指示所述第二待传输数据的类型为控制字，所述第二类型指示信息还用于指示所述第二待传输数据在所述多个待传输数据中的位置。
  23. 根据权利要求22所述的转发设备，其特征在于，所述第二待传输数据的值等于0x1e。
  24. 根据权利要求18至23中任一项所述的转发设备，其特征在于，所述第一片段中的待传输数据包括FCS域，或，所述第一片段不包括FCS域。
  25. 根据权利要求24所述的转发设备，其特征在于，所述处理电路用于：
    在所述FCS值不等于所述FCS域的值时，确定所述以太网帧发生了错误。
  26. 一种转发设备，其特征在于，包括：
    接收电路，用于接收首个片段以及第一片段，所述第一片段包括类型指示信息以及待传输数据，所述类型指示信息用于指示所述待传输数据的类型，所述待传输数据的类型为控制字，所述待传输数据用于指示以太网帧发生了错误，所述以太网帧包括所述首个片段，所述首个片段包括目的MAC地址域，所述目的MAC地址域的值等于目的设备的MAC地址，所述转发设备的MAC地址不等于所述目的MAC地址域的值；
    发送电路，用于向所述目的设备发送所述第一片段。
  27. 根据权利要求26所述的转发设备，其特征在于，所述以太网帧还包括第二片段，所述转发设备接收到所述第一片段前，响应于通过对所述以太网帧进行CRC校验确定所述以太网帧发生了错误，所述第二片段被修改为所述第一片段。
  28. 根据权利要求26或27所述的转发设备，其特征在于，所述处理电路用于：
    在所述接收电路接收首个片段以及第一片段之后，以及，在所述发送电路向所述目的设备发送所述第一片段之前，基于所述目的MAC地址域确定所述转发设备的MAC地址不等于所述目的MAC地址域的值；
    所述发送电路用于：
    响应于所述转发设备的MAC地址不等于所述目的MAC地址域的值的确定，向所述目的设备发送所述第一片段。
  29. 根据权利要求26至28中任一项所述的转发设备，其特征在于，所述接收电路包括物理编码子层接收机PCS receiver，所述PCS receiver用于：
    在所述接收电路接收所述第一片段之后，响应于所述待传输数据，所述PCS receiver进入RX_E状态。
  30. 根据权利要求26至29中任一项所述的转发设备，其特征在于，所述第一片段包含RxC域与RxD域，所述RxC域携带所述类型指示信息，所述RxD域携带所述待传输数据。
  31. 根据权利要求30所述的转发设备，其特征在于，所述RxC域的值等于1，所述RxD域的值等于0xFE。
  32. 根据权利要求26至29中任一项所述的转发设备，其特征在于，所述第一片段包含同步头域，块类型域以及多个待传输数据，所述多个待传输数据中包括所述待传输数据，所述类型指示信息包括所述同步头域与所述块类型域，所述类型指示信息用于指示所述待传输数据的类型为控制字，所述类型指示信息还用于指示所述待传输数据在所述多个待传输数据中的位置。
  33. 根据权利要求32所述的转发设备，其特征在于，所述同步头域的值等于0x10，所述待传输数据的值等于0x1E。
  34. 根据权利要求27至33中任一项所述的转发设备，其特征在于，所述第二片段中的待传输数据包括以太网帧的帧校验序列FCS域，或，所述第二片段不包括以太网帧的帧校验序列FCS域。
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