WO2019162801A1 - 表示装置の動作方法 - Google Patents

表示装置の動作方法 Download PDF

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Publication number
WO2019162801A1
WO2019162801A1 PCT/IB2019/051134 IB2019051134W WO2019162801A1 WO 2019162801 A1 WO2019162801 A1 WO 2019162801A1 IB 2019051134 W IB2019051134 W IB 2019051134W WO 2019162801 A1 WO2019162801 A1 WO 2019162801A1
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WO
WIPO (PCT)
Prior art keywords
data
image data
period
pixel
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2019/051134
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English (en)
French (fr)
Japanese (ja)
Inventor
豊高耕平
渡邉一徳
川島進
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2020501861A priority Critical patent/JPWO2019162801A1/ja
Priority to US16/970,779 priority patent/US11183137B2/en
Publication of WO2019162801A1 publication Critical patent/WO2019162801A1/ja
Anticipated expiration legal-status Critical
Priority to JP2024000168A priority patent/JP7585528B2/ja
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0235—Field-sequential colour display

Definitions

  • One embodiment of the present invention relates to a display device and an operation method thereof.
  • one embodiment of the present invention is not limited to the above technical field.
  • the technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method.
  • one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter). Therefore, the technical field of one embodiment of the present invention disclosed in this specification more specifically includes a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a memory device, an imaging device, A driving method or a manufacturing method thereof can be given as an example.
  • a semiconductor device refers to any device that can function by utilizing semiconductor characteristics.
  • a transistor and a semiconductor circuit are one embodiment of a semiconductor device.
  • a memory device, a display device, an imaging device, and an electronic device may include a semiconductor device.
  • each pixel is provided with a plurality of sub-pixels having color filters (for example, red, green, and blue) that transmit only light having a wavelength exhibiting a specific color.
  • a desired color is formed by controlling transmission of white light for each sub-pixel and mixing a plurality of colors for each pixel.
  • a display device that performs display by the latter is provided with a plurality of light sources (for example, red, green, and blue) that emit light having different colors.
  • the plurality of light sources emit light sequentially, and a desired color is formed by controlling the transmission of light exhibiting each color for each pixel. That is, the former is a method of forming a desired color by dividing the area of one pixel for each light exhibiting a specific color, and the latter is desired by dividing the display period by time for each light exhibiting a specific color. This is a method of forming a color.
  • a display device that performs display by the field sequential method has the following advantages compared to a display device that performs display by a color filter method.
  • Patent Documents 1 and 2 disclose a display device that performs display by a field sequential method. Specifically, in Patent Document 1, image data for each pixel is supplied by simultaneously supplying image data to pixels arranged in a plurality of rows without changing the response speed of a transistor or the like included in the display device. The input frequency can be increased. In Patent Document 2, writing image data to pixels arranged in a row isolated from the specific row is performed following writing of image data to pixels arranged in the specific row. Thus, it is possible to sequentially write image data and turn on the backlight for each specific pixel, instead of writing image data and turning on the backlight for all the pixels.
  • a display device that performs display by a field sequential method and has a liquid crystal device as a display device
  • the image data is written to the pixels of the last row.
  • a waiting time occurs even after the response of the liquid crystal device is completed for pixels other than the last row. Therefore, the operation of the display device is more than when image data is written to all pixels simultaneously. The speed is reduced.
  • a phenomenon called a color break occurs in which the frame frequency is lowered and the images of the respective colors are individually viewed without being synthesized.
  • the operation speed of the display device can be reduced even when writing image data for each row. This can be equivalent to the case where image data is written to all pixels simultaneously.
  • the manufacturing cost of the display device may increase, and the degree of freedom of light source arrangement may be reduced.
  • An object of one embodiment of the present invention is to provide a display device that operates at high speed. Another object is to provide a display device capable of displaying a high-quality image. Another object is to provide a low-cost display device. Another object is to provide a display device with low power consumption. Another object is to provide a display device with high reliability. Another object is to provide a novel display device. Another object is to provide a novel semiconductor device or the like.
  • Another object is to provide a method for operating a display device that operates at high speed. Another object is to provide a method for operating a display device capable of displaying a high-quality image. Another object is to provide a method for operating a low-cost display device. Another object is to provide a method for operating a display device with low power consumption. Another object is to provide a method for operating a display device with high reliability. Another object is to provide a novel method for operating a display device. Another object is to provide a method for operating a novel semiconductor device or the like.
  • One embodiment of the present invention includes a display portion provided with pixels.
  • the display portion has a function of displaying an image of a first color and an image of a second color.
  • a first period in which data and first data are written to the pixels a second period in which an image of the first color corresponding to the first image data is displayed on the display unit, and the first image Based on the data and the first data, a third period in which the second image data is generated inside the pixel, and an image of the second color corresponding to the second image data is displayed on the display unit.
  • a fourth period during which the display device operates.
  • the second image data is stored inside the pixel based on the first image data and the first data. It may be generated.
  • the third period may be shorter than the first period.
  • the display device includes a source driver, the source driver is electrically connected to the pixel via the first data line, and the source driver is connected to the pixel via the second data line.
  • the source driver is electrically connected and has a function of generating first image data and first data. In the first period, the first image data is transmitted via the first data line. The first data written to the pixel may be written to the pixel via the second data line.
  • One embodiment of the present invention includes a display portion provided with pixels, and the display portion displays a first color image, a second color image, and a third color image.
  • a first period in which the first image data and the first data are written to the pixels, and a second color image corresponding to the first image data is displayed on the display unit.
  • a fourth period in which an image of two colors is displayed on the display unit, a fifth period in which the third image data and the second data are written to the pixels, and a third period corresponding to the third image data.
  • the fourth image data inside the pixel based on the sixth period for displaying the three-color image on the display unit, the third image data, and the second data.
  • the second image data is stored inside the pixel based on the first image data and the first data.
  • generating a fourth image data inside the pixel based on the third image data and the second data by supplying a reference potential to the pixel in the seventh period.
  • sixth image data may be generated inside the pixel based on the fifth image data and the third data by supplying a reference potential to the pixel.
  • the third, seventh, and eleventh periods may be shorter than the first, fifth, and ninth periods.
  • the display device includes a source driver, the source driver is electrically connected to the pixel via the first data line, and the source driver is connected to the pixel via the second data line.
  • the source driver is electrically connected and has a function of generating first, third, and fifth image data and first to third data, and the first image data in the first period. Is written to the pixel via the first data line, the first data is written to the pixel via the second data line, and in the fifth period, the third image data is the first data The second data is written to the pixel via the data line, the second data is written to the pixel via the data line, and the fifth image data is sent via the first data line in the ninth period. The third data written to the pixel is the second data It may be written into the pixel through.
  • the pixel may include a memory circuit and a display device, and the memory circuit may be electrically connected to the first data line and the second data line.
  • the memory circuit includes a first transistor, a second transistor, and a capacitor, and one of the source and the drain of the first transistor is electrically connected to one electrode of the capacitor.
  • the other of the source and the drain of the first transistor is electrically connected to the first data line, and one of the source and the drain of the second transistor is electrically connected to the other electrode of the capacitor.
  • the other of the source and the drain of the second transistor may be electrically connected to the second data line.
  • the first transistor includes a metal oxide in a channel formation region, and the metal oxide includes In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd or Hf).
  • the display device may be a liquid crystal device.
  • a display device that operates at high speed can be provided.
  • a display device that can display a high-quality image can be provided.
  • a low-cost display device can be provided.
  • a display device with low power consumption can be provided.
  • a highly reliable display device can be provided.
  • a novel display device can be provided.
  • a novel semiconductor device or the like can be provided.
  • a method for operating a display device that operates at high speed can be provided.
  • a method for operating a display device capable of displaying a high-quality image can be provided.
  • a method for operating a low-cost display device can be provided.
  • a method for operating a display device with low power consumption can be provided.
  • a method for operating a display device with high reliability can be provided.
  • a novel method for operating a display device can be provided.
  • a method for operating a novel semiconductor device or the like can be provided.
  • FIG. 6 is a block diagram illustrating a structure example of a display device and a circuit diagram illustrating a structure example of a pixel circuit.
  • 8A and 8B illustrate an example of an operation method of a display device.
  • 6 is a timing chart illustrating an example of an operation method of a display device.
  • FIG. 10 is a circuit diagram illustrating an example of an operation method of a display device.
  • FIG. 6 is a block diagram illustrating a structure example of a display device and a circuit diagram illustrating a structure example of a pixel circuit.
  • 8A and 8B illustrate an example of an operation method of a display device. 6 is a timing chart illustrating an example of an operation method of a display device.
  • FIG. 10 is a circuit diagram illustrating an example of an operation method of a display device.
  • FIG. 10 is a circuit diagram illustrating an example of an operation method of a display device.
  • Sectional drawing which shows the structural example of a display apparatus.
  • FIG. 6 is a top view illustrating a structure example of a pixel.
  • Sectional drawing which shows the structural example of a display apparatus.
  • Sectional drawing which shows the structural example of a display apparatus.
  • FIG. 14 illustrates an example of an electronic device. The figure which shows the operation
  • first image data and first data are written to a pixel, an image corresponding to the first image data is displayed, and then the first image data and the first data are used as a basis.
  • This is an operation method of a display device that generates second image data inside a pixel and displays an image corresponding to the second image data.
  • the second image data can be switched at a higher speed than the case where the second image data is written into the pixel from the outside of the pixel in the same manner as the first image data, so that the display device can be operated at a higher speed. Can do.
  • the pixel included in the display device of one embodiment of the present invention includes a memory circuit in addition to the display device.
  • a memory circuit By holding the first image data in the memory circuit, an image corresponding to the first image data is displayed, and then the second image is generated inside the pixel based on the first image data and the first data. Data can be generated.
  • the operation method of the display device of one embodiment of the present invention can be applied to a display device that performs display by, for example, a field sequential method and includes a liquid crystal device as a display device.
  • a display device is provided with a plurality of light sources (for example, red, green, and blue) that emit light having different colors. Then, the plurality of light sources emit light sequentially, and an image is displayed by controlling the transmission of light having each color for each pixel. That is, the display period is divided in time for each light exhibiting a specific color. Therefore, in a display device that does not operate at high speed, for example, the frame frequency may decrease, and a color break may occur.
  • the first image data can be image data corresponding to, for example, one of red, green, and blue.
  • the second image data can be image data corresponding to one color different from the first image data.
  • the color of the displayed image can be switched by switching the image to be displayed from the image corresponding to the first image data to the image corresponding to the second image data.
  • displayed images can be switched at high speed. Therefore, the frame frequency can be increased even when display is performed by a field sequential method. For example, the occurrence of color breaks can be suppressed. Thereby, the quality of the image displayed by the display device can be improved.
  • FIG. 1A illustrates a structural example of a display device 10 which is a display device of one embodiment of the present invention.
  • the display device 10 includes a display unit 12 in which pixels 11 are arranged in a matrix of m rows and n columns, a gate driver 13, and a source driver 14.
  • the pixel 11 is provided with a memory circuit 15.
  • the pixel 11 in the first row and the first column is described as a pixel 11 [1, 1]
  • the pixel 11 in the m row and the n column is described as a pixel 11 [m, n]. Note that the same notation may be used for other elements.
  • the pixel 11 is electrically connected to another pixel 11 in the same row via a wiring 21 and is electrically connected to another pixel 11 in the same row via a wiring 22.
  • the pixel 11 is electrically connected to another pixel 11 in the same column via the wiring 31, and is electrically connected to another pixel 11 in the same column via the wiring 32.
  • the gate driver 13 is electrically connected to the m wirings 21 and the m wirings 22.
  • the source driver 14 is electrically connected to the n wirings 31 and the n wirings 32.
  • the gate driver 13 has a function of supplying a signal to the pixel 11 through the wiring 21 and controlling the operation of the pixel 11.
  • the gate driver 13 has a function of supplying a signal to the pixel 11 through the wiring 22 and controlling the operation of the pixel 11.
  • the wiring 21 and the wiring 22 have a function as a scanning line.
  • the source driver 14 has a function of supplying the generated image data and the like to the pixel 11 via the wiring 31.
  • the source driver 14 has a function of supplying the generated data and the like to the pixel 11 via the wiring 32.
  • the wiring 31 and the wiring 32 have a function as a data line.
  • image data refers to data representing an image displayed on the display unit 12 or the like. That is, it can be said that the display unit 12 has a function of displaying an image corresponding to the image data.
  • the memory circuit 15 has a function of holding image data supplied to the pixel 11 through the wiring 31.
  • the memory circuit 15 has a function of generating and holding new image data based on the held image data and the data supplied to the pixel 11 via the wiring 32. That is, the new image data can be said to be image data generated inside the pixel 11.
  • the display device 10 can perform display by a field sequential method.
  • the image data supplied to the pixel 11 via the wiring 31 and the image data generated inside the pixel 11 based on the image data can be image data corresponding to different colors.
  • the image data supplied to the pixel 11 via the wiring 31 can be image data representing a red image.
  • the image data generated inside the pixel 11 based on the image data can be image data representing a green image.
  • the display device 10 may not have a function of performing display by a field sequential method.
  • both the image data supplied to the pixel 11 via the wiring 31 and the image data generated inside the pixel 11 represent image data representing all of a red image, a green image, and a blue image. It can be.
  • the display unit 12 includes, for example, a subpixel having a function of displaying a red image and a subpixel having a function of displaying a green image.
  • a pixel and a pixel including a sub-pixel having a function of displaying a blue image can be provided.
  • the pixel 11 corresponds to the subpixel.
  • the display device 10 may have a function of displaying an image in white in addition to red, green, and blue. Further, in addition to the above color or instead of the above color, a function of displaying an image in yellow, magenta, cyan, or the like may be provided.
  • FIG. 1B is a diagram illustrating a configuration example of the pixel 11.
  • the pixel 11 includes a transistor 41, a transistor 42, a capacitor 51, a capacitor 52, and a display device 60.
  • the memory circuit 15 provided in the pixel 11 includes the transistor 41, the transistor 42, and the capacitor 52.
  • the transistor 41 and the transistor 42 are both n-channel transistors; however, one or both of the transistors may be p-channel transistors.
  • a liquid crystal device can be used as the display device 60.
  • the display device 10 is provided with a light source such as a backlight.
  • the light emitted from the light source passes through the display device 60 that is a liquid crystal device and is emitted to the display surface of the display unit 12.
  • the display device 10 can be a transmissive liquid crystal display device. Note that the light source is not shown in FIG.
  • the display device 10 has a function of performing display by a field sequential method, light sources (for example, red, green, and blue) that emit light of different colors are provided, and the plurality of light sources emit light sequentially.
  • An image is displayed on the display unit 12 by controlling the transmission of light by the display device 60 each time the light source that emits light is switched. That is, the display period is divided into time for each color.
  • One of the source and the drain of the transistor 41 is electrically connected to one electrode of the capacitor 52.
  • One of a source and a drain of the transistor 42 is electrically connected to the other electrode of the capacitor 52.
  • One electrode of the capacitor 52 is electrically connected to one electrode of the capacitor 51.
  • One electrode of the capacitive element 51 is electrically connected to one electrode of the display device 60.
  • a node where one of the source and drain of the transistor 41, one electrode of the capacitor 52, one electrode of the capacitor 51, and one electrode of the display device 60 is electrically connected is referred to as a node NM1.
  • a node where one of the source and the drain of the transistor 42 and the other electrode of the capacitor 52 are electrically connected is a node NA. That is, it can be said that the node NM1 and the node NA are provided in the memory circuit 15.
  • the other of the source and the drain of the transistor 41 is electrically connected to the wiring 31.
  • the other of the source and the drain of the transistor 42 is electrically connected to the wiring 32.
  • a gate of the transistor 41 is electrically connected to the wiring 21.
  • a gate of the transistor 42 is electrically connected to the wiring 22.
  • the other electrode of the capacitor 51 is electrically connected to the wiring 61.
  • the other electrode of the display device 60 is electrically connected to the wiring 62.
  • the wiring 61 and the wiring 62 function as power supply lines. For example, a ground potential is supplied to the wiring 61 and the wiring 62.
  • the transistors 41 and 42 have a function as a switch. Here, on or off of the transistor 41 is controlled based on a signal supplied via the wiring 21. In addition, the conduction or non-conduction of the transistor 42 is controlled based on a signal supplied through the wiring 22.
  • image data or the like supplied via the wiring 31 is written as a charge (potential) to the node NM1, and by turning off the transistor 41, image data or the like written to the node NM1. Is retained.
  • data or the like supplied through the wiring 32 is written to the node NA as a charge (potential)
  • the transistor 42 is turned off, the data or the like written to the node NA is written. Is retained.
  • the transistors 41 and 42 by using transistors with extremely low off-state current for the transistors 41 and 42, leakage of charges held at the node NM1 and the node NA can be extremely reduced. Thereby, the potentials of the node NM1 and the node NA can be held for a long time.
  • a transistor using a metal oxide for a channel formation region hereinafter referred to as an OS transistor can be used.
  • a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used.
  • the oxide semiconductor includes indium, for example, a CAAC-OS or a CAC-OS described later can be used.
  • the CAAC-OS is a crystalline oxide semiconductor.
  • a transistor including the crystalline oxide semiconductor can be improved in reliability, and thus is preferably used for the display device of one embodiment of the present invention.
  • the CAC-OS exhibits high mobility characteristics, it is suitable for a transistor that performs high-speed driving.
  • an OS transistor Since the OS transistor has a large band gap, it exhibits extremely low off-state current characteristics.
  • an OS transistor has characteristics different from a transistor having Si in a channel formation region (hereinafter referred to as a Si transistor), such as impact ionization, avalanche breakdown, and a short channel effect, and has a highly reliable circuit. Can be formed.
  • Si transistors may be used for the transistors 41 and 42.
  • an OS transistor may be used for one of the transistor 41 and the transistor 42, and a Si transistor may be used for the other.
  • an OS transistor may be used as the transistor 41 and a Si transistor may be used as the transistor 42.
  • examples of the Si transistor include a transistor including amorphous silicon, a transistor including crystalline silicon (typically low-temperature polysilicon), and a transistor including single crystal silicon.
  • FIG. 2 is a diagram for explaining an example of an operation method of the display device 10 and shows operations in the periods T01 to T26.
  • the uppermost part shows the operation of the pixels 11 in the first row
  • the lowermost part shows the operation of the pixels 11 in the m-th row.
  • the image (R) indicates a red image
  • the image (G) indicates a green image
  • the image (B) indicates a blue image
  • the image data ID (R) represents image data representing the image (R)
  • the image data ID (G) represents image data representing the image (G)
  • the image data ID (B) represents the image (B).
  • the image data to represent is shown. Further, although details will be described later, data data (R) indicates data that is the basis of image data ID (R), data data (G) indicates data that is the basis of image data ID (G), and data data (B) shows data that is the basis of the image data ID (B).
  • the pixel 11 in the i-th row (i is an integer of 1 to m) is referred to as pixel 11 [i]. Note that the same notation may be used for other elements.
  • the image data ID (R), the image data ID (G), the image data ID (B), the data data (R), the data data (G), and the like written to the pixels in the i-th row such as the pixel 11 [i].
  • data data (B) are converted into image data ID (R) [i], image data ID (G) [i], image data ID (B) [i], data data (R) [i], and data data, respectively.
  • the image data ID (R), the image data ID (G), the image data ID (B), the data data (R), and the data data (G) written to the pixels in any one of the first to m-th rows.
  • Data data (R) [1: m], data data (G) [1: m], and data data (B) [1: m] are described.
  • FIG. 3 is a timing chart illustrating an example of an operation method of the pixel 11 in each period illustrated in FIG. 2 and 3, the image (R) that is a red image, the image (G) that is a green image, and the image (B) that is a blue image are sequentially displayed, and then the image (R), The case where an image (G) and an image (B) are displayed in order is shown.
  • FIG. 4A, 4B, 4C, and 4D illustrate an example of a specific operation method of the pixel 11 in the periods T01 to T06 among the periods illustrated in FIGS. It is a circuit diagram. Specifically, FIG. 4A illustrates the period T01, FIG. 4B illustrates the period T02 and the period T03, FIG. 4C illustrates the period T04, and FIG. 4D illustrates the period T05 and the period T06.
  • FIG. 4 is a circuit diagram illustrating an example of a specific operation method of the pixel 11. Note that the operations shown in FIGS. 3 and 4 can be applied to any pixel 11 in the first to m-th rows.
  • the image data ID (R) and the data data (G) are written in the pixel 11.
  • the potential of the wiring 21 and the potential of the wiring 22 are set to a high potential
  • the image data ID (R) [i] is supplied to the pixel 11 [i] through the wiring 31, and the pixel is connected through the wiring 32.
  • 11 [i] is supplied with data data (G) [i].
  • the transistor 41 and the transistor 42 are turned on, the potential of the node NM1 becomes the potential V ID (R) that is the potential corresponding to the image data ID (R), and the potential of the node NA corresponds to the data data (G).
  • the potential is V potential (G) which is a potential. That is, the image data ID (R) and the data data (G) are written to the pixel 11 from the outside of the pixel 11.
  • the potential of the wiring 21 and the potential of the wiring 22 are set low. Accordingly, the transistor 41 and the transistor 42 are turned off, the potential V ID (R) is held at the node NM1, and the potential V data (G) is held at the node NA.
  • the low potential can be, for example, a negative potential. Or, for example, it can be a ground potential.
  • the image data ID (R) and the data data (G) are sequentially written for each row from the pixel 11 in the first row to the pixel 11 in the m-th row. That is, the image data ID (R) and the data data (G) are written line-sequentially. Note that the writing of the image data ID (R) and the data data (G) to the pixels 11 in the m-th row starts from the start of the writing of the image data ID (R) and the data data (G) to the pixels 11 in the first row. Up to the period T01 can be set.
  • the display device 60 waits for a response. Specifically, in a state where the transistor 41 and the transistor 42 are in a non-conducting state, for example, the process waits until the response of the display device 60 included in the pixel 11 in the m-th row is completed.
  • the image (R) is displayed on the display unit 12.
  • an image (R) corresponding to the image data ID (R) can be displayed by causing a red light source provided in the display device 10 to emit light.
  • a potential V ID (R) that is a potential corresponding to the image data ID (R) is applied to one electrode of the display device 60. Since the potential V ID (R) does not depend on the data data (G) written in the pixel 11 in the period T01, the image (R) corresponding to the image data ID (R) can be displayed.
  • the image data ID (G) is generated inside the pixel 11 based on the image data ID (R) and the data data (G) held in the pixel 11.
  • the potential of the wiring 22 is set to a high potential
  • the potential of the wiring 32 is set to the potential V ref .
  • the transistor 42 is turned on, and the potential of the node NA becomes the potential V ref .
  • the potential V NM1 of the node NM1 is expressed by the following equation.
  • C 1 indicates the sum of the capacitance value of the capacitive element 51 and the capacitance value of the display device 60
  • C 2 indicates the capacitance value of the capacitive element 52.
  • the potential V data (G) that is written into the node NA in the period T01 is set so that the potential V NM1 becomes the potential V ID (G) that is a potential corresponding to the image data ID (G).
  • the image data ID (G) is generated inside the pixel 11.
  • the potential V ref can be a reference potential.
  • the supplied potential V ref can be the same for all the pixels 11.
  • the potential V ref can be simultaneously supplied to all the pixels 11.
  • the generation of the image data ID (G) inside the pixel 11 can be performed in the frame order. Therefore, the period T04 is shorter than the period T01 in which image data and the like are written in line sequential order.
  • the display device 60 waits for a response. Specifically, the potential of the wiring 21 and the potential of the wiring 22 are set low. Accordingly, the transistor 41 and the transistor 42 are turned off, the potential V ID (G) is held at the node NM1, and the potential V ref is held at the node NA. In this state, it waits until the response of the display device 60 is completed.
  • the generation of the image data ID (G) for the pixel 11 performed in the period T04 can be performed in a frame sequential manner. Thereby, even if the image (G) is displayed without waiting for the display device 60 to respond completely, it is possible to suppress the occurrence of display unevenness, and thus a high-quality image can be displayed. . Accordingly, the response waiting period of the display device 60 may be shorter than when the image data is written to the pixels 11 line-sequentially as in the period T01. That is, the period T05 can be shorter than the period T02.
  • the image (G) is displayed on the display unit 12 during the period T06.
  • an image (G) corresponding to the image data ID (G) can be displayed by causing a green light source provided in the display device 10 to emit light.
  • the image data ID (B) and the data data (R) are written in the pixel 11.
  • the potential of the wiring 21 and the potential of the wiring 22 are set to a high potential
  • the image data ID (B) [i] is supplied to the pixel 11 [i] through the wiring 31, and the pixel is connected through the wiring 32.
  • Data [R] [i] is supplied to 11 [i].
  • the transistor 41 and the transistor 42 are turned on, the potential of the node NM1 becomes the potential V ID (B) that is a potential corresponding to the image data ID (B), and the potential of the node NA corresponds to the data data (R).
  • the potential is V potential (data) which is a potential. That is, the image data ID (B) and the data data (R) are written to the pixel 11 from the outside of the pixel 11.
  • the potential of the wiring 21 and the potential of the wiring 22 are set to low potential. Accordingly, the transistors 41 and 42 are turned off, the potential V ID (B) is held at the node NM1, and the potential V data (R) is held at the node NA.
  • the image data ID (B) and the data data (R) are written line-sequentially. Note that the writing of the image data ID (B) and the data data (R) to the pixels 11 in the m-th row starts from the start of writing the image data ID (B) and the data data (R) to the pixels 11 in the first row. Up to the period T11 can be set.
  • the display device 60 waits for a response in the same manner as in the period T02 and the like.
  • the image (B) is displayed on the display unit 12.
  • an image (B) corresponding to the image data ID (B) can be displayed by causing a blue light source provided in the display device 10 to emit light.
  • the same operation as that in the period T04 is performed, and the image data ID (R) is generated inside the pixel 11 based on the image data ID (B) and the data data (R) held in the pixel 11. .
  • the potential V NM1 of the node NM1 is a value obtained by replacing the potential V ID (R) with the potential V ID (B) and the potential V data (G) with the potential V data (R) in Equation 1. That is, if the potential V data (R) written to the node NA in the period T11 is set so that the potential V NM1 becomes the potential V ID (R) that is a potential corresponding to the image data ID (R), the pixel 11 The image data ID (R) is generated inside.
  • the generation of the image data ID (R) inside the pixel 11 can be performed in a frame sequential manner. Therefore, the period T14 is shorter than the period T11 in which the image data is written in a line sequential manner. Become.
  • a period T15 the display device 60 waits for a response. Specifically, the potential of the wiring 21 and the potential of the wiring 22 are set low. Accordingly, the transistor 41 and the transistor 42 are turned off, the potential V ID (R) is held at the node NM1, and the potential V ref is held at the node NA. In this state, it waits until the response of the display device 60 is completed. Note that as described above, the generation of the image data ID (R) for the pixels 11 performed in the period T14 can be performed in a frame sequential manner, so that the period T15 can be shorter than the period T12.
  • a period T16 an operation similar to that in the period T03 is performed, and the image (R) is displayed on the display unit 12.
  • the image data ID (G) and the data data (B) are written into the pixel 11.
  • the potential of the wiring 21 and the potential of the wiring 22 are set to a high potential
  • the image data ID (G) [i] is supplied to the pixel 11 [i] through the wiring 31, and the pixel is connected through the wiring 32.
  • Data [B] [i] is supplied to 11 [i].
  • the transistor 41 and the transistor 42 are turned on, the potential of the node NM1 becomes the potential V ID (G) that is a potential corresponding to the image data ID (G), and the potential of the node NA corresponds to the data data (B). It becomes a potential V data (B) which is a potential. That is, the image data ID (G) and the data data (B) are written to the pixel 11 from the outside of the pixel 11.
  • the potential of the wiring 21 and the potential of the wiring 22 are set low. Accordingly, the transistor 41 and the transistor 42 are turned off, the potential V ID (G) is held at the node NM1, and the potential V data (B) is held at the node NA.
  • the image data ID (G) and the data data (B) are written in line sequential order. Note that the writing of the image data ID (G) and the data data (B) to the pixels 11 in the m-th row starts from the start of writing the image data ID (G) and the data data (B) to the pixels 11 in the first row. Up to the period T21 can be set.
  • the display device 60 waits for a response in the same manner as in the period T02 and the like.
  • a period T23 an operation similar to that in the period T06 is performed, and the image (G) is displayed on the display unit 12.
  • the image data ID (B) is generated inside the pixel 11 based on the image data ID (G) and the data data (B) held in the pixel 11.
  • the potential V NM1 of the node NM1 is a value obtained by replacing the potential V ID (R) with the potential V ID (G) and the potential V data (G) with the potential V data (B) in Equations 1 and 2. . That is, as the potential V ID potential V NM1 is potential corresponding to the image data ID (B) (B), by setting the potential V data (B) to be written to the node NA in the period T21, the pixel 11 The image data ID (B) is generated inside the.
  • the period T24 since the generation of the image data ID (B) inside the pixel 11 can be performed in the field sequential manner, the period T24 is shorter than the period T21 in which the image data writing or the like is performed in the line sequential order. Become.
  • a period T25 the display device 60 waits for a response. Specifically, the potential of the wiring 21 and the potential of the wiring 22 are set low. Accordingly, the transistor 41 and the transistor 42 are turned off, the potential V ID (B) is held at the node NM1, and the potential V ref is held at the node NA. In this state, it waits until the response of the display device 60 is completed. Note that, as described above, since the generation of the image data ID (B) for the pixels 11 performed in the period T24 can be performed in a frame sequential manner, the period T25 can be shorter than the period T22.
  • the above is an example of the operation method of the display device 10.
  • the image data is displayed on the display unit 12 as compared with the case where image data is written to the pixel 11 from the outside. Images can be switched at high speed. For this reason, the display apparatus 10 can be operated at high speed.
  • the display device of one embodiment of the present invention can be operated at high speed without operating the display device of one embodiment of the present invention by a backlight scan method. Accordingly, an increase in manufacturing cost of the display device of one embodiment of the present invention can be suppressed, so that the display device of one embodiment of the present invention can be provided at a low price. Moreover, the fall of the freedom degree of arrangement
  • positioning of a light source can be suppressed.
  • the display period is time-divided for each image of a specific color. That is, as shown in FIG. 2 and the like, for example, a red image is displayed in a period T03, a green image is displayed in a period T06, and a blue image is displayed in a period T13, thereby displaying a one-frame color image.
  • the frame frequency may decrease, and a color break may occur.
  • the frame frequency of the display device of one embodiment of the present invention is increased even when display is performed by a field sequential method. be able to. Accordingly, for example, occurrence of a color break can be suppressed, so that the quality of an image displayed by the display device of one embodiment of the present invention can be improved.
  • the display device 10 can perform frame inversion driving by adjusting the potential V ref .
  • the potential V ref is a negative potential.
  • FIG. 3 illustrates a case where frame inversion driving is performed in the period T04, the period T11, the period T14, the period T21, and the period T24.
  • the operation method shown in FIGS. 2 to 4 can also be applied when the display device 10 performs display by a method other than the field sequential method.
  • the image data ID (R), the image data ID (G), and the image data ID (B) shown in FIG. 2 are all image data representing all of a red image, a green image, and a blue image. It can be.
  • a red image, a green image, and a blue image can be displayed simultaneously. That is, one frame of color image can be displayed in each of the period T03, the period T06, the period T13, the period T16, the period T23, and the period T26.
  • FIG. 5A illustrates a display device of one embodiment of the present invention, and illustrates a structure example of a display device 110 that is different from the display device 10.
  • the display device 110 includes a display unit 112 in which pixels 111 are arranged in a matrix of m rows and n columns, a gate driver 113, and a source driver 114.
  • the pixel 111 is provided with a memory circuit 15 and a memory circuit 16.
  • the pixel 111 is electrically connected to another pixel 111 in the same row through the wiring 21, is electrically connected to another pixel 111 in the same row through the wiring 22, and is connected to the same row through the wiring 23.
  • the other pixels 111 are electrically connected.
  • the pixel 111 is electrically connected to another pixel 111 in the same column via the wiring 31, is electrically connected to another pixel 111 in the same column via the wiring 32, and is the same via the wiring 33. It is electrically connected to other pixels 111 in the column.
  • the gate driver 113 is electrically connected to the m wirings 21, the m wirings 22, and the m wirings 23.
  • the source driver 14 is electrically connected to the n wirings 31, the n wirings 32, and the n wirings 33.
  • the gate driver 113 has a function of supplying a signal to the pixel 111 through the wiring 21 and controlling the operation of the pixel 111.
  • the gate driver 113 has a function of supplying a signal to the pixel 111 through the wiring 22 and controlling the operation of the pixel 111.
  • the gate driver 113 has a function of supplying a signal to the pixel 111 through the wiring 23 and controlling the operation of the pixel 111.
  • the wiring 23 has a function as a scanning line.
  • the source driver 114 has a function of supplying the generated image data and the like to the pixel 111 via the wiring 31.
  • the source driver 114 has a function of supplying generated data and the like to the pixel 111 through the wiring 32.
  • the source driver 114 has a function of supplying generated data and the like to the pixel 111 via the wiring 33.
  • the wiring 33 functions as a data line.
  • the memory circuit 15 and the memory circuit 16 have a function of holding image data supplied to the pixel 111 through the wiring 31.
  • the memory circuit 15 has a function of generating and holding new image data based on the held image data and the data supplied to the pixel 111 via the wiring 32.
  • the memory circuit 16 has a function of generating and holding new image data based on the held image data and the data supplied to the pixel 111 via the wiring 33. From the above, it can be said that the new image data is image data generated inside the pixel 111.
  • the display device 110 can perform display by a field sequential method.
  • the image data generated based on the generated data can be image data corresponding to different colors.
  • the image data supplied to the pixel 111 via the wiring 31 can be image data representing a red image.
  • the image data generated based on the data supplied to the pixel 111 via the image data can be image data representing a green image, and generated based on the data supplied to the pixel 111 via the wiring 33.
  • the processed image data can be image data representing a blue image.
  • the display device 110 may not have a function of performing display by a field sequential method.
  • the image data supplied to the pixel 111 via the wiring 31, the image data generated based on the data supplied to the pixel 111 via the wiring 32, and the pixel 111 via the wiring 33 are supplied.
  • Any image data generated based on the data can be image data representing all of a red image, a green image, and a blue image.
  • the display unit 112 includes, for example, a subpixel having a function of displaying a red image and a subpixel having a function of displaying a green image.
  • a pixel and a pixel including a sub-pixel having a function of displaying a blue image can be provided.
  • the pixel 111 corresponds to the subpixel.
  • the display device 110 may have a function of displaying an image in white in addition to red, green, and blue. Further, in addition to the above color or instead of the above color, a function of displaying an image in yellow, magenta, cyan, or the like may be provided.
  • FIG. 5B is a diagram illustrating a configuration example of the pixel 111.
  • the pixel 111 includes a transistor 41, a transistor 42, a transistor 43, a capacitor 51, a capacitor 52, a capacitor 53, and a display device 60.
  • the memory circuit 15 provided in the pixel 111 includes a transistor 41, a transistor 42, and a capacitor 52, similarly to the pixel 11.
  • the memory circuit 16 provided in the pixel 111 includes the transistor 41, the transistor 43, and the capacitor 53. That is, it can be said that the transistor 41 is shared by the memory circuit 15 and the memory circuit 16.
  • the transistors 41 to 43 are all n-channel transistors; however, some or all of the transistors may be p-channel transistors.
  • the display device 110 When a liquid crystal device is used as the display device 60, the display device 110 has a plurality of light sources such as backlights (for example, red, green, and blue) that emit light of different colors, similar to the display device 10. Provided. The light emitted from the light source passes through the display device 60 that is a liquid crystal device and is emitted to the display surface of the display unit 112. By controlling the light transmittance of the display device 60, an image can be displayed on the display unit 112. That is, the display device 110 can be a transmissive liquid crystal display device. Note that the light source is not illustrated in FIG.
  • the plurality of light sources emit light sequentially, and the light transmission by the display device 60 is controlled each time the light source that emits light is switched. Display an image. That is, the display period is divided into time for each color.
  • One of a source and a drain of the transistor 41 is electrically connected to one electrode of the capacitor 53, in addition to one electrode of the capacitor 51, one electrode of the capacitor 52, and one electrode of the display device 60. ing.
  • One of a source and a drain of the transistor 43 is electrically connected to the other electrode of the capacitor 53.
  • the other of the source and the drain of the transistor 43 is electrically connected to the wiring 33.
  • a gate of the transistor 43 is electrically connected to the wiring 23.
  • Other connection relationships are the same as those of the pixel 11.
  • a node where one of the source and the drain of the transistor 41, one electrode of the capacitors 51 to 53, and one electrode of the display device 60 are electrically connected is a node NM2.
  • a node where one of the source and the drain of the transistor 43 and the other electrode of the capacitor 53 are electrically connected is a node NB. From the above, it can be said that the node NM2 is shared by the memory circuit 15 and the memory circuit 16, and that the node NB is provided in the memory circuit 16.
  • the transistor 43 functions as a switch like the transistors 41 and 42.
  • the conduction or non-conduction of the transistor 43 is controlled based on a signal supplied through the wiring 23.
  • image data or the like supplied via the wiring 31 is written as a charge (potential) to the node NM2, and by turning off the transistor 41, image data or the like written to the node NM2 Is retained.
  • data or the like supplied through the wiring 33 is written to the node NB as a charge (potential), and when the transistor 43 is turned off, the data or the like written to the node NB is written. Is retained.
  • a Si transistor may be used as the transistor 43 in addition to the transistors 41 and 42.
  • an OS transistor may be used for some of the transistors 41 to 43, and the other may be Si transistors.
  • an OS transistor may be used as the transistor 41, and Si transistors may be used as the transistor 42 and the transistor 43.
  • FIG. 6 is a diagram illustrating an example of an operation method of the display device 110, and illustrates an operation in the period T31 to the period T49.
  • the uppermost part shows the operation of the pixels 111 in the first row
  • the lowermost part shows the operation of the pixels 111 in the m-th row.
  • FIG. 7 is a timing chart illustrating an example of an operation method of the pixel 111 in each period illustrated in FIG. 6 and 7, similarly to FIGS. 2 and 3, an image (R) that is a red image, an image (G) that is a green image, and an image (B) that is a blue image are sequentially displayed. Then, the case where the image (R), the image (G), and the image (B) are sequentially displayed again is shown.
  • FIG. 11 is a circuit diagram showing an example of a specific operation method 111.
  • FIG. 8A illustrates the period T31
  • FIG. 8B illustrates the period T32 and the period T33
  • FIG. 8C illustrates the period T34
  • FIG. 8D illustrates the period T35 and the period T36.
  • 9A is a circuit diagram illustrating an example of a specific operation method of the pixel 111 in the period T37
  • FIG. 9B is a circuit diagram illustrating an example of a specific operation method of the pixel 111 in the period T38 and the period T39. Note that the operations shown in FIGS. 7 to 9 can be applied to any pixel 111 in the first row to the m-th row.
  • the image data ID (R), the data data (G), and the data data (B) are written in the pixel 111.
  • the potential of the wirings 21 to 23 is set to a high potential
  • the image data ID (R) [i] is supplied to the pixel 111 [i] via the wiring 31
  • the pixel 111 [i] is supplied via the wiring 32.
  • the data data (B) [i] is supplied to the pixel 111 through the wiring 33.
  • the transistors 41 to 43 are turned on, the potential of the node NM2 is the potential V ID (R) corresponding to the image data ID (R), and the potential of the node NA is the potential corresponding to the data data (G). Is the potential V data (G) , and the potential of the node NB is the potential V data (B) corresponding to the data data (B) . That is, image data ID (R), data data (G), and data data (B) are written to the pixel 111 from the outside of the pixel 111.
  • the potentials of the wirings 21 to 23 are set low.
  • the transistor 41 through the transistor 43 becomes non-conductive, the potential V ID (R) is held in the node NM1, potential V data (G) is held in the node NA, node NB potential V data (B) is held in Is done.
  • the image data ID (R), the data data (G), and the data data (B) are written for each row from the pixel 111 in the first row to the pixel 111 in the m-th row. It is. That is, the image data ID (R), the data data (G), and the data data (B) are written line-sequentially. Note that the image data ID (R) and data to the m-th row pixel 111 from the start of writing the image data ID (R), data data (G), and data data (B) to the pixel 111 in the first row.
  • the period T31 is the period until data (G) and data (B) are written.
  • the display device 60 waits for a response. Specifically, in a state where the transistors 41 to 43 are in a non-conductive state, the process waits until the response of the display device 60 included in the pixel 111 in the m-th row is completed, for example.
  • the image (R) is displayed on the display unit 12.
  • an image (R) corresponding to the image data ID (R) can be displayed by causing a red light source provided in the display device 110 to emit light.
  • a potential V ID (R) that is a potential corresponding to the image data ID (R) is applied to one electrode of the display device 60. Since the potential V ID (R) does not depend on the data data (G) and the data data (B) written in the pixel 111 in the period T31, the image (R) corresponding to the image data ID (R) is displayed. be able to.
  • the image data ID (G) is generated inside the pixel 111 based on the image data ID (R) and the data data (G) held in the pixel 111.
  • the potential of the wiring 22 is set to a high potential
  • the potential of the wiring 32 is set to the potential V ref1 .
  • the transistor 42 is turned on, and the potential of the node NA becomes the potential V ref1 .
  • the potential V NM2 of the node NM2 can be expressed by the above-described Expression 1 and Expression 2 by replacing the potential V NM1 with the potential V NM2 and replacing the potential V ref with the potential V ref1 .
  • the potential V ref1 can be a reference potential.
  • the supplied potential V ref1 can be the same for all the pixels 111.
  • the potential V ref1 can be simultaneously supplied to all the pixels 111.
  • the generation of the image data ID (G) inside the pixel 111 can be performed in the frame order. Therefore, the period T34 is shorter than the period T31 in which image data or the like is written in line sequential order.
  • the display device 60 waits for a response. Specifically, the potentials of the wirings 21 to 23 are set low. Accordingly, the transistors 41 to 43 are turned off, and the potential V ID (G ) is held at the node NM2, the potential V ref1 is held at the node NA, and the potential V data (B) is held at the node NB. In this state, it waits until the response of the display device 60 is completed.
  • the generation of the image data ID (G) for the pixel 111 performed in the period T34 can be performed in a frame sequential manner.
  • the response waiting period of the display device 60 may be shorter than when writing image data to the pixels 111 in a line sequential manner as in the period T31. That is, the period T35 can be shorter than the period T32.
  • the image (G) is displayed on the display unit 112.
  • an image (G) corresponding to the image data ID (G) can be displayed by causing a green light source provided in the display device 110 to emit light.
  • the image data ID (B) is generated inside the pixel 111 based on the image data ID (G) and the data data (B) held in the pixel 111.
  • the potential of the wiring 23 is set to a high potential
  • the potential of the wiring 33 is set to the potential V ref2 .
  • the transistor 43 is turned on, and the potential of the node NB becomes the potential V ref2 .
  • the potential V NM2 of the node NM2 is expressed by the following equation.
  • C 1 represents the sum of the capacitance value of the capacitive element 51 and the capacitance value of the display device 60 as in Equation 1.
  • C 3 indicates the capacitance value of the capacitive element 53.
  • the potential V ref2 can be a reference potential in the same manner as the potential V ref1 .
  • the generation of the image data ID (B) inside the pixel 111 can be performed in the frame order. Therefore, the period T37 is shorter than the period T31 in which image data and the like are written in line sequential order.
  • the display device 60 waits for a response. Specifically, the potentials of the wirings 21 to 23 are set low. Accordingly, the transistors 41 to 43 are turned off, and the potential V ID (B) is held at the node NM2, the potential V ref1 is held at the node NA, and the potential V ref2 is held at the node NB. In this state, it waits until the response of the display device 60 is completed.
  • the generation of the image data ID (B) for the pixel 111 performed in the period T37 can be performed in a frame sequential manner.
  • the response waiting period of the display device 60 may be shorter than when writing image data to the pixels 111 in a line sequential manner as in the period T31. That is, the period T38 can be shorter than the period T32.
  • the image (B) is displayed on the display unit 112.
  • an image (B) corresponding to the image data ID (B) can be displayed by causing a blue light source provided in the display device 110 to emit light.
  • the display device 110 can display a one-frame color image in the periods T31 to T39 and can display a next one-frame color image in the periods T41 to T49.
  • the display device 110 can be operated at high speed.
  • the operation method illustrated in FIGS. 6 to 9 can also be applied when the display device 110 performs display by a method other than the field sequential method.
  • all of the image data ID (R), the image data ID (G), and the image data ID (B) shown in FIG. 6 represent image data representing all of a red image, a green image, and a blue image. It can be.
  • a red image, a green image, and a blue image can be displayed simultaneously. That is, one frame of color image can be displayed in each of the period T33, the period T36, the period T39, the period T43, the period T46, and the period T49.
  • the display device 10 has a structure in which one memory circuit is provided per pixel
  • the display device 110 has a structure in which two memory circuits are provided per pixel.
  • a configuration in which three or more memory circuits are provided per pixel may be employed.
  • the display device of one embodiment of the present invention can be operated at higher speed.
  • FIG. 10A is a cross-sectional view of a transmissive liquid crystal display device which is an example of the display device of one embodiment of the present invention.
  • a liquid crystal display device illustrated in FIG. 10A includes a substrate 131, a transistor 41, a transistor 42, an insulating layer 215, a conductive layer 46, an insulating layer 44, a pixel electrode 121, an insulating layer 45, a common electrode 123, a liquid crystal layer 122, and A substrate 132 is included.
  • the transistor 41 and the transistor 42 are located on the substrate 131.
  • the insulating layer 215 is located over the transistor 41 and the transistor 42.
  • the conductive layer 46 is located on the insulating layer 215.
  • the insulating layer 44 is located on the transistor 41, the transistor 42, the insulating layer 215, and the conductive layer 46.
  • the pixel electrode 121 is located on the insulating layer 44.
  • the insulating layer 45 is located on the pixel electrode 121.
  • the common electrode 123 is located on the insulating layer 45.
  • the liquid crystal layer 122 is located on the common electrode 123.
  • the common electrode 123 has a region overlapping with the conductive layer 46 with the pixel electrode 121 interposed therebetween.
  • the pixel electrode 121 is electrically connected to the source or drain of the transistor 41.
  • the conductive layer 46 is electrically connected to the source or drain of the transistor 42.
  • the conductive layer 46, the pixel electrode 121, and the common electrode 123 each have a
  • the pixel electrode 121 and the common electrode 123 are stacked with the insulating layer 45 interposed therebetween, and operate in an FFS (Fringe Field Switching) mode.
  • the pixel electrode 121, the liquid crystal layer 122, and the common electrode 123 can function as the display device 60.
  • the pixel electrode 121, the insulating layer 45, and the common electrode 123 can function as one capacitor element 51.
  • the conductive layer 46, the insulating layer 44, and the pixel electrode 121 can function as one capacitor element 52.
  • the liquid crystal display device of this embodiment includes two capacitors in a pixel. Note that the liquid crystal display device of this embodiment may include three or more capacitor elements in a pixel.
  • Each of the two capacitor elements is formed of a material that transmits visible light, and has a region overlapping each other.
  • the pixel can have a high aperture ratio and further have a plurality of storage capacitors.
  • the liquid crystal display device By increasing the aperture ratio of the transmissive liquid crystal display device (also referred to as the aperture ratio of a pixel), the liquid crystal display device can be made high definition. Moreover, the light extraction efficiency can be increased by increasing the aperture ratio. Thereby, the power consumption of a liquid crystal display device can be reduced.
  • the capacitance of the capacitive element 52 is preferably larger than the capacitance of the capacitive element 51.
  • the area of the region where the pixel electrode 121 and the conductive layer 46 overlap is preferably larger than the area of the region where the pixel electrode 121 and the common electrode 123 overlap.
  • the thickness T1 of the insulating layer 44 located between the conductive layer 46 and the pixel electrode 121 is preferably thinner than the thickness T2 of the insulating layer 45 located between the pixel electrode 121 and the common electrode 123.
  • FIG. 10B illustrates an example in which the touch sensor TC is mounted on the display device illustrated in FIG.
  • a detection element also referred to as a sensor element
  • Various sensors that can detect the proximity or contact of an object to be detected, such as a finger or a stylus, can be applied as the detection element.
  • a sensor method for example, various methods such as a capacitance method, a resistance film method, a surface acoustic wave method, an infrared method, an optical method, and a pressure-sensitive method can be used.
  • Examples of the electrostatic capacity method include a surface electrostatic capacity method and a projection electrostatic capacity method.
  • examples of the projected capacitance method include a self-capacitance method and a mutual capacitance method. The mutual capacitance method is preferable because simultaneous multipoint detection is possible.
  • the touch panel of one embodiment of the present invention includes a structure in which a separately manufactured display device and a detection element are bonded, a structure in which an electrode or the like that forms the detection element is provided on one or both of the substrate that supports the display device and the counter substrate, and the like Various configurations can be applied.
  • FIG. 11A is a top view of the stacked structure from the gate 221a and the gate 221b to the common electrode 123a as viewed from the common electrode 123a side.
  • FIG. 11B is a top view in which the common electrode 123a is removed from the stacked structure in FIG. 11A
  • FIG. 11C is the common electrode 123a and the pixel electrode 121 in the stacked structure in FIG. FIG.
  • the pixel has a connection portion 73 and a connection portion 74.
  • the pixel electrode 121 is electrically connected to the transistor 41.
  • the conductive layer 222a functioning as the source or drain of the transistor 41 is in contact with the conductive layer 46b, and the conductive layer 46b is in contact with the pixel electrode 121.
  • the conductive layer 46 a is electrically connected to the transistor 42.
  • the conductive layer 46 a is in contact with the conductive layer 222 c that functions as the source or drain of the transistor 42.
  • FIG. 12 shows a cross-sectional view of the display device. Note that the cross-sectional structure of the pixel corresponds to a cross-sectional view taken along dashed-dotted line B1-B2 in FIG.
  • the transistor 41 and the transistor 42 are located on the substrate 131.
  • the transistor 41 includes a gate 221a, a gate insulating layer 211, a semiconductor layer 231a, a conductive layer 222a, a conductive layer 222b, an insulating layer 212, an insulating layer 213, a gate insulating layer 225a, and a gate 223a.
  • the transistor 42 includes a gate 221b, a gate insulating layer 211, a semiconductor layer 231b, a conductive layer 222c, a conductive layer 222d, an insulating layer 212, an insulating layer 213, a gate insulating layer 225b, and a gate 223b.
  • a transistor 41 and a transistor 42 illustrated in FIGS. 12A and 12B have gates above and below a channel.
  • the two gates are preferably electrically connected.
  • a transistor in which two gates are electrically connected can have higher field-effect mobility than another transistor, and can increase on-state current.
  • the area occupied by the circuit portion can be reduced.
  • signal delay in each wiring can be reduced and display unevenness can be suppressed even if the number of wirings is increased by increasing the size or definition of the display device. Is possible.
  • the display device can be narrowed.
  • a highly reliable transistor can be realized.
  • the semiconductor layer 231 includes a pair of low resistance regions and a channel formation region sandwiched between the pair of low resistance regions.
  • the channel formation region overlaps with the gate 221 through the gate insulating layer 211 and overlaps with the gate 223 through the gate insulating layer 225.
  • the semiconductor layer 231 indicates one or both of the semiconductor layer 231a and the semiconductor layer 231b.
  • the gate 221 represents one or both of the gate 221a and the gate 221b
  • the gate 223 represents one or both of the gate 223a and the gate 223b.
  • the gate insulating layer 225 indicates one or both of the gate insulating layer 225a and the gate insulating layer 225b.
  • the gate insulating layer 211 and the gate insulating layer 225 which are in contact with the channel formation region are preferably oxide insulating layers. Note that in the case where the gate insulating layer 211 or the gate insulating layer 225 has a stacked structure, at least a layer in contact with the channel formation region is preferably an oxide insulating layer. Thus, oxygen vacancies can be prevented from occurring in the channel formation region, and the reliability of the transistor can be improved.
  • One or both of the insulating layer 213 and the insulating layer 214 is preferably a nitride insulating layer. Thus, impurities can be prevented from entering the semiconductor layer 231 and the reliability of the transistor can be increased.
  • the insulating layer 215 preferably has a planarization function, and is preferably an organic insulating layer, for example. Note that one or both of the insulating layer 214 and the insulating layer 215 are not necessarily formed.
  • the low resistance region has a lower resistivity than the channel formation region.
  • the low resistance region is a region in contact with the insulating layer 212 in the semiconductor layer 231.
  • the insulating layer 212 preferably contains nitrogen or hydrogen. Accordingly, nitrogen or hydrogen in the insulating layer 212 can enter the low resistance region, and the carrier concentration in the low resistance region can be increased.
  • the low resistance region may be formed by adding an impurity using the gate 223 as a mask. Examples of the impurity include hydrogen, helium, neon, argon, fluorine, nitrogen, phosphorus, arsenic, antimony, boron, and aluminum. The impurity is added by an ion implantation method or an ion doping method. Can do. Further, in addition to the impurities, the low resistance region may be formed by adding indium or the like which is one of the constituent elements of the semiconductor layer 231. By adding indium, the concentration of indium may be higher in the low resistance region than in the channel formation region.
  • a first layer is formed so as to be in contact with part of the semiconductor layer 231, and heat treatment is performed, so that the resistance of the region is reduced.
  • a resistance region can be formed.
  • a film containing at least one of metal elements such as aluminum, titanium, tantalum, tungsten, chromium, and ruthenium can be used.
  • metal elements such as aluminum, titanium, tantalum, and tungsten is preferably included.
  • a nitride containing at least one of these metal elements or an oxide containing at least one of these metal elements can be preferably used.
  • a metal film such as a tungsten film or a titanium film, a nitride film such as an aluminum titanium nitride film, a titanium nitride film, or an aluminum nitride film, or an oxide film such as an aluminum titanium oxide film can be preferably used.
  • the thickness of the first layer can be, for example, 0.5 nm to 20 nm, preferably 0.5 nm to 15 nm, more preferably 0.5 nm to 10 nm, and still more preferably 1 nm to 6 nm. Typically, it can be about 5 nm or about 2 nm. Even when the first layer is thin like this, the resistance of the semiconductor layer 231 can be sufficiently reduced.
  • the low resistance region has a higher carrier density than the channel formation region.
  • the low-resistance region can be a region containing more hydrogen than the channel formation region or a region containing more oxygen vacancies than the channel formation region.
  • the low resistance region can be made an extremely low resistance region.
  • the low resistance region formed in this way has a feature that it is difficult to increase the resistance in a subsequent process. For example, even if heat treatment in an atmosphere containing oxygen, film formation treatment in an atmosphere containing oxygen, or the like is performed, the electrical properties of the low resistance region are not impaired, and thus the electrical characteristics are good. A highly reliable transistor can be realized.
  • the first layer after the heat treatment has conductivity
  • the first layer can function as a protective insulating film by remaining it.
  • the conductive layer 46 b is located on the insulating layer 215, the insulating layer 44 is located on the conductive layer 46 b, and the pixel electrode 121 is located on the insulating layer 44.
  • the pixel electrode 121 is electrically connected to the conductive layer 222a. Specifically, the conductive layer 222a is connected to the conductive layer 46b, and the conductive layer 46b is connected to the pixel electrode 121.
  • a conductive layer 46 a is located on the insulating layer 215.
  • the conductive layer 46a is electrically connected to the conductive layer 222c. Specifically, the conductive layer 46 a is in contact with the conductive layer 222 c through an opening provided in the insulating layer 214 and the insulating layer 215.
  • the substrate 131 and the substrate 132 are bonded to each other with an adhesive layer 141.
  • the FPC 172 is electrically connected to the conductive layer 222e. Specifically, the FPC 172 is in contact with the connection body 242, the connection body 242 is in contact with the conductive layer 123b, and the conductive layer 123b is in contact with the conductive layer 222e.
  • the conductive layer 123b is formed on the insulating layer 45, and the conductive layer 222e is formed on the insulating layer 214.
  • the conductive layer 123b can be formed using the same process and the same material as the common electrode 123a.
  • the conductive layer 222e can be formed using the same process and the same material as the conductive layers 222a to 222d.
  • the pixel electrode 121, the insulating layer 45, and the common electrode 123a can function as one capacitor element 51.
  • the conductive layer 46 a, the insulating layer 44, and the pixel electrode 121 can function as one capacitor element 52.
  • the display device of one embodiment of the present invention includes, for example, two capacitor elements in one pixel. Accordingly, the storage capacity of the pixel can be increased.
  • Each of the two capacitor elements is formed of a material that transmits visible light, and has a region overlapping each other. Thereby, the pixel can achieve both a high aperture ratio and a large storage capacity.
  • the capacitance of the capacitive element 52 is preferably larger than the capacitance of the capacitive element 51. Therefore, the area of the region where the pixel electrode 121 and the conductive layer 46a overlap is preferably larger than the area of the region where the pixel electrode 121 and the common electrode 123a overlap.
  • the thickness of the insulating layer 44 located between the conductive layer 46a and the pixel electrode 121 is preferably thinner than the thickness of the insulating layer 45 located between the pixel electrode 121 and the common electrode 123a.
  • FIG. 12 illustrates an example in which both the transistor 41 and the transistor 42 have a back gate (gate 223); however, one or both of the transistor 41 and the transistor 42 may not have a back gate.
  • FIG. 12 illustrates an example in which the gate insulating layer 225 is formed only over the channel formation region and does not overlap the low resistance region, the gate insulating layer 225 may overlap at least part of the low resistance region.
  • FIG. 13 illustrates an example in which the gate insulating layer 225 is formed in contact with the low-resistance region and the gate insulating layer 211.
  • the gate insulating layer 225 illustrated in FIGS. 13A and 13B has advantages such that the number of steps for processing the gate insulating layer 225 using the gate 223 as a mask can be reduced, and a step on the formation surface of the insulating layer 214 can be reduced.
  • the structures of the transistors 41 and 42 are different from those in FIGS. 12 and 13.
  • the transistor 14 includes a gate 221a, a gate insulating layer 211, a semiconductor layer 231a, a conductive layer 222a, a conductive layer 222b, an insulating layer 217, an insulating layer 218, an insulating layer 215, and a gate 223a.
  • the transistor 42 includes a gate 221b, a gate insulating layer 211, a semiconductor layer 231b, a conductive layer 222c, a conductive layer 222d, an insulating layer 217, an insulating layer 218, an insulating layer 215, and a gate 223b.
  • One of the conductive layer 222a and the conductive layer 222b functions as a source, and the other functions as a drain.
  • the insulating layer 217, the insulating layer 218, and the insulating layer 215 function as gate insulating layers.
  • the gate insulating layer 211 and the insulating layer 217 in contact with the semiconductor layer 231 are preferably oxide insulating layers. Note that in the case where the gate insulating layer 211 or the insulating layer 217 has a stacked structure, at least a layer in contact with the semiconductor layer 231 is preferably an oxide insulating layer. Accordingly, generation of oxygen vacancies in the semiconductor layer 231 can be suppressed, and the reliability of the transistor can be improved.
  • the insulating layer 218 is preferably a nitride insulating layer. Thus, impurities can be prevented from entering the semiconductor layer 231 and the reliability of the transistor can be increased.
  • the insulating layer 215 preferably has a planarization function, and is preferably an organic insulating layer, for example. Note that the insulating layer 215 is not necessarily formed, and the conductive layer 46 a may be formed in contact with the insulating layer 218.
  • the conductive layer 46 b is located on the insulating layer 215, the insulating layer 44 is located on the conductive layer 46 b, and the pixel electrode 121 is located on the insulating layer 44.
  • the pixel electrode 121 is electrically connected to the conductive layer 222a. Specifically, the conductive layer 222a is connected to the conductive layer 46b, and the conductive layer 46b is connected to the pixel electrode 121.
  • a conductive layer 46 a is located on the insulating layer 215.
  • the insulating layer 44 and the insulating layer 45 are located on the conductive layer 46a.
  • a common electrode 123 a is located on the insulating layer 45.
  • the material of the substrate included in the display device there is no particular limitation on the material of the substrate included in the display device, and various substrates can be used.
  • a glass substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate, a ceramic substrate, a metal substrate, a plastic substrate, or the like can be used.
  • the display device can be reduced in weight and thickness. Furthermore, a flexible display device can be realized by using a flexible substrate.
  • liquid crystal material there are a positive liquid crystal material having a positive dielectric anisotropy ( ⁇ ) and a negative liquid crystal material having a negative dielectric constant.
  • ⁇ positive dielectric anisotropy
  • negative liquid crystal material having a negative dielectric constant.
  • either material can be used, and an optimum liquid crystal material can be used depending on a mode to be applied and a design.
  • liquid crystal devices to which various modes are applied can be used.
  • FFS mode for example, an IPS mode, a TN mode, an ASM (Axial Symmetrically aligned Micro-cell) mode, an OCB (Optically Compensated BirefringenceCriff mode), and an FLC (FerroelectricLiquidFrequencyLiquidCrCF)
  • ECB Electrode Controlled Birefringence
  • a liquid crystal device is an element that controls transmission or non-transmission of light by an optical modulation action of liquid crystal.
  • the optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field).
  • a thermotropic liquid crystal a low molecular liquid crystal
  • a polymer liquid crystal a polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal)
  • a ferroelectric liquid crystal an antiferroelectric liquid crystal, or the like
  • These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, and the like depending on conditions.
  • liquid crystal exhibiting a blue phase may be used.
  • the blue phase is one of the liquid crystal phases.
  • a liquid crystal composition mixed with 5% by weight or more of a chiral agent is used for the liquid crystal layer in order to improve the temperature range.
  • a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and exhibits optical isotropy.
  • a liquid crystal composition including a liquid crystal exhibiting a blue phase and a chiral agent does not require alignment treatment and has a small viewing angle dependency.
  • rubbing treatment is unnecessary, electrostatic breakdown caused by the rubbing treatment can be prevented, and defects or breakage of the display panel during the manufacturing process can be reduced.
  • the display device in this embodiment is a transmissive liquid crystal display device
  • a conductive material that transmits visible light is used for both of the pair of electrodes (the pixel electrode 121 and the common electrode 123a).
  • the conductive layer 46b is also formed using a conductive material that transmits visible light, so that a reduction in the aperture ratio of the pixel can be suppressed even when the capacitor 52 is provided.
  • a silicon nitride film is suitable for the insulating layer 44 and the insulating layer 45 that function as a dielectric of the capacitor.
  • a material containing one or more selected from indium (In), zinc (Zn), and tin (Sn) may be used.
  • indium oxide, indium tin oxide (ITO), indium zinc oxide, indium oxide including tungsten oxide, indium zinc oxide including tungsten oxide, indium oxide including titanium oxide, and titanium oxide are included. Examples thereof include indium tin oxide, indium tin oxide containing silicon oxide (ITSO), zinc oxide, and zinc oxide containing gallium.
  • a film containing graphene can also be used. The film containing graphene can be formed by, for example, reducing a film containing graphene oxide.
  • the conductive film that transmits visible light can be formed using an oxide semiconductor (hereinafter also referred to as an oxide conductive layer).
  • the oxide conductive layer preferably includes, for example, indium, and further includes an In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf). preferable.
  • An oxide semiconductor is a semiconductor material whose resistance can be controlled by at least one of oxygen vacancies in the film and impurity concentrations of hydrogen, water, and the like in the film. Therefore, the resistivity of the oxide conductive layer is controlled by selecting a treatment in which at least one of oxygen deficiency and impurity concentration is increased or a treatment in which at least one of oxygen deficiency and impurity concentration is reduced in the oxide semiconductor layer. be able to.
  • an oxide conductive layer formed using an oxide semiconductor in this manner is an oxide semiconductor layer with high carrier density and low resistance, an oxide semiconductor layer with conductivity, or an oxide semiconductor with high conductivity. It can also be called a layer.
  • the transistor included in the display device of this embodiment may have a top-gate structure or a bottom-gate structure.
  • gate electrodes may be provided above and below the channel.
  • a semiconductor material used for the transistor is not particularly limited, and examples thereof include an oxide semiconductor, silicon, and germanium.
  • crystallinity of a semiconductor material used for the transistor there is no particular limitation on the crystallinity of a semiconductor material used for the transistor, and any of an amorphous semiconductor and a semiconductor having crystallinity (a microcrystalline semiconductor, a polycrystalline semiconductor, a single crystal semiconductor, or a semiconductor partially including a crystal region) is used. May be used. It is preferable to use a crystalline semiconductor because deterioration of transistor characteristics can be suppressed.
  • a Group 14 element, a compound semiconductor, or an oxide semiconductor can be used for the semiconductor layer.
  • a semiconductor containing silicon, a semiconductor containing gallium arsenide, an oxide semiconductor containing indium, or the like can be used for the semiconductor layer.
  • An oxide semiconductor is preferably used as a semiconductor in which a channel of the transistor is formed.
  • an oxide semiconductor having a larger band gap than silicon is preferably used. It is preferable to use a semiconductor material having a larger band gap and lower carrier density than silicon because current in the off-state of the transistor can be reduced.
  • the charge accumulated in the capacitor through the transistor can be held for a long time.
  • the driving circuit can be stopped while maintaining the gradation of the displayed image. As a result, a display device with extremely reduced power consumption can be realized.
  • the transistor preferably includes an oxide semiconductor layer that is highly purified and suppresses formation of oxygen vacancies.
  • the current value (off-current value) in the off state of the transistor can be reduced. Therefore, the holding time of an electric signal such as an image signal can be increased, and the writing interval can be set longer in the power-on state. Therefore, since the frequency of the refresh operation can be reduced, there is an effect of suppressing power consumption.
  • a transistor including an oxide semiconductor can be driven at high speed because a relatively high field-effect mobility can be obtained.
  • the transistor in the display portion and the transistor in the driver circuit portion can be formed over the same substrate. That is, it is not necessary to separately use a semiconductor device formed of a silicon wafer or the like as the drive circuit, so that the number of parts of the display device can be reduced.
  • a high-quality image can be provided by using a transistor that can be driven at high speed.
  • an organic insulating material or an inorganic insulating material can be used as an insulating material that can be used for each insulating layer, overcoat, or the like included in the display device.
  • the organic insulating material include acrylic resin, epoxy resin, polyimide resin, polyamide resin, polyimide amide resin, siloxane resin, benzocyclobutene resin, and phenol resin.
  • examples thereof include a film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film.
  • conductive layers such as various wirings and electrodes of display devices include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten.
  • metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten.
  • an alloy containing this as a main component can be used as a single layer structure or a stacked structure.
  • a two-layer structure in which a titanium film is laminated on an aluminum film a two-layer structure in which a titanium film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a molybdenum film, or an alloy film containing molybdenum and tungsten
  • Two-layer structure in which a copper film is laminated a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a titanium film or a titanium nitride film, and an aluminum film or copper layered on the titanium film or titanium nitride film Laminating a film, and further forming a three-layer structure for forming a titanium film or a titanium nitride film thereon, a molybdenum film or a molybdenum nitride film, and an aluminum film or a copper film stacked on the molybdenum film or the molybdenum nit
  • the first and third layers include titanium, titanium nitride, molybdenum, tungsten, an alloy containing molybdenum and tungsten, an alloy containing molybdenum and zirconium, or a film made of molybdenum nitride.
  • the second layer it is preferable to form a film made of a low resistance material such as copper, aluminum, gold or silver, or an alloy of copper and manganese.
  • ITO indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, ITSO, etc. You may use the electroconductive material which has.
  • the oxide conductive layer may be formed by controlling the resistivity of the oxide semiconductor.
  • a curable resin such as a thermosetting resin, a photocurable resin, or a two-component mixed curable resin
  • a curable resin such as a thermosetting resin, a photocurable resin, or a two-component mixed curable resin
  • an acrylic resin, a urethane resin, an epoxy resin, a siloxane resin, or the like can be used.
  • connection body 242 for example, an anisotropic conductive film (ACF: Anisotropic Conductive Film), an anisotropic conductive paste (ACP: Anisotropic Conductive Paste), or the like can be used.
  • ACF Anisotropic Conductive Film
  • ACP Anisotropic Conductive Paste
  • the backlight unit 30 may be a direct type backlight, an edge light type backlight, or the like.
  • As the light source an LED (Light Emitting Diode), an organic EL (Electroluminescence) element, or the like can be used.
  • the backlight unit 30 is provided with a light source 39.
  • a light source 39 that emits red light a light source 39 that emits green light, and a light source 39 that emits blue light may be provided.
  • Thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device are respectively formed by sputtering, chemical vapor deposition (CVD), vacuum evaporation, and pulsed laser deposition (PLD: Pulsed Laser Deposition).
  • CVD chemical vapor deposition
  • PLD Pulsed Laser Deposition
  • Method atomic layer deposition
  • ALD Atomic Layer Deposition
  • the CVD method include a plasma enhanced chemical vapor deposition (PECVD) method, a thermal chemical vapor deposition (PECVD) method, a thermal CVD method, and the like.
  • An example of the thermal CVD method is a metal organic chemical vapor deposition (MOCVD) method.
  • Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute display devices are spin coat, dip, spray coating, ink jet printing, dispensing, screen printing, offset printing, doctor knife, slit coat, roll coat, curtain, respectively. It can be formed by a method such as coating or knife coating.
  • a thin film included in the display device can be processed using a photolithography method or the like.
  • an island-shaped thin film may be formed by a film formation method using a shielding mask.
  • the thin film may be processed by a nanoimprint method, a sand blast method, a lift-off method, or the like.
  • a photolithography method a resist mask is formed on a thin film to be processed, the thin film is processed by etching or the like, and the resist mask is removed. After forming a photosensitive thin film, exposure and development are performed. And a method for processing the thin film into a desired shape.
  • Examples of the light used for exposure in the photolithography method include i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), and light obtained by mixing these.
  • ultraviolet light, KrF laser light, ArF laser light, or the like can be used.
  • exposure may be performed by an immersion exposure technique.
  • Examples of light used for exposure include extreme ultraviolet light (EUV: Extreme-violet) and X-rays.
  • EUV Extreme-violet
  • an electron beam can be used instead of the light used for exposure. It is preferable to use extreme ultraviolet light, X-rays, or an electron beam because extremely fine processing is possible. Note that a photomask is not necessary when exposure is performed by scanning a beam such as an electron beam.
  • etching the thin film For etching the thin film, a dry etching method, a wet etching method, a sand blasting method, or the like can be used.
  • Metal oxide A metal oxide functioning as an oxide semiconductor is preferably used for the semiconductor layer of the transistor included in the display device of this embodiment. Below, the metal oxide applicable to a semiconductor layer is demonstrated.
  • the metal oxide preferably contains at least indium or zinc.
  • indium and zinc are preferably included.
  • aluminum, gallium, yttrium, tin, or the like is contained.
  • One or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like may be included.
  • the metal oxide is an In-M-Zn oxide containing indium, an element M, and zinc is considered.
  • the element M is aluminum, gallium, yttrium, tin, or the like.
  • Other elements applicable to the element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like.
  • the element M may be a combination of a plurality of the aforementioned elements.
  • metal oxides containing nitrogen may be collectively referred to as metal oxides.
  • a metal oxide containing nitrogen may be referred to as a metal oxynitride.
  • a metal oxide containing nitrogen such as zinc oxynitride (ZnON) may be used for the semiconductor layer.
  • An oxide semiconductor (metal oxide) is classified into a single crystal oxide semiconductor and a non-single crystal oxide semiconductor.
  • the non-single-crystal oxide semiconductor for example, a CAAC-OS (c-axis aligned crystal oxide semiconductor), a polycrystalline oxide semiconductor, an nc-OS (nanocrystalline oxide semiconductor), a pseudo-amorphous oxide semiconductor (a-like oxide semiconductor) OS: amorphous-like oxide semiconductor) and amorphous oxide semiconductor.
  • the CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of nanocrystals are connected in the ab plane direction and have a strain.
  • the strain refers to a portion where the orientation of the lattice arrangement changes between a region where the lattice arrangement is aligned and a region where another lattice arrangement is aligned in a region where a plurality of nanocrystals are connected.
  • Nanocrystals are based on hexagons, but are not limited to regular hexagons and may be non-regular hexagons.
  • the strain may have a lattice arrangement such as a pentagon and a heptagon.
  • a clear crystal grain boundary also referred to as a grain boundary
  • the formation of crystal grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the ab plane direction, the bond distance between atoms changes due to substitution of metal elements, and the like. Because.
  • the CAAC-OS is a layered crystal in which a layer containing indium and oxygen (hereinafter referred to as an In layer) and a layer including elements M, zinc, and oxygen (hereinafter referred to as (M, Zn) layers) are stacked.
  • In layer a layer containing indium and oxygen
  • M, Zn elements M, zinc, and oxygen
  • indium and the element M can be replaced with each other, and when the element M in the (M, Zn) layer is replaced with indium, it can also be expressed as an (In, M, Zn) layer. Further, when indium in the In layer is replaced with the element M, it can also be expressed as an (In, M) layer.
  • CAAC-OS is a metal oxide with high crystallinity.
  • CAAC-OS impurities and defects oxygen deficiency (V O:. Oxygen vacancy also referred) etc.) with less metal It can be said that it is an oxide. Therefore, the physical properties of the metal oxide including a CAAC-OS are stable. Therefore, a metal oxide including a CAAC-OS is resistant to heat and has high reliability.
  • the nc-OS has periodicity in atomic arrangement in a minute region (for example, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm).
  • the nc-OS has no regularity in crystal orientation between different nanocrystals. Therefore, orientation is not seen in the whole film. Therefore, the nc-OS may not be distinguished from an a-like OS or an amorphous oxide semiconductor depending on an analysis method.
  • indium-gallium-zinc oxide which is a kind of metal oxide including indium, gallium, and zinc
  • IGZO indium-gallium-zinc oxide
  • a crystal smaller than a large crystal here, a crystal of several millimeters or a crystal of several centimeters
  • it may be structurally stable.
  • the a-like OS is a metal oxide having a structure between the nc-OS and the amorphous oxide semiconductor.
  • the a-like OS has a void or a low density region. That is, the a-like OS has lower crystallinity than the nc-OS and the CAAC-OS.
  • Oxide semiconductors have various structures and have different characteristics.
  • the oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, an nc-OS, and a CAAC-OS.
  • the metal oxide film functioning as a semiconductor layer can be formed using one or both of an inert gas and an oxygen gas.
  • an inert gas an oxygen gas
  • oxygen gas an oxygen gas
  • the flow rate ratio of oxygen (oxygen partial pressure) during the formation of the metal oxide film is preferably 0% or more and 30% or less, and 5% or more and 30% or less. Is more preferably 7% or more and 15% or less.
  • the metal oxide preferably has a band gap of 2 eV or more, more preferably 2.5 eV or more, and further preferably 3 eV or more. In this manner, off-state current of a transistor can be reduced by using a metal oxide having a large band gap.
  • the metal oxide film can be formed by a sputtering method.
  • a PLD method a PECVD method, a thermal CVD method, an ALD method, a vacuum evaporation method, or the like may be used.
  • the display device of one embodiment of the present invention since the display device of one embodiment of the present invention has two capacitors that transmit visible light overlapped with a pixel, the pixel can achieve both a high aperture ratio and a large storage capacitor. .
  • the CAC-OS is one structure of a material in which an element included in an oxide semiconductor is unevenly distributed with a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or the vicinity thereof. Note that in the following, in an oxide semiconductor, one or more metal elements are unevenly distributed, and a region including the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or the vicinity thereof.
  • the state mixed with is also referred to as mosaic or patch.
  • the oxide semiconductor preferably contains at least indium.
  • One kind selected from the above or a plurality of kinds may be included.
  • a CAC-OS in In-Ga-Zn oxide is an indium oxide (hereinafter referred to as InO).
  • X1 (X1 is greater real than 0) and.), or indium zinc oxide (hereinafter, in X2 Zn Y2 O Z2 ( X2, Y2, and Z2 is larger real than 0) and a.) or the like, Gallium oxide (hereinafter referred to as GaO X3 (X3 is a real number greater than 0)) or gallium zinc oxide (hereinafter referred to as Ga X4 Zn Y4 O Z4 (where X4, Y4, and Z4 are greater than 0)) to.) and the like, the material becomes mosaic by separate into, mosaic InO X1, or in X2 Zn Y2 O Z2 is configured uniformly distributed in the film (hereinafter, cloud Also referred to.) A.
  • CAC-OS includes a region GaO X3 is the main component, In X2 Zn Y2 O Z2, or InO X1 there is a region which is a main component, a composite oxide semiconductor having a structure that is mixed.
  • the first region indicates that the atomic ratio of In to the element M in the first region is larger than the atomic ratio of In to the element M in the second region. It is assumed that the concentration of In is higher than that in the second region.
  • IGZO is a common name and sometimes refers to one compound of In, Ga, Zn, and O.
  • ZnO ZnO
  • the crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure.
  • the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected without being oriented in the ab plane.
  • CAC-OS relates to a material structure of an oxide semiconductor.
  • CAC-OS refers to a region that is observed in the form of nanoparticles mainly composed of Ga in a material structure including In, Ga, Zn, and O, and nanoparticles that are partially composed mainly of In.
  • the region observed in a shape is a configuration in which the regions are randomly dispersed in a mosaic shape. Therefore, in the CAC-OS, the crystal structure is a secondary element.
  • the CAC-OS does not include a stacked structure of two or more kinds of films having different compositions.
  • a structure composed of two layers of a film mainly containing In and a film mainly containing Ga is not included.
  • a region GaO X3 is the main component, In X2 Zn Y2 O Z2, or the region InO X1 is the main component, it may clear boundary can not be observed.
  • the CAC-OS includes a region observed in a part of a nanoparticle mainly including the metal element and a nano part mainly including In.
  • the region observed in the form of particles refers to a configuration in which each region is randomly dispersed in a mosaic shape.
  • the CAC-OS can be formed by a sputtering method under a condition where the substrate is not intentionally heated, for example.
  • a CAC-OS is formed by a sputtering method
  • any one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas may be used as a deposition gas.
  • the flow rate ratio of the oxygen gas to the total flow rate of the deposition gas during film formation is preferably as low as possible.
  • the flow rate ratio of the oxygen gas is 0% or more and less than 30%, preferably 0% or more and 10% or less. .
  • the CAC-OS has a feature that a clear peak is not observed when measurement is performed using a ⁇ / 2 ⁇ scan by an out-of-plane method, which is one of X-ray diffraction (XRD) measurement methods.
  • XRD X-ray diffraction
  • a CAC-OS includes a ring-shaped region having a high luminance (ring region) in an electron beam diffraction pattern obtained by irradiating an electron beam having a probe diameter of 1 nm (also referred to as a nanobeam electron beam), and the ring region.
  • a probe diameter of 1 nm also referred to as a nanobeam electron beam
  • the crystal structure of the CAC-OS has an nc (nano-crystal) structure having no orientation in the planar direction and the cross-sectional direction.
  • a region in which GaO X3 is a main component is obtained by EDX mapping obtained by using energy dispersive X-ray spectroscopy (EDX). It can be confirmed that a region in which In X2 Zn Y2 O Z2 or InO X1 is a main component is unevenly distributed and mixed.
  • EDX energy dispersive X-ray spectroscopy
  • the CAC-OS has a structure different from that of the IGZO compound in which the metal element is uniformly distributed, and has a property different from that of the IGZO compound. That is, in the CAC-OS, a region in which GaO X3 or the like is the main component and a region in which In X2 Zn Y2 O Z2 or InO X1 is the main component are phase-separated from each other, and each region is mainly composed of each element. Has a mosaic structure.
  • the region containing In X2 Zn Y2 O Z2 or InO X1 as a main component is a region having higher conductivity than a region containing GaO X3 or the like as a main component. That, In X2 Zn Y2 O Z2, or InO X1 is a region which is a main component, by carriers flow, expressed the conductivity of the oxide semiconductor. Accordingly, a region where In X2 Zn Y2 O Z2 or InO X1 is a main component is distributed in a cloud shape in the oxide semiconductor, whereby high field-effect mobility ( ⁇ ) can be realized.
  • regions GaO X3, etc. are the main component, In X2 Zn Y2 O Z2, or InO X1 is compared to region which is a main component, has a high area insulation. That is, the region whose main component is GaO X3 or the like is distributed in the oxide semiconductor, whereby leakage current can be suppressed and good switching operation can be realized.
  • CAC-OS when CAC-OS is used for a semiconductor element, the insulating property caused by GaO X3 or the like and the conductivity caused by In X2 Zn Y2 O Z2 or InO X1 act in a complementary manner.
  • An on-current (I on ) and high field effect mobility ( ⁇ ) can be realized.
  • CAC-OS is optimal for various semiconductor devices including a display.
  • the electronic device of this embodiment includes the display device of one embodiment of the present invention in the display portion. Thereby, the display part of an electronic device can display a high quality image
  • the display portion of the electronic device of this embodiment can display an image having a resolution of, for example, full high vision, 2K, 4K, 8K, 16K, or higher.
  • the screen size of the display unit can be 20 inches or more diagonal, 30 inches or more diagonal, 50 inches diagonal, 60 inches diagonal, or 70 inches diagonal.
  • Examples of electronic devices that can use the display device of one embodiment of the present invention include a television set, a desktop or notebook personal computer, a monitor for a computer, a digital signage (digital signage), a pachinko machine, and the like.
  • a television set a desktop or notebook personal computer
  • a monitor for a computer a digital signage (digital signage), a pachinko machine, and the like.
  • electronic devices having a relatively large screen such as a large game machine such as a game machine, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproduction device, and the like can be given. .
  • the display device of one embodiment of the present invention can be favorably used for a portable electronic device, a wearable electronic device (wearable device), a VR (Virtual Reality) device, an AR (Augmented Reality) device, and the like. .
  • the electronic device of one embodiment of the present invention may include a secondary battery, and it is preferable that the secondary battery can be charged using non-contact power transmission.
  • Secondary batteries include, for example, lithium ion secondary batteries such as lithium polymer batteries (lithium ion polymer batteries) using gel electrolyte, nickel metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead storage batteries, air secondary batteries, nickel A zinc battery, a silver zinc battery, etc. are mentioned.
  • lithium ion secondary batteries such as lithium polymer batteries (lithium ion polymer batteries) using gel electrolyte, nickel metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead storage batteries, air secondary batteries, nickel A zinc battery, a silver zinc battery, etc. are mentioned.
  • the electronic device of one embodiment of the present invention may include an antenna. By receiving a signal with an antenna, video, information, and the like can be displayed on the display unit.
  • the antenna may be used for non-contact power transmission.
  • the electronic device of one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, It may have a function of measuring voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared).
  • the electronic device of one embodiment of the present invention can have a variety of functions. For example, a function for displaying various information (still images, moving images, text images, etc.) on a display unit, a touch panel function, a function for displaying a calendar, date or time, a function for executing various software (programs), and wireless communication It can have a function, a function of reading a program or data recorded in a recording medium, and the like.
  • an electronic apparatus having a plurality of display units
  • a function of displaying a stereoscopic image can be provided.
  • an electronic device having an image receiving unit a function for photographing a still image or a moving image, a function for automatically or manually correcting the photographed image, and a function for saving the photographed image in a recording medium (externally or incorporated in the electronic device)
  • a function of displaying the photographed image on the display portion can be provided.
  • the functions of the electronic device of one embodiment of the present invention are not limited thereto, and the electronic device can have various functions.
  • FIG. 15A illustrates a television device 1810.
  • a television device 1810 includes a display portion 1811, a housing 1812, a speaker 1813, and the like. Furthermore, an LED lamp, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, and the like can be provided.
  • the television device 1810 can be operated by a remote controller 1814.
  • broadcast radio waves examples include terrestrial waves and radio waves transmitted from satellites.
  • Broadcast radio waves include analog broadcasts, digital broadcasts, etc., and video and audio, or audio-only broadcasts.
  • broadcast radio waves transmitted in a specific frequency band in the UHF band (about 300 MHz to 3 GHz) or the VHF band (30 MHz to 300 MHz) can be received.
  • the transfer rate can be increased and more information can be obtained. Accordingly, an image having a resolution exceeding full high-definition can be displayed on the display unit 1811. For example, an image having a resolution of 4K, 8K, 16K, or higher can be displayed.
  • FIG. 15B shows a digital signage 1820 attached to a cylindrical column 1822.
  • the digital signage 1820 has a display portion 1821.
  • the display portion 1821 As the display portion 1821 is wider, the amount of information that can be provided at a time can be increased. Moreover, the wider the display portion 1821 is, the easier it is to be noticed by humans. For example, the advertising effect of advertisement can be enhanced.
  • a touch panel By applying a touch panel to the display portion 1821, not only a still image or a moving image is displayed on the display portion 1821 but also a user can operate intuitively, which is preferable. In addition, when used for the purpose of providing information such as route information or traffic information, usability can be improved by an intuitive operation.
  • FIG. 15C illustrates a laptop personal computer 1830.
  • the personal computer 1830 includes a display portion 1831, a housing 1832, a touch pad 1833, a connection port 1834, and the like.
  • the touch pad 1833 functions as an input unit such as a pointing device or a pen tablet, and can be operated with a finger, a stylus, or the like.
  • a display device is incorporated in the touch pad 1833. As shown in FIG. 15C, by displaying the input key 1835 on the surface of the touch pad 1833, the touch pad 1833 can be used as a keyboard. At this time, when the input key 1835 is touched, a vibration module may be incorporated in the touch pad 1833 in order to realize tactile sensation by vibration.
  • FIG. 16A and 16B show a portable information terminal 800.
  • the portable information terminal 800 includes a housing 801, a housing 802, a display portion 803, a display portion 804, a hinge portion 805, and the like.
  • the housing 801 and the housing 802 are connected by a hinge portion 805.
  • the portable information terminal 800 can open the housing 801 and the housing 802 as illustrated in FIG. 16B from the folded state as illustrated in FIG.
  • document information can be displayed on the display portion 803 and the display portion 804, and can be used as an electronic book terminal.
  • still images and moving images can be displayed on the display portion 803 and the display portion 804.
  • the portable information terminal 800 can be folded when being carried, it is excellent in versatility.
  • housing 801 and the housing 802 may include a power button, an operation button, an external connection port, a speaker, a microphone, and the like.
  • FIG. 16C illustrates an example of a portable information terminal.
  • a portable information terminal 810 illustrated in FIG. 16C includes a housing 811, a display portion 812, operation buttons 813, an external connection port 814, a speaker 815, a microphone 816, a camera 817, and the like.
  • the portable information terminal 810 includes a touch sensor in the display unit 812. All operations such as making a call or inputting characters can be performed by touching the display portion 812 with a finger, a stylus, or the like.
  • the operation of the operation button 813 can switch the power ON / OFF operation and the type of image displayed on the display unit 812.
  • the mail creation screen can be switched to the main menu screen.
  • the orientation (portrait or landscape) of the portable information terminal 810 is determined, and the screen display orientation of the display unit 812 is changed. It can be switched automatically.
  • the screen display orientation can also be switched by touching the display portion 812, operating the operation buttons 813, or inputting voice using the microphone 816.
  • the portable information terminal 810 has one or a plurality of functions selected from, for example, a telephone, a notebook, an information browsing device, or the like. Specifically, it can be used as a smartphone.
  • the portable information terminal 810 can execute various applications such as mobile phone, e-mail, text browsing and creation, music playback, video playback, Internet communication, and games.
  • FIG. 16D illustrates an example of a camera.
  • the camera 820 includes a housing 821, a display portion 822, operation buttons 823, a shutter button 824, and the like.
  • a removable lens 826 is attached to the camera 820.
  • the camera 820 is configured such that the lens 826 can be removed from the housing 821 and replaced, but the lens 826 and the housing may be integrated.
  • the camera 820 can capture a still image or a moving image by pressing the shutter button 824.
  • the display portion 822 has a function as a touch panel and can capture an image by touching the display portion 822.
  • the camera 820 can be separately attached with a strobe device, a viewfinder, and the like. Alternatively, these may be incorporated in the housing 821.
  • FIG. 16E illustrates an example in which the display device of one embodiment of the present invention is mounted as a vehicle-mounted display.
  • the display unit 832 and the display unit 833 can provide various information by displaying navigation information, a speedometer, a tachometer, a travel distance, a fuel gauge, a gear state, an air conditioner setting, and the like.
  • an electronic device can be obtained by using the display device of one embodiment of the present invention.
  • the application range of the display device is extremely wide and can be applied to electronic devices in all fields.
  • FIG. 17A is a diagram illustrating an operation method of the pixel 11 for which simulation is performed in this embodiment, and the operation is described by being divided into periods T51 to T54.
  • FIGS. 17B1, B2, B3, and B4 are circuit diagrams illustrating a specific operation method of the pixel 11 in each period illustrated in FIG. Specifically, FIG. 17B1 is the specific period of the pixel 11 in the period T51, FIG. 17B2 is the specific period of the period T52, FIG. 17B3 is the specific period of the period T53, and FIG. It is a circuit diagram which shows a various operation method.
  • image data and data are written in the pixels 11.
  • a potential of 24 V was supplied as a high potential to the wiring 21 and the wiring 22, and the transistor 41 and the transistor 42 were turned on.
  • the potential of the wiring 31 is a potential V ID that is a potential corresponding to image data
  • the potential of the wiring 32 is a potential V data that is a potential corresponding to data .
  • the writing of the image data and the data to the pixel 11 is finished, and standby is performed. Specifically, a potential of ⁇ 8 V is supplied to the wiring 21 and the wiring 22 as a low potential, so that the transistor 41 and the transistor 42 are turned off.
  • a potential of ⁇ 8 V is supplied to the wiring 21 and the wiring 22 as a low potential, so that the transistor 41 and the transistor 42 are turned off.
  • the potential V data supplied to the wiring 32 in the period T51 was a potential calculated by the following equation.
  • the display device 60 is a liquid crystal device, and the capacitance value of the capacitive element 51 is 1 pF, the capacitance value of the capacitive element 52 is 10 pF, and the capacitance value of the display device 60 is 1 pF. That was the C 1 2 pF, the C 2 and 10 pF.
  • the potential V D indicates a target value of the potential of the node NM1 in the periods T53 and T54. In this example, whether or not the potential of the node NM1 becomes the potential V D in the period T53 and the period T54 was confirmed by simulation.
  • FIG. 18 (A) is a potential V D 0V, -1V, -2V, -3V, -4V, in the case of a -5V, the simulation results in the potential of the node NM1 in the period T51 to the period T54.
  • FIG. 18 (B) is the potential V D 0V, 1V, 2V, 3V, 4V, in the case of a 5V, the simulation results in the potential of the node NM1 in the period T51 to the period T54.
  • the potential V ID is 5 V and the potential V ref is ⁇ 12 V
  • the potential V ID is ⁇ 5 V and the potential V ref is 12 V. did. That is, in the case shown in FIG. 18A, the potential V ID is positive and the potential V D is 0 or negative, and in the case shown in FIG. 18B, the potential V ID is negative and the potential V D is 0 or positive. .

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