WO2019125368A1 - Mémoire spin-orbite commandée par porte - Google Patents

Mémoire spin-orbite commandée par porte Download PDF

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Publication number
WO2019125368A1
WO2019125368A1 PCT/US2017/067006 US2017067006W WO2019125368A1 WO 2019125368 A1 WO2019125368 A1 WO 2019125368A1 US 2017067006 W US2017067006 W US 2017067006W WO 2019125368 A1 WO2019125368 A1 WO 2019125368A1
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magnet
magnetic
interconnect
magnetic junction
structures
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PCT/US2017/067006
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English (en)
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Sasikanth Manipatruni
Tanay GOSAVI
Ian A. Young
Dmitri E. Nikonov
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Intel Corporation
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Priority to PCT/US2017/067006 priority Critical patent/WO2019125368A1/fr
Publication of WO2019125368A1 publication Critical patent/WO2019125368A1/fr

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1675—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details
    • H10N50/85—Magnetic active materials

Definitions

  • Embedded memory with state retention can enable energy and computational efficiency.
  • spin transfer torque based magnetic random access memory suffer from the problem of high voltage and high write current during the programming (e.g., writing) of a bit-cell.
  • large write current e.g., greater than 100 mA
  • voltage e.g., greater than 0.7 V
  • Limited write current also leads to high write error rates or slow switching times (e.g., exceeding 20 ns) in MTJ based MRAM.
  • the presence of a large current flowing through a tunnel barrier leads to reliability issues in magnetic tunnel junctions.
  • Fig. 1A illustrates a magnetization response to an applied magnetic field for a ferromagnet.
  • Fig. IB illustrates a magnetization response to an applied magnetic field for a paramagnet.
  • Figs. 2A-B illustrate a three-dimensional (3D) view and corresponding top view, respectively, of a device having an out-of-plane magnetic tunnel junction (MTJ) stack coupled to a spin orbit coupling (SOC) interconnect, and having two select transistors.
  • MTJ magnetic tunnel junction
  • SOC spin orbit coupling
  • Fig. 3 illustrates a cross-section of the SOC interconnect with electrons having their spins polarized in-plane and deflected up and down resulting from a flow of charge current.
  • Fig. 4A illustrates a plot showing write energy-delay conditions for one transistor and one MTJ with spin Hall effect (SHE) material compared to traditional MTJs.
  • SHE spin Hall effect
  • Fig. 4B illustrates a plot comparing reliable write times for spin Hall MRAM and spin torque MRAM.
  • Figs. 5A-B illustrate a 3D view and corresponding cross-section view, respectively, of a gated device having a magnetic junction with magnets having perpendicular magnetizations, and with reduced number of select transistors, according to some embodiments of the disclosure.
  • Figs. 6A-C illustrate cross-sections of a super latice based interconnect, respectively, according to some embodiments of the disclosure.
  • FIG. 7A-D illustrate an interface of one of the interconnects of Figs. 6A-B, a
  • Fig. 8A illustrates a cross-section of a device having a magnetic junction with magnets having perpendicular magnetizations, wherein a free magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 8B illustrates a cross-section of a device having a magnetic junction with magnets having perpendicular magnetizations, wherein a free magnet structure and a fixed magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 8C illustrates a cross-section of a device having a magnetic junction with magnets having perpendicular magnetizations, wherein a fixed magnet structure and one of the free magnets of a free magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 8D illustrates a cross-section of a device having a magnetic junction with magnets having perpendicular magnetizations, wherein a fixed magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 8E illustrates a cross-section of a device having a magnetic junction with magnets having perpendicular magnetizations, wherein a fixed magnet structure and one of the free magnets of a free magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 9A illustrates a plot showing spin polarization capturing switching of a free magnet structure which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 9B illustrates a magnetization plot associated with Fig. 9A, according to some embodiments of the disclosure.
  • Fig. 9C illustrates a plot showing spin polarization capturing switching of the free magnet structure which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 9D illustrates a magnetization plot associated with Fig. 9C, according to some embodiments of the disclosure.
  • Fig. 10 illustrates a cross-section of a die layout having any of the devices or structures of Figs. 5-8 formed in metal 3 (M3) and metal 2 (M2) layer regions, according to some embodiments of the disclosure.
  • Fig. 11 illustrates a cross-section of a die layout having any of the devices or structures of Figs. 5-8 formed in metal 2 (M2) and metal 1 (Ml) layer regions, according to some embodiments of the disclosure.
  • Fig. 12 illustrates a plot showing an improvement in energy-delay product using any of the device(s) or structures of Figs. 5-8 compared to the device of Fig. 2A, in accordance with some embodiments of the disclosure.
  • FIG. 13 illustrates a flowchart of a method for forming a device or a structure of Figs. 5-8, in accordance with some embodiments.
  • Fig. 14 illustrates a smart device or a computer system or a SoC (System-on-
  • Chip with a magnetic junction based memory having the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Some embodiments describe gated spin orbit magnetic memory that comprises a magnetic junction; and an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a super lattice of neutral and charged perovskites.
  • the memory comprises a device which is controllable by a word-line, wherein the device includes a source and drain, wherein one of the source or drain is coupled to the interconnect, and wherein one of the drain or source is coupled to a select line.
  • the interconnect is coupled to a second select line. For example, the interconnect is coupled to the second select line directly.
  • the memory comprises a bit-line coupled to the magnetic junction.
  • the neutral perovskite comprises a group 2 element and oxygen, and wherein the charged perovskite comprises one of a group 3d, 4d, or 5d transition metal and oxygen.
  • the neutral perovskite comprises one or both of: Sr and O; or Ti and O.
  • the charged perovskite comprises one or both of: Al and O, or La and O.
  • the magnetic junction comprises: a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA), wherein the first structure has an anisotropy axis perpendicular to a plane of a device; a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structure.
  • PMA perpendicular magnetic anisotropy
  • the magnetic junction comprises: a first structure comprising a magnet with unfixed in-plane magnetic anisotropy, wherein the first structure has an anisotropy axis along a plane of a device; a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed in-plane magnetic anisotropy, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures.
  • the term“free” or“unfixed” here with reference to a magnet refers to a magnet whose magnetization direction can change along its easy axis upon application of an external field or force (e.g., Oersted field, spin torque, etc.).
  • the term“fixed” or “pinned” here with reference to a magnet refers to a magnet whose magnetization direction is pinned or fixed along an axis and which may not change due to application of an external field (e.g., electrical field, Oersted field, spin torque,).
  • perpendicularly magnetized magnet refers to a magnet having a magnetization which is substantially perpendicular to a plane of the magnet or a device.
  • an in-plane magnet refers to a magnet that has magnetization in a direction substantially along the plane of the magnet.
  • a magnet with a magnetization which is in an x or y direction and is in a range of 0 (or 180 degrees) +/- 20 degrees relative to an x-y plane of a device.
  • a device may generally refer to an apparatus according to the context of the usage of that term.
  • a device may refer to a stack of layers or structures, a single structure or layer, a connection of various structures having active and/or passive elements, etc.
  • a device is a three dimensional structure with a plane along the x-y direction and a height along the z direction of an x-y-z Cartesian coordinate system.
  • the plane of the device may also be the plane of an apparatus which comprises the device.
  • the magnetic junction comprises: a fourth structure between the first and second structures, wherein the fourth structure includes one or more of: Ru, Os, Hs, or Fe.
  • the magnetic junction comprises a fifth structure between the second and third structures, wherein the fifth structure includes one or more of: Ru, Os, Hs, or Fe.
  • the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
  • the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • the magnet of the first structure is a paramagnet which comprises dopants which include one or more of: Ce,
  • one or more of the free magnets of the free magnet structure of the magnetic junction comprise a composite magnet.
  • the composite magnet may be a super lattice including a first material and a second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • the fixed magnet of the magnetic junction also comprises a composite magnet.
  • the out-of-plane magnetization switching enables perpendicular magnet anisotropy (PMA) based magnetic devices (e.g., MRAM and logic) comprising spin orbit effects that generate perpendicular spin currents.
  • PMA perpendicular magnet anisotropy
  • MRAM magnetic random access memory
  • GSOE giant spin orbit effects
  • the perpendicular magnet switch results in lower write error rates which enable faster MRAM (e.g., write time of less than 10 ns).
  • the perpendicular magnet switch of some embodiments decouples write and read paths to enable faster read latencies.
  • the perpendicular magnet switch of some embodiments uses significantly smaller read current through the magnetic junction (e.g., MTJ or spin valve) and provides improved reliability of the tunneling oxide and MTJs. For example, less than 10 mA compared to 100 mA for nominal write is used by the perpendicular magnet switch of some embodiments.
  • the interconnect coupled to the magnetic junction provides the function of trans conductance, spin-to-charge conversion, charge-to-spin conversion, and a selector.
  • the selector function is achieved by using a super lattice of perovskites for the interconnect.
  • at least one of the select transistors associated with the memory device can be removed.
  • the two-dimensional (2D) gas, formed within the interconnect upon a passage of current or an application of bias is tunable.
  • the bias to the interconnect causes a gate-able field.
  • the interconnect can behave as a transistor-like switch.
  • interconnect allows for the removal of one or more transistors coupled to the magnetic junction. Further, the switching energy for switching the free magnet(s) of the magnetic junction is reduced by the interconnect comprising a super lattice of perovskites. Other technical effects will be evident from the various embodiments and figures.
  • signals are represented with lines. Some lines may be thicker, to indicate more constituent signal paths, and/or have arrows at one or more ends, to indicate primary information flow direction. Such indications are not intended to be limiting. Rather, the lines are used in connection with one or more exemplary embodiments to facilitate easier understanding of a circuit or a logical unit. Any represented signal, as dictated by design needs or preferences, may actually comprise one or more signals that may travel in either direction and may be implemented with any suitable type of signal scheme.
  • connection means a direct connection, such as electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices.
  • coupled means a direct or indirect connection, such as a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection, through one or more passive or active intermediary devices.
  • circuit or“module” may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function.
  • signal may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal.
  • the meaning of “a,” “an,” and “the” include plural references.
  • the meaning of “in” includes “in” and “on.”
  • the term“scaling” generally refers to converting a design (schematic and layout) from one process technology to another process technology and subsequently being reduced in layout area.
  • the term“scaling” generally also refers to downsizing layout and devices within the same technology node.
  • the term“scaling” may also refer to adjusting (e.g., slowing down or speeding up - i.e. scaling down, or scaling up respectively) of a signal frequency relative to another parameter, for example, power supply level.
  • the terms “substantially,”“close,”“approximately,”“near,” and“about,” generally refer to being within +/- 10% of a target value.
  • phrases“A and/or B” and“A or B” mean (A), (B), or (A and B).
  • phrase“A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
  • Fig. 1A illustrates a magnetization hysteresis plot 100 for ferromagnet (FM)
  • the plot shows magnetization response to an applied magnetic field for ferromagnet 101.
  • the x-axis of plot 100 is magnetic field ⁇ ’ while the y-axis is magnetization‘m ⁇
  • the maximum and minimum magnetic field regions of the hysteresis loop correspond to saturated magnetization configurations 104 and 106, respectively.
  • saturated magnetization configurations 104 and 106 FM 101 has stable magnetizations.
  • FM 101 does not have a definite value of magnetization, but rather depends on the history of applied magnetic fields.
  • the magnetization of FM 101 in configuration 105 can be either in the +x direction or the -x direction for an in-plane FM.
  • changing or switching the state of FM 101 from one magnetization direction (e.g., configuration 104) to another magnetization direction (e.g., configuration 106) is time consuming resulting in slower nanomagnets response time. It is associated with the intrinsic energy of switching proportional to the area in the graph contained between curves 102 and 103.
  • Fig. IB illustrates magnetization plot 120 for paramagnet 121.
  • Plot 120 shows the magnetization response to an applied magnetic field for paramagnet 121.
  • the x-axis of plot 120 is magnetic field ⁇ ’ while the y-axis is magnetization‘m’.
  • a paramagnet as opposed to a ferromagnet, exhibits magnetization when a magnetic field is applied to it.
  • Paramagnets generally have magnetic permeability greater or equal to one and hence are attracted to magnetic fields.
  • the magnetic plot 120 of Fig. IB does not exhibit hysteresis which allows for faster switching speeds and smaller switching energies between the two saturated magnetization configurations 124 and 126 of curve 122.
  • paramagnet 121 comprises a material which includes one or more of: Platinum(Pt), Palladium (Pd), Tungsten (W), Cerium (Ce), Aluminum (Al), Lithium (Li), Magnesium (Mg), Sodium (Na), CnCh (chromium oxide), CoO (cobalt oxide), Dysprosium (Dy), Dy 2 0 (dysprosium oxide), Erbium (Er), EnCh (Erbium oxide), Europium (Eu), EU2O3 (Europium oxide), Gadolinium (Gd), Gadolinium oxide (Gd 2 C)3).
  • paramagnet 121 comprises dopants which include one or more of: Ce,
  • the magnet can be either a FM or a paramagnet.
  • Figs. 2A-B illustrate a three-dimensional (3D) view 200 and corresponding top view 220, respectively, of device having an out-of-plane magnetic tunnel junction (MTJ) stack coupled to a spin orbit coupling (SOC) interconnect, where the MTJ stack includes a free magnet layer much smaller than a length of the SOC interconnect.
  • MTJ magnetic tunnel junction
  • SOC spin orbit coupling
  • the stack of layers having magnetic juncti on 221 is coupled to an electrode 222 comprising spin Hall effect (SHE) or SOC material, where the SHE material converts charge current Iw (or write current) to spin polarized current Is.
  • the device of Fig. 2A forms a three-terminal memory cell with SHE induced write mechanism and MTJ based read-out.
  • the device of Fig. 2A comprises magnetic junction 221, SHE Interconnect or electrode 222, and non-magnetic metal(s) 223a/b.
  • MTJ 221 comprises layers 22la, 22lb, and 22lc.
  • layers 22la and 22lc are ferromagnetic layers.
  • layer 22lb is a metal or a tunneling dielectric.
  • layer 22lb is metal or a metal oxide (e.g., a non-magnetic metal such as Al and/or its oxide) and when the magnetic junction is a tunneling junction, then layer 22lb is a dielectric (e.g. MgO, AlO, etc.).
  • a metal oxide e.g., a non-magnetic metal such as Al and/or its oxide
  • layer 22lb is a dielectric (e.g. MgO, AlO, etc.).
  • One or both ends along the horizontal direction of SHE Interconnect 222 is formed of non-magnetic metals 223a/b. Additional layers 22ld, 22le, 22lf, and 22lg can also be stacked on top of layer 22lc.
  • layer 22lg is a non-magnetic metal electrode.
  • the magnetic junction is described as a magnetic tunneling junction (MTJ).
  • the embodiments are also applicable for spin valves.
  • a wide combination of materials can be used for material stacking of magnetic j unction 221.
  • the stack of layers 22la, 22lb, 22lc, 22ld, 22le, 22lf, and 22lg are formed of materials which include: Co x Fe y B z , MgO, Co x Fe y B z , Ru, Co x Fe y B z , IrMn, and Ru, respectively, where‘x,’‘y,’ and‘z’ are fractions of elements in the alloys.
  • Other materials may also be used to form MTJ 221.
  • MTJ 221 stack comprises free magnetic layer 22la, tunneling oxide 22lb (e.g., MgO, Al 2 03), a fixed magnetic layer 22lc/d/e which is a combination of CoFe, Ru, and CoFe layers, respectively, referred to as Synthetic Anti-Ferromagnet (SAF), and an Anti-Ferromagnet (AFM) layer 22lf.
  • SAF Synthetic Anti-Ferromagnet
  • AFM Anti-Ferromagnet
  • the SAF layer has the property, that the magnetizations in the two CoFe layers are opposite, and allows for cancelling the dipole fields around the free magnetic layer such that a stray dipole field will not control the free magnetic layer.
  • the free and fixed magnetic layers are formed of CFGG (i.e., Cobalt (Co), Iron (Fe), Germanium (Ge), or Gallium (Ga) or a combination of them).
  • FM 22la/c are formed from Heusler alloys.
  • Heusler alloys are ferromagnetic metal alloys based on a Heusler phase. Heusler phases are intermetallic with certain composition and face-centered cubic crystal structure. The ferromagnetic property of the Heusler alloys are a result of a double-exchange mechanism between neighboring magnetic ions.
  • fixed magnet layer 22 lc is a magnet with perpendicular magnetic anisotropy (PMA).
  • PMA perpendicular magnetic anisotropy
  • fixed magnet structure 22 lc has a magnetization pointing along the z-direction and is perpendicular to the x-y plane of the device 200.
  • the magnet with PMA comprises a stack of materials, wherein the materials for the stack are selected from a group consisting of: Co and Pt; Co and Pd; Co and Ni; MgO, CoFeB, Ta, CoFeB, and MgO; MgO, CoFeB, W, CoFeB, and MgO; MgO, CoFeB, V, CoFeB, and MgO; MgO, CoFeB, Mo, CoFeB, and MgO; Mn x Ga y ; Materials with Llo symmetry; and materials with tetragonal crystal structure.
  • the magnet with PMA is formed of a single layer of one or more materials.
  • the single layer is formed of MnGa.
  • the Heusler alloy includes one of: Cu 2 MnAl, Cu 2 MnIn, Cu 2 MnSn, Ni 2 MnAl, Ni 2 MnIn, Ni 2 MnSn, Ni 2 MnSb, Ni 2 MnGa
  • Llo is a crystallographic derivative structure of a FCC (face centered cubic lattice) structure and has two of the faces occupied by one type of atom and the comer and the other face occupied with the second type of atom.
  • FCC face centered cubic lattice
  • the magnetization vector usually is along the [0 0 1] axis of the crystal.
  • Examples of materials with Llo symmetry include CoPt and FePt.
  • Examples of materials with tetragonal crystal structure and magnetic moment are Heusler alloys such as CoFeAl, MnGe, MnGeGa, and MnGa.
  • SHE Interconnect 222 (or the write electrode) includes 3D materials such as one or more of b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Pt, Copper (Cu) doped with elements such as Iridium, Bismuth and any of the elements of 3d, 4d, 5d and 4f, 5f periodic groups in the Periodic Table which may exhibit high spin orbit coupling.
  • 3D materials such as one or more of b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Pt, Copper (Cu) doped with elements such as Iridium, Bismuth and any of the elements of 3d, 4d, 5d and 4f, 5f periodic groups in the Periodic Table which may exhibit high spin orbit coupling.
  • SHE interconnect 222 comprises a spin orbit 2D material which includes one or more of: graphene, BiSe2, BiS?., BiSexTez-x, T1S2, WS2, M0S2, TiSe2, WSe2, MoSe2, B2S3, Sb 2 S 3 , Ta 2 S, Re 2 S7, LaCPS 2 , LaOAsS 2 , ScOBiS 2 , GaOBiS 2 , AIOB1S2, LaOSbS 2 , BiOBiS 2 , YOB1S2, InOBiS 2 , LaOBiSe 2 , TiOBiS 2 , CeOBiS 2 , PrOBiS 2 , NdOBiS 2 , LaOBiS 2 , or SrFBiS 2 .
  • a spin orbit 2D material which includes one or more of: graphene, BiSe2, BiS?., BiSexTez-x, T1S2, WS2, M0S2, TiSe2, WSe2, Mo
  • the SHE interconnect 222 comprises spin orbit material which includes one of a 2D material or a 3D material, wherein the 3D material is thinner than the 2D material such as WS2, WSe2, WTe2, M0S2, MoSe2, MoTe2, PtSe2, PS2, B2S3, Sb2S 3 , and Ta 2 S.
  • the SHE interconnect 222 comprises a spin orbit material which includes materials that exhibit Rashba-Bychkov effect.
  • material which includes materials that exhibit Rashba-Bychkov effect comprises materials ROCh2, where‘R’ includes one or more of: La, Ce, Pr, Nd, Sr, Sc, Ga, Al, or In, and where“Ch” is a chalcogenide which includes one or more of: S, Se, or Te.
  • SHE Interconnect 222 transitions into high
  • the non-magnetic metal(s) 223a/b include one or more of: Cu, Co, a-Ta, Al, CuSi, or NiSi.
  • the magnetization direction of fixed magnetic layer 22lc is perpendicular relative to the magnetization direction of free magnetic layer 22la (e.g., magnetization directions of the free and fixed magnetic layers are not parallel, rather they are orthogonal).
  • the magnetization direction of free magnetic layer 221 a is along the x-y plane of device 200 while the magnetization direction of fixed magnetic layer 22 lc is perpendicular to the x-y plane of device 200.
  • magnetization direction of fixed magnetic layer 22 la is along the x-y plane of device 200 while the magnetization direction of free magnetic layer 221 c is perpendicular to the x-y plane of device 200.
  • the thickness of a ferromagnetic layer may determine its equilibrium magnetization direction. For example, when the thickness of the ferromagnetic layer 22la/c is above a certain threshold (depending on the material of the magnet, e.g. approximately 1.5 nm for CoFe), then the ferromagnetic layer exhibits magnetization direction which is in-plane. Likewise, when the thickness of the ferromagnetic layer 22la/c is below a certain threshold (depending on the material of the magnet), then the ferromagnetic layer 22la/c exhibits magnetization direction which is perpendicular to the plane of the magnetic layer. [0063] Other factors may also determine the direction of magnetization.
  • factors such as surface anisotropy (depending on the adjacent layers or a multi-layer composition of the ferromagnetic layer) and/or crystalline anisotropy (depending on stress and the crystal lattice structure modification such as FCC (face centered cubic lattice), BCC (body centered cubic lattice), or Llo-type of crystals, where Llo is a type of crystal class which exhibits perpendicular magnetizations), can also determine the direction of magnetization.
  • FCC face centered cubic lattice
  • BCC body centered cubic lattice
  • Llo-type of crystals where Llo is a type of crystal class which exhibits perpendicular magnetizations
  • the applied current I w is converted into spin current by SHE
  • Interconnect 222 also referred to as the spin orbit coupling interconnect. This spin current switches the direction of magnetization of the free layer and thus changes the resistance of MTJ 221. However, to read out the state of MTJ 221, a sensing mechanism is needed to sense the resistance change.
  • the memory device of Fig. 2A further includes bit-line (BL) 202, first select device 201 (e.g., n-type transistor), word-lines (WL) 203 and 207, first select line 204, second select line 205, and second select device 206 (e.g., n-type transistor).
  • the magnetic cell is written by applying a charge current via SHE Interconnect 222 through one of first or second select devices 201, 206.
  • one or more memory cells of an array are selected for writing by turning on one or more of the access devices 201/206 via word-lines 203/207.
  • a pulse of current is then passed through the SHE interconnect 222 via one of select lines 204, 205.
  • the direction of the magnetic writing in free magnet layer 22 la is decided by the direction of the applied charge current.
  • Positive currents e.g., currents flowing in the +y direction
  • the injected spin current in turn produces spin torque to align the free magnet 22 la (coupled to the SHE layer 222 of SHE material) in the +x direction.
  • Negative currents e.g., currents flowing in the -y direction
  • the injected spin current in-tum produces spin torque to align the free magnet 22 la (coupled to the SHE material of layer 222) in the -x direction.
  • the directions of spin polarization and thus of the free layer magnetization alignment are reversed compared to the above.
  • Tunnel Magneto Resistance (TMR). Depending on the magnetization of the free magnet 22 la relative to the fixed or reference magnet 22 lc, the magnetic junction exhibits high or low resistance. This resistance is sensed by the voltage and/or current on bit-line 202.
  • Fig. 3 illustrates cross-section 300 of the SOC interconnect 122 with electrons having their spins polarized in-plane and deflected up and down resulting from a flow of charge current.
  • positive charge current represented by J c produces spin-front (e.g., in the +x direction) polarized current 301 and spin-back (e.g., in the -x direction) polarized current 302.
  • the injected spin current l s generated by a charge current I c in the write electrode 222 is given by:
  • the vector of spin current I s I f — / j, points in the direction of transferred magnetic moment and has the magnitude of the difference of currents with spin along and opposite to the spin polarization direction
  • z is the unit vector perpendicular to the interface
  • P S HE is the spin Hall injection efficiency which is the ratio of magnitude of transverse spin current to lateral charge current
  • w is the width of the magnet
  • t is the thickness of the SHE
  • S f is the spin flip length in SHE Interconnect 222
  • Q $HE is the spin Hall angle for SHE Interconnect 222 to free ferromagnetic layer interface.
  • the injected spin angular momentum responsible for the spin torque given by:
  • the generated spin up and down currents 301/302 (e.g., / s ) are described as a vector cross-product given by:
  • This spin-to-charge conversion is based on TMR which is highly limited in the signal strength generated.
  • the TMR based spin-to-charge conversion has low efficiency (e.g., less than one).
  • Fig. 4A illustrates plot 420 showing write energy-delay conditions for one transistor and one MTJ with spin Hall effect (SHE) material compared to traditional MTJs.
  • Fig. 4B illustrates plot 430 showing write energy-delay conditions for one transistor and one MTJ with spin Hall effect (SHE) material compared to traditional MTJs.
  • x-axis is energy per write operation in femto-Joules (f ) while the y-axis is delay in nano-seconds (ns).
  • the energy-delay trajectory of SHE and MTJ devices are compared for in-plane magnet switching as the applied write voltage is varied.
  • the energy- delay relationship (for in-plane switching) can be written as:
  • R write is the write resistance of the device (resistance of SHE electrode or resistance of MTJ-P or MTJ-AP, where MTJ-P is a MTJ with parallel magnetizations while MTJ-AP is an MTJ with anti-parallel magnetizations, m 0 is vacuum permeability, e is the electron charge.
  • the equation shows that the energy at a given delay is directly proportional to the square of
  • Plot 420 shows five curves 421, 422, 423, 424, and 425.
  • Curves 421 and 422 show write energy-delay conditions using traditional MTJ devices without SHE material.
  • curve 421 shows the write energy-delay condition caused by switching a magnet from anti-parallel (AP) to parallel (P) state
  • curve 422 shows the write energy-delay condition caused by switching a magnet from P to AP state
  • Curves 422, 423, and 424 show write energy-delay conditions of an MTJ with SHE material.
  • write energy-delay conditions of an MTJ with SHE material is much lower than the write energy-delay conditions of an MTJ without SHE material. While the write energy-delay of an MTJ with SHE material improves over a traditional MTJ without SHE material, further improvement in write energy-delay is desired.
  • Fig. 4B illustrates plot 430 comparing reliable write times for spin Hall
  • Waveform 431 is the write time for in-plane MTJ
  • waveform 432 is the write time for PMA MTJ
  • waveform 433 is the write time for spin Hall MTJ.
  • the cases considered here assume a 30 X 60 nm magnet with 40 kT energy barrier and 3.5 nm SHE electrode thicknesses.
  • the energy- delay trajectories of the devices are obtained assuming a voltage sweep from 0 V to 0.7 V in accordance to voltage restrictions of scaled CMOS.
  • the energy-delay trajectory of the SHE- MTJ devices exhibits broadly two operating regions A) Region 1 where the energy-delay
  • the energy-delay trajectory of the STT-MTJ (spin transfer torque MTJ) devices is limited with a minimum delay of 1 ns for in-plane devices at 0.7 V maximum applied voltage, the switching energy for P-AP and AP-P are in the range of 1 pJ/write.
  • the energy-delay trajectory of SHE-MTJ (in-plane anisotropy) devices can enable switching times as low as 20 ps (b-W with 0.7 V, 20 fj/bit) or switching energy as small as 2 fl (b-W with 0.1 V, 1.5 ns switching time).
  • Figs. 5A-B illustrate a 3D view 500 and corresponding cross-section view
  • the device of Fig. 5A is similar to the device of Fig. 2A except that SOC interconnect 222 of Fig. 2A is replaced with interconnect 522 which provides a transistor-like switching or gating behavior.
  • the magnetic junction is illustrated by reference sign 521 where the layers or structures under layer 22lb (e.g., dielectric or metal/metal-oxide) together form a structure comprising the free magnet of the junction.
  • interconnect 522 comprises a lattice or a super lattice (with multiple stacked layers) of a neutral and charged perovskite.
  • a perovskite has a cubic structure with general formula of ABCh.
  • ‘A’ represents A-site ion (e.g., alkaline earth or rare earth element) which is positioned on the comers of the lattice
  • ⁇ ’ represents B-site ion (e.g., 3d, 4d, and 5d transition metal elements) on the center of the lattice
  • oxide ⁇ ’ within the lattice forming an angled cube.
  • the periodic table shown in Fig. 7A has elements shaded with three different shades for choices for A, B, and O.
  • the neutral perovskite comprises a group 2 element and oxygen.
  • the charged perovskite comprises one of a group 3d, 4d, or 5d transition metal and oxygen.
  • the neutral perovskite comprises one or both of: Sr and O, or Ti and O.
  • the charged perovskite comprises one or both of: Al and O, or La and O.
  • interconnect 522 comprises a super lattice of LAO (LaAlOs) and STO (SrTi03). This super lattice produces a high spin orbit coupling 2D electron gas.
  • LAO is an amorphous LAO which is coupled to an STO lattice. With reference to LAO and STO, LAO is the charged (e.g., positively charged) perovskite while STO is the neutral perovskite. However, other charged and neutral perovskites can be used as illustrated by the table of Fig. 7A. Both LAO and STO system exhibit high spin orbit effect.
  • the fermi-structures are spin polarized, where the spin and the momentum are related via spin-orbit interaction.
  • momentum (motion) in the 2D electron gas is associated with a specific spin state and vice versa.
  • the 2D electron gas from interconnect 522 has high spin-to-charge coupling and is also tunable, according to various embodiments.
  • the electron gas can be prevented from propagating to the magnetic junction stack.
  • the magnetization of the free magnet structure remains at its previous magnetization direction.
  • This switch-like behavior (or transistor-like behavior) of interconnect 522 allows for reduction of transistors associated with the memory device or bit-cell because interconnect 522 can provide the switch-like function.
  • transistor 202 of Fig. 2A is removed and the second source line 505 can be directly connected to interconnect 522 though metal contact 233b. By reducing the number of transistors per memory bit-cell, active area of silicon is freed up, which reduces power consumption and area.
  • free magnet 22 la is replaced with a free magnet structure which allows for more efficient switching of the free magnet structure relative to a single free magnet 22 la.
  • efficiency switching refers to switching with less energy and faster switching.
  • the structure replacing free magnet 22 la comprises at least two free magnets 52laa and 52lac with a coupling layer 52lab between them, where one of the free magnet couples to (or is adjacent to) the electrode 522 while the other free magnet of the structure couples to or is adjacent to a dielectric (e.g., when the magnetic junction is an MTJ) or a metal or its oxide (e.g., when the magnetic junction is a spin valve).
  • the structure comprises a first free magnet 52 laa having perpendicular magnetization that can point substantially along the + z-axis or - z-axis according to an external field (e.g., spin torque, spin coupling, electric field); a coupling layer 52lab; and a second free magnet 52 lac having perpendicular magnetization that can point substantially along the + z-axis or - z-axis, where the plane of the device 500 is along the x-y plane.
  • the second free magnet 52lac is adjacent to layer 22lb (e.g., dielectric or metal/metal-oxide).
  • the coupling layer 521 ab includes one or more of: Ru,
  • magnets 52 laa, 52 lac, and 524 comprise CFGG.
  • magnets 52laa and 52lac comprise Heusler alloys.
  • the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
  • the Heusler alloy includes one of: Cu 2 MnAl, Cu 2 MnIn, Cu 2 MnSn, NiJVInAl, Ni 2 MnIn, Ni 2 MnSn, Ni 2 MnSb, Ni 2 MnGa Co 2 MnAl, Co 2 MnSi, Co 2 MnGa,
  • magnets 52laa and 52 lac with PMA comprise a stack of materials, wherein the materials for the stack are selected from a group comprising: Co and Pt; Co and Pd; Co and Ni; MgO, CoFeB, Ta, CoFeB, and MgO; MgO, CoFeB, W, CoFeB, and MgO; MgO, CoFeB, V, CoFeB, and MgO; MgO, CoFeB, Mo, CoFeB, and MgO;
  • the magnet with PMA is formed of a single layer of one or more materials.
  • the single layer comprises Mn and Ga (e.g., MnGa).
  • Figs. 5A-B are illustrated with reference to magnets having PMA magnetizations, the embodiments are also applicable to magnets having in-plane magnetizations (not shown).
  • the free magnets 52laa and 52lac, and fixed magnet 22lc are in-plane magnets with in-plane magnetizations.
  • Figs. 6A-C illustrate cross-sections 600, 620, and 630, respectively, of a super lattice based interconnect, respectively, according to some embodiments of the disclosure.
  • Cross-section 600 illustrates a version of interconnect 522 that comprises a super lattice of charged and neutral perovskites.
  • the charged perovskite is considered to be LAO and the neutral perovskite is considered to be STO.
  • other embodiments may use different charged and neutral perovskites as listed with reference to Fig. 7.
  • the super lattice comprises LAO 601 and STO 602.
  • LAO 601 comprises alternate layers or matched crystals of AIO2 601 a and LaO 60lb.
  • STO 602 comprises alternate layers or matched crystals of T1O2 602a and SrO 602b.
  • layer 60la is adjacent to the free magnet of the magnetic junction 531 or 221.
  • the order of lattices of the super lattice stack can be reversed.
  • STO 602 is adjacent to the free magnet of the magnetic junction 531/221 while LAO 601 is formed under STO 602. While the embodiment of Fig. 6A illustrates one lattice of LAO followed by one lattice of STO, multiple such lattices can be stacked.
  • the thickness of the entire lattice along the z-direction is about 6 nm.
  • the individual lattice layers are 2 to 5 atomic layers thick in the z-direction.
  • the thickness of the individual lattice layers is between 1 Angstrom (A) and 3 A in the z-direction.
  • the thickness of layer 60la along the z-direction is 1A to 3A in thickness.
  • the super lattice of LAO 621 comprises one layer AIO2 60la and one layer of LaO 60lb
  • the super lattice of STO 622 comprises one layer of T1O2 602a and one layer of SrO 602b.
  • the lattices of 621 and 622 are repeated several times (e.g., 2 to 10 times).
  • layer 62la is adjacent to the free magnet of the magnetic junction 531 or 221.
  • the order of lattices of the super lattice stack can be reversed.
  • STO 622 is adjacent to the free magnet of the magnetic junction 531/221 while LAO 621 is formed under STO 602.
  • the thickness of the entire lattice is about 6 nm.
  • the super lattice comprises an amorphous lattice of a charged perovskite (e.g., LaAlOs) 631 and a lattice of neutral perovskite (e.g., STO) 632.
  • the lattices 631 and 632 are repeated multiple times (e.g., 2 to 10 times).
  • lattice 631 is adjacent to the free magnet of the magnetic junction 531 or 221.
  • the order of lattices of the super lattice stack can be reversed.
  • STO 632 is adjacent to the free magnet of the magnetic junction 531/221 while the amorphous lattice of a charged perovskite is formed under STO 602.
  • the thickness of the entire lattice is about 6 nm.
  • Fig. 7A illustrates a general perovskite structure 700.
  • a perovskite has a cubic structure with general formula of ABO3.
  • ‘A’ represents A-site ion (e.g., alkaline earth or rare earth element) which is positioned on the comers of the lattice
  • ‘B’ represents B-site ion (e.g., 3d, 4d, and 5d transition metal elements) on the center of the lattice
  • oxide O’ within the lattice forming an angled cube.
  • the periodic table shown in Fig. 7A has elements shaded with three different shades for choices for A, B, and O.
  • Figs. 7B-D illustrate an interface 720 of one of the interconnects of Figs. 6A-
  • Fig. 8A illustrates cross-section 800 of a device having a magnetic junction with magnets having perpendicular magnetizations, where a free magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • the magnetic junction is illustrated by reference sign 821 where the layers under layer 22lb (e.g., dielectric or metal/metal-oxide) together form the structure comprising the free magnet of the junction.
  • the device of Fig. 8A is similar to the device of Fig. 5B except that the free magnets 52laa and 52lac are replaced with composite magnets 82laa and 821 ac, respectively, having multiple layers.
  • the composite stack of multi-layer free magnet 821 aa includes‘n’ layers of first material and second material.
  • the composite stack comprises layers 82laai- n and 82labi- n stacked in an alternating manner, where‘n’ has a range of 1 to 10.
  • the first material includes one of: Co, Ni, Fe, or Heusler alloy.
  • the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
  • the Heusler alloy includes one of: Cu 2 MnAl, Cu 2 MnIn, Cu 2 MnSn, Ni 2 MnAl, Ni 2 MnIn, Ni 2 MnSn, Ni 2 MnSb, Ni 2 MnGa Co 2 MnAl, Co 2 MnSi, Co 2 MnGa, Co 2 MnGe, Pd 2 MnAl, Pd 2 MnIn, Pd 2 MnSn, Pd 2 MnSb, Co 2 FeSi, Co 2 FeAl, Fe 2 VAl, Mn 2 VGa, Co 2 FeGe, MnGa, or MnGaRu.
  • the first material has a thickness tl in a range of 0.6 nm to 2 nm.
  • the second material has a thickness t2 in a range of 0.1 nm to 3 nm. While the embodiments here show first material being at the bottom followed by the second material, the order can be reversed without changing the technical effect.
  • composite stack of multi-layer free magnet 82lbb includes‘n’ layers of first material and second material.
  • the composite stack comprises layers 82laai- n and 82labi- n stacked in an alternating manner, where‘n’ has a range of 1 to 10.
  • the first material includes one of: Co, Ni, Fe, or Heusler alloy.
  • the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
  • the Heusler alloy includes one of: Cu 2 MnAl, Cu 2 MnIn, Cu 2 MnSn, Ni 2 MnAl, Ni 2 MnIn, Ni 2 MnSn, Ni 2 MnSb, Ni 2 MnGa Co 2 MnAl, Co 2 MnSi, Co 2 MnGa, Co 2 MnGe, Pd 2 MnAl, Pd 2 MnIn, Pd 2 MnSn, Pd 2 MnSb, Co 2 FeSi, Co 2 FeAl, Fe 2 VAl, Mn 2 VGa, Co 2 FeGe, MnGa, or MnGaRu.
  • the first material has a thickness tl in a range of 0.6 nm to 2 nm.
  • the second material has a thickness t2 in a range of 0.1 nm to 3 nm. While the embodiments here show first material being at the bottom followed by the second material, the order can be reversed without changing the technical effect.
  • Fig. 8B illustrates cross-section 830 of a device having a magnetic junction with magnets having perpendicular magnetizations, where a free magnet structure and a fixed magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • fixed magnet 221 c of Fig. 8A is replaced with a composite stack 82lcc.
  • the magnetic junction is labeled as 831.
  • composite stack of multi-layer fixed magnet 821 cc includes‘n’ layers of first material and second material.
  • the composite stack comprises layers 82laai- n and 82labi- n stacked in an alternating manner, where‘n’ has a range of 1 to 10.
  • the first material includes one of: Co, Ni, Fe, or Heusler alloy.
  • the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
  • the Heusler alloy includes one of: Cu 2 MnAl, Cu 2 MnIn, Cu 2 MnSn, NfiMnAl, Ni 2 MnIn, NfiMnSn, Ni 2 MnSb, Ni 2 MnGa Co 2 MnAl, Co 2 MnSi, Co 2 MnGa, Co 2 MnGe, Pd 2 MnAl, Pd 2 MnIn, Pd 2 MnSn, Pd 2 MnSb, Co 2 FeSi, Co 2 FeAl, Fe 2 VAl, Mn 2 VGa, Co 2 FeGe, MnGa, or MnGaRu.
  • the first material has a thickness t3 in a range of 0.6 nm to 2 nm.
  • the second material has a thickness t4 in a range of 0.1 nm to 3 nm.
  • Fig. 8C illustrates a cross-section 850 of a device having a magnetic junction with magnets having perpendicular magnetizations, where a fixed magnet structure and one of the free magnets of a free magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • free magnet 82lbb of Fig. 8C is replaced with a non-composite free magnet 521 ac.
  • the magnetic junction is labeled as 851.
  • Fig. 8D illustrates a cross-section 860 of a device having a magnetic junction with magnets having perpendicular magnetizations, where a fixed magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • free magnet 82laa of Fig. 8D is replaced with a non-composite free magnet 52laa.
  • the magnetic junction is labeled as 861.
  • Fig. 8E illustrates a cross-section 870 of a device having a magnetic junction with magnets having perpendicular magnetizations, where a fixed magnet structure and one of the free magnets of a free magnet structure of the magnetic junction comprises a stack of magnets with perpendicular magnetizations, which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • free magnet 82laa of Fig. 8B is replaced with a non-composite free magnet 521 aa.
  • the magnetic junction is labeled as 871.
  • Figs. 5-8 can be mixed in any order.
  • the free magnet structure with free magnets and coupling layer can be replaced with a single magnet with free magnetization, perpendicular magnets can be replaced with in-plane magnets, etc.
  • the magnets (free and/or fixed) can also be
  • the interconnect 522 can be formed of a super-lattice according to any one of lattices of Figs. 6A-C or a combination of them.
  • Fig. 9A illustrates plot 900 showing spin polarization capturing switching of a free magnet structure which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 9B illustrates a magnetization plot 920 associated with Fig. 9A, according to some embodiments of the disclosure.
  • Plot 900 shows switching of the spin orbit torque device with PMA.
  • waveforms 901, 902, and 903 represent the magnetization projections on the x, y, and z axes, respectively.
  • the magnet starts with z-magnetization of -1.
  • Positive spin orbit torque (SOT) is applied from 5 ns (nanoseconds) to 50 ns. It leads to switching the z-magnetization to 1.
  • a negative spin orbit torque is applied between 120 ns and 160 ns. It leads to switching the z-magnetization to 1. This illustrates change of magnetization in response to write charge current of certain polarity.
  • Fig. 9C illustrates plot 930 showing spin polarization capturing switching of the free magnet structure which is adjacent to the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • Fig. 9D illustrates a magnetization plot 940 associated with Fig. 9C, according to some embodiments of the disclosure.
  • waveforms 931, 932, and 933 represent the magnetization projections on x, y, and z axes, respectively.
  • SOT negative spin orbit torque
  • the z-magnetization remains close to -1. This illustrates the persistence of magnetization in response to write charge current of opposite polarity.
  • Fig. 10 illustrates cross-section 1000 of a die layout having any of the devices of Figs. 5-8 formed in metal 3 (M3) and metal 2 (M2) layer regions, according to some embodiments of the disclosure.
  • Cross-section 1000 illustrates an active region having a transistor MN comprising diffusion region 1001, a gate terminal 1002, drain terminal 1004, and source terminal 1003.
  • the source terminal 1003 is coupled to first SL1 (source line) via poly or via, where the SL1 is formed on Metal 0 (M0).
  • the drain terminal 1004 is coupled to MOa (also metal 0) through via 1005.
  • the drain terminal 1004 is coupled to electrode 522/1022 through Via 0-1 (e.g., via connecting metal 0 to metal 1 layers), metal 1 (Ml), Via 1-2 (e.g., via connecting metal 1 to metal 2 layers), and Metal 2 (M2).
  • the magnetic junction (e.g., MTJ 1021 or spin valve) is formed in the metal 3 (M3) region.
  • MTJ 1021 (or spin valve) can be according to any one of MTJs described with reference to Figs. 5-8 coupled to interconnect 1022/522 that provide gated memory behavior.
  • the perpendicular free magnet layer of the magnetic junction couples to electrode 1022 (e.g., electrode 522).
  • the fixed magnet layer of magnetic junction couples to the bit-line (BL) via electrode 1022/522 through Via 3-4 (e.g., via connecting metal 4 region to metal 4 (M4)).
  • the bit-line is formed on M4.
  • an n-type transistor MN is formed in the frontend of the die while the electrode 1022 is located in the backend of the die.
  • the term “backend” generally refers to a section of a die which is opposite of a“frontend” and where an IC (integrated circuit) package couples to IC die bumps.
  • high level metal layers e.g., metal layer 6 and above in a ten-metal stack die
  • corresponding vias that are closer to a die package are considered part of the backend of the die.
  • the term “frontend” generally refers to a section of the die that includes the active region (e.g., where transistors are fabricated) and low-level metal layers and corresponding vias that are closer to the active region (e.g., metal layer 5 and below in the ten-metal stack die example).
  • electrode 1022 is located in the backend metal layers or via layers for example in Via 3.
  • the electrical connectivity to the device is obtained in layers M0 and M4 or Ml and M5 or any set of two parallel interconnects.
  • the transistor-like behavior provided by electrode 1022/522 eliminates one or more transistors associated with a memory cell. This reduces the silicon footprint of the IC and also reduces power.
  • first source-line SL1 is coupled to interconnect 1022 via transistor MN, while the second source-line SL2 is directly connected to interconnect 1022.
  • the function of transistor 206 of Fig. 2A is performed by interconnect 1022/522.
  • Fig. 11 illustrates cross-section 1100 of a die layout having any of the devices of Figs. 5-8 formed in metal 2 (M2) and metal 1 (Ml) layer regions, according to some embodiments of the disclosure.
  • the magnetic junction e.g., MTJ 1021 or spin valve
  • electrode 1022 which provides a switch-like behavior is formed in the metal 1 region.
  • Fig. 12 illustrates plot 1200 showing an improvement in energy-delay product using any of the device(s) of Figs. 5-8 compared to the device of Fig. 2A, in accordance with some embodiments of the disclosure.
  • the x-axis is Write Energy (in fj) and the y-axis is Delay (in ns).
  • two the energy-delay trajectories are compared as write voltage is varied— 1201 which is the energy-delay trajectory of device 200, and 1202 is the energy delay trajectory of device(s) of Figs. 5-8.
  • Plot 1200 illustrates that device(s) of Figs. 5-8 provide a shorter (i.e., improved) energy-delay product than device 200.
  • Fig. 13 illustrates flowchart 1300 of a method for forming a device of Figs. 5- 8, in accordance with some embodiments. While the following blocks (or process operations) in the flowchart are arranged in a certain order, the order can be changed. In some embodiments, some blocks can be executed in parallel.
  • a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA), wherein the first structure has an anisotropy axis perpendicular to a plane of a device.
  • a second structure is formed comprising one of a dielectric or metal.
  • a third structure is formed. In some
  • the method of forming the third structure comprises forming a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures.
  • the first, second, and third structures are part of a stack of structures of a magnetic junction.
  • an interconnect is formed adjacent to the first structure of the magnetic junction, wherein the interconnect comprises a super lattice of a neutral and charged perovskite.
  • the neutral perovskite comprises a group 2 element and oxygen
  • the charged perovskite comprises one of a group 3d, 4d, or 5d transition metal and oxygen.
  • the neutral perovskite comprises one or both of: Sr and O, or Ti and O.
  • the method comprises forming a second device controllable by a word-line, wherein the forming the second device includes forming a source and drain, wherein one of the source or drain is coupled to the interconnect, and wherein one of the drain or source is coupled to a select line.
  • the method comprises coupling the interconnect to a second select line.
  • the method comprises forming a bit-line; and coupling the bit-line to the magnetic junction.
  • the method of forming the magnetic junction comprises: forming a fourth structure between the first and second structures, wherein the fourth structure includes one or more of: Ru, Os, Hs, or Fe.
  • the method of forming the magnetic junction comprises forming a fifth structure between the second and third structures, wherein the sixth structure includes one or more of: Ru, Os, Hs, or Fe.
  • the method comprises forming the first and/or third structures comprises forming a stack including a first material and a second material different from the first material.
  • the first material includes one of: Co, Ni, Fe, or Heusler alloy.
  • the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
  • the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • the first material has a thickness in a range of 0.6 nm to 2 nm, and wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
  • the method of forming the first and/or the third structures comprises a forming super lattice including a first material and a second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • the method of forming the first and/or third structures comprises forming a stack of three materials including a first material adjacent to the interconnect, a second material adjacent to the first material but not in contact with the interconnect, and third material adjacent to the second material and the second structure, wherein the first material includes one or more of: Co, Ni, Fe, or Heusler alloy, wherein the second material comprises Ru; and wherein the third material includes one or more of Co, Ni, Fe, or Heusler alloy.
  • the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
  • the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • the magnet of the first structure is a paramagnet which comprises dopants which include one or more of: Ce,
  • Fig. 14 illustrates a smart device or a computer system or a SoC (System-on- Chip) 1600 with a magnetic junction based memory having the interconnect comprising perovskites, according to some embodiments of the disclosure.
  • the transistors in various circuits and logic blocks described here are metal oxide semiconductor (MOS) transistors or their derivatives, where the MOS transistors include drain, source, gate, and bulk terminals.
  • MOS metal oxide semiconductor
  • the transistors and/or the MOS transistor derivatives also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Tunneling FET (TFET), Square Wire, or Rectangular Ribbon Transistors, ferroelectric FET (FeFETs), or other devices implementing transistor functionality like carbon nanotubes or spintronic devices.
  • MOSFET symmetrical source and drain terminals i.e., are identical terminals and are interchangeably used here.
  • a TFET device on the other hand, has asymmetric Source and Drain terminals.
  • BJT PNP/NPN Bi-polar junction transistors
  • BiCMOS BiCMOS
  • CMOS complementary metal oxide
  • etc. may be used without departing from the scope of the disclosure.
  • Fig. 14 illustrates a block diagram of an embodiment of a mobile device in which flat surface interface connectors could be used.
  • computing device 1600 represents a mobile computing device, such as a computing tablet, a mobile phone or smart-phone, a wireless-enabled e-reader, or other wireless mobile device. It will be understood that certain components are shown generally, and not all components of such a device are shown in computing device 1600.
  • computing device 1600 includes first processor 1610 with a magnetic junction based memory having the interconnect comprising perovskites (e.g., one or more devices of any one of devices of Figs. 5-8), according to some embodiments discussed.
  • Other blocks of the computing device 1600 may also include a magnetic junction based memory having the interconnect comprising perovskites (e.g., one or more devices of any one of devices of Figs. 5-8), according to some embodiments.
  • the various embodiments of the present disclosure may also comprise a network interface within 1670 such as a wireless interface so that a system embodiment may be incorporated into a wireless device, for example, cell phone or personal digital assistant.
  • processor 1610 can include one or more physical devices, such as microprocessors, application processors,
  • microcontrollers programmable logic devices, or other processing means.
  • the processing operations performed by processor 1610 include the execution of an operating platform or operating system on which applications and/or device functions are executed.
  • the processing operations include operations related to I/O (input/output) with a human user or with other devices, operations related to power management, and/or operations related to connecting the computing device 1600 to another device.
  • the processing operations may also include operations related to audio I/O and/or display I/O.
  • computing device 1600 includes audio subsystem 1620, which represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 1600, or connected to the computing device 1600. In one embodiment, a user interacts with the computing device 1600 by providing audio commands that are received and processed by processor 1610.
  • audio subsystem 1620 represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 1600, or connected to the computing device 1600. In one embodiment, a user interacts with the computing device 1600 by providing audio commands that are received and processed by processor 1610.
  • computing device 1600 comprises display subsystem 1630.
  • Display subsystem 1630 represents hardware (e.g., display devices) and software (e.g., drivers) components that provide a visual and/or tactile display for a user to interact with the computing device 1600.
  • Display subsystem 1630 includes display interface 1632, which includes the particular screen or hardware device used to provide a display to a user.
  • display interface 1632 includes logic separate from processor 1610 to perform at least some processing related to the display.
  • display subsystem 1630 includes a touch screen (or touch pad) device that provides both output and input to a user.
  • computing device 1600 comprises I/O controller 1640.
  • I/O controller 1640 represents hardware devices and software components related to interaction with a user.
  • I/O controller 1640 is operable to manage hardware that is part of audio subsystem 1620 and/or display subsystem 1630.
  • I/O controller 1640 illustrates a connection point for additional devices that connect to computing device 1600 through which a user might interact with the system.
  • devices that can be attached to the computing device 1600 might include microphone devices, speaker or stereo systems, video systems or other display devices, keyboard or keypad devices, or other I/O devices for use with specific applications such as card readers or other devices.
  • I/O controller 1640 can interact with audio subsystem 1620 and/or display subsystem 1630.
  • input through a microphone or other audio device can provide input or commands for one or more applications or functions of the computing device 1600.
  • audio output can be provided instead of, or in addition to display output.
  • display subsystem 1630 includes a touch screen
  • the display device also acts as an input device, which can be at least partially managed by I/O controller 1640.
  • I/O controller 1640 manages devices such as accelerometers, cameras, light sensors or other environmental sensors, or other hardware that can be included in the computing device 1600.
  • the input can be part of direct user interaction, as well as providing environmental input to the system to influence its operations (such as filtering for noise, adjusting displays for brightness detection, applying a flash for a camera, or other features).
  • computing device 1600 includes power management 1650 that manages battery power usage, charging of the battery, and features related to power saving operation.
  • Memory subsystem 1660 includes memory devices for storing information in computing device 1600. Memory can include nonvolatile (state does not change if power to the memory device is interrupted) and/or volatile (state is indeterminate if power to the memory device is interrupted) memory devices. Memory subsystem 1660 can store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the computing device 1600.
  • Elements of embodiments are also provided as a machine-readable medium (e.g., memory 1660) for storing the computer-executable instructions (e.g., instructions to implement any other processes discussed herein).
  • the machine-readable medium e.g., memory 1660
  • embodiments of the disclosure may be downloaded as a computer program (e.g., BIOS) which may be transferred from a remote computer (e.g., a server) to a requesting computer (e.g., a client) by way of data signals via a communication link (e.g., a modem or network connection).
  • BIOS a computer program
  • a remote computer e.g., a server
  • a requesting computer e.g., a client
  • a communication link e.g., a modem or network connection
  • computing device 1600 comprises connectivity 1670.
  • Connectivity 1670 includes hardware devices (e.g., wireless and/or wired connectors and communication hardware) and software components (e.g., drivers, protocol stacks) to enable the computing device 1600 to communicate with external devices.
  • the computing device 1600 could be separate devices, such as other computing devices, wireless access points or base stations, as well as peripherals such as headsets, printers, or other devices.
  • Connectivity 1670 can include multiple different types of connectivity. To generalize, the computing device 1600 is illustrated with cellular connectivity 1672 and wireless connectivity 1674.
  • Cellular connectivity 1672 refers generally to cellular network connectivity provided by wireless carriers, such as provided via GSM (global system for mobile communications) or variations or derivatives, CDMA (code division multiple access) or variations or derivatives, TDM (time division multiplexing) or variations or derivatives, or other cellular service standards.
  • Wireless connectivity (or wireless interface) 1674 refers to wireless connectivity that is not cellular, and can include personal area networks (such as Bluetooth, Near Field, etc.), local area networks (such as Wi-Fi), and/or wide area networks (such as WiMax), or other wireless communication.
  • computing device 1600 comprises peripheral connections 1680.
  • Peripheral connections 1680 include hardware interfaces and connectors, as well as software components (e.g., drivers, protocol stacks) to make peripheral connections.
  • the computing device 1600 could both be a peripheral device ("to" 1682) to other computing devices, as well as have peripheral devices ("from” 1684) connected to it.
  • the computing device 1600 commonly has a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and/or uploading, changing, synchronizing) content on computing device 1600.
  • a docking connector can allow computing device 1600 to connect to certain peripherals that allow the computing device 1600 to control content output, for example, to audiovisual or other systems.
  • the computing device 1600 can make peripheral connections 1680 via common or standards-based connectors.
  • Common types can include a Universal Serial Bus (USB) connector (which can include any of a number of different hardware interfaces), DisplayPort including MiniDisplayPort (MDP), High Definition Multimedia Interface (HDMI), Firewire, or other types.
  • USB Universal Serial Bus
  • MDP MiniDisplayPort
  • HDMI High Definition Multimedia Interface
  • Firewire or other types.
  • Example 1 An apparatus comprising: a magnetic junction including: a stack of structures including: a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA) relative to a plane of a device; a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed PMA relative to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures; and an interconnect adjacent to the first structure of the magnetic junction, wherein the interconnect comprises a super lattice of a neutral perovskite and a charged perovskite.
  • PMA perpendicular magnetic anisotropy
  • Example 2 The apparatus of example 1 comprises a second device controllable by a word-line, wherein the second device includes a source and drain, wherein one of the source or drain is coupled to the interconnect, and wherein one of the drain or source is coupled to a select line.
  • Example 3 The apparatus of example 2, wherein the interconnect is coupled to a second select line.
  • Example 4 The apparatus of example 1 comprises a bit-line coupled to the magnetic junction.
  • Example 5 The apparatus of example 1, wherein the neutral perovskite comprises a group 2 element and oxygen, and wherein the charged perovskite comprises one of a group 3d, 4d, or 5d transition metal and oxygen.
  • Example 6 The apparatus of example 1, wherein the neutral perovskite comprises one or both of: Sr and O; or Ti and O.
  • Example 7 The apparatus of example 1, wherein the charged perovskite comprises one or both of: Al and O; or La and O.
  • Example 8 The apparatus of example 1, wherein the magnetic junction comprises: a fourth structure between the first and second structures, wherein the fourth structure includes one or more of: Ru, Os, Hs, or Fe.
  • Example 9 The apparatus of example 1, wherein the magnetic junction comprises a fifth structure between the second and third structures, and wherein the sixth structure includes one or more of: Ru, Os, Hs, or Fe.
  • Example 10 The apparatus of example 1, wherein the first and/or third structures comprises a stack including a first material and a second material different from the first material.
  • Example 11 The apparatus of example 10, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy.
  • Example 12 The apparatus of example 11 wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
  • Example 13 The apparatus of example 10, wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • Example 14 The apparatus of example 10, wherein the first material has a thickness in a range of 0.6 nm to 2 nm, and wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
  • Example 15 The apparatus of example 1, wherein the first and/or the third structures comprises a super lattice including a first material and a second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • Example 16 The apparatus of example 1, wherein the first and/or third structures comprises a stack of three materials including a first material adjacent to the interconnect, a second material adjacent to the first material but not in contact with the interconnect, and third material adjacent to the second material and the second structure, wherein the first material includes one or more of: Co, Ni, Fe, or Heusler alloy, wherein the second material comprises Ru; and wherein the third material includes one or more of Co, Ni, Fe, or Heusler alloy.
  • Example 17 The apparatus according to any one of preceding examples, wherein the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
  • the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
  • Example 18 The apparatus according to any one of preceding examples, wherein the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • Example 19 The apparatus according to any one of preceding examples, wherein the magnet of the first structure is a paramagnet which comprises dopants which include one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.
  • dopants which include one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.
  • Example 20 The apparatus of example 1, wherein the dielectric comprises: Mg and O.
  • Example 21 A system comprising: a memory; a processor coupled to the memory, the processor having a spin wave switch, which comprises an apparatus according to any one of apparatus examples 1 to 20; and a wireless interface to allow the processor to communicate with another device.
  • Example 22 An apparatus comprising: a magnetic junction; and an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a super lattice of a neutral perovskite and a charged perovskite.
  • Example 23 The apparatus of example 22, wherein the apparatus is according to any one of examples 2 to 7.
  • Example 24 The apparatus of example 22, wherein the magnetic junction comprises: a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA), wherein the first structure has an anisotropy axis perpendicular to a plane of a device; a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structure.
  • PMA perpendicular magnetic anisotropy
  • Example 25 The apparatus of example 22, wherein the magnetic junction comprises: a first structure comprising a magnet with unfixed in-plane magnetic anisotropy, wherein the first structure has an anisotropy axis along a plane of a device; a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed in-plane magnetic anisotropy, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures.
  • Example 26 The apparatus according to any one of examples 24 or 25, wherein the magnetic junction comprises: a fourth structure between the first and second structures, wherein the fourth structure includes one or more of: Ru, Os, Hs, or Fe.
  • Example 27 The apparatus of example 26, wherein the magnetic junction comprises a fifth structure between the second and third structures, wherein the fifth structure includes one or more of: Ru, Os, Hs, or Fe.
  • Example 28 The apparatus according to any one of examples 24 or 25, wherein the apparatus is according to any one of examples 10 to 17.
  • Example 29 The apparatus of example 22, wherein the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
  • MTJ magnetic tunneling junction
  • Example 30 The apparatus according to any one of examples 24 or 25, wherein the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • Example 31 The apparatus according to any one of claims 24 or 25, wherein the magnet of the first structure is a paramagnet which comprises dopants which include one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.
  • dopants which include one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.
  • Example 32 A system comprising: a memory; a processor coupled to the memory, the processor having a spin wave switch, which comprises an apparatus according to any one of apparatus examples 22 to 31; and a wireless interface to allow the processor to communicate with another device.
  • Example 33 A system comprising: a memory; a processor coupled to the memory, the processor having a spin wave switch, which comprises an apparatus according to any one of apparatus examples 22 to 31; and a wireless interface to allow the processor to communicate with another device.
  • a method comprising: forming a magnetic junction including: forming a stack of structures including: forming a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA), wherein the first structure has an anisotropy axis perpendicular to a plane of a device; forming a second structure comprising one of a dielectric or metal; forming a third structure comprising forming a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures; and forming an interconnect adjacent to the first structure of the magnetic junction, wherein the interconnect comprises a super lattice of a neutral perovskite and a charged perovskite.
  • PMA perpendicular magnetic anisotropy
  • Example 34 The method of example 33 comprises forming a second device controllable by a word-line, wherein forming the second device includes forming a source and drain, wherein one of the source or drain is coupled to the interconnect, and wherein one of the drain or source is coupled to a select line.
  • Example 35 The method of example 34 comprises coupling the interconnect to a second select line.
  • Example 36 The method of example 33 comprises forming a bit-line; and coupling the bit-line to the magnetic junction.
  • Example 37 The method of example 33, wherein the neutral perovskite comprises a group 2 element and oxygen, and wherein the charged perovskite comprises one of a group 3d, 4d, or 5d transition metal and oxygen.
  • Example 38 The method of example 33, wherein the neutral perovskite comprises one or both of: Sr and O; or Ti and O.
  • Example 39 The method of example 33, wherein the charged perovskite comprises one or both of: Al and O; or La and O.
  • Example 40 The method of example 33, wherein forming the magnetic junction comprises: forming a fourth structure between the first and second structures, and wherein the fourth structure includes one or more of: Ru, Os, Hs, or Fe.
  • Example 41 The method of example 40, wherein forming the magnetic junction comprises forming a fifth structure between the second and third structures, wherein the sixth structure includes one or more of: Ru, Os, Hs, or Fe.
  • Example 42 The method of example 33, wherein forming the first and/or third structures comprises forming a stack including a first material and a second material different from the first material.
  • Example 43 The method of example 42, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy.
  • Example 44 The method of example 43 wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
  • Example 45 The method of example 43, wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • Example 46 The method of example 43, wherein the first material has a thickness in a range of 0.6 nm to 2 nm, and wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
  • Example 47 The method of example 33, wherein forming the first and/or the third structures comprises a forming super lattice including a first material and a second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
  • Example 48 The method of example 33, wherein forming the first and/or third structures comprises forming a stack of three materials including a first material adjacent to the interconnect, a second material adjacent to the first material but not in contact with the interconnect, and third material adjacent to the second material and the second structure, wherein the first material includes one or more of: Co, Ni, Fe, or Heusler alloy, wherein the second material comprises Ru; and wherein the third material includes one or more of Co, Ni, Fe, or Heusler alloy.
  • Example 49 The method according to any one of preceding method examples, wherein the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
  • the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
  • Example 50 The method according to any one of preceding method examples, wherein the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • the magnet of the first structure is a paramagnet which includes one or more of: Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, O, Er, Eu, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V.
  • Example 51 The method according to any one of preceding method examples, wherein the magnet of the first structure is a paramagnet which comprises dopants which include one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.
  • dopants which include one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb.
  • Example 52 The method of example 33, wherein the dielectric comprises:

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Abstract

L'invention concerne un appareil qui comprend : une jonction magnétique; et une interconnexion adjacente à la jonction magnétique, l'interconnexion comprenant un super-réseau d'une pérovskite neutre et chargée.
PCT/US2017/067006 2017-12-18 2017-12-18 Mémoire spin-orbite commandée par porte WO2019125368A1 (fr)

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Citations (5)

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US20030006440A1 (en) * 2001-07-03 2003-01-09 Matsushita Electric Industrial Co., Ltd. Integrated circuit device including a layered superlattice material with an interface buffer layer
US20030034548A1 (en) * 1999-01-14 2003-02-20 Symetrix Corporation Ferroelectric device with capping layer and method of making same
US20150194596A1 (en) * 2012-09-26 2015-07-09 Lntel Corporation Perpendicular mtj stacks with magnetic anisotrophy enhancing layer and crystallization barrier layer
US20160276581A1 (en) * 2013-12-17 2016-09-22 Qualcomm Incorporated Hybrid synthetic antiferromagnetic layer for perpendicular magnetic tunnel junction (mtj)
US20170117455A1 (en) * 2015-10-21 2017-04-27 Samsung Electronics Co., Ltd. Magnetic memory devices having perpendicular magnetic tunnel junction

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030034548A1 (en) * 1999-01-14 2003-02-20 Symetrix Corporation Ferroelectric device with capping layer and method of making same
US20030006440A1 (en) * 2001-07-03 2003-01-09 Matsushita Electric Industrial Co., Ltd. Integrated circuit device including a layered superlattice material with an interface buffer layer
US20150194596A1 (en) * 2012-09-26 2015-07-09 Lntel Corporation Perpendicular mtj stacks with magnetic anisotrophy enhancing layer and crystallization barrier layer
US20160276581A1 (en) * 2013-12-17 2016-09-22 Qualcomm Incorporated Hybrid synthetic antiferromagnetic layer for perpendicular magnetic tunnel junction (mtj)
US20170117455A1 (en) * 2015-10-21 2017-04-27 Samsung Electronics Co., Ltd. Magnetic memory devices having perpendicular magnetic tunnel junction

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