WO2019104836A1 - Procédé de production de substrat tft - Google Patents

Procédé de production de substrat tft Download PDF

Info

Publication number
WO2019104836A1
WO2019104836A1 PCT/CN2018/071612 CN2018071612W WO2019104836A1 WO 2019104836 A1 WO2019104836 A1 WO 2019104836A1 CN 2018071612 W CN2018071612 W CN 2018071612W WO 2019104836 A1 WO2019104836 A1 WO 2019104836A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
photoresist layer
film
aluminum
thin film
Prior art date
Application number
PCT/CN2018/071612
Other languages
English (en)
Chinese (zh)
Inventor
江志雄
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Publication of WO2019104836A1 publication Critical patent/WO2019104836A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask

Definitions

  • the present application relates to the field of display technologies, and in particular, to a method of fabricating a thin film transistor (TFT) substrate.
  • TFT thin film transistor
  • each layer structure needs to be formed through a photolithography process.
  • the entire TFT substrate process requires five masks (5 mask).
  • too many reticle times will increase the cost of the process, and at the same time, the process flow will be too long and the yield rate will be accumulated, which will greatly reduce the production efficiency.
  • the indium tin oxide semiconductor transparent conductive film (ITO layer) and the protective layer (PV layer) can be simultaneously formed by a mask through a lift-off process, thereby reducing the total number of masks to Three ways (3mask).
  • the stripping liquid cannot directly contact the photoresist layer, thereby hindering the removal of the photoresist layer and patterning, and further The lithography process is hindered, resulting in a decrease in production efficiency of the display panel.
  • the present application provides a method for fabricating a TFT substrate, which can improve the production efficiency of the display panel.
  • the present application provides a method for fabricating a TFT substrate, including the following steps:
  • Etching the protective layer the edge of the protective layer being retracted relative to an edge of the aluminum film to form a groove between the aluminum film and the substrate;
  • the functional film layer including a first functional film layer on the photoresist layer and a second functional film layer on the surface of the substrate, the aluminum film and the first An opening forming the groove between the two functional film layers;
  • the aluminum thin film and the photoresist layer are disposed in a stripping liquid, the stripping liquid fills the recess through an opening of the recess, and reacts with the aluminum thin film to make the aluminum thin film and the The photoresist layer is detached from the protective layer.
  • the step of patterning the photoresist layer and the aluminum film comprises:
  • a portion of the aluminum thin film exposing the photoresist layer is removed by the developer to pattern the aluminum thin film.
  • the photoresist layer is a negative photoresist
  • the developer is a tetramethylammonium hydroxide solution.
  • the step of patterning the photoresist layer and the aluminum film comprises:
  • a portion of the aluminum film exposing the photoresist layer is removed using an acidic etchant to pattern the aluminum film.
  • the protective layer is subjected to dry etching.
  • the aluminum thin film includes protrusions protruding from the protective layer and the photoresist layer.
  • the stripping liquid fills the recess through an opening of the recess, and reacts with the aluminum thin film,
  • the stripping solution etches the protrusion toward the surface of the substrate to detach the aluminum film from the protective layer and detach the photoresist layer and the first functional film layer on the aluminum film The protective layer.
  • the stripping solution is a tetramethylammonium hydroxide solution.
  • the functional film layer is an ITO film.
  • the step of providing a substrate includes:
  • a protective layer is deposited on the gate insulating layer, the semiconductor layer, and the source drain.
  • the present invention provides a method for fabricating a TFT substrate by depositing an aluminum thin film between the protective layer and the photoresist layer, and etching the aluminum thin film into a corresponding pattern when patterning the photoresist layer.
  • the protective layer is etched, so that the edge of the protective layer is retracted relative to the edge of the aluminum film to be in the aluminum film and Forming a groove between the substrates, the aluminum film and the photoresist layer are disposed in a stripping liquid, the stripping liquid fills the groove through an opening of the groove, and reacts with the aluminum film So that the aluminum thin film and the photoresist layer are separated from the protective layer, and the functional film layer is completely covered from the photoresist layer, which hinders the removal of the photoresist layer and the pattern, thereby hindering the photolithography process. , causing a problem of reduced production efficiency of the display panel.
  • FIG. 1 is a flow chart of a method for fabricating a TFT substrate according to an embodiment of the present application.
  • FIG. 2 is a schematic structural view of a substrate in a method for fabricating a TFT substrate according to an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a TFT substrate of step S107 in the manufacturing method provided by the embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a TFT substrate of step S108 in the manufacturing method provided by the embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a TFT substrate in step S109 in the manufacturing method provided by the embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a TFT substrate of step S110 in the manufacturing method provided by the embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a TFT substrate of step S111 in the manufacturing method provided by the embodiment of the present application.
  • FIG. 1 is a schematic diagram of a method for fabricating a TFT substrate according to an embodiment of the present application. Includes the following steps.
  • a transparent plate 201 is provided.
  • the transparent plate 201 is used for transmitting light.
  • the material of the transparent plate 201 may be glass, ceramic, plastic or the like.
  • the transparent plate 201 may be a rectangular plate body, and the transparent plate 201 includes a flat surface on which a layer structure is formed to prepare a TFT array.
  • a gate 202 is deposited on the transparent plate 201.
  • a first metal layer is deposited on the transparent plate 201, and a conventional photomask is used as the first photomask, and the first metal layer is photolithographically patterned to form the gate 202.
  • a gate insulating layer 203 is deposited on the transparent plate 201.
  • a gate insulating layer 203 is deposited over the transparent plate 201 and the gate 202 such that the gate insulating layer 203 covers a portion of the substrate and completely covers the gate 202.
  • a semiconductor layer 204, a source 205, and a drain 206 are formed on the gate insulating layer 203.
  • a semiconductor material layer and a second metal layer are deposited on the gate insulating layer 203, and a photoresist layer required when patterning the semiconductor material layer and the second metal layer, and then using a halftone light A cover or a gray dimmer is used as the second mask, and the semiconductor material layer and the second metal layer are photolithographically patterned to form the semiconductor layer 204 and the source 205 and the drain 206 over the gate 202 by patterning.
  • the transparent plate 201 and the gate insulating layer 203, the semiconductor layer 204, the source 205, and the drain 206 provided on the transparent plate 201 may form the substrate 100.
  • the embodiment of the present application focuses on protecting a photolithography method, which can improve the stripping efficiency of the photoresist.
  • the lithography method includes the following steps.
  • a protective layer 207 is deposited on the gate insulating layer 203, the semiconductor layer 204, and the source and drain electrodes 205 and 206.
  • a protective layer 207 is deposited on the gate insulating layer 203, the semiconductor layer 204, and the source 205 and the drain 206 such that the protective layer 207 completely covers the gate insulating layer 203, the semiconductor layer 204, and Source 205 and drain 206.
  • the material of the protective layer 207 may be SiO 2 or SiON.
  • the protective layer 207 can function as a flattening to prepare for subsequent processes.
  • an aluminum film 208 is formed on the protective layer 207.
  • the aluminum thin film 208 can form a metal aluminum film 208 on the protective layer 207 by physical vapor deposition (PVD).
  • PVD physical vapor deposition
  • the thickness of the aluminum film 208 is not limited in the present application, and may be determined according to actual conditions.
  • the developer may be a diluted tetramethylammonium hydroxide solution
  • the stripping solution may be a tetramethylammonium hydroxide solution having a higher concentration, which is an alkaline solution, and may be The aluminum film 208 is reacted so that both the developer and the stripper can be used as an etching solution for the aluminum film 208.
  • the developer etches the aluminum film 208 such that the aluminum film 208 forms the same pattern as the photoresist layer.
  • the aluminum film 208 under the photoresist layer can help form a groove in a subsequent process, and the stripping liquid peels off the photoresist layer through the groove, thereby improving the peeling efficiency of the photoresist layer.
  • the stripping liquid can simultaneously peel off the aluminum film 208 and the photoresist layer, which can further improve the peeling efficiency of the photoresist layer, and does not require an additional process of peeling off the aluminum film 208, thereby improving product production efficiency and yield of the display panel.
  • the aluminum thin film 208 may be another film layer that can react with the developing solution and the stripping liquid.
  • the film layer can be patterned simultaneously with the photoresist layer, and is etched.
  • the protective layer 207 is unaffected to form a recess and can also be removed simultaneously with the photoresist layer without the need for an additional removal process.
  • a photoresist layer 209 is disposed on the aluminum thin film 208.
  • a photoresist layer 209 is disposed on the aluminum film 208, and a halftone mask or a gray dimming cover is used as the third mask.
  • the photoresist layer 209 contains a sensitizer that absorbs ultraviolet light.
  • the photoresist layer 209 to be removed is irradiated with high-energy ultraviolet light to perform overall exposure of the substrate 100.
  • the high-energy ultraviolet light esterifies the sensitizer in the photoresist layer 209, and combines the esterified sensitizer with water molecules to form a carboxylic acid ester compound, which is a weakly acidic substance, which is a subsequent photoresist.
  • Layer 209 is decomposed and dissolved in the developer to be ready. A portion of the photoresist layer 209 is removed by full exposure development such that a portion of the surface of the aluminum film 208 is exposed.
  • the photoresist layer 209 and the aluminum thin film 208 are patterned.
  • step S108 includes the following steps.
  • the exposed substrate 100 is developed and cleaned in a shower-type developing device using a developing solution, and the carboxylate compound reacts with the developing solution to form a hydrophilic compound that is easily soluble in water. Thereby, the photoresist layer 209 is completely dissolved in the developer.
  • the developing solution develops the photoresist layer 209 to pattern the photoresist layer 209 and expose a portion of the aluminum thin film 208.
  • the photoresist layer 209 is a negative photoresist
  • the developer may be a diluted tetramethylammonium hydroxide solution ((CH3)4NOH).
  • S1083a removes a portion of the aluminum film 208 exposing the photoresist layer 209 by the developer to pattern the aluminum film 208.
  • the aluminum film 208 is an amphoteric metal, it can react with an alkaline solution.
  • the developer is a diluted tetramethylammonium hydroxide solution, the developer may remove a portion of the aluminum film 208 exposing the photoresist layer 209 to pattern the aluminum film 208.
  • the photoresist layer 209 and the aluminum film 208 are simultaneously patterned to reduce the etching process of the aluminum film 208.
  • S1083b removes a portion of the aluminum film 208 exposing the photoresist layer 209 with an acidic etching solution to pattern the aluminum film 208.
  • the aluminum film 208 is an amphoteric metal, it can react with an acidic solution, and since the ITO layer is not formed on the substrate 100 at this time, an acidic solution can be used to remove a portion of the aluminum film 208 exposing the photoresist layer 209.
  • the aluminum film 208 is patterned to expose a portion of the protective layer 207.
  • the protective layer 207 is etched.
  • the edge of the protective layer 207 is retracted relative to the edge of the aluminum film 208 to form a recess 211 between the aluminum film 208 and the substrate 100.
  • the protective layer 207 is dry-etched.
  • the dry etching process etches the protective layer 207 and also affects the photoresist layer 209, so the edge of the protective layer 207 does not retract relative to the edge of the photoresist layer 209, thereby failing to A groove 211 is formed between the photoresist layer 209 and the substrate 100.
  • the stripping liquid cannot directly contact the photoresist layer 209, thereby hindering the removal of the photoresist layer 209 and pattern formation, thereby hindering the photolithography process and causing the production of the display panel. Reduced efficiency.
  • the aluminum film 208 is not affected by the dry etching, so the edge of the protective layer 207 is opposite to the edge of the aluminum film 208.
  • the groove 211 is formed between the aluminum film 208 and the substrate 100.
  • the opening of the groove 211 faces an orientation perpendicular to the substrate 100.
  • the inner wall on one side of the groove 211 is formed by the surface of the aluminum film 208.
  • an edge of the aluminum film 208 protrudes from an edge of the protective layer 207, thereby forming a groove 211 between the aluminum film 208 and the substrate 100, and an inner wall of the groove 211 includes the The aluminum film 208 faces the first surface of the substrate 100 and the second surface of the substrate 100 facing the first surface of the aluminum film 208, and the end surface of the protective layer 207.
  • the functional film layer 212 can be deposited on the exposed surface of the photoresist layer 209 and other layers using physical vapor deposition (PVD).
  • PVD physical vapor deposition
  • the first functional film layer 213 and the second functional film layer 214 are at different heights, that is, the first functional film layer 213 and the second functional film layer 214 are staggered.
  • the groove 211 is located between the first functional film layer 213 and the second functional film layer 214.
  • the extending direction of the groove 211 is perpendicular to the orientation of the substrate 100, such that when the functional film layer 212 is deposited toward the substrate 100, the functional film layer 212 does not cover the concave surface. Slot 211. That is, the groove 211 exposes the functional film layer 212.
  • the functional film layer 212 is an ITO film.
  • the region where the protective layer 207 is etched is a via where the surface of the source 205 and the drain 206 are exposed to be able to be subsequently associated with the second functional film layer. 214 forms an electrical connection.
  • the functional film layer 212 In the process of depositing the functional film layer 212 toward the substrate 100, since the opening of the groove 211 faces the orientation perpendicular to the substrate 100, the functional film layer 212 does not cover the groove 211, and thus The recess 211 removes the aluminum film 208 and the photoresist layer 209, thereby preventing the functional film layer 212 from completely covering the photoresist layer 209, hindering the photoresist layer 209 from being removed and forming a pattern, thereby hindering the photolithography process and causing display. The problem of reduced production efficiency of the panel.
  • the aluminum film 208 and the photoresist layer 209 are disposed in a stripping liquid, and the stripping liquid is filled through the opening of the groove 211 (in the direction of the arrow in FIG. 6).
  • the groove 211 is reacted with the aluminum film 208 to disengage the aluminum film 208 and the photoresist layer 209 from the protective layer 207.
  • the aluminum thin film 208 includes a protrusion 2081 protruding from the protective layer 207 and the photoresist layer 209.
  • the stripping solution etches the protrusions 2081 toward the surface of the substrate 100 to detach the aluminum film 208 from the protective layer 207, and causes the photoresist layer 209 on the aluminum film 208 and
  • the first functional film layer 213 is separated from the protective layer 207.
  • the stripping solution is a high solubility tetramethylammonium hydroxide solution.
  • the aluminum film 208, the photoresist layer 209, and the first functional film layer 213 provided on the photoresist layer 209 are removed by using a stripping solution.
  • the stripping liquid is in contact with the aluminum film 208 through the groove 211, and reacts with the aluminum film 208 to peel the aluminum film 208 from the protective layer 207, and the photoresist layer 209 and the location
  • the first functional film layer 213 on the photoresist layer 209 is peeled off from the protective layer 207 together with the aluminum thin film 208.
  • the stripping liquid contacts the photoresist layer 209, and also reacts with the photoresist layer 209 to peel off the photoresist layer 209, thereby increasing the peeling efficiency of the photoresist layer 209.
  • the photoresist layer 209 may be irradiated with laser light or ultraviolet light, and the photoresist layer 209 may be absorbing light and then expanded, and then the photoresist layer 209 may be immersed in the stripping liquid to achieve a faster and better peeling effect.
  • the order may be replaced between the various steps above, or steps may be omitted or added in the above steps.
  • the aluminum film 208 can also be etched into a corresponding pattern when the photoresist layer 209 is patterned, in the process of etching the protective layer 207.
  • the aluminum film 208 is not etched, and the protective layer 207 is etched, so that the edge of the protective layer 207 is retracted relative to the edge of the aluminum film 208 to be in the aluminum film 208 and
  • a groove 211 is formed between the substrates 100, and an opening of the groove 211 is formed between the aluminum film 208 and a functional film layer provided on the surface of the substrate 100, and the aluminum film 208 and the photoresist are formed.
  • the layer 209 is disposed in the stripping liquid, and the stripping liquid fills the recess 211 through the opening of the recess 211 and reacts with the aluminum thin film 208 to cause the aluminum thin film 208 and the photoresist layer 209
  • the detachment of the protective layer 207 prevents the functional film layer 212 from completely covering the photoresist layer 209, which hinders the removal of the photoresist layer 209 and the formation of a pattern, thereby hindering the lithography process and causing a decrease in the production efficiency of the display panel. problem.
  • the aluminum film 208 is simple and convenient to be removed without additional processes, improves the efficiency of the photolithography process, and improves the production efficiency of the display panel.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

L'invention concerne un procédé de fabrication d'un substrat (S10) de transistor à couches minces (TFT), comprenant les étapes suivantes consistant à : utiliser un substrat (100) ; former séquentiellement une couche de protection (207), un film mince d'aluminium (208) et une couche de résine photosensible (209) sur le substrat (100) ; former des motifs sur la couche de résine photosensible (209) et le film mince d'aluminium (208) ; graver la couche de protection (207), le bord de la couche de protection (207) se contractant vers l'intérieur par rapport au bord du film mince d'aluminium (208) de sorte à former une rainure (211) entre le film mince d'aluminium (208) et le substrat (100) ; déposer une couche de film fonctionnel (212) sur le substrat (100), la couche de film fonctionnel (212) comprenant une première couche de film fonctionnel (213) située sur la couche de résine photosensible (209) et une seconde couche de film fonctionnel (214) située sur une surface du substrat (100) ; et former une ouverture de la rainure (211) entre le film mince d'aluminium (208) et la seconde couche de film fonctionnel (214) ; et placer le film mince d'aluminium (208) et la couche de résine photosensible (209) dans une solution de décapage, la solution de décapage remplissant la rainure (211) au moyen de l'ouverture de la rainure (211) et réagissant avec le film mince d'aluminium (208) de sorte que le film mince d'aluminium (208) et la couche de résine photosensible (209) se séparent de la couche de protection (207).
PCT/CN2018/071612 2017-11-30 2018-01-05 Procédé de production de substrat tft WO2019104836A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201711247891.0 2017-11-30
CN201711247891.0A CN108010923B (zh) 2017-11-30 2017-11-30 Tft基板制作方法

Publications (1)

Publication Number Publication Date
WO2019104836A1 true WO2019104836A1 (fr) 2019-06-06

Family

ID=62055998

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/071612 WO2019104836A1 (fr) 2017-11-30 2018-01-05 Procédé de production de substrat tft

Country Status (2)

Country Link
CN (1) CN108010923B (fr)
WO (1) WO2019104836A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110998848A (zh) * 2019-11-26 2020-04-10 重庆康佳光电技术研究院有限公司 一种光阻剥离液的隔离结构、tft阵列及其制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101201422A (zh) * 2006-12-11 2008-06-18 联诚光电股份有限公司 以剥除法制作图案化膜层的方法
US20130292768A1 (en) * 2012-05-04 2013-11-07 Lg Display Co., Ltd. Array substrate and method of fabricating the same
CN105047568A (zh) * 2015-09-07 2015-11-11 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、显示面板
CN105304478A (zh) * 2015-10-15 2016-02-03 京东方科技集团股份有限公司 图案化金属膜层的方法、晶体管和阵列基板的制备方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101201422A (zh) * 2006-12-11 2008-06-18 联诚光电股份有限公司 以剥除法制作图案化膜层的方法
US20130292768A1 (en) * 2012-05-04 2013-11-07 Lg Display Co., Ltd. Array substrate and method of fabricating the same
CN105047568A (zh) * 2015-09-07 2015-11-11 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、显示面板
CN105304478A (zh) * 2015-10-15 2016-02-03 京东方科技集团股份有限公司 图案化金属膜层的方法、晶体管和阵列基板的制备方法

Also Published As

Publication number Publication date
CN108010923B (zh) 2020-01-03
CN108010923A (zh) 2018-05-08

Similar Documents

Publication Publication Date Title
JP5588740B2 (ja) Ｔｆｔ−ｌｃｄアレイ基板およびその製造方法
JP5512180B2 (ja) フォトレジストの縁部のバリの形成方法とアレイ基板の製造方法
CN111128877B (zh) 刻蚀阻挡型阵列基板的制备方法
US10916568B2 (en) Manufacturing method of display substrate, array substrate and display device
WO2015055054A1 (fr) Substrat de matrice et son procédé de fabrication et dispositif d'affichage
JPH0290629A (ja) 自己整合薄膜トランジスタの製造方法
WO2013181909A1 (fr) Transistor en couche mince et substrat à réseau et procédés de fabrication de ceux-ci
WO2017020480A1 (fr) Procédé de préparation de transistor à couches minces et de substrat de réseau, substrat de réseau et appareil d'affichage
JP2008171989A (ja) 電界効果型トランジスタ及びその製造方法
WO2019179128A1 (fr) Procédé de fabrication de substrat de réseau, substrat de réseau, panneau d'affichage et dispositif d'affichage
CN108198751B (zh) 光阻层剥离方法
WO2019104836A1 (fr) Procédé de production de substrat tft
US7125756B2 (en) Method for fabricating liquid crystal display device
JP2002237594A (ja) 薄膜トランジスタ、薄膜トランジスタの製造方法および薄膜トランジスタを含むディスプレイ・デバイス
CN107895713B (zh) Tft基板制作方法
US20040077173A1 (en) Using water soluble bottom anti-reflective coating
CN105260052A (zh) 盖板及其制作方法、显示装置及其制作方法
KR101577234B1 (ko) 패턴 형성 방법 및 박막 트랜지스터 어레이 기판의 제조 방법
US20210408070A1 (en) Array substrate and method for fabricating same
US10714512B2 (en) Thin film transistor, method for fabricating the same, and display device
KR100864209B1 (ko) 박막트랜지스터 어레이 제조방법
KR100856544B1 (ko) 박막트랜지스터 어레이 제조방법
JPH11233780A (ja) 半導体素子の製造方法と液晶表示パネル
WO2017133111A1 (fr) Procédé de fabrication de transistor en couches minces, procédé de fabrication de substrat de matrice, substrat de matrice et appareil d'affichage
US11037801B2 (en) Fabrication methods of patterned metal film layer, thin film transistor and display substrate

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18883227

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18883227

Country of ref document: EP

Kind code of ref document: A1