WO2019085858A1 - 显示面板的驱动方法、驱动电路、显示面板和显示装置 - Google Patents

显示面板的驱动方法、驱动电路、显示面板和显示装置 Download PDF

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Publication number
WO2019085858A1
WO2019085858A1 PCT/CN2018/112393 CN2018112393W WO2019085858A1 WO 2019085858 A1 WO2019085858 A1 WO 2019085858A1 CN 2018112393 W CN2018112393 W CN 2018112393W WO 2019085858 A1 WO2019085858 A1 WO 2019085858A1
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Prior art keywords
circuit
display
sub
pixel unit
image
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PCT/CN2018/112393
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English (en)
French (fr)
Inventor
张斌
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/341,679 priority Critical patent/US11501683B2/en
Publication of WO2019085858A1 publication Critical patent/WO2019085858A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a driving method of a display panel, a driving circuit that performs the driving method, a display panel that cooperates with the driving circuit, and a display device including the display panel.
  • An object of the present disclosure is to provide a driving method of a display panel, a driving circuit that performs the driving method, a display panel that cooperates with the driving circuit, and a display device including the display panel.
  • the display panel is driven by the driving method, the power consumption of the display panel can be reduced.
  • a driving method of a display panel is provided, wherein the display panel is configured to display a plurality of frames to be displayed, the image to be displayed includes a plurality of image pixel units, The display panel includes a plurality of display pixel units, and the driving method includes the following steps performed when displaying an image to be displayed for each frame:
  • the gray scale values are positively correlated, and the predetermined display voltage is lower than a voltage when the display pixel unit is driven in accordance with the predetermined value.
  • the illumination duration of the display pixel unit is less than the duration of one frame of the image.
  • the driving method further includes:
  • a driving circuit for displaying a multi-frame image to be displayed the image to be displayed includes a plurality of image pixel units, and the display panel includes a plurality of a display pixel unit, wherein the driving circuit comprises:
  • a gray-scale detection sub-circuit configured to detect a grayscale value of each image pixel unit in the image to be displayed
  • a determining sub-circuit configured to compare a grayscale value of each image pixel unit with a predetermined value, and generate a first determination signal when a grayscale value of the image pixel unit is greater than a predetermined value
  • a voltage providing sub-circuit for providing a predetermined display voltage to a display pixel unit corresponding to an image pixel unit having a grayscale value greater than a predetermined value according to the first determination signal, and within one frame,
  • the predetermined display voltage duration is positively correlated with a grayscale value of an image pixel unit greater than a predetermined value, the predetermined display voltage being lower than a voltage when the display pixel unit is driven according to the predetermined value.
  • the first determination signal includes a position coordinate of an image pixel unit whose grayscale value is greater than a predetermined value
  • the display pixel unit has a light emission duration that is less than a duration of one frame of image.
  • the display voltage providing sub-circuit is further configured to provide gray color with the image pixel unit to a display pixel unit corresponding to the image pixel unit whose grayscale value is not greater than the predetermined value.
  • the gray scale voltage corresponding to the order value is not greater than the predetermined value.
  • a pixel circuit for use in a display panel, the display panel for displaying a plurality of frames to be displayed, the image to be displayed comprising a plurality of image pixel units,
  • the display panel includes a plurality of display pixel units, and each of the display pixel units is provided with the pixel circuit.
  • the pixel circuit includes a display voltage writing sub-circuit, a storage sub-circuit, a driving transistor, and a light-emitting element,
  • the input end of the display voltage writing sub-circuit is connected to the data line, the output end of the display voltage writing sub-circuit is connected to the input end of the storage sub-circuit, and the display voltage is written to the first control end of the sub-circuit and The first scanning signal lines are connected;
  • a first output end of the storage sub-circuit is connected to a gate of the driving transistor, a second output end of the storage sub-circuit is connected to a second electrode of the driving transistor, and a control end of the storage sub-circuit is used Connected to the second scanning signal line;
  • the second pole of the driving transistor is connected to the high level signal end, wherein
  • a third output end of the storage subcircuit is connected to an anode of the light emitting element
  • the pixel circuit further includes a duty control sub-circuit, and the control end of the duty control sub-circuit is connected to the third scan signal line, and the input end of the duty control sub-circuit and the drive transistor The second pole is connected, the output end of the duty cycle control sub-circuit is connected to the anode of the light-emitting element, and the duty end of the duty-control sub-circuit receives the first level signal, the duty ratio
  • the input end of the control sub-circuit is electrically connected to the output end, wherein the duration of the first level signal is positively correlated with the gray scale value of the image pixel unit corresponding to the pixel circuit for a duration of one frame,
  • the predetermined display voltage is lower than a voltage when the display pixel unit is driven in accordance with the predetermined value.
  • the duty cycle control subcircuit includes a duty cycle control transistor, and a gate of the duty cycle control transistor is formed as a control terminal of the duty cycle control subcircuit, the duty cycle A first pole of the control transistor is formed as an input of the duty cycle control subcircuit, and a second pole of the duty cycle control transistor is formed as an output of the duty cycle control subcircuit.
  • the duty cycle controls the first pole of the transistor and the duty cycle The second pole of the control transistor is turned off.
  • the display voltage writing sub-circuit includes a data writing transistor, a gate of the data writing transistor is formed as a control terminal of the display voltage writing sub-circuit, and the data is written to the transistor A first pole is formed as an input of the display voltage writing subcircuit, and a second pole of the data writing transistor is formed as an output of the display voltage writing subcircuit.
  • the storage subcircuit includes a storage capacitor, a first storage control transistor, and a second storage control transistor.
  • One end of the storage capacitor is connected to an output end of the display voltage writing sub-circuit, and the other end of the storage capacitor is formed as a first output end of the storage sub-circuit;
  • a gate of the first storage control transistor is connected to a gate of the second storage control transistor, and is formed as a control end of the storage sub-circuit, a first pole of the first storage transistor and the storage capacitor The first end of the first storage transistor is connected to form a third output end of the storage sub-circuit;
  • a first pole of the second storage control transistor is coupled to the other end of the storage capacitor, and a second pole of the second storage control transistor is formed as a second output of the storage subcircuit.
  • a display panel includes a plurality of display pixel units arranged in a plurality of rows and columns, each of which is provided with a pixel circuit, wherein the pixels are disposed
  • the circuit is the above-mentioned pixel circuit provided by the disclosure
  • the display panel includes a plurality of first scan lines, a plurality of second scan lines, and a plurality of third scan lines, each row of pixel units corresponding to a first scan line, each row
  • the pixel unit corresponds to a second scan line
  • each row of the display pixel unit corresponds to a third scan line
  • the control end of the display voltage writing sub-circuit of the pixel circuit in the same row is connected to the corresponding first scan line, in the same row.
  • the control end of the storage sub-circuit of the pixel circuit is connected to the corresponding second scan line; the control end of the duty control sub-circuit in the pixel circuit in the same row is connected to the corresponding third scan line.
  • a display device including a display panel and a driving circuit, wherein the display panel is the above-described display panel provided by the present disclosure, the driving circuit is the disclosure Providing the above driving circuit, the driving
  • a display voltage supply subcircuit of the dynamic circuit is electrically coupled to the data line.
  • FIG. 1 is a flow chart of a driving method provided by the present disclosure
  • FIG. 2 is a schematic diagram of a driving method provided by the present disclosure
  • FIG. 3 is a schematic diagram of a sub-circuit of a driving circuit provided by the present disclosure.
  • FIG. 4 is a schematic diagram showing a relationship between a duration of a scan signal on a third scan line of any one of the display pixel units and a gray scale value corresponding to the display pixel unit;
  • FIG. 5 is a schematic diagram of a pixel circuit provided by the present disclosure.
  • the image pixel unit of the image to be displayed has a one-to-one correspondence with the display pixel unit on the display panel.
  • the display panel When the display panel is driven to display the image to be displayed, it is required to drive each display pixel unit on the display panel to emit light having a brightness corresponding to a grayscale value of a corresponding image pixel unit on the image to be displayed.
  • the higher the grayscale value of the image pixel unit the higher the energy consumption when the display pixel unit corresponding to the image pixel unit on the display panel emits light having the grayscale value.
  • a driving method of a display panel is provided, wherein the display panel is configured to display a plurality of frames to be displayed, the image to be displayed includes a plurality of image pixel units, and the display panel includes a plurality of Displaying a pixel unit, as shown in FIG. 1, the driving method includes the following steps performed when displaying an image to be displayed for each frame:
  • step S110 detecting a grayscale value of each image pixel unit in the image to be displayed
  • step S120 it is determined whether the grayscale value of each image pixel unit is greater than a predetermined value
  • step S130 a predetermined display voltage is supplied to the display pixel unit corresponding to the image pixel unit whose grayscale value is greater than the predetermined value, and the duration of the predetermined display voltage is supplied to the display pixel unit.
  • Corresponding image pixel unit gray scale values are positively correlated, and the predetermined display voltage is lower than a voltage when the display pixel unit is driven according to the predetermined value.
  • the illumination duration of the corresponding display pixel unit is less than the duration of one frame of the image.
  • one frame duration is set to T
  • the display unit illumination time is t1 in one frame
  • the display pixel unit corresponding to the image pixel unit with the grayscale value of 200 lasts longer than the display pixel unit corresponding to the image pixel unit with the grayscale of 30.
  • the predetermined value may be 30.
  • the brightness of the light obtained when the display pixel unit emits light according to the predetermined display voltage is lower than the brightness corresponding to the gray level value of 255, so that energy saving can be achieved.
  • the power consumption of the display device can be reduced.
  • the human eye by allocating the ratio between the lighting time of the display pixel unit and the non-lighting time, the human eye can feel the gray level consistent with the image pixel unit.
  • the driving method further includes:
  • step S140 a grayscale voltage corresponding to the grayscale value of the image pixel unit is provided to the display pixel unit corresponding to the image pixel unit whose grayscale value is not greater than the predetermined value on the display panel.
  • the display pixel unit of the display panel includes a red display pixel unit, a green display pixel unit, and a blue display pixel unit. Accordingly, the image pixel unit of the image to be displayed includes a red image pixel unit, a green image pixel unit, and a blue image pixel unit.
  • the display panel is an organic light emitting diode display panel.
  • a driving circuit for displaying a multi-frame image to be displayed the image to be displayed includes a plurality of image pixel units, and the display panel includes a plurality of The display pixel unit, wherein, as shown in FIG. 3, the drive circuit includes a gray scale detection sub-circuit 310, a judgment sub-circuit 320, and a display voltage supply sub-circuit 330.
  • the driving circuit provided by the present disclosure is for driving a display panel according to a driving method provided by the present disclosure.
  • the grayscale detection sub-circuit 310 is configured to perform step S110, that is, the grayscale detection sub-circuit 310 is configured to detect a grayscale value of each image pixel unit in the image to be displayed.
  • the determining sub-circuit 320 is configured to perform step S120, that is, the determining sub-circuit 320 is configured to compare the grayscale value of each image pixel unit with a predetermined value.
  • the determining sub-circuit 320 is further configured to generate a first determination signal when the grayscale value of the image pixel unit is greater than a predetermined value, the first determination signal including position coordinates of the image pixel unit whose grayscale value is greater than a predetermined value.
  • the display voltage providing sub-circuit 330 is configured to perform step S130, that is, the display voltage providing sub-circuit 330 is configured to provide a predetermined display voltage to the display pixel unit corresponding to the image pixel unit whose grayscale value is greater than the predetermined value according to the first determination signal. And within a frame, the predetermined display voltage duration is positively correlated with a grayscale value of the image pixel unit having a grayscale value greater than a predetermined value, the predetermined display voltage being lower than driving the display pixel according to the predetermined value The voltage at the time of the unit.
  • the driving circuit provided by the present disclosure is used to perform the above-described driving method provided by the present disclosure. Therefore, when the driving circuit drives the display device for display, the display panel can display a desired image with low power consumption.
  • the display voltage providing sub-circuit 330 is further configured to provide, to the display panel, the display pixel unit corresponding to the image pixel unit whose grayscale value is not greater than the predetermined value, corresponding to the grayscale value of the image pixel unit. Gray scale voltage.
  • a pixel circuit for use in a display panel, the display panel for displaying a plurality of frames to be displayed, the image to be displayed comprising a plurality of image pixel units,
  • the display panel includes a plurality of display pixel units, and each of the display pixel units is provided with the pixel circuit.
  • the pixel circuit includes a display voltage writing sub-circuit 510, a storage sub-circuit 520, a driving transistor T5, and a light-emitting element D.
  • the input terminal of the display voltage writing sub-circuit 510 is connected to the data line Data, and the output terminal of the display voltage writing sub-circuit 510 is connected to the input terminal of the storage sub-circuit 520 to display the first of the voltage writing sub-circuit 510.
  • the control terminal is for connecting to the first scanning signal line SCAN1.
  • the first output end of the storage sub-circuit 520 is connected to the gate of the driving transistor T5, the second output end of the storage sub-circuit 520 is connected to the second electrode of the driving transistor T5, and the control end of the storage sub-circuit 520 is used for the second scanning.
  • the signal line SCAN2 is connected.
  • the second electrode of the driving transistor T5 is connected to the high level signal terminal VDD.
  • the third output end of the storage sub-circuit 520 is connected to the anode of the light-emitting element D.
  • the pixel circuit further includes a duty control sub-circuit 530, and the control end of the duty control sub-circuit 530 is used for the third scan.
  • the signal line SCAN3 is connected, the input end of the duty control sub-circuit 530 is connected to the second electrode of the driving transistor T5, the output end of the duty control sub-circuit 530 is connected to the anode of the light-emitting element D, and the duty-regulating sub-circuit 530
  • the control terminal receives the first level signal
  • the input end of the duty control sub-circuit 530 is turned on, wherein the duration of the first level signal is continuous for a frame.
  • the gray scale values of the image pixel units corresponding to the pixel circuits are positively correlated.
  • the operational phase of the pixel circuit provided in Figure 5 includes a data write phase, an illumination phase, and a non-emissive phase.
  • the pixel circuit is disposed in the display pixel unit of the display panel.
  • the data writing phase includes two cases. In the first case, the grayscale value of the image pixel unit corresponding to the pixel circuit is greater than a predetermined value, and the display voltage input through the data line is the The display voltage is predetermined; the second case is that the grayscale value of the image pixel unit corresponding to the pixel circuit is not greater than the predetermined value, and the display voltage input through the data line is the grayscale value of the image pixel unit corresponding to the pixel circuit. Corresponding display voltage.
  • the first level signal is supplied to the control terminal of the display voltage writing sub-circuit 510 through the first scanning line SCAN1, thereby storing the display voltage in the storage sub-circuit 520.
  • the second scanning signal line SCAN2 is a first level signal, thereby causing the driving transistor T5 to form a diode connection and storing the gate voltage of the driving transistor T5 in the memory sub-circuit 520.
  • the third scan signal line SCAN3 clock is the second level signal. Therefore, the input terminal and the output terminal of the duty control sub-circuit 530 are disconnected, and the light-emitting element D does not emit light. .
  • the second scanning signal line SCAN2 maintains the first level signal, and the signal on the third scanning signal line SCAN3 becomes the first level signal, continuing After the t1 period, the signal on the third scanning signal line SCAN3 becomes the second level signal for a period of time t2.
  • the first level signal is supplied to the control terminal of the display voltage writing sub-circuit 510 through the first scanning line SCAN1, thereby storing the display voltage in the storage sub-circuit 520.
  • the second scanning signal line SCAN2 is a first level signal, thereby causing the driving transistor T5 to form a diode connection and storing the gate voltage of the driving transistor T5 in the memory sub-circuit 520.
  • the third scan signal line SCAN3 clock is the second level signal. Therefore, the input end and the output end of the duty control sub-circuit 530 are disconnected, and the light-emitting element D does not emit light. .
  • the second scanning signal line SCAN2 maintains the first level signal
  • the signal on the third scanning signal line SCAN3 becomes the first level signal
  • the light emitting element D emits light.
  • the first scan signal line SCAN1, the second scan signal line SCAN2, and the third scan signal line SCAN3 are all second level signals.
  • the pixel circuit provided by the present application can implement the above-mentioned driving method provided by the present disclosure in cooperation with the driving circuit provided by the present application, thereby achieving the purpose of saving energy consumption when driving display panel display.
  • the duty cycle control sub-circuit 530 includes a duty cycle control transistor T4 whose gate is formed as a control of the duty cycle control sub-circuit 530.
  • the first terminal of the duty control transistor T4 is formed as an input terminal of the duty control sub-circuit 530, and the second electrode of the duty control transistor T4 is formed as an output terminal of the duty control sub-circuit 530.
  • the gate of the duty control transistor T4 receives the first level signal
  • the first pole of the duty control transistor T4 and the second pole of the duty control transistor T4 are turned on, and the gate of the duty control transistor T4 is controlled.
  • the pole receives the second level signal
  • the first pole of the duty ratio control transistor T4 and the second pole of the duty ratio control transistor T4 are turned off.
  • the specific structure of the display voltage writing sub-circuit is not particularly limited.
  • the display voltage writing sub-circuit includes a data writing transistor T1.
  • the gate of the data writing transistor T1 is formed as a control terminal of the display voltage writing sub-circuit 510.
  • the first electrode of the data writing transistor T1 is formed as an input terminal of the display voltage writing sub-circuit 510, and the data is written to the transistor T1.
  • the second pole is formed to display the output of the voltage write subcircuit 510.
  • the specific structure of the storage subcircuit is also not particularly limited.
  • the memory sub-circuit 520 includes a storage capacitor C1, a first storage control transistor T2, and a second storage control transistor T3.
  • one end of the storage capacitor C1 is connected to the output terminal of the display voltage writing sub-circuit 510, and the other end of the storage capacitor C1 is formed as a first output terminal of the storage sub-circuit 520.
  • the gate of the first storage control transistor T2 is connected to the gate of the second storage control transistor T3, and is formed as a control terminal of the storage sub-circuit, the first terminal of the first storage transistor T2 and the first end of the storage capacitor C1 Connected, the second pole of the first memory transistor T2 is formed as a third output of the memory sub-circuit 520.
  • the first terminal of the second storage control transistor T3 is connected to the other end of the storage capacitor C1, and the second electrode of the second storage control transistor T3 is formed as the second output terminal of the storage sub-circuit 520.
  • the gate of the first storage control transistor T2 When the gate of the first storage control transistor T2 receives the first level signal, the first pole of the first storage control transistor T2 is electrically connected to the second pole of the first storage control transistor T2, and the first storage control transistor T2 When the gate receives the second level signal, the first pole of the first storage control transistor T2 is disconnected from the second pole of the first storage control transistor T2.
  • the gate of the second storage control transistor T3 When the gate of the second storage control transistor T3 receives the first level signal, the first pole of the second storage control transistor T3 is electrically connected to the second pole of the second storage control transistor T3, and the second storage control transistor T3 When the gate receives the second level signal, the first pole of the second storage control transistor T3 is disconnected from the second pole of the second storage control transistor T3.
  • a display panel includes a plurality of display pixel units arranged in a plurality of rows and columns, each of which is provided with a pixel circuit, wherein the pixels are disposed
  • the circuit is the above pixel circuit provided by the disclosure
  • the display panel includes a plurality of data lines DATA, a plurality of first scan lines SCAN1, a plurality of second scan lines SCAN2, and a plurality of third scan lines SCAN3, each row of pixel units Corresponding to a first scan line SCAN1, each row of pixel units corresponds to a second scan line SCAN2, and each row of display pixel units corresponds to a third scan line SCAN3.
  • Each column of display pixel units corresponds to one data line DATA
  • control end of the display voltage writing sub-circuit of the pixel circuit in the same row is connected to the corresponding first scan line
  • the control end of the storage sub-circuit of the pixel circuit in the same row is connected to the corresponding second scan line.
  • the control terminal of the duty cycle control subcircuit in the pixel circuit in the same row is connected to the corresponding third scan line.
  • the input terminals of the display voltage writing sub-circuits of the pixel circuits of the same column are electrically connected to the corresponding data lines.
  • the display panel can be driven to display by using the above driving method provided by the present disclosure, and the energy consumption of the display panel can be reduced while enabling each display pixel unit to achieve normal gray scale display.
  • a display device including a display panel and a driving circuit, wherein the display panel is the above-described display panel provided by the present disclosure, the driving circuit is the disclosure
  • the above driving circuit is provided, and a display voltage providing sub-circuit of the driving circuit is electrically connected to the data line.
  • the display device can reduce the energy consumption of the display panel while displaying the normal gray scale display of each display pixel unit. Specifically, since the light-emitting time of the display pixel unit corresponding to the image pixel unit whose grayscale value is greater than the predetermined value is shortened within one frame time, the power consumption of the display device can be reduced. Moreover, due to the visual delay of the human eye, by allocating the ratio between the lighting time of the display pixel unit and the non-lighting time, the human eye can feel the gray level consistent with the image pixel unit.
  • the present disclosure is particularly applicable to OLED display devices.

Abstract

一种显示面板的驱动方法，显示面板用于显示多帧待显示图像，待显示图像包括多个图像像素单元，显示面板包括多个显示像素单元，驱动方法包括在显示每一帧待显示图像时进行的以下步骤：检测待显示图像中各图像像素单元的灰阶值（S110）；判断各个图像像素单元的灰阶值是否大于预定值(S120)；向显示面板上与灰阶值大于预定值的图像像素单元对应的显示像素单元提供预定显示电压，预定显示电压低于按照预定值驱动显示像素单元时的电压。一种驱动电路、一种像素电路、一种显示面板和一种显示装置。利用驱动方法驱动显示面板显示时，可以在获得正常显示效果的同时降低能耗。

Description

显示面板的驱动方法、驱动电路、显示面板和显示装置
相关申请的交叉引用
本申请要求于2017年11月1日递交的中国专利申请第201711057233.5号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开涉及显示技术领域，具体地，涉及一种显示面板的驱动方法、执行该驱动方法的驱动电路、与该驱动电路配合的显示面板和一种包括该显示面板的显示装置。
背景技术
随着科技的进步，显示装置已经得到了越来越广泛的应用。随着对高分辨率屏幕的追求，如何降低显示装置的耗电量成为本领域亟待解决的技术问题。
发明内容
本公开的目的在于提供一种显示面板的驱动方法、执行该驱动方法的驱动电路、与该驱动电路配合的显示面板和一种包括该显示面板的显示装置。利用所述驱动方法驱动显示面板时，可以降低显示面板的能耗。
为了实现上述目的，作为本公开的一个方面，提供一种显示面板的驱动方法，其中，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，所述驱动方法包括在显示每一帧待显示图像时进行的以下步骤：
检测待显示图像中各图像像素单元的灰阶值；
判断各图像像素单元的灰阶值是否大于预定值；
向所述显示面板上与灰阶值大于所述预定值的图像像素单元对 应的显示像素单元提供预定显示电压，向所述显示像素单元提供所述预定显示电压的持续时间与相应的图像像素单元的灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
在一个实施方式中，在所述的驱动方法中，所述显示像素单元的发光持续时间小于一帧图像的持续时间。
在一个实施方式中，所述驱动方法还包括：
向所述显示面板上与灰阶值不大于所述预定值的图像像素显示单元对应的显示像素单元提供与所述图像像素显示单元的灰阶值相对应的灰阶电压。
作为本公开的第二个方面，提供一种显示面板的驱动电路，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，其中，所述驱动电路包括：
灰阶检测子电路，所述灰阶检测子电路用于检测待显示图像中各图像像素单元的灰阶值；
判断子电路，所述判断子电路用于将各个图像像素单元的灰阶值与预定值进行比较，当图像像素单元的灰阶值大于预定值时生成第一判定信号；
显示电压提供子电路，所述显示电压提供子电路用于根据所述第一判定信号向与灰阶值大于预定值的图像像素单元对应的显示像素单元提供预定显示电压，并且在一帧内，所述预定显示电压持续的时间与大于预定值的图像像素单元的灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
在一个实施方式中，在所述的驱动电路中，所述第一判定信号包括灰阶值大于预定值的图像像素单元的位置坐标
在一个实施方式中，在所述的驱动电路中，所述显示像素单元的发光持续时间小于一帧图像的持续时间。
在一个实施方式中，所述显示电压提供子电路还用于向所述显示面板上与灰阶值不大于所述预定值的图像像素单元对应的显示像 素单元提供与所述图像像素单元的灰阶值相对应的灰阶电压。
作为本公开的第三个方面，提供一种像素电路，所述像素电路用于显示面板中，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，每个所述显示像素单元中均设置有所述像素电路，
所述像素电路包括显示电压写入子电路、存储子电路、驱动晶体管和发光元件，
所述显示电压写入子电路的输入端与数据线相连，所述显示电压写入子电路的输出端与存储子电路的输入端相连，所述显示电压写入子电路的第一控制端与第一扫描信号线相连；
所述存储子电路的第一输出端与所述驱动晶体管的栅极相连，所述存储子电路的第二输出端与所述驱动晶体管的第二极相连，所述存储子电路的控制端用于与第二扫描信号线相连；
所述驱动晶体管的第二极与高电平信号端相连，其中，
所述存储子电路的第三输出端与所述发光元件的阳极相连，
所述像素电路还包括占空比控制子电路，所述占空比控制子电路的控制端用于与第三扫描信号线相连，所述占空比控制子电路的输入端与所述驱动晶体管的第二极相连，所述占空比控制子电路的输出端与所述发光元件的阳极相连，所述占空比控制子电路的控制端接收到第一电平信号时，该占空比控制子电路的输入端与输出端导通，其中，在一帧所持续的时间中，所述第一电平信号的持续时间与所述像素电路对应的图像像素单元的灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
在一个实施方式中，所述占空比控制子电路包括占空比控制晶体管，所述占空比控制晶体管的栅极形成为所述占空比控制子电路的控制端，所述占空比控制晶体管的第一极形成为所述占空比控制子电路的输入端，所述占空比控制晶体管的第二极形成为所述占空比控制子电路的输出端。
在一个实施方式中，在所述的像素电路中，所述占空比控制晶体管的栅极接收到第二电平信号时，所述占空比控制晶体管的第一极 和所述占空比控制晶体管的第二极断开。
在一个实施方式中，所述显示电压写入子电路包括数据写入晶体管，所述数据写入晶体管的栅极形成为所述显示电压写入子电路的控制端，所述数据写入晶体管的第一极形成为所述显示电压写入子电路的输入端，所述数据写入晶体管的第二极形成为所述显示电压写入子电路的输出端。
在一个实施方式中，所述存储子电路包括存储电容、第一存储控制晶体管和第二存储控制晶体管，
所述存储电容的一端与所述显示电压写入子电路的输出端相连，所述存储电容的另一端形成为所述存储子电路的第一输出端；
所述第一存储控制晶体管的栅极与所述第二存储控制晶体管的栅极相连，且形成为所述存储子电路的控制端，所述第一存储晶体管的第一极与所述存储电容的第一端相连，所述第一存储晶体管的第二极形成为所述存储子电路的第三输出端；
所述第二存储控制晶体管的第一极与所述存储电容的另一端相连，所述第二存储控制晶体管的第二极形成为所述存储子电路的第二输出端。
作为本公开的第四个方面，提供一种显示面板，所述显示面板包括排列为多行多列的多个显示像素单元，每个显示像素单元内均设置有像素电路，其中，所述像素电路为本公开所提供的上述像素电路，所述显示面板包括多条第一扫描线、多条第二扫描线和多条第三扫描线，每行像素单元对应一条第一扫描线，每行像素单元对应一条第二扫描线，每行显示像素单元对应一条第三扫描线，同一行中的像素电路的显示电压写入子电路的控制端与相应的第一扫描线相连，同一行中的像素电路的存储子电路的控制端与相应的第二扫描线相连；同一行中的像素电路中的占空比控制子电路的控制端与相应的第三扫描线相连。
作为本公开的第五个方面，提供一种显示装置，所述显示装置包括显示面板和驱动电路，其中，所述显示面板为本公开所提供的上述显示面板，所述驱动电路为本公开所提供的上述驱动电路，所述驱
动电路的显示电压提供子电路与所述数据线电连接。
附图说明
附图是用来提供对本公开的进一步理解，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本公开，但并不构成对本公开的限制。在附图中：
图1是本公开所提供的驱动方法的流程图；
图2是本公开所提供的驱动方法的示意图；
图3是本公开所提供的驱动电路的子电路示意图；
图4是任意一个显示像素单元的第三扫描线上扫描信号的持续时间与该显示像素单元对应的灰阶值之间的关系示意图；
图5是本公开所提供的像素电路的示意图。
具体实施方式
以下结合附图对本公开的具体实施方式进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本公开，并不用于限制本公开。
本领域技术人员容易理解的是，待显示图像的图像像素单元与显示面板上的显示像素单元是一一对应的。在驱动显示面板显示所述待显示图像时，需要驱动显示面板上各显示像素单元发出亮度与所述待显示图像上相应的图像像素单元的灰阶值相对应的光。由此可知，图像像素单元的灰阶值越高，驱动显示面板上与该图像像素单元对应的显示像素单元发出具有该灰阶值的光时，耗能越高。
作为本公开的一个方面，提供一种显示面板的驱动方法，其中，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，如图1所示，所述驱动方法包括在显示每一帧待显示图像时进行的以下步骤：
在步骤S110中，检测待显示图像中各图像像素单元的灰阶 值；
在步骤S120中，判断各个图像像素单元的灰阶值是否大于预定值；
在步骤S130中，向所述显示面板上与灰阶值大于所述预定值的图像像素单元对应的显示像素单元提供预定显示电压，向所述显示像素单元提供所述预定显示电压的持续时间与相应的图像像素单元灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
在显示一帧待显示图像时，如果图像像素单元的灰阶值大于预定值，则相应显示像素单元的发光持续时间小于一帧图像的持续时间。为了便于描述，设定一帧持续时间为T，在一帧内显示单元发光时间为t1，不发光的时间为t2。容易理解的是，t1+t2＝T。由于一帧图像持续的时间比较短暂，因此，显示像素单元发光后产生的影像会在人脑中产生残留影像，与后续显示像素单元不发光产生的影像在人脑中重叠，从而使得人能够感受到灰阶。t1持续的时间越长，则人眼感受到的亮度越高，t1持续的时间越短，则人眼感受到的亮度越低。
如图4中所示，灰阶值为200的图像像素单元对应的显示像素单元发光持续的时间大于灰阶为30的图像像素单元对应的显示像素单元发光持续的时间。
在本公开中，对所述预定值的具体数值并没有特殊的规定。例如，所述预定值可以是30。
在一个实施方式中，所述显示像素单元按照所述预定显示电压发光时得到的发光亮度低于灰阶值为255时对应的亮度，从而可以达到节约能耗的目的。
由于在一帧时间内，与灰阶值大于预定值的图像像素单元对应的显示像素单元的发光时间缩短，从而可以降低显示装置的能耗。并且，由于人眼的视觉延迟，通过分配显示像素单元的发光时间与不发光时间之间的比例，可以使人眼感受到与图像像素单元一致的灰阶。
在本公开中，对在灰阶值不大于所述预定值的情况下如何显示图像像素单元并没有特殊的规定，为了提高显示效果，在一个实施方式中，所述驱动方法还包括：
在步骤S140中，向所述显示面板上与灰阶值不大于所述预定值的图像像素单元对应的显示像素单元提供与该图像像素单元的灰阶值相对应的灰阶电压。
在本公开所提供的驱动方法中，对灰阶值较小的图像像素单元而言，按照其原有灰阶进行显示，可以提高显示效果。
显示面板的显示像素单元包括红色显示像素单元、绿色显示像素单元和蓝色显示像素单元。相应地，待显示图像的图像像素单元包括红色图像像素单元、绿色图像像素单元和蓝色图像像素单元。
在本公开中，如图2所示，需要检测各红色图像像素单元的灰阶值、各绿色图像像素单元的灰阶值、以及各蓝色图像像素单元的灰阶值。随后对各种颜色的图像像素单元的灰阶值进行分别判断，并最终确定根据步骤S130驱动相应的显示像素单元进行发光还是根据步骤S140驱动相应显示像素单元进行发光。
作为本公开的一种可选实施方式，显示面板为有机发光二极管显示面板。
作为本公开的第二个方面，提供一种显示面板的驱动电路，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，其中，如图3所示，所述驱动电路包括灰阶检测子电路310、判断子电路320和显示电压提供子电路330。本公开所提供的驱动电路用于根据本公开所提供的驱动方法对显示面板进行驱动。
灰阶检测子电路310用于执行步骤S110，即，灰阶检测子电路310用于检测待显示图像中各图像像素单元的灰阶值。
判断子电路320用于执行步骤S120，即，判断子电路320用于将各个图像像素单元的灰阶值与预定值进行比较。判断子电路320还用于当图像像素单元的灰阶值大于预定值时生成第一判定 信号，所述第一判定信号包括灰阶值大于预定值的图像像素单元的位置坐标。
显示电压提供子电路330用于执行步骤S130，即，显示电压提供子电路330用于根据所述第一判定信号向与灰阶值大于预定值的图像像素单元对应的显示像素单元提供预定显示电压，并且在一帧内，所述预定显示电压持续的时间与灰阶值大于预定值的图像像素单元的灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
本公开所提供的驱动电路用于执行本公开所提供的上述驱动方法，因此，所述驱动电路驱动显示装置进行显示时，显示面板可以以较低的能耗显示所需的图像。
如上文中所述，当图像像素单元的灰阶值不大于所述预定值时，控制相应的显示像素单元按照该图像像素单元的灰阶值进行显示。相应地，显示电压提供子电路330还用于向所述显示面板上与灰阶值不大于所述预定值的图像像素单元对应的显示像素单元提供与该图像像素单元的灰阶值相对应的灰阶电压。
作为本公开的第三个方面，提供一种像素电路，该像素电路用于显示面板中，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，每个所述显示像素单元中均设置有所述像素电路。
如图5所示，所述像素电路包括显示电压写入子电路510、存储子电路520、驱动晶体管T5和发光元件D。
显示电压写入子电路510的输入端用于与数据线Data相连，显示电压写入子电路510的输出端用于与存储子电路520的输入端相连，显示电压写入子电路510的第一控制端用于与第一扫描信号线SCAN1相连。
存储子电路520的第一输出端与驱动晶体管T5的栅极相连，存储子电路520的第二输出端与驱动晶体管T5的第二极相连，存储子电路520的控制端用于与第二扫描信号线SCAN2相连。
驱动晶体管T5的第二极与高电平信号端VDD相连。
其中，存储子电路520的第三输出端与发光元件D的阳极相连，所述像素电路还包括占空比控制子电路530，该占空比控制子电路530的控制端用于与第三扫描信号线SCAN3相连，占空比控制子电路530的输入端与驱动晶体管T5的第二极相连，占空比控制子电路530的输出端与发光元件D的阳极相连，占空比控制子电路530的控制端接收到第一电平信号时，该占空比控制子电路530的输入端与输出端导通，其中，在一帧所持续的时间中，所述第一电平信号的持续时间与所述像素电路对应的图像像素单元的灰阶值正相关。
图5中所提供的像素电路的工作阶段包括数据写入阶段、发光阶段和非发光阶段。
如上文中所述，像素电路设置在显示面板的显示像素单元中。在本公开所提供的像素电路中，数据写入阶段包括两种情况，第一种情况是该像素电路对应的图像像素单元的灰阶值大于预定值，通过数据线输入的显示电压为所述预定显示电压；第二种情况是该像素电路对应的图像像素单元的灰阶值不大于所述预定值，通过数据线输入的显示电压为与该像素电路对应的图像像素单元的灰阶值所对应的显示电压。
在第一种情况的数据写入阶段，通过第一扫描线SCAN1向显示电压写入子电路510的控制端提供第一电平信号，从而将显示电压存储在存储子电路520中。在此阶段，第二扫描信号线SCAN2为第一电平信号，从而使得驱动晶体管T5形成二极管连接，并将驱动晶体管T5的栅极电压存储在存储子电路520中。在第一种情况的数据写入阶段，第三扫描信号线SCAN3时钟为第二电平信号，因此，占空比控制子电路530的输入端与输出端是断开的，发光元件D不发光。随后，在第一种情况的数据写入阶段结束后的发光阶段中，第二扫描信号线SCAN2保持第一电平信号，第三扫描信号线SCAN3上的信号变为第一电平信号，持续t1时间段后，第三扫描信号线SCAN3上的信号变为第二电平信号，持续t2时间段。
在第二种情况的数据写入阶段，通过第一扫描线SCAN1向显示电压写入子电路510的控制端提供第一电平信号，从而将显示电压存储在存储子电路520中。在此阶段，第二扫描信号线SCAN2为第一电平信号，从而使得驱动晶体管T5形成二极管连接，并将驱动晶体管T5的栅极电压存储在存储子电路520中。在第二种情况的数据写入阶段，第三扫描信号线SCAN3时钟为第二电平信号，因此，占空比控制子电路530的输入端与输出端是断开的，发光元件D不发光。随后，在第二种情况的数据写入阶段结束后的发光阶段中，第二扫描信号线SCAN2保持第一电平信号，第三扫描信号线SCAN3上的信号变为第一电平信号，使发光元件D发光。
在非发光阶段，第一扫描信号线SCAN1、第二扫描信号线SCAN2和第三扫描信号线SCAN3均为第二电平信号。
通过上述描述可知，本申请所提供的像素电路可以配合本申请所提供的驱动电路实现本公开所提供的上述驱动方法，从而达到驱动显示面板显示时节约能耗的目的。
在本公开中，对占空比控制子电路的具体结构并不做特殊的限定。例如，在图5中所示的具体实施方式中，占空比控制子电路530包括占空比控制晶体管T4，该占空比控制晶体管T4的栅极形成为占空比控制子电路530的控制端，占空比控制晶体管T4的第一极形成为占空比控制子电路530的输入端，占空比控制晶体管T4的第二极形成为占空比控制子电路530的输出端。占空比控制晶体管T4的栅极接收到第一电平信号时，占空比控制晶体管T4的第一极和该占空比控制晶体管T4第二极导通，占空比控制晶体管T4的栅极接收到第二电平信号时，占空比控制晶体管T4的第一极和该占空比控制晶体管T4的第二极断开。
在本公开中，对显示电压写入子电路的具体结构也不做特殊的限定，例如，在图5中所示的具体实施方式中，所述显示电压写入子电路包括数据写入晶体管T1，该数据写入晶体管T1的栅极形成为显示电压写入子电路510的控制端，数据写入晶体管T1 的第一极形成为显示电压写入子电路510的输入端，数据写入晶体管T1的第二极形成为显示电压写入子电路510的输出端。数据写入晶体管T1的栅极接收到第一电平信号时，该数据写入晶体管T1的第一极和该数据写入晶体管T1的第二极导通，数据写入晶体管T1的栅极接收到第二电平信号时，该数据写入晶体管T1的第一极和该数据写入晶体管T1第二极断开。
在本公开中，对存储子电路的具体结构也不做特殊的限制。在图5中所示的具体实施方式中，存储子电路520包括存储电容C1、第一存储控制晶体管T2和第二存储控制晶体管T3。
如图5中所示，存储电容C1的一端与显示电压写入子电路510的输出端相连，存储电容C1的另一端形成为存储子电路520的第一输出端。第一存储控制晶体管T2的栅极与第二存储控制晶体管T3的栅极相连，且形成为所述存储子电路的控制端，第一存储晶体管T2的第一极与存储电容C1的第一端相连，第一存储晶体管T2的第二极形成为存储子电路520的第三输出端。第二存储控制晶体管T3的第一极与存储电容C1的另一端相连，第二存储控制晶体管T3的第二极形成为存储子电路520的第二输出端。
第一存储控制晶体管T2的栅极接收到第一电平信号时，该第一存储控制晶体管T2的第一极与该第一存储控制晶体管T2的第二极导通，第一存储控制晶体管T2的栅极接收到第二电平信号时，该第一存储控制晶体管T2的第一极与该第一存储控制晶体管T2的第二极断开。
第二存储控制晶体管T3的栅极接收到第一电平信号时，该第二存储控制晶体管T3的第一极与该第二存储控制晶体管T3的第二极导通，第二存储控制晶体管T3的栅极接收到第二电平信号时，该第二存储控制晶体管T3的第一极与该第二存储控制晶体管T3的第二极断开。
作为本公开的第四个方面，提供一种显示面板，所述显示面板包括排列为多行多列的多个显示像素单元，每个显示像素单元内均设置有像素电路，其中，所述像素电路为本公开所提供的上 述像素电路，所述显示面板包括多条数据线DATA、多条第一扫描线SCAN1、多条第二扫描线SCAN2和多条第三扫描线SCAN3，每行像素单元中对应一条第一扫描线SCAN1，每行像素单元对应一条第二扫描线SCAN2，每行显示像素单元对应一条第三扫描线SCAN3。每列显示像素单元对应一条数据线DATA
具体地，同一行中的像素电路的显示电压写入子电路的控制端与相应的第一扫描线相连，同一行中的像素电路的存储子电路的控制端与相应的第二扫描线相连，同一行中的像素电路中的占空比控制子电路的控制端与相应的第三扫描线相连。
同一列像素电路的显示电压写入子电路的输入端与相应的数据线电连接。
可以利用本公开所提供的上述驱动方法驱动所述显示面板进行显示，在使得各个显示像素单元实现正常的灰阶显示的同时，可以降低显示面板的能耗。
作为本公开的第五个方面，提供一种显示装置，所述显示装置包括显示面板和驱动电路，其中，所述显示面板为本公开所提供的上述显示面板，所述驱动电路为本公开所提供的上述驱动电路，所述驱动电路的显示电压提供子电路与所述数据线电连接。
如上文中所述，所述显示装置在显示时，各个显示像素单元实现正常的灰阶显示的同时，可以降低显示面板的能耗。具体的，由于在一帧时间内，对应于灰阶值大于预定值的图像像素单元的显示像素单元的发光时间缩短，从而可以降低显示装置的能耗。并且，由于人眼的视觉延迟，通过分配显示像素单元的发光时间与不发光时间之间的比例，可以使人眼感受到与图像像素单元一致的灰阶。
本公开尤其适用于OLED显示装置。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的 保护范围。

Claims (14)

  1. 一种显示面板的驱动方法，其中，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，所述驱动方法包括在显示每一帧待显示图像时进行的以下步骤：
    检测待显示图像中各图像像素单元的灰阶值；
    判断各图像像素单元的灰阶值是否大于预定值；
    向所述显示面板上与灰阶值大于所述预定值的所述图像像素单元对应的显示像素单元提供预定显示电压，向所述显示像素单元提供所述预定显示电压的持续时间与相应的图像像素单元的灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
  2. 根据权利要求1所述的驱动方法，其中，所述显示像素单元的发光持续时间小于一帧图像的持续时间。
  3. 根据权利要求1所述的驱动方法，其中，所述驱动方法还包括：
    向所述显示面板上与灰阶值不大于所述预定值的图像像素单元对应的显示像素单元提供与所述图像像素单元的灰阶值相对应的灰阶电压。
  4. 一种显示面板的驱动电路，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，其中，所述驱动电路包括：
    灰阶检测子电路，所述灰阶检测子电路用于检测待显示图像中各图像像素单元的灰阶值；
    判断子电路，所述判断子电路用于将各图像像素单元的灰阶值与预定值进行比较，当图像像素单元的灰阶值大于预定值时生 成第一判定信号；
    显示电压提供子电路，所述显示电压提供子电路用于根据所述第一判定信号向与灰阶值大于预定值的图像像素单元对应的显示像素单元提供预定显示电压，并且在一帧内，所述预定显示电压持续的时间与大于预定值的图像像素单元的灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
  5. 根据权利要求4所述的驱动电路，其中，所述第一判定信号包括灰阶值大于预定值的图像像素单元的位置坐标。
  6. 根据权利要求4所述的驱动电路，其中，所述显示像素单元的发光持续时间小于一帧图像的持续时间。
  7. 根据权利要求4所述的驱动电路，其中，所述显示电压提供子电路还用于向所述显示面板上与灰阶值不大于所述预定值的图像像素单元对应的显示像素单元提供与所述图像像素单元的灰阶值相对应的灰阶电压。
  8. 一种像素电路，所述像素电路用于显示面板中，所述显示面板用于显示多帧待显示图像，所述待显示图像包括多个图像像素单元，所述显示面板包括多个显示像素单元，每个所述显示像素单元中均设置有所述像素电路，
    所述像素电路包括显示电压写入子电路、存储子电路、驱动晶体管和发光元件，
    所述显示电压写入子电路的输入端与数据线相连，所述显示电压写入子电路的输出端与存储子电路的输入端相连，所述显示电压写入子电路的第一控制端与第一扫描信号线相连；
    所述存储子电路的第一输出端与所述驱动晶体管的栅极相连，所述存储子电路的第二输出端与所述驱动晶体管的第二极相 连，所述存储子电路的控制端用于与第二扫描信号线相连；
    所述驱动晶体管的第二极与高电平信号端相连，其中，
    所述存储子电路的第三输出端与所述发光元件的阳极相连，
    所述像素电路还包括占空比控制子电路，所述占空比控制子电路的控制端用于与第三扫描信号线相连，所述占空比控制子电路的输入端与所述驱动晶体管的第二极相连，所述占空比控制子电路的输出端与所述发光元件的阳极相连，所述占空比控制子电路的控制端接收到第一电平信号时，该占空比控制子电路的输入端与输出端导通，其中，在一帧所持续的时间中，所述第一电平信号的持续时间与所述像素电路对应的图像像素单元的灰阶值正相关，所述预定显示电压低于按照所述预定值驱动所述显示像素单元时的电压。
  9. 根据权利要求8所述的像素电路，其中，所述占空比控制子电路包括占空比控制晶体管，所述占空比控制晶体管的栅极形成为所述占空比控制子电路的控制端，所述占空比控制晶体管的第一极形成为所述占空比控制子电路的输入端，所述占空比控制晶体管的第二极形成为所述占空比控制子电路的输出端。
  10. 根据权利要求9所述的像素电路，其中，所述占空比控制晶体管的栅极接收到第二电平信号时，所述占空比控制晶体管的第一极和所述占空比控制晶体管的第二极断开。
  11. 根据权利要求8所述的像素电路，其中，所述显示电压写入子电路包括数据写入晶体管，所述数据写入晶体管的栅极形成为所述显示电压写入子电路的控制端，所述数据写入晶体管的第一极形成为所述显示电压写入子电路的输入端，所述数据写入晶体管的第二极形成为所述显示电压写入子电路的输出端。
  12. 根据权利要求8至11中任意一项所述的像素电路，其中， 所述存储子电路包括存储电容、第一存储控制晶体管和第二存储控制晶体管，
    所述存储电容的一端与所述显示电压写入子电路的输出端相连，所述存储电容的另一端形成为所述存储子电路的第一输出端；
    所述第一存储控制晶体管的栅极与所述第二存储控制晶体管的栅极相连，且形成为所述存储子电路的控制端，所述第一存储晶体管的第一极与所述存储电容的第一端相连，所述第一存储晶体管的第二极形成为所述存储子电路的第三输出端；
    所述第二存储控制晶体管的第一极与所述存储电容的另一端相连，所述第二存储控制晶体管的第二极形成为所述存储子电路的第二输出端。
  13. 一种显示面板，所述显示面板包括排列为多行多列的多个显示像素单元，每个显示像素单元内均设置有像素电路，其中，所述像素电路为权利要求8至12中任意一项所述的像素电路，所述显示面板包括多条第一扫描线、多条第二扫描线和多条第三扫描线，每行像素单元对应一条第一扫描线，每行像素单元对应一条第二扫描线，每行显示像素单元对应一条第三扫描线，
    同一行中的像素电路的显示电压写入子电路的控制端与相应的第一扫描线相连，同一行中的像素电路的存储子电路的控制端与相应的第二扫描线相连；同一行中的像素电路中的占空比控制子电路的控制端与相应的第三扫描线相连。
  14. 一种显示装置，所述显示装置包括显示面板和驱动电路，其中，所述显示面板为权利要求13所述的显示面板，所述驱动电路为权利要求4至7中的任一项所述的驱动电路，所述驱动电路的显示电压提供子电路与所述数据线电连接。。
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