WO2019061214A1 - Transistor device with integrated diode - Google Patents
Transistor device with integrated diode Download PDFInfo
- Publication number
- WO2019061214A1 WO2019061214A1 PCT/CN2017/104179 CN2017104179W WO2019061214A1 WO 2019061214 A1 WO2019061214 A1 WO 2019061214A1 CN 2017104179 W CN2017104179 W CN 2017104179W WO 2019061214 A1 WO2019061214 A1 WO 2019061214A1
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- WO
- WIPO (PCT)
- Prior art keywords
- region
- transistor
- gate
- diode
- transistor device
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
Definitions
- the present invention relates to the field of semiconductor devices, and more particularly to a transistor device having an integrated diode.
- a freewheeling diode needs to be connected in parallel to the switching device. If the device itself has reverse-conduction capability, the reverse-conduction diode of the device itself can be used instead of the freewheeling diode, which reduces the number of components, reduces the cost, and reduces the parasitic capacitance of the system.
- Transistor, GaN HEMT devices do not have body diodes.
- the off state if a negative voltage is applied to the drain 100, the relative voltage between the gate 105 and the drain 100 is greater than the threshold voltage of the device. Then the channel of the device is turned on and the device is reversed.
- the reverse conducting voltage of the device is related to the threshold voltage of the device. If the threshold voltage of the device is large, the reverse conducting voltage of the device is large. For an enhanced power-off device, it is often desirable to have a higher threshold voltage (greater than IV) and a lower reverse-conduction voltage. On the other hand, in many applications, it is necessary to apply a negative voltage to the gate to turn off. If the gate voltage is negative, the reverse conducting voltage of the device is further increased.
- the present invention provides a transistor device having an integrated diode including a diode region, a transistor region and an isolation region, the diode region having a plurality of anodes, the transistor region having a gate, a drain and a plurality of a source, the plurality of sources are arranged along a length parallel to the drain, the drain and the source are divided Don't be located on both sides of the gate.
- the source is electrically connected to the anode and is used as the source of the transistor device.
- the isolation region is located between the diode region and the transistor region. The diode region and the transistor region are electrically isolated through the isolation region.
- a preferred solution is that the first end of the isolation region extends to a side of the gate adjacent to the drain, and the second end of the isolation region extends to a side of the source remote from the drain.
- a preferred solution is that the first end of the isolation region extends to a region between the gate and the drain, and the second end of the isolation region extends to a side of the source away from the drain.
- the diode region has at least two anodes, and the transistor region has at least two sources
- a preferred solution is that the anode and the source are alternately arranged, and the adjacent anode and the gate are electrically isolated by the isolation region.
- a preferred solution is to use the anode of the heterojunction Schottky diode or the anode of the trench Schottky diode as the anode of the diode region.
- a preferred solution is that the source of the field effect transistor is electrically connected to the gate of the field effect transistor and serves as the anode of the diode region.
- the gate is a junction gate or a metal dielectric gate or a trench gate or a fluoride ion treated gate.
- the gate voltage of the transistor device of the present invention is greater than the threshold voltage ⁇ , if a forward voltage is applied to the drain, the transistor device is turned on through the transistor region. If a negative voltage is applied to the drain, the diode region is turned on first and the current is not turned off by the gate of the transistor region, so the reverse conducting voltage of the transistor device is not limited by the threshold voltage of the transistor device. When a negative voltage is applied to the gate to turn off the transistor device, the reverse conducting voltage is also not limited by the gate negative voltage. In addition, the diode region and the transistor region share an access region between the gate and the drain, thereby reducing the forward conduction resistance and reverse conduction resistance of the transistor device.
- FIG. 1 is a schematic structural view of a conventional gallium nitride high electron mobility transistor.
- FIG. 2 is a schematic structural view of an embodiment of a transistor device of the present invention.
- FIG. 3 is a cross-sectional view taken along line A-A of FIG. 2.
- FIG. 4 is a cross-sectional view taken along line B-B of FIG. 2.
- FIG. 5 is a schematic diagram showing the current flow inside the transistor device after the gate voltage of the transistor device embodiment of the present invention is greater than the threshold voltage ⁇ after the forward voltage is applied to the drain.
- FIG. 6 is a transistor device embodiment of the present invention, when the transistor device is turned off, after a negative voltage is applied to the drain.
- the gallium nitride high electron mobility transistor (GaN HEMT) device of the present embodiment includes a diode region, a transistor region, and an isolation region 16, the diode region has a plurality of anodes 11, and the transistor region has a gate electrode 15 a drain 10 and a plurality of sources 12, a plurality of sources 12 are arranged along a length direction parallel to the drain 10, and a drain 10 and a source 12 are respectively located on both sides of the gate 15, the source 12 and the anode 11 is electrically connected as a source of the transistor device of the present invention having an integrated diode, and the gate 15 serves as the gate of the transistor device of the present invention, and the drain 10 serves as the drain of the transistor device of the present invention.
- GaN HEMT gallium nitride high electron mobility transistor
- the isolation region 16 is located between the diode region and the transistor region, and the diode region and the transistor region are electrically isolated by the isolation region 16. When a voltage ⁇ less than the threshold voltage is applied to the gate 15, the channel region of the diode region from the anode 11 to the drain 10 of the transistor device remains conductive.
- the first end of the isolation region 16 extends to a region between the gate 15 and the drain 10, and does not extend to the drain 10, that is, a distance between the first end of the isolation region 16 and the drain 10.
- the second end of isolation region 16 extends to the side of source region 12 of the transistor region that is remote from the drain.
- the first end of the isolation region 16 may also extend only to the side of the gate 15 close to the drain.
- the anode 11 of the diode region is alternately arranged with the source 12 of the transistor region and arranged along the length direction parallel to the drain 10, and the adjacent two anodes 11 and 12 are electrically isolated by the isolation region 16.
- the isolation region 16 can eliminate the formation of conductive channels in the region by ion implantation or etching.
- the transistor device of the present invention is an enhanced power switching device which is an epitaxial multilayer structure fabricated on a substrate 121, including a substrate 121 and on a substrate 121.
- a transition layer 122, a channel layer 123, a barrier layer 124, and a dielectric layer 125, which are sequentially grown from bottom to top, a source 12 and a drain 10 of the transistor region, and an anode 11 of the diode region are formed over the barrier layer 124 and are located
- the barrier layer 124 is between the dielectric layer 125 and the dielectric layer 125.
- a P-type gallium nitride layer 13 (p-GaN) is further formed between the barrier layer 124 and the dielectric layer 125.
- the gate 15 of the transistor region is formed over the P-type gallium nitride layer 13, and the dielectric layer 125 is P-type.
- a gate metal contact hole 14 is provided above the gallium nitride layer 13, and the gate electrode 15 has a downward extending portion which passes through the gate metal contact hole 14 and is connected to the P-type gallium nitride layer 13.
- FIG. 3 is a schematic structural view of a diode region in a transistor device.
- the anode 11 of the diode in this embodiment is an anode of a heterojunction Schottky diode.
- the diode anode 11 can also adopt the anode of the trench type Schottky diode, and the source of the field effect transistor can be electrically connected to the gate of the field effect transistor as the anode 11 of the diode region, or other Diode anode structure.
- FIG. 4 is a schematic structural diagram of a transistor region in a transistor device.
- the gate 15 of the transistor region in this embodiment adopts a junction gate structure.
- the gate 15 of the transistor region can also be processed by a metal dielectric gate (MIS gate) or a trench gate or fluoride ion. Over the gate or other gate structure.
- MIS gate metal dielectric gate
- a trench gate or fluoride ion Over the gate or other gate structure.
- the reverse conducting voltage of the transistor device is not limited by the threshold voltage of the transistor device and is not limited by the negative voltage of the gate 15.
- the diode region has at least two anodes 11 and the transistor region has at least two sources 12, the plurality of sources 12 being arranged along a length direction parallel to the drain 10, the specific number of anodes 11 and sources 12 Depending on the desired current level, the higher the current level, the greater the number of anodes 11 and sources 12.
- the gate voltage of the transistor device with integrated diode of the present invention is greater than the threshold voltage ⁇
- the transistor device if a forward voltage is applied to the drain, the transistor device is turned on through the transistor region. If a negative voltage is applied to the drain, the diode region is turned on first, and the current is not turned off by the gate of the transistor region, so the transistor
- the reverse conducting voltage of the device is not limited by the threshold voltage of the transistor device, so the reverse conducting voltage of the transistor device can be designed independently of the threshold voltage. And even if a negative voltage is applied to the gate of the transistor device to turn off, the reverse conducting voltage of the transistor device is not affected.
- the diode region and the transistor region share an access region between the gate and the drain, thereby reducing the forward conduction resistance and the reverse conduction resistance of the transistor device.
- the transistor device of the present invention adopts a structure in which an anode and a source are alternately arranged and electrically isolated by an isolation region, so that a diode region and a transistor region share an access region between a gate and a drain, so that the transistor device is reversed.
- the conduction voltage is not only limited by the threshold voltage, but also is not affected by the negative voltage applied to the gate.
- the forward conduction resistance and the reverse conduction resistance of the transistor device are reduced, and the enhanced power device is improved. Performance, with good industrial applicability.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710894561.4 | 2017-09-28 | ||
CN201710894561.4A CN107482006B (en) | 2017-09-28 | 2017-09-28 | Transistor device with integrated diode |
Publications (1)
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WO2019061214A1 true WO2019061214A1 (en) | 2019-04-04 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/CN2017/104179 WO2019061214A1 (en) | 2017-09-28 | 2017-09-29 | Transistor device with integrated diode |
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CN (1) | CN107482006B (en) |
WO (1) | WO2019061214A1 (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN202205747U (en) * | 2010-12-28 | 2012-04-25 | 成都芯源系统有限公司 | Semiconductor device with a plurality of transistors |
CN103730464A (en) * | 2012-10-16 | 2014-04-16 | 浙江大学苏州工业技术研究院 | Semiconductor device with integratable fly-wheel diode, and manufacturing method of semiconductor device |
CN104201201A (en) * | 2014-09-16 | 2014-12-10 | 电子科技大学 | Self-adaption biased field plate for GaN-based HEMT (high electron mobility transistor) device |
CN105720053A (en) * | 2014-12-17 | 2016-06-29 | 英飞凌科技奥地利有限公司 | Semiconductor Device and Method |
CN207217534U (en) * | 2017-09-28 | 2018-04-10 | 英诺赛科(珠海)科技有限公司 | Transistor device with integrated diode |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4351745B2 (en) * | 1997-09-19 | 2009-10-28 | 株式会社東芝 | Semiconductor device |
US6593620B1 (en) * | 2000-10-06 | 2003-07-15 | General Semiconductor, Inc. | Trench DMOS transistor with embedded trench schottky rectifier |
CN102054774B (en) * | 2009-10-28 | 2012-11-21 | 无锡华润上华半导体有限公司 | VDMOS (vertical double diffused metal oxide semiconductor) transistor compatible LDMOS (laterally diffused metal oxide semiconductor) transistor and manufacturing method thereof |
CN102339827B (en) * | 2010-07-16 | 2013-05-08 | 茂达电子股份有限公司 | Integration of metal-oxide-semiconductor field-effect transistor (MOSFET) and Schottky diode and method for manufacturing same |
US8742460B2 (en) * | 2010-12-15 | 2014-06-03 | Transphorm Inc. | Transistors with isolation regions |
KR20130004707A (en) * | 2011-07-04 | 2013-01-14 | 삼성전기주식회사 | Nitride semiconductor device, manufacturing method thereof and nitride semiconductor power device |
US9129990B2 (en) * | 2012-06-29 | 2015-09-08 | Freescale Semiconductor, Inc. | Semiconductor device and driver circuit with drain and isolation structure interconnected through a diode circuit, and method of manufacture thereof |
-
2017
- 2017-09-28 CN CN201710894561.4A patent/CN107482006B/en active Active
- 2017-09-29 WO PCT/CN2017/104179 patent/WO2019061214A1/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN202205747U (en) * | 2010-12-28 | 2012-04-25 | 成都芯源系统有限公司 | Semiconductor device with a plurality of transistors |
CN103730464A (en) * | 2012-10-16 | 2014-04-16 | 浙江大学苏州工业技术研究院 | Semiconductor device with integratable fly-wheel diode, and manufacturing method of semiconductor device |
CN104201201A (en) * | 2014-09-16 | 2014-12-10 | 电子科技大学 | Self-adaption biased field plate for GaN-based HEMT (high electron mobility transistor) device |
CN105720053A (en) * | 2014-12-17 | 2016-06-29 | 英飞凌科技奥地利有限公司 | Semiconductor Device and Method |
CN207217534U (en) * | 2017-09-28 | 2018-04-10 | 英诺赛科(珠海)科技有限公司 | Transistor device with integrated diode |
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CN107482006A (en) | 2017-12-15 |
CN107482006B (en) | 2019-03-15 |
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