Classifications

• • C—CHEMISTRY; METALLURGY
  • C12—BIOCHEMISTRY; BEER; SPIRITS; WINE; VINEGAR; MICROBIOLOGY; ENZYMOLOGY; MUTATION OR GENETIC ENGINEERING
  • C12Q—MEASURING OR TESTING PROCESSES INVOLVING ENZYMES, NUCLEIC ACIDS OR MICROORGANISMS; COMPOSITIONS OR TEST PAPERS THEREFOR; PROCESSES OF PREPARING SUCH COMPOSITIONS; CONDITION-RESPONSIVE CONTROL IN MICROBIOLOGICAL OR ENZYMOLOGICAL PROCESSES
  • C12Q1/00—Measuring or testing processes involving enzymes, nucleic acids or microorganisms; Compositions therefor; Processes of preparing such compositions
  • C12Q1/68—Measuring or testing processes involving enzymes, nucleic acids or microorganisms; Compositions therefor; Processes of preparing such compositions involving nucleic acids
  • C12Q1/6869—Methods for sequencing
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
  • G01N33/00—Investigating or analysing materials by specific methods not covered by groups G01N1/00 - G01N31/00
  • G01N33/48—Biological material, e.g. blood, urine; Haemocytometers
  • G01N33/483—Physical analysis of biological material
  • G01N33/487—Physical analysis of biological material of liquid biological material
  • G01N33/48707—Physical analysis of biological material of liquid biological material by electrical means
  • G01N33/48721—Investigating individual macromolecules, e.g. by translocation through nanopores

Definitions

• FIG. 3 illustrates an embodiment of a nanopore cell performing nucleotide sequencing using a nanopore-based sequencing-by-synthesis (Nano- SBS) technique.
• FIG. 4 illustrates a double-layer capacitor formed at an interface between a conductive electrode and an adjacent liquid electrolyte.
• FIG. 11 illustrates example AC step signals for measuring a double-layer capacitance using a step response capacitance measurement technique, according to certain embodiments.
• FIG. 4 illustrates a double-layer capacitor 430 that is formed at an interface between a conductive electrode 410 (e.g., working electrode 110 , 202, or 302) and an adjacent liquid electrolyte 420 (e.g., bulk electrolyte 114, 208, or 308).
• a conductive electrode may be made of metals or other materials that are resistant to corrosion and oxidation, such as, for example, platinum, gold, titanium nitride, and graphite.
• the conductive electrode may be a platinum electrode with electroplated platinum.
• the conductive electrode may be a titanium nitride (TiN) working electrode.
• the conductive electrode may be porous.
• the conductive electrode may be formed by disposing a porous
• Electrical model 622 also includes a capacitor Cdbi 624 having a double-layer capacitance caw and representing the electrical properties of working electrode 602 and the well (e.g., well 205) of the cell.
• Working electrode 602 may be configured to apply a distinct potential independent from the working electrodes in other nanopore cells.
• the rate of change of the voltage level on the integrating capacitor may be governed by the value of the resistance of the bilayer, which may include the nanopore, which may in turn include a molecule (e.g., a tag of a tagged nucleotides) in the nanopore.
• the voltage level can be measured at a predetermined time after switch 601 opens.
• FIG. 7 shows a few measurement samples in a bright or dark period for ease of illustration. More or less measurement samples may be captured in each period. For example, tens of samples or even hundreds of samples may be captured in a bright or dark period. It is also noted that some other control signals may be used for the sequencing but may not be shown in FIG. 7. It is further noted that, in some implementations, reference voltage Viiq 710 may be at a constant level while voltage source V pre may be an AC signal.
• the rate of the decay of the voltage on integrating capacitor Cint 608 may be determined in different ways. As explained above, the rate of the voltage decay may be determined by measuring a voltage decay during a fixed time interval. For example, the voltage on integrating capacitor Cint 608 may be first measured by
• the decay of voltage level on the double-layer capacitor Cdbi or integrating capacitor Cint may have a time constant ⁇ determined by x ⁇ r p0 reCdbi.
• the time constant and thus Cdbi may be determined with a known r pOT e.
• the time constant, rather the double-layer capacitance may be used for the normalization because the decay is also affected by the resistance of the pore resistor R pOT e.
• the decay time may be determined by measuring the changes of the current flowing through double-layer capacitor Cdbi and pore resistor R pOT e over time.
• FIG. 14 illustrates the correlation between double-layer capacitance measured using electrochemical impedance spectroscopy (EIS) and decay time measured using the step response capacitance measurement technique.
• EIS electrochemical impedance spectroscopy
• x-axis represents the average double-layer capacitance (in pF per cell) measured for a nanopore chip using EIS.
• Y-axis represents the decay time measured for individual cells on a corresponding nanopore chip using SRCM technique, where the distribution of the decay time measured for individual cells on a nanopore chip is represented by a mean value and a standard deviation value.
• FIG. 14 shows that the Pearson correlation coefficient of the correlation between the average double-layer capacitance on a nanopore chip measured using EIS and the statistical mean value of the 50% positive decay time pos_50 (in blue) measured for individual cells on a corresponding nanopore chip measured using the SRCM technique is very close to 1 (about 0.987).
• FIG. 14 also shows that the Pearson correlation coefficient of the correlation between the average double-layer capacitance on a nanopore chip measured using EIS and the statistical mean value of the 75%) positive decay time pos_75 (in green) measured for individual cells on a corresponding nanopore chip measured using the SRCM technique is about 0.931.
• the correlation may thus be used to determine the capacitance value based on the measured decay time.
• a voltage level may be applied to the buffer, for example, through a counter electrode. Another voltage level may be applied to the other surface of the working electrode through an electrical circuit.
• an initial voltage potential difference
• a switching capacitor circuit may use a switching capacitor (e.g., the integrating capacitor) with a known capacitance value and initial voltage level to repeatedly charge or discharge the double-layer capacitor in each charge or discharge cycle.
• FIG. 18 illustrates example simulation results of charge titration capacitance measurement for different capacitance ratios between the capacitance of double-layer capacitor Cdbi and the capacitance of switching capacitor Cint, according to certain embodiments.
• the voltage level on double-layer capacitor Cdbi may be increased gradually after each charging cycle.
• the time constant for the charging may be proportional to the ratio between the capacitance of double-layer capacitor Cdbi and the capacitance of switching capacitor Cint, and may be inversely proportional to the rate of the charging cycles.
• the operations at blocks 1930 and 1940 may be performed repeatedly for multiple iterations to more accurately determine the ratio between the capacitance of the double-layer capacitor and the capacitance of the switching capacitor and thus the capacitance of the double-layer capacitor.
• Each iteration providing a measurement of the capacitance. For example, rather than using one data point on the simulated curves shown in FIG. 18 (which may be susceptible to noise), a number of measurements and capacitance ratio

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• 2018
  • 2018-09-21 CN CN201880060869.1A patent/CN111212919B/zh active Active
  • 2018-09-21 EP EP18778427.7A patent/EP3684953A1/en active Pending
  • 2018-09-21 JP JP2020516452A patent/JP7005751B2/ja active Active
  • 2018-09-21 WO PCT/EP2018/075599 patent/WO2019057890A1/en unknown

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