WO2019052034A1 - 显示装置及其显示面板 - Google Patents

显示装置及其显示面板 Download PDF

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WO2019052034A1
WO2019052034A1 PCT/CN2017/115242 CN2017115242W WO2019052034A1 WO 2019052034 A1 WO2019052034 A1 WO 2019052034A1 CN 2017115242 W CN2017115242 W CN 2017115242W WO 2019052034 A1 WO2019052034 A1 WO 2019052034A1
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oxide semiconductor
field effect
semiconductor field
metal oxide
effect transistor
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PCT/CN2017/115242
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English (en)
French (fr)
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何怀亮
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惠科股份有限公司
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Publication of WO2019052034A1 publication Critical patent/WO2019052034A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

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  • the present application relates to the field of display technologies, and in particular, to a display device and a display panel thereof.
  • the principle of grayscale display of a liquid crystal display (LCD) screen is that a source driver sends a signal to a Thin Film Transistor (TFT) to control the angle at which the liquid crystal rotates. Since the number of channels of the source driver is large, the length of the wire output from the same source driver to the TFT is large. This difference causes the source driver to actually charge differently into the TFT.
  • the traditional solution to this problem is to make the shorter wires of the wires connecting the same source driver into S-shaped wires to ensure that each wire on the same source driver has the same length. In this way, when the number of channels of the source driver is more and more, the S-shaped winding needs to be longer and longer, which leads to an increase in the required space, and thus the requirement of a narrow bezel cannot be realized.
  • a display panel comprising:
  • a driving circuit comprising a plurality of outputs for outputting a plurality of data signals
  • An amplifying circuit the number of the amplifying circuits being the same as the number of outputs of the driving circuit and one-to-one correspondence; an input end of each of the amplifying circuits is connected to an output end of the driving circuit, and each of the amplifying circuits The output end is connected to a corresponding one of the data lines through a wire; the thrust outputted by each of the amplifying circuits is positively correlated with the length of the corresponding wire.
  • a display device includes the above display panel.
  • a display panel comprising:
  • a source driver circuit including a plurality of outputs for outputting multiple data signals
  • An amplifying circuit the number of the amplifying circuits being the same as the number of outputs of the source driving circuit and one-to-one correspondence; an input end of each of the amplifying circuits is connected to an output end of the source driving circuit, each The output end of the amplifying circuit is connected to a corresponding one of the data lines through a wire; the thrust outputted by each of the amplifying circuits is positively correlated with the length of the corresponding wire;
  • the amplifying circuit includes an output stage and an amplifying stage; the output stage is composed of a transistor; a channel width-to-length ratio of a transistor of an output stage of the amplifying circuit connected in series at each output terminal is positively correlated with a length of a corresponding wire; The amplification stage is coupled between the output and the output stage.
  • a plurality of data lines and a driving unit are disposed on the substrate of the display panel.
  • the driving unit includes a driving circuit and an amplifying circuit.
  • the driving circuit includes a plurality of output terminals, each of which is connected in series with the corresponding one of the data lines.
  • the thrust provided by the amplifier circuit connected in series with each output is positively correlated with the length of the corresponding wire, so that the long wire is matched with the output circuit with large output thrust, and the short wire is matched with the output circuit with small output thrust, thereby ensuring each The rise time of the output voltage of one channel is the same, which ensures the normal display of the screen and facilitates the narrow frame of the display device.
  • FIG. 1 is a schematic structural view of a display panel in an embodiment
  • FIG. 2 is a schematic view showing a channel width to length ratio of a MOS transistor in an embodiment
  • FIG. 3 is a block diagram showing the structure of an amplifying circuit in an embodiment
  • FIG. 4 is a circuit schematic diagram of an amplifying circuit in an embodiment.
  • FIG. 1 is a schematic structural view of a display panel in an embodiment.
  • the display device may be a liquid crystal display (LCD), an organic light emitting display (OLED), a Quantum Dot Light Emitting Diodes Display (QLED), etc., and the display device may also be A flat display device or a curved display device. It will be understood that the types of display devices include, but are not limited to, the above examples.
  • the display device is an LCD display device, it may be an LCD display device such as a TN, OCB or VA type.
  • the display panel includes a substrate (which may also be referred to as an array substrate) 110 and a driving unit 130.
  • the material of the substrate 110 may be transparent glass or transparent plastic.
  • a plurality of data lines 120 are disposed on the substrate 110. It can be understood that other components for realizing its functions, such as the scan line 140, may be disposed on the substrate 110.
  • Scan line 140 and data line 120 define a plurality of pixel regions 150.
  • a pixel unit is formed on each of the pixel regions 150.
  • a switching element 160 is disposed in each of the pixel units, so that the degree of opening of the switching element 160 is controlled by the driving unit 130, thereby realizing control of the rotation angle of the liquid crystal in the display panel.
  • switching element 160 is a transistor having a gate coupled to scan line 140 and a source coupled to data line 120.
  • the switching element 160 is a thin film transistor (TFT).
  • the scan line 140 is connected to the scan driving circuit 170. That is, in the present embodiment, the driving unit 130 is a source driving unit. In other embodiments, the source driving unit and the scanning driving unit may be integrated in the same driving unit.
  • the number of driving units 130 may be determined according to the number of data lines 120 and the number of channels to which each driving unit 130 is connected.
  • Each of the driving units 130 includes a driving circuit 132 and a plurality of amplifying circuits 134.
  • the driving unit 130 is a source driving unit, and the driving circuit 132 included therein is a source driving circuit.
  • the drive circuit 132 ie, the source drive circuit
  • the scan drive circuit 170 may both be integrated in the drive unit 130.
  • the driving circuit 132 includes a plurality of output terminals, each of which is connected in series with the amplifying circuit 134 and connected to a corresponding one of the data lines 120 via a wire 136 to provide a data signal to the data line 120. Due to the difference in position of the data line 120 relative to the drive circuit 132, the length of the wire 136 between the connection drive circuit 132 and the data line 120 is also different.
  • the thrust provided by the amplifying circuit 134 connected to each output terminal is positively correlated with the length of the corresponding wire 136, that is, each of the amplifying circuits 134 in the driving unit 130 has a different output thrust, and it provides The thrust varies with the length of the corresponding wire 136.
  • the magnitude of the output thrust can be characterized by the magnitude of the output current.
  • a larger output current indicates a larger output thrust
  • a smaller output current indicates a smaller output thrust.
  • the amplifying circuit 134 corresponding to the shorter wire 136 is a discharging circuit that provides a smaller thrust
  • the amplifying circuit 134 corresponding to the longer wire 136 is a discharging circuit that provides a larger thrust, thereby ensuring an increase in the output voltage of each channel.
  • the time is the same, which can effectively avoid the difference of parasitic resistance and capacitance caused by the unequal length of the wires 136, thereby ensuring that the uniformity of the picture is good, so that the picture can be normally displayed.
  • the use of the above display device eliminates the need to arrange the wires 136 to the same length, which can greatly save the space required for the wires 136, and is advantageous for achieving a narrow frame of the display device.
  • the output thrust of each amplifying circuit 134 can be adjusted by adjusting its own structure to achieve an adjustment of its equivalent resistance.
  • the amplification circuit 134 includes an output stage that is comprised of transistors. The adjustment of the output thrust is achieved by adjusting the channel width to length ratio of the transistors of the output stage of the amplifying circuit 134.
  • the output stage can be comprised of a MOS transistor. The adjustment of the output thrust is achieved by adjusting the channel width to length ratio (as shown in FIG. 2) of the MOS transistor in the output stage of the amplifying circuit 134.
  • the channel width to length ratio (W/L) of the MOS transistor is positively correlated with its output thrust current.
  • the channel width to length ratio of the MOS transistor is proportional to its output thrust, that is, proportional to the length of the corresponding wire 136. Therefore, in the above substrate, the width of the channel of the MOS tube corresponding to the longer wire 136 is large; the width of the channel of the MOS tube corresponding to the shorter wire 136 is relatively small.
  • Fig. 3 is a block diagram showing the structure of an amplifying circuit in an embodiment.
  • the amplification circuit includes an amplification stage 310 and an output stage 320.
  • the amplification stage 310 is configured to perform amplification processing on the data signal output by the driving unit, and then output through the output stage 320.
  • the data signals output by the output terminals of the drive unit are the same.
  • the amplification stages 310 of the respective amplification circuits have the same structure, that is, the data signals output by the respective amplification stages 310 are the same.
  • the output stage 320 is then used to provide different thrusts to the amplified data signals such that the voltage rise time on each of the wires is the same.
  • the amplification stage 310 employs a differential amplification stage.
  • the amplification stage 310 includes a current mirror load, a differential amplification input pair tube, and a bias circuit.
  • the current mirror load acts as a differential amplification on the tube load, and the bias circuit is used to provide a bias current to the differential amplification tube.
  • the current mirror load includes a first MOS transistor M1 and a second MOS transistor M2
  • the differential amplification input pair tube includes a third MOS transistor M3 and a fourth MOS transistor M4.
  • the bias circuit includes a fifth MOS transistor M5.
  • the input end of the first MOS transistor M1 is connected to the input terminal of the second MOS transistor M2 and is connected to the input power source VDD.
  • the control end of the first MOS transistor M1 is connected to the control terminal of the second MOS transistor M2 and is connected to the output terminal of the first MOS transistor M1.
  • the output end of the first MOS transistor M1 is connected to the input end of the third MOS transistor M3.
  • the output end of the third MOS transistor M3 is connected to the output terminal of the fourth MOS transistor M4 and to the input terminal of the fifth MOS transistor M5.
  • the output end of the fifth MOS transistor M5 is grounded.
  • the control terminal of the fifth MOS transistor M5 is for receiving the bias voltage VBias.
  • the control terminal of the third MOS transistor M3 serves as the output terminal Vout of the differential amplification stage.
  • the input end of the fourth MOS transistor M4 is connected to the output end of the second MOS transistor M2.
  • the control terminal of the fourth MOS transistor M4 serves as the input terminal Vin of the differential amplification stage.
  • the output stage 320 includes a sixth MOS transistor M6 and a seventh MOS transistor M7.
  • the input terminal of the sixth MOS transistor M6 is connected to the input power source VDD.
  • the control terminal of the sixth MOS transistor M6 is connected to the output terminal of the second MOS transistor M2.
  • the output ends of the sixth MOS transistor M6 are respectively connected to the control terminals of the third MOS transistor M3 and the input terminals of the seventh MOS transistor M7.
  • the control terminal of the seventh MOS transistor M7 is connected to the control terminal of the fifth MOS transistor M5.
  • the output end of the seventh MOS transistor M7 is grounded.
  • the first MOS transistor M1, the second MOS transistor M2, and the sixth MOS transistor M6 are all PMOS transistors; the third MOS transistor M3, the fourth MOS transistor M4, the fifth MOS transistor M5, and the seventh MOS transistor M7 is an NMOS tube.
  • the types of MOS transistors can also be changed as needed.
  • the driving unit 130 further includes a source driving chip.
  • the driving circuit 132 and the amplifying circuit 134 are both integrated in the source driving chip, so that the mounting operation can be greatly simplified.
  • the display panel further includes a color filter substrate, and a liquid crystal layer formed between the substrate 110 and the color filter substrate.
  • An embodiment of the present application further provides a display device including the display panel according to any of the foregoing embodiments.
  • a display panel including the display panel according to any of the foregoing embodiments.
  • the display device is, for example, an LCD (Liquid Crystal Display) display device, an OLED (Organic Light-Emitting Diode) display device, a QLED (Quantum Dot Light Emitting Diodes) display device, a curved display device, or other display device.
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • QLED Quadantum Dot Light Emitting Diodes

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板，包括：基板(110)，基板(110)上设置有多条数据线(120)；以及驱动单元(130)，包括：驱动电路(132)，包括多个输出端以输出多路数据信号；和放大电路(134)；放大电路(134)的数量与驱动电路(132)的输出端的数量相同且一一对应；每个放大电路(134)的输入端与驱动电路(132)的一个输出端连接，每个放大电路(134)的输出端通过导线与对应的一条数据线(120)连接；每个放大电路(134)输出的推力与相应的导线的长度呈正相关关系。

Description

显示装置及其显示面板
相关申请的交叉引用
本申请要求于2017年09月18日提交中国专利局、申请号为201721200325X、申请名称为“显示装置及其显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别是涉及一种显示装置及其显示面板。
背景技术
显示装置(Liquid Crystal Display，LCD)画面灰阶产生的原理是源极驱动器(Data Driver)将讯号送到薄膜晶体管阵列(Thin Film Transistor，TFT)内来控制液晶旋转的角度。由于源极驱动器的通道数较多，同一源极驱动器输出到TFT的导线长度差异大。这种差异会导致源极驱动器真正充到TFT内的电荷不同。传统的解决该问题的办法是，将连接同一源极驱动器的导线中较短的导线做成S形绕线，以确保同一源极驱动器上的每一根导线都具有相同的长度。采用这种方法，当源极驱动器的通道数越来越多，S形绕线就需要越来越长，从而导致所需要的空间越来越大，进而无法实现窄边框的需求。
发明内容
基于此，有必要提供一种有利于实现窄边框的显示装置及其显示面板。
一种显示面板，包括：
基板，所述基板上设置有多条数据线；以及
驱动单元，包括：
驱动电路，包括多个输出端以输出多路数据信号；和
放大电路；所述放大电路的数量与所述驱动电路的输出端的数量相同且一一对应；每个所述放大电路的输入端与所述驱动电路的一个输出端连接，每个所述放大电路的输出端通过导线与对应的一条数据线连接；每个所述放大电路输出的推力与相应的导线的长度呈正相关关系。
一种显示装置，包括上述的显示面板。
一种显示面板，包括：
基板，所述基板上设置有多条数据线；
源极驱动电路，包括多个输出端以输出多路数据信号；以及
放大电路；所述放大电路的数量与所述源极驱动电路的输出端的数量相同且一一对应；每个所述放大电路的输入端与所述源极驱动电路的一个输出端连接，每个所述放大电路的输出端通过导线与对应的一条数据线连接；每个所述放大电路输出的推力与相应的导线的长度呈正相关关系；
所述放大电路包括输出级和放大级；所述输出级由晶体管构成；每个输出端串联的所述放大电路的输出级的晶体管的沟道宽长比与相应的导线的长度呈正相关关系；所述放大级连接于所述输出端和所述输出级之间。
上述显示面板的基板上设置有多条数据线和驱动单元。驱动单元包括驱动电路和放大电路。驱动电路包括多个输出端，每个输出端串联所述放大电路后通过与对应的一条数据线连接。其中，每个输出端串联的放大电路提供的推力与相应的导线的长度呈正相关关系，从而使得长的导线搭配输出推力大的放大电路，短的导线搭配输出推力小的放大电路，进而确保每一通道输出电压的上升时间都相同，确保画面正常显示的同时有利于实现显示装置的窄边框化。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实 施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他实施例的附图。
图1为一实施例中的显示面板的结构示意图；
图2为一实施例中的MOS管的沟道宽长比示意图；
图3为一实施例中的放大电路的结构框图；
图4为一实施例中的放大电路的电路原理图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请的公开内容的理解更加透彻全面。
图1为一实施例中的显示面板的结构示意图。该显示装置可以为液晶显示器(Liquid Crystal Display，LCD)、有机发光显示器(Organic Light Emitting Display，OLED)、量子点发光二极管显示器(Quantum Dot Light Emitting Diodes Display，QLED)等，同时显示装置也可以为平面显示装置或者曲面显示装置。可以理解，显示装置的种类包括但并不限于上述示例。当显示装置为LCD显示装置时，其可以为TN、OCB或者VA型等LCD显示装置。该显示面板包括基板(也可以称为阵列基板)110和驱动单元130。
基板110的材料可以是透明玻璃或者透明塑料。基板110上设置有多条数据线120。可以理解，基板110上还可以设置有其他用于实现其功能的元器件，如扫描线140。扫描线140和数据线120限定多个像素区域150。每个像素区域150上形成有像素单元。每个像素单元内均设置有开关元件160，从而通过驱动单元130来对开关元件160的开启程度进行控制，进而实现对显示面板中的液晶的旋转角度的控制。在一实施例中，开关元件160为晶体管，其栅极与扫描线140连接，源极与数据线120连接。可选的，开关元件 160为薄膜晶体管(TFT)。扫描线140与扫描驱动电路170连接。也即在本实施例中，驱动单元130为源极驱动单元在其他的实施例中，源极驱动单元和扫描驱动单元可以集成在同一驱动单元中。
驱动单元130的数量可以根据数据线120的数量以及每个驱动单元130所连接的通道数来确定。每个驱动单元130均包括驱动电路132和多个放大电路134。在本实施例中，驱动单元130为源极驱动单元，其包括的驱动电路132为源极驱动电路。在其他的实施例中，驱动电路132(也即源极驱动电路)和扫描驱动电路170均可以集成在驱动单元130中。
驱动电路132包括多个输出端，每个输出端串联放大电路134后通过导线136与对应的一条数据线120连接，从而为数据线120提供数据信号。由于数据线120相对于驱动电路132的位置不同，连接驱动电路132和数据线120之间的导线136的长度也各不相同。在本实施例中，每个输出端连接的放大电路134提供的推力与相应的导线136的长度呈正相关关系，也即驱动单元130中的每个放大电路134具有不同的输出推力，且其提供的推力随对应的导线136的长度的大小而变化。在本实施例中，输出推力的大小可以通过输出电流的大小来表征，输出电流较大则表示其具有较大的输出推力，输出电流较小则表明其具有较小的输出推力。具体地，较短的导线136对应的放大电路134为提供推力较小的放电电路；较长的导线136对应的放大电路134为提供推力较大的放电电路，进而确保每一通道输出电压的上升时间都相同，可以有效避免由于导线136不等长造成的寄生电阻电容的差异，从而确保画面的均齐度较好，使得画面可以正常显示。采用上述显示装置无需将导线136设置成同一长度，可以极大地节省导线136所需空间，有利于实现显示装置的窄边框化。
各放大电路134的输出推力可以通过调整其自身结构以实现对其等效电阻大小的调整进而来实现对输出推力的调整。在一实施例中，放大电路134包括输出级，输出级由晶体管组成。通过调整放大电路134的输出级的晶体管的沟道宽长比来实现对其输出推力的调整。在一实施例中，输出级可以由 MOS管组成。通过调整放大电路134的输出级中的MOS管的沟道宽长比(如图2所示)来实现对其输出推力的调整。MOS管的沟道宽长比(W/L)与其输出推力电流正相关。在本实施例中，MOS管的沟道宽长比与其输出推力呈正比，也即与相应的导线136的长度呈正比。因此，上述基板中，较长的导线136对应的MOS管的沟道宽长较大；较短的导线136对应的MOS管的沟道宽长比较小。
图3为一实施例中的放大电路的结构框图。在本实施例中，放大电路包括放大级310和输出级320。其中，放大级310用于对驱动单元输出的数据信号进行放大处理后通过输出级320进行输出。驱动单元的各输出端输出的数据信号相同。在一实施例中，各放大电路的放大级310的结构相同，也即各放大级310输出的数据信号相同。输出级320则用于向放大后的数据信号提供不同的推力，从而使得每条导线上的电压上升时间相同。
图4为一实施例中的放大电路的电路原理图。在本实施例中，放大级310采用差分放大级。其中，放大级310包括电流镜负载、差分放大输入对管和偏置电路。电流镜负载作为差分放大对管的负载，偏置电路用于向差分放大对管提供偏置电流。具体地，电流镜负载包括第一MOS管M1和第二MOS管M2，差分放大输入对管包括第三MOS管M3和第四MOS管M4。偏置电路包括第五MOS管M5。第一MOS管M1的输入端与第二MOS管M2的输入端连接并与输入电源VDD连接。第一MOS管M1的控制端与第二MOS管M2的控制端连接并与第一MOS管M1的输出端连接。第一MOS管M1的输出端与第三MOS管M3的输入端连接。第三MOS管M3的输出端与第四MOS管M4的输出端连接并与第五MOS管M5的输入端连接。第五MOS管M5的输出端接地。第五MOS管M5的控制端用于接收偏置电压VBias。第三MOS管M3的控制端作为差分放大级的输出端Vout。第四MOS管M4的输入端与第二MOS管M2的输出端连接。第四MOS管M4的控制端作为所述差分放大级的输入端Vin。
在本实施例中，输出级320包括第六MOS管M6和第七MOS管M7。 第六MOS管M6的输入端与输入电源VDD连接。第六MOS管M6的控制端与第二MOS管M2的输出端连接。第六MOS管M6的输出端分别与第三MOS管M3的控制端、第七MOS管M7的输入端连接。第七MOS管M7的控制端与第五MOS管M5的控制端连接。第七MOS管M7的输出端接地。
在本实施例中，第一MOS管M1、第二MOS管M2和第六MOS管M6均为PMOS管；第三MOS管M3、第四MOS管M4、第五MOS管M5和第七MOS管M7均为NMOS管。在其他的实施例中，各MOS管的类型也可以根据需要做相应的改变。
在一实施例中，驱动单元130还包括源极驱动芯片。其中，驱动电路132和放大电路134均集成在该源极驱动芯片内，从而可以极大的简化安装操作。
在一实施例中，显示面板还包括彩膜基板、以及形成于基板110和彩膜基板之间的液晶层。
本申请一实施例还提供一种显示装置，其包括如前述任一实施例所述的显示面板。通过采用上述显示面板，有利于实现显示装置的窄边框化。
需要说明的是，显示装置例如为LCD(Liquid Crystal Display)显示装置、OLED(Organic Light-Emitting Diode)显示装置、QLED(Quantum Dot Light Emitting Diodes)显示装置、曲面显示装置或其他显示装置。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (18)

  1. 一种显示面板，包括：
    基板，所述基板上设置有多条数据线；以及
    驱动单元，包括：
    驱动电路，包括多个输出端以输出多路数据信号；和
    放大电路；所述放大电路的数量与所述驱动电路的输出端的数量相同且一一对应；每个所述放大电路的输入端与所述驱动电路的一个输出端连接，每个所述放大电路的输出端通过导线与对应的一条数据线连接；每个所述放大电路输出的推力与相应的导线的长度呈正相关关系。
  2. 根据权利要求1所述的显示面板，其中，所述放大电路包括输出级；所述输出级由晶体管构成；每个输出端串联的所述放大电路的输出级的晶体管的沟道宽长比与相应的导线的长度呈正相关关系。
  3. 根据权利要求2所述的显示面板，其中，所述晶体管为金属氧化物半导体场效应管。
  4. 根据权利要求2所述的显示面板，其中，所述放大电路还包括放大级；所述放大级连接于所述输出端和所述输出级之间。
  5. 根据权利要求4所述的显示面板，其中，所述放大级为差分放大级。
  6. 根据权利要求5所述的显示面板，其中，所述差分放大级包括电流镜负载、差分放大输入对管和偏置电路；所述电流镜负载作为所述差分放大输入对管的负载；所述偏置电路设置为向所述差分放大输入对管提供偏置电流。
  7. 根据权利要求6所述的显示面板，其中，所述电流镜负载包括第一金属氧化物半导体场效应管和第二金属氧化物半导体场效应管；所述第一金属氧化物半导体场效应管的输入端与所述第二金属氧化物半导体场效应管的输入端连接并与输入电源连接；所述第一金属氧化物半导体场效应管的控制端与所述第二金属氧化物半导体场效应管的控制端连接并与所述第一金属氧化物半导体场效应管的输出端连接。
  8. 根据权利要求7所述的显示面板，其中，所述差分放大输入对管包括 第三金属氧化物半导体场效应管和第四金属氧化物半导体场效应管；所述第三金属氧化物半导体场效应管的输入端与所述第一金属氧化物半导体场效应管的输出端连接；所述第三金属氧化物半导体场效应管的控制端作为所述差分放大级的输出端；所述第四金属氧化物半导体场效应管的输入端与所述第二金属氧化物半导体场效应管的输出端连接，所述第四金属氧化物半导体场效应管的控制端作为所述差分放大级的输入端。
  9. 根据权利要求8所述的显示面板，其中，所述偏置电路包括第五金属氧化物半导体场效应管；所述第五金属氧化物半导体场效应管的输入端分别与所述第三金属氧化物半导体场效应管的输出端、所述第四金属氧化物半导体场效应管的输出端连接；所述第五金属氧化物半导体场效应管的输出端接地；所述第五金属氧化物半导体场效应管的控制端设置为接收偏置电压。
  10. 根据权利要求9所述的显示面板，其中，所述输出级包括：
    第六金属氧化物半导体场效应管，所述第六金属氧化物半导体场效应管的输入端与所述输入电源连接；所述第六金属氧化物半导体场效应管的控制端与所述第二金属氧化物半导体场效应管的输出端连接；所述第六金属氧化物半导体场效应管的输出端分别与所述第三金属氧化物半导体场效应管的控制端连接。
  11. 根据权利要求10所述的显示面板，其中，所述输出级还包括：
    第七金属氧化物半导体场效应管，所述第七金属氧化物半导体场效应管的输入端与所述第六金属氧化物半导体场效应管的输出端连接；所述第七金属氧化物半导体场效应管的控制端与所述第五金属氧化物半导体场效应管的控制端连接；所述第七金属氧化物半导体场效应管的输出端接地。
  12. 根据权利要求11所述的显示面板，其中，所述第一金属氧化物半导体场效应管、第二金属氧化物半导体场效应管和第六金属氧化物半导体场效应管均为P型金属氧化物半导体场效应管。
  13. 根据权利要求11所述的显示面板，其中，所述第三金属氧化物半导体场效应管、第四金属氧化物半导体场效应管、第五金属氧化物半导体场效 应管和第七金属氧化物半导体场效应管均为N型金属氧化物半导体场效应管。
  14. 根据权利要求1所述的显示面板，其中，所述驱动电路为源极驱动电路。
  15. 根据权利要求14所述的显示面板，其中，所述驱动单元还包括源极驱动芯片；所述源极驱动电路和所述放大电路集成在所述源极驱动芯片内。
  16. 根据权利要求1所述的显示面板，其中，所述基板上还设置有多条扫描线以及由所述数据线和所述扫描线限定的多个像素区域；每个像素区域设置有一个像素单元，每个像素单元包括开关元件；所述开关元件分别与所述扫描线和所述数据线连接。
  17. 一种显示面板，包括：
    基板，所述基板上设置有多条数据线；
    源极驱动电路，包括多个输出端以输出多路数据信号；以及
    放大电路；所述放大电路的数量与所述源极驱动电路的输出端的数量相同且一一对应；每个所述放大电路的输入端与所述源极驱动电路的一个输出端连接，每个所述放大电路的输出端通过导线与对应的一条数据线连接；每个所述放大电路输出的推力与相应的导线的长度呈正相关关系；
    所述放大电路包括输出级和放大级；所述输出级由晶体管构成；每个输出端串联的所述放大电路的输出级的晶体管的沟道宽长比与相应的导线的长度呈正相关关系；所述放大级连接于所述输出端和所述输出级之间。
  18. 一种显示装置，包括如权利要求1所述的显示面板。
PCT/CN2017/115242 2017-09-18 2017-12-08 显示装置及其显示面板 WO2019052034A1 (zh)

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