WO2019042653A1 - Support de circuit pour un système électronique de puissance et module électronique de puissance comprenant un support de circuit - Google Patents

Support de circuit pour un système électronique de puissance et module électronique de puissance comprenant un support de circuit Download PDF

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Publication number
WO2019042653A1
WO2019042653A1 PCT/EP2018/069481 EP2018069481W WO2019042653A1 WO 2019042653 A1 WO2019042653 A1 WO 2019042653A1 EP 2018069481 W EP2018069481 W EP 2018069481W WO 2019042653 A1 WO2019042653 A1 WO 2019042653A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit carrier
edge
heat transfer
transfer surface
power electronics
Prior art date
Application number
PCT/EP2018/069481
Other languages
German (de)
English (en)
Inventor
Andreas Kircher
Original Assignee
Conti Temic Microelectronic Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Conti Temic Microelectronic Gmbh filed Critical Conti Temic Microelectronic Gmbh
Publication of WO2019042653A1 publication Critical patent/WO2019042653A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating
    • H05K7/2039—Modifications to facilitate cooling, ventilating, or heating characterised by the heat transfer by conduction from the heat generating element to a dissipating body
    • H05K7/20509—Multiple-component heat spreaders; Multi-component heat-conducting support plates; Multi-component non-closed heat-conducting structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/066—Heatsink mounted on the surface of the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09027—Non-rectangular flat PCB, e.g. circular
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/09154—Bevelled, chamferred or tapered edge
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/09163—Slotted edge
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0465—Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads

Definitions

  • the present invention relates to a circuit carrier, esp. A ceramic substrate, for power electronics and a power electronics module with a said circuit carrier or a ceramic substrate.
  • Power electronic modules or power electronics modules generally have a configuration technique in which Leis ⁇ consumer electronics devices, such as power semi ⁇ conductor switch, on a circuit carrier, in particular a ceramic substrate, and connected on the circuit carrier in the run formed conductor tracks are electrically and thermally connected.
  • the power semiconductor components are usually arranged on a surface, that is to say a component surface, of the circuit carrier.
  • a further, facing away from the loading ⁇ Deutschungsober Design surface of the circuit substrate is used for thermal contact with the circuit carrier to a heat sink or. a cooler. This further surface is thus hereinafter called the heat transfer surface.
  • the thermal connection between the circuit carrier and the heat sink is usually produced by means of a solder layer and / or a thermally conductive and electrically insulating insulating layer as a connecting layer.
  • connection layer eg, solder layer
  • connection layer e.g, solder layer
  • the object of the present invention to make a power electronics module with respect to the thermal load ⁇ stable loads .
  • a circuit carrier that is a carrier and also an electrical insulator esp.
  • a ceramic substrate for power electronics provides ensurege ⁇ .
  • the circuit carrier has, on a first side, a usually broadly expanded component surface which serves for equipping power electronics components or for forming an electrical circuit.
  • the circuit carrier comprises on a second, the first side facing away from a heat transfer surface, which for thermal (or physical) contacting the
  • Circuit carrier with a heat sink esp. A cooler
  • the circuit carrier also comprises at least one side surface between the first and the second side or between the component surface and the heat transfer surface. At least the longest of the at least one side surface (or the side surface with the longest edge to the heat transfer surface) to the mounting surface and the heat transfer surface is made oblique. The side surface thus extends from the edge to the mounting surface to the respective edge to the heat transfer surface in one
  • the circuit carrier further has a thickness that tapers from a first edge between the placement surface and the longest side surface to a second edge between the heat transfer surface and the longest side surface.
  • the second edge is the aforementioned longest edge to the heat transfer surface of the longest of the at least three side surfaces.
  • the circuit carrier is a carrier for (power) electrical or. (Power) electronic components, which serves the mechanical fastening of these components.
  • the circuit carrier of the electrical insulation of the components of non-electric or non-electronic j edoch electrically conductive components, such.
  • metallic housing parts or metallic heat sinks as well as the electrical insulation of the (mechanically mounted on the circuit board) components of external electrical components.
  • the circuit carrier serves the
  • the circuit carriers include z. B. PCBs (with or without adhering conductive connections (tracks)), ceramic substrates (as good heat transferors), esp. DBC substrates (in English "Direct Bonded Copper Sub ⁇ strat").
  • circuit carrier or the component surface and / or the heat transfer surface in its / their plan view have a circular, elliptical or the like shape with a the mounting surface or the heat ⁇ tragungsober Assembly circumferential edge without corners, so has the circuit support one side face on which similar to a wall section of a round or partially round (ie, for example, funnel with a square inlet opening and a round
  • Outlet opening or funnel with a square inlet opening and a circular outlet opening
  • funnel is formed, which is cut between two mutually parallel and perpendicular to the central axis of the funnel extending planes.
  • this single side surface is oblique to the mounting surface and the heat transfer surface.
  • the circuit carrier has three or more side surfaces, the longest of all side surfaces being oblique to the mounting surface and the heat transfer surface lies.
  • the circuit carrier is a body which is enclosed by the mounting surface, the heat transfer surface and one or more side surfaces and edges between these surfaces.
  • the invention is based on the idea that the fatigue fractures occurring in the connection layer (usually a solder layer) between the circuit carrier (or the ceramic substrate) and the heat sink (or the cooler) are effective by reducing shear stresses between the circuit carrier and the heat sink can be reduced.
  • the objective of the invention was to reduce the mechanical stresses in the edge regions of the connecting layer and thus the
  • Adjacent edge regions of the circuit substrate is provided in the invention, the edge regions of the circuit substrate in such a way that the mechanical stresses in the
  • Edge regions of the connection layer can be compensated or reduced.
  • the Thickness or tapering from the first edge to the second edge Layer thickness and thus in the cross section has a shape of a wedge.
  • connection layer Due to the wedge - shaped design of the region at the edge of the circuit carrier, it can partially absorb the shear stresses in the connection layer between the circuit carrier and the heat sink. compensate. As a result, the connection layer is subjected to less stress even in the case of thermal alternating loads in the power electronics modules, which in turn reduces the fatigue in the connection layer.
  • the longest side surface is concave. Esp. All side surfaces are concave. That is, the longest side surface or all side surfaces are curved inward toward the heat transfer surface.
  • the thickness of the circuit substrate tapers step-wise from the first edge to the second edge.
  • the circuit carrier comprises at least three side surfaces.
  • all the side surfaces to the pick and place ⁇ surface and the heat transfer surface are obliquely ⁇ leads.
  • the circuit carrier thus has a thickness which to respective corresponding edges between the heat transfer surface and the ent ⁇ speaking corresponding side surfaces tapering from all edges between the mounting surface and the respective side surfaces.
  • the second edge has a non-straight (or non-linear) contour for extending the edge length. Esp. all edges between the heat transfer surface and the respective side surfaces on a non-straight contour to extend the respective edge lengths.
  • the second edge is zigzag-shaped or sawtooth-shaped. Esp. all edges are zigzag-shaped or saw ⁇ tooth-shaped.
  • the second edge is, for example, rectangular shaped similar to a course of a rectangular signal. Esp. All edges are rectangular shaped similar to a course of a rectangular signal.
  • the corners of the zigzag, sawtooth or rectangular edge portions may be rounded.
  • the second edge is, for example, wave-shaped, meander-shaped or sinusoidal. Esp. all edges are wavy, meandering or sinusoidal.
  • the circuit carrier has, for example, a region for compensating
  • the at least one recess is formed as a passage hole.
  • a power electronics module is provided.
  • the power electronics module comprises a circuit carrier described above, the component surface is equipped with Lei ⁇ tungselektronikbaumaschinen.
  • the power electronics module further comprises a heat sink, in particular a cooler, which has a thermally conductive contact surface.
  • the circuit carrier via the heat transfer surface on the contact surface of the heat ⁇ sink or the radiator is arranged and connected to the heat sink and the radiator physically and thermally conductive.
  • Power electronics module transferable to view as advantageous embodiments of the power electronics module.
  • FIG. 1 is a schematic cross-sectional view of a power electronics module having a circuit carrier according to an embodiment of the invention; in an oblique plan view of the circuit carrier of Figure 1; in a schematic plan view of a portion of a circuit carrier according to a wei ⁇ n embodiment of the invention; and in a further schematic plan view a portion of a circuit carrier according to yet another embodiment of the invention.
  • FIG. 1 shows a schematic cross-sectional representation of a power electronics module LM with a circuit carrier ST according to an embodiment of the invention.
  • the power electronics module LM includes, in addition to the scarf ⁇ tion carrier ST still a cooler KL.
  • the circuit carrier ST has a mounting surface BF, on which a copper layer KS1 is applied, which are patterned into conductor tracks.
  • a copper layer KS1 is applied, which are patterned into conductor tracks.
  • Circuit carrier ST by means of another solder layer LS with the radiator KL or with a contact surface KF of the radiator KL surface physically and thermally conductively connected.
  • the circuit carrier ST further has side surfaces SF, which are formed circumferentially between the mounting surface BF and the réelleübertra ⁇ tion surface WF the circuit carrier ST.
  • the side surfaces SF to the mounting surface BF and the heat transfer surface WF obliquely and in the direction of the center of the circuit substrate ST and the heat transfer ⁇ surface WF out concave (with a predetermined radius of curvature) is formed.
  • the circuit carrier ST has a thickness or a layer thickness which tapers from respective first edges KT1 between the component surface BF and the respective corresponding side surfaces SF to respective corresponding second edges KT2 between the heat transfer surface WF and the respective corresponding side surfaces SF. Due to the oblique design of the side surfaces SF has the
  • FIG. 2 shows an oblique bird's eye view of the circuit carrier ST from FIG. 1.
  • the circuit carrier ST has, in the shear stress compensation areas SB, in each case a number of through holes DL, which are spatially offset in the respective shear stress compensation ranges SB from each other both in the longitudinal direction and in the transverse direction of the respective shear stress compensation regions SB. These through-holes DL ⁇ the shear stresses caused by thermal cycling stresses in addition reduce.
  • 3 shows a schematic plan view of a section of a circuit carrier ST according to a further embodiment of the invention.
  • the circuit carrier ST in FIG. 3 differs from the circuit carrier in FIG. 2 in that the second edges KT2 between the respective side surfaces SF and the heat transfer surface WF have a wave-shaped profile for lengthening the edge length.
  • FIG. 4 shows a further plan view of a section of a circuit carrier according to yet another embodiment of the invention.
  • the circuit carrier ST in FIG. 4 differs from the circuit carrier in FIG. 3 in that its second edges KT2 between the respective side surfaces SF and the heat transfer surface WF have a zigzag-shaped or rectangular course instead of a wave-shaped course.
  • the wave-shaped or zigzag-shaped or rectangular-shaped second edge KT2 like the previously described through-holes DL, additionally reduces the shear stresses produced by thermal alternating loads.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Materials Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Power Engineering (AREA)
  • Thermal Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

L'invention concerne un support de circuit (ST), en particulier un substrat en céramique, pour un système électronique de puissance, comprenant : une surface d'équipement (BF) servant à l'équipement en composants électroniques de puissance (LE) ; une surface de transfert de chaleur (WF) située à l'opposé de la surface d'équipement (BF), servant à établir un contact thermique entre le support de circuit (ST) et un dissipateur thermique, en particulier un refroidisseur (KL) ; au moins une face latérale (SF) entre la surface d'équipement (BF) et la surface de transfert de chaleur (WF). La plus longue de la ou des faces latérales (SF) par rapport à la surface d'équipement (BF) et à la surface de transfert de chaleur (WF) est réalisée de manière oblique. Le support de circuit présente une épaisseur se rétrécissant depuis une première arête (KT1) entre la surface d'équipement (BF) et la face latérale (SF) la plus longue vers une deuxième arête (KT2) entre la surface de transfert de chaleur (WF) et la face latérale (SF) la plus longue.
PCT/EP2018/069481 2017-08-29 2018-07-18 Support de circuit pour un système électronique de puissance et module électronique de puissance comprenant un support de circuit WO2019042653A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102017215048.3 2017-08-29
DE102017215048.3A DE102017215048A1 (de) 2017-08-29 2017-08-29 Schaltungsträger für Leistungselektronik und Leistungselektronikmodul mit einem Schaltungsträger

Publications (1)

Publication Number Publication Date
WO2019042653A1 true WO2019042653A1 (fr) 2019-03-07

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PCT/EP2018/069481 WO2019042653A1 (fr) 2017-08-29 2018-07-18 Support de circuit pour un système électronique de puissance et module électronique de puissance comprenant un support de circuit

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Country Link
DE (1) DE102017215048A1 (fr)
WO (1) WO2019042653A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020214040A1 (de) 2020-11-09 2021-12-02 Vitesco Technologies Germany Gmbh Schaltungsträger für eine elektrische Schaltung, leistungselektrische Schaltung mit einem Schaltungsträger

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US20130136887A1 (en) * 2011-11-24 2013-05-30 Samsung Electronics Co., Ltd. Ccl and method of manufacturing the same
EP2634797A1 (fr) * 2010-10-27 2013-09-04 Kyocera Corporation Carte de circuits imprimés
WO2015029004A1 (fr) * 2013-08-28 2015-03-05 Qubeicon Ltd. Puce à semi-conducteurs et sous-montage en puzzle de boîtier
DE102014213564A1 (de) * 2013-09-30 2015-04-02 Mitsubishi Electric Corp. Halbleitervorrichtung und Verfahren zu ihrer Herstellung

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DE4318241C2 (de) * 1993-06-02 1995-06-29 Schulz Harder Juergen Metallbeschichtetes Substrat mit verbesserter Widerstandsfähigkeit gegen Temperaturwechselbeanspruchung
JP3512977B2 (ja) * 1996-08-27 2004-03-31 同和鉱業株式会社 高信頼性半導体用基板
DE19927046B4 (de) * 1999-06-14 2007-01-25 Electrovac Ag Keramik-Metall-Substrat als Mehrfachsubstrat
JP3863067B2 (ja) * 2002-06-04 2006-12-27 Ｄｏｗａホールディングス株式会社 金属−セラミックス接合体の製造方法
DE102004016940B4 (de) * 2004-04-06 2019-08-08 Continental Automotive Gmbh Schaltungsträger für einen Halbleiterchip und ein Bauelement mit einem Halbleiterchip
KR20160108307A (ko) * 2014-01-10 2016-09-19 후루카와 덴키 고교 가부시키가이샤 전자회로장치
DE102014220650A1 (de) * 2014-10-13 2016-04-14 Heraeus Deutschland GmbH & Co. KG Optimiertes Leiterbahndesign von metallischen Materialien auf keramischen Substanzen

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2634797A1 (fr) * 2010-10-27 2013-09-04 Kyocera Corporation Carte de circuits imprimés
US20130136887A1 (en) * 2011-11-24 2013-05-30 Samsung Electronics Co., Ltd. Ccl and method of manufacturing the same
WO2015029004A1 (fr) * 2013-08-28 2015-03-05 Qubeicon Ltd. Puce à semi-conducteurs et sous-montage en puzzle de boîtier
DE102014213564A1 (de) * 2013-09-30 2015-04-02 Mitsubishi Electric Corp. Halbleitervorrichtung und Verfahren zu ihrer Herstellung

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