WO2019019516A1 - 一种多晶硅蚀刻方法 - Google Patents

一种多晶硅蚀刻方法 Download PDF

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Publication number
WO2019019516A1
WO2019019516A1 PCT/CN2017/114613 CN2017114613W WO2019019516A1 WO 2019019516 A1 WO2019019516 A1 WO 2019019516A1 CN 2017114613 W CN2017114613 W CN 2017114613W WO 2019019516 A1 WO2019019516 A1 WO 2019019516A1
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Prior art keywords
polysilicon
etching
gas
plasma reactor
power source
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French (fr)
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宋宏坤
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US15/745,132 priority Critical patent/US10796923B2/en
Publication of WO2019019516A1 publication Critical patent/WO2019019516A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H10P50/268—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials

Definitions

  • the present invention relates to the field of polysilicon technology, and in particular, to a polysilicon etching method.
  • polysilicon when polysilicon is etched by dry etching, polysilicon is placed in a plasma reactor.
  • the process gas used is generally pure chlorine gas, and the flow rate of chlorine gas flowing into the plasma reactor is about 2000 sccm. .
  • the plasma reactor ionizes the chlorine gas, it generates chloride ions.
  • the chloride ions mainly physically bombard the polysilicon in the vertical direction, and the chemical reaction with the polysilicon is less, so the polysilicon side is less etched, and the polysilicon angle (polysilicon)
  • the taper angle of the flat layer which is the taper angle, is more resistant to the surface of the yellow light process depending on the prode.
  • the angle of the polysilicon after etching is steeper, resulting in poor coverage of the underlying film on the surface of the polysilicon, which may cause the film of the underlying film to break, thereby affecting product characteristics.
  • the line width of the polysilicon is getting thinner and the line width loss is required to be less and less, the dry etching needs to improve the process mode to improve the polysilicon angle, so that the angle of the polysilicon becomes smaller.
  • the present invention provides a polysilicon etching method which can improve the polysilicon angle so that the polysilicon angle becomes smaller.
  • the invention provides a polysilicon etching method, comprising the following steps:
  • the step S1 comprises:
  • the polysilicon coated with the photoresist is placed in a plasma reactor, oxygen and/or ozone, and a fluorine-based gas are introduced into the plasma reactor, and an excitation power source of the plasma reactor is turned on. , ionizing oxygen and/or ozone, and a fluorine-based gas to obtain the first etching gas;
  • the method further includes:
  • the residual gas in the plasma reactor is withdrawn.
  • step S2 further comprises:
  • Chlorine gas is introduced into the plasma reactor, the excitation power source is turned on, and the chlorine gas is ionized to obtain the second etching gas;
  • the bias power supply is turned on, and the second etching gas is controlled to etch the polysilicon until the polysilicon is etched.
  • the method further comprises the steps of:
  • a spectrum excited by the reactant of the polysilicon is monitored to determine whether the polysilicon is etched.
  • the output power ratio of the excitation power source and the bias power source ranges from 1/2 to 2/3.
  • the fluorine-based gas includes at least one of sulfur hexafluoride SF 6 and carbon tetrafluoride CF 4 .
  • the preset time is set according to a preset polysilicon line width.
  • the output power of the excitation power source ranges from 3kw to 20kw.
  • the invention also provides a polysilicon etching method comprising the following steps:
  • the step S1 includes:
  • the polysilicon coated with the photoresist is placed in a plasma reactor, oxygen and/or ozone, and a fluorine-based gas are introduced into the plasma reactor, and an excitation power source of the plasma reactor is turned on. , ionizing oxygen and/or ozone, and a fluorine-based gas to obtain the first etching gas;
  • the method further includes:
  • the residual gas in the plasma reactor is withdrawn.
  • step S2 further comprises:
  • Chlorine gas is introduced into the plasma reactor, the excitation power source is turned on, and the chlorine gas is ionized to obtain the second etching gas;
  • the bias power supply is turned on, and the second etching gas is controlled to etch the polysilicon until the polysilicon is etched.
  • the method further comprises the steps of:
  • a spectrum excited by the reactant of the polysilicon is monitored to determine whether the polysilicon is etched.
  • the output power ratio of the excitation power source and the bias power source ranges from 1/2 to 2/3.
  • the fluorine-based gas includes at least one of sulfur hexafluoride SF 6 and carbon tetrafluoride CF 4 .
  • the preset time is set according to a preset polysilicon line width.
  • the output power of the excitation power source ranges from 3kw to 20kw.
  • the invention also provides a polysilicon etching method comprising the following steps:
  • the step S1 includes:
  • the polysilicon coated with the photoresist is placed in a plasma reactor, oxygen and/or ozone, and a fluorine-based gas are introduced into the plasma reactor, and an excitation power source of the plasma reactor is turned on. , ionizing oxygen and/or ozone, and a fluorine-based gas to obtain the first etching gas;
  • the step S2 further includes:
  • Chlorine gas is introduced into the plasma reactor, the excitation power source is turned on, and the chlorine gas is ionized to obtain the second etching gas;
  • the bias power supply is turned on, and the second etching gas is controlled to etch the polysilicon until the polysilicon is etched.
  • the method further includes:
  • the residual gas in the plasma reactor is withdrawn.
  • the method further comprises the steps of:
  • the output power ratio of the excitation power source and the bias power source ranges from 1/2 to 2/3;
  • the fluorine-based gas includes at least one of sulfur hexafluoride SF 6 and carbon tetrafluoride CF 4 ;
  • the preset time is set according to a preset polysilicon line width.
  • the output power of the excitation power source ranges from 3kw to 20kw.
  • the invention has the following beneficial effects: by etching the ionized oxygen and/or ozone and the fluorine-based gas to the photoresist-coated polysilicon, the fluorine ion can be used not only in the vertical direction
  • the polysilicon is etched upward, and the polysilicon can be edge-etched, so that the line width of the polysilicon can be small, reaching a preset line width requirement, and the side etching of the polysilicon to the polysilicon can reduce the angle of the polysilicon, so that the polysilicon The angle becomes smaller, and the underlying film covering the surface of the polysilicon is also less likely to break.
  • the chlorine gas after ionization is mainly due to the physical bombardment of polysilicon in the vertical direction. Therefore, the polysilicon can be finally etched by ionized chlorine gas to meet the requirements of the final product, and the line width loss of the polysilicon can be made smaller.
  • FIG. 1 is a flow chart of a polysilicon etching method provided by the present invention.
  • 2a is a schematic view of etching polysilicon by a fluorine-based gas in the polysilicon etching method provided by the present invention.
  • 2b is a schematic view of etching polysilicon by chlorine gas in the polysilicon etching method provided by the present invention.
  • 3a is a schematic view of polysilicon before etching in the polysilicon etching method provided by the present invention.
  • FIG. 3b is a schematic diagram of polysilicon in etching of the polysilicon etching method provided by the present invention.
  • FIG. 3c is a schematic diagram of the etched polysilicon of the polysilicon etching method provided by the present invention.
  • FIG. 3d is a schematic diagram of the etched polysilicon surface covering underlayer film of the polysilicon etching method provided by the present invention.
  • the invention provides a polysilicon etching method, as shown in FIG. 1, the method comprises the following steps:
  • a mixed gas composed of oxygen and a fluorine-based gas is ionized to obtain a first etching gas, or a mixed gas composed of ozone and a fluorine-based gas is ionized to obtain a first etching gas, or may be a mixture of oxygen, ozone, and fluorine-based gas.
  • the gas is ionized to obtain a first etching gas.
  • the fluorine-based gas is a gas containing fluorine, and may be SF 6 or SF 6 , which is used for reacting with polycrystalline silicon. As shown in FIG. 2 a , the fluorine-based gas physically bombards and etches the polycrystalline silicon.
  • the photoresist is mainly composed of carbon (C), hydrogen (H), oxygen (O), compound C x H y O z , and the reaction formula of SF 6 and polycrystalline silicon is as follows:
  • the generated F* can etch the polysilicon to improve the angle of the polysilicon and make the angle smaller.
  • the generated O* The photoresist can be modified.
  • the chlorine gas is first ionized into chloride ions, and the chloride ions are then reacted with the polycrystalline silicon.
  • the specific reaction formula is as follows:
  • the SiCl4 gas generated in the plasma reactor can be extracted. It should be noted that the chemical reaction between the ionized chlorine gas and the polycrystalline silicon is less, and therefore, the side etching of the polycrystalline silicon is less, and thus the line width loss is also less; as shown in Fig. 2b, after ionization Chlorine is mainly in the vertical direction, and there is more physical bombardment of polysilicon.
  • the polysilicon angle (the taper angle of the polysilicon flat layer, that is, the taper angle) is ⁇ , and the polysilicon angle in the etching is ⁇ , ⁇ ⁇ ⁇ ; after etching, The polysilicon angle is ⁇ , and the polysilicon angle corresponding to the etching using ionized chlorine gas is slightly smaller, so that the underlying film covering the polysilicon surface is less likely to be broken.
  • step S1 includes:
  • the photoresist coated polycrystalline silicon is placed in a plasma reactor, oxygen and/or ozone, and a fluorine-based gas are introduced into the plasma reactor, and the excitation power of the plasma reactor is turned on, for oxygen and/or
  • the ozone and the fluorine-based gas are ionized to obtain a first etching gas.
  • plasma The gas pressure in the bulk reactor ranges from about 0.1 Pa to about 100 Pa, and the internal gas is ionized into a plasma state by a high frequency power source (for example, 13.56 MHz).
  • the bias power supply of the plasma reactor is turned on, and the first etching gas is controlled to etch the polysilicon for a preset time. It should be noted that the bias power supply can be turned on simultaneously with the excitation power supply, or can be turned on after the excitation power supply is turned on.
  • step S1 the following steps are further included:
  • the excitation and bias supplies are turned off and oxygen and/or ozone, as well as fluorine-based gases, are introduced into the plasma reactor.
  • the residual gas in the plasma reactor is withdrawn.
  • the above-mentioned SiF 4 , CO 2 , and H 2 O mixed gas for example, the above-mentioned SiF 4 , CO 2 , and H 2 O mixed gas.
  • Step S2 further includes:
  • Chlorine gas is introduced into the plasma reactor, the excitation power source of the plasma reactor is turned on, and chlorine gas is ionized to obtain a second etching gas.
  • the bias power supply of the plasma reactor is turned on, and the second etching gas is controlled to etch the polysilicon until the polysilicon is etched to ensure that there is no excess polysilicon residue.
  • the amount of chlorine gas introduced is determined according to the amount of etching required for polysilicon.
  • the polysilicon etching method further includes the following steps:
  • the spectrum excited by the reactants of the polysilicon is monitored to determine whether the polysilicon is etched. For example, the spectrum excited by the SiCl 4 is received by the spectral receiver. When the etching is completed, the SiCl 4 is gradually reduced, and the spectrum of the excitation is gradually weakened. According to the spectrum excited by the SiCl 4 , it can be judged whether or not the polysilicon is etched.
  • the ratio of the output power of the excitation power source and the bias power source ranges from 1/2 to 2/3.
  • the output power ratio of the excitation power source and the bias power source may be 1/2 or 2/3.
  • the output power of the bias power supply is higher than the output power of the excitation power supply.
  • appropriately increasing the output power of the excitation power supply can improve the dissociation of fluorine gas, oxygen/ozone, and chlorine gas in the plasma reactor.
  • the degree allows the gas inside the plasma reactor to react better with polysilicon.
  • Increasing the output power of the bias power supply can increase the side etching of the polysilicon inside the plasma reactor, so that the angle of the polysilicon is small.
  • the fluorine-based gas includes at least one of sulfur hexafluoride SF 6 and carbon tetrafluoride CF 4 .
  • the preset time corresponding to the etching of the polysilicon by the first etching gas is set according to a preset polysilicon line width.
  • the amount of etching required for the polysilicon can be calculated, and according to the content of the fluorine-based gas etched in the plasma reactor and the reaction efficiency, the time required for etching can be estimated. , i.e., a predetermined time; wherein the fluorine-based gas SF 6 can be selected, any one of CF2 4 or a mixed gas of two components, the time required for SF 6 and CF 4 etching of the polysilicon is not the same.
  • the output power range of the excitation power source is: 3kw to 20kw.
  • the present invention generates fluorine ions and oxygen ions by introducing oxygen and/or ozone into the plasma reactor, and fluorine-based gas to ionize oxygen and/or ozone and fluorine-based gases.
  • the ions can physically bombard the polysilicon in the vertical direction, and can also laterally etch the polysilicon in the lateral direction, so that the line width of the polysilicon can be small, reaching the preset line width requirement, and the side etching of the fluoride ion to the polysilicon can be
  • the polysilicon angle is reduced to make the polysilicon angle smaller, and the underlying film covering the polysilicon surface is not easily broken; then the polysilicon is etched using the ionized chlorine gas to achieve the final product demand, and the ionized chlorine gas is mainly in the vertical direction.
  • the physical bombardment of polysilicon is more, which can make the line width loss of polysilicon smaller, and achieve the purpose of controllable line width loss.

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Abstract

一种多晶硅蚀刻方法，包括下述步骤：将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第一蚀刻气体，在预设时间段通过第一蚀刻气体对涂布有光阻的多晶硅进行蚀刻处理；将氯气进行电离，得到等离子体态的第二蚀刻气体，通过第二蚀刻气体对多晶硅进行蚀刻处理，直至多晶硅蚀刻完成。使得多晶硅的线宽可以较小，达到预设的线宽要求，而且可以改善多晶硅角度，使多晶硅角度变得更小，也使得多晶硅的线宽损失更小。

Description

一种多晶硅蚀刻方法
本申请要求于2017年7月24日提交中国专利局、申请号为201710606790.1、发明名称为“一种多晶硅蚀刻方法”的中国专利申请的优先权，上述专利的全部内容通过引用结合在本申请中。
技术领域
本发明涉及多晶硅技术领域，尤其涉及一种多晶硅蚀刻方法。
背景技术
目前对多晶硅采用干蚀刻方式进行刻蚀时，将多晶硅置于等离子体反应器中，在蚀刻制程中，使用的制程气体一般为纯氯气，往等离子体反应器中通入的氯气流量大约为2000sccm。等离子体反应器将氯气电离后，产生氯离子，氯离子主要在垂直方向上对多晶硅的物理轰击较多，而与多晶硅的化学反应较少，因此对多晶硅侧蚀刻较少，从而多晶硅角度(多晶硅平坦层的锥度角，也即是taper角)比较依赖前程的黄光工艺对其表面的光阻处理。
使用上述方法对多晶硅进行蚀刻处理时，蚀刻后的多晶硅角度更陡，从而导致多晶硅表面的下层膜覆盖性差，会造成下层膜的膜层断裂，进而影响产品特性。在多晶硅的线宽越来越细，线宽损失要求越来越少时，干蚀刻需改善制程方式，以改善多晶硅角度，使得多晶硅的角度变小。
发明内容
为解决上述技术问题，本发明提供一种多晶硅蚀刻方法，可以改善多晶硅角度，使得多晶硅角度变小。
本发明提供的一种多晶硅蚀刻方法，包括下述步骤：
S1、将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第一蚀刻气体，在预设时间段通过所述第一蚀刻气体对涂布有光阻的多晶硅进行蚀刻处理；
S2、将氯气进行电离，得到等离子体态的第二蚀刻气体，通过所述第二蚀刻气体对所述多晶硅进行蚀刻处理，直至所述多晶硅蚀刻完成。
优选地，所述步骤S1包括：
将涂布有光阻的所述多晶硅放置于等离子体反应器中，往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体，且开启所述等离子体反应器的激励电源，对氧气和/或臭氧，以及氟类气体进行电离，得到所述第一蚀刻气体；
开启所述等离子体反应器的偏压电源，控制所述第一蚀刻气体对所述多晶硅进行蚀刻达到所述预设时间。
优选地，所述步骤S1之后还包括：
关闭所述激励电源和所述偏压电源，且停止往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体；
将所述等离子体反应器中的残留气体抽出。
优选地，所述步骤S2进一步包括：
往所述等离子体反应器中通入氯气，开启所述激励电源，对所述氯气进行电离，得到所述第二蚀刻气体；
开启所述偏压电源，控制所述第二蚀刻气体对所述多晶硅进行蚀刻，直至将所述多晶硅蚀刻完成。
优选地，还包括下述步骤：
监测所述多晶硅的反应物所激发的光谱，判断所述多晶硅是否蚀刻完成。
优选地，所述激励电源和所述偏压电源的输出功率比值范围为：1/2～2/3。
优选地，所述氟类气体包括有：六氟化硫SF6、四氟化碳CF4中的至少一种。
优选地，所述预设时间根据预设的多晶硅线宽设定。
优选地，所述激励电源的输出功率范围为：3kw～20kw。
本发明还提供一种多晶硅蚀刻方法，包括下述步骤：
S1、将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第一蚀刻气体，在预设时间段通过所述第一蚀刻气体对涂布有光阻的多晶硅进 行蚀刻处理；
S2、将氯气进行电离，得到等离子体态的第二蚀刻气体，通过所述第二蚀刻气体对所述多晶硅进行蚀刻处理，直至所述多晶硅蚀刻完成；
所述步骤S1包括：
将涂布有光阻的所述多晶硅放置于等离子体反应器中，往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体，且开启所述等离子体反应器的激励电源，对氧气和/或臭氧，以及氟类气体进行电离，得到所述第一蚀刻气体；
开启所述等离子体反应器的偏压电源，控制所述第一蚀刻气体对所述多晶硅进行蚀刻达到所述预设时间；
所述步骤S1之后还包括：
关闭所述激励电源和所述偏压电源，且停止往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体；
将所述等离子体反应器中的残留气体抽出。
优选地，所述步骤S2进一步包括：
往所述等离子体反应器中通入氯气，开启所述激励电源，对所述氯气进行电离，得到所述第二蚀刻气体；
开启所述偏压电源，控制所述第二蚀刻气体对所述多晶硅进行蚀刻，直至将所述多晶硅蚀刻完成。
优选地，还包括下述步骤：
监测所述多晶硅的反应物所激发的光谱，判断所述多晶硅是否蚀刻完成。
优选地，所述激励电源和所述偏压电源的输出功率比值范围为：1/2～2/3。
优选地，所述氟类气体包括有：六氟化硫SF6、四氟化碳CF4中的至少一种。
优选地，所述预设时间根据预设的多晶硅线宽设定。
优选地，所述激励电源的输出功率范围为：3kw～20kw。
本发明还提供一种多晶硅蚀刻方法，包括下述步骤：
S1、将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第 一蚀刻气体，在预设时间段通过所述第一蚀刻气体对涂布有光阻的多晶硅进行蚀刻处理；
S2、将氯气进行电离，得到等离子体态的第二蚀刻气体，通过所述第二蚀刻气体对所述多晶硅进行蚀刻处理，直至所述多晶硅蚀刻完成；
所述步骤S1包括：
将涂布有光阻的所述多晶硅放置于等离子体反应器中，往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体，且开启所述等离子体反应器的激励电源，对氧气和/或臭氧，以及氟类气体进行电离，得到所述第一蚀刻气体；
开启所述等离子体反应器的偏压电源，控制所述第一蚀刻气体对所述多晶硅进行蚀刻达到所述预设时间；
所述步骤S2进一步包括：
往所述等离子体反应器中通入氯气，开启所述激励电源，对所述氯气进行电离，得到所述第二蚀刻气体；
开启所述偏压电源，控制所述第二蚀刻气体对所述多晶硅进行蚀刻，直至将所述多晶硅蚀刻完成。
优选地，所述步骤S1之后还包括：
关闭所述激励电源和所述偏压电源，且停止往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体；
将所述等离子体反应器中的残留气体抽出。
优选地，还包括下述步骤：
监测所述多晶硅的反应物所激发的光谱，判断所述多晶硅是否蚀刻完成；
所述激励电源和所述偏压电源的输出功率比值范围为：1/2～2/3；
所述氟类气体包括有：六氟化硫SF6、四氟化碳CF4中的至少一种；
所述预设时间根据预设的多晶硅线宽设定。
优选地，所述激励电源的输出功率范围为：3kw～20kw。
实施本发明，具有如下有益效果：通过将电离的氧气和/或臭氧，以及氟类气体对涂布有光阻的多晶硅进行蚀刻处理，利用氟离子不仅可以在垂直方 向上对多晶硅进行蚀刻，还可以对多晶硅进行侧蚀的特性，使得多晶硅的线宽可以较小，达到预设的线宽要求，而且氟离子对多晶硅的侧蚀可以减小多晶硅的角度，使多晶硅角度变得更小，覆盖在多晶硅表面的下层膜也不易断裂。电离后的氯气，主要是在垂直方向上对多晶硅的物理轰击较多，因此可以通过电离的氯气对多晶硅进行最后蚀刻，以达到最终产品的要求，可以使得多晶硅的线宽损失更小。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明提供的多晶硅蚀刻方法的流程图。
图2a是本发明提供的多晶硅蚀刻方法的通过氟类气体对多晶硅进行蚀刻的示意图。
图2b是本发明提供的多晶硅蚀刻方法的通过氯气对多晶硅进行蚀刻的示意图。
图3a是本发明提供的多晶硅蚀刻方法的蚀刻前的多晶硅示意图。
图3b是本发明提供的多晶硅蚀刻方法的蚀刻中的多晶硅示意图。
图3c是本发明提供的多晶硅蚀刻方法的蚀刻后的多晶硅示意图。
图3d是本发明提供的多晶硅蚀刻方法的蚀刻后的多晶硅表面覆盖下层膜的示意图。
具体实施方式
本发明提供的一种多晶硅蚀刻方法，如图1所示，该方法包括下述步骤：
S1、将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第一蚀刻气体，在预设时间段通过第一蚀刻气体对涂布有光阻的多晶硅进行蚀刻处理；例如，将氧气和氟类气体组成的混合气体进行电离得到第一蚀刻气体，或者将臭氧和氟类气体组成的混合气体进行电离得到第一蚀刻气体，还可以是将氧气、臭氧、氟类气体组成的混合气体进行电离得到第一蚀刻气体。
S2、将氯气进行电离，得到等离子体态的第二蚀刻气体，通过第二蚀刻 气体对多晶硅进行蚀刻处理，直至多晶硅蚀刻完成。
其中，氟类气体为包含有氟元素的气体，可以是SF6，SF6，其用于与多晶硅反应，如图2a所示，氟类气体对多晶硅进行物理轰击和侧蚀。
光阻主要是由碳(C)、氢(H)、氧(O)组成的化合物CxHyOz，SF6与多晶硅的反应式如下：
SF6→F*+SF*；
4F*+Si→SiF4↑；
氧气与光阻的反应式如下：
O2→2O*；
CxHyOz+O*→CO2↑+H2O↑；
在等离子体反应器中，等离子体将SF6电离后，产生的F*可以对多晶硅进行侧蚀，以改善多晶硅的角度，使其角度变小；等离子体将氧气进行电离后，产生的O*可以修饰光阻。
其中，在等离子体反应器中，先将氯气电离为氯离子，氯离子再与多晶硅反应，具体的反应式如下：
Cl2→2Cl*；
4Cl*+Si→SiCl4↑；
在多晶硅蚀刻完成之后，可以将等离子体反应器中产生的SiCl4气体抽出。需要说明的是，电离后的氯气与多晶硅之间的化学反应较少，因此，其对多晶硅的侧蚀也较少，因此造成的线宽损失也较少；如图2b所示，电离后的氯气主要是在垂直方向上，对多晶硅的物理轰击较多。
如图3a、3b、3c、3d所示，在蚀刻前，多晶硅角度(多晶硅平坦层的锥度角，也即是taper角)为α，蚀刻中多晶硅角度为β，β＜α；在蚀刻后，多晶硅角度为γ，相对于全程使用电离的氯气进行蚀刻所对应的多晶硅角度，要稍小些，从而覆盖在多晶硅表面的下层膜不易断裂。
进一步地，步骤S1包括：
将涂布有光阻的多晶硅放置于等离子体反应器中，往等离子体反应器中通入氧气和/或臭氧，以及氟类气体，且开启等离子体反应器的激励电源，对氧气和/或臭氧，以及氟类气体进行电离，得到第一蚀刻气体。其中，等离子 体反应器中的气体压强范围为：0.1Pa～100Pa左右，利用高频电源(例如，13.56MHz)，使其内部的气体电离为等离子体状态。
开启等离子体反应器的偏压电源，控制第一蚀刻气体对多晶硅进行蚀刻，达到预设时间。需要说明的是，偏压电源可以和激励电源同时开启，也可以在激励电源开启后再开启。
进一步地，在步骤S1之后，还包括下述步骤：
关闭激励电源和偏压电源，且停止往等离子体反应器中通入氧气和/或臭氧，以及氟类气体。
将等离子体反应器中的残留气体抽出。例如，上述的SiF4、CO2、H2O混合气体。
步骤S2进一步包括：
往等离子体反应器中通入氯气，开启等离子体反应器的激励电源，对氯气进行电离，得到第二蚀刻气体。
开启等离子体反应器的偏压电源，控制第二蚀刻气体对多晶硅进行蚀刻，直至将多晶硅蚀刻完成，保证没有多余的多晶硅残留。其中，通入氯气的量，根据多晶硅需要蚀刻的量来决定。
进一步地，多晶硅蚀刻方法还包括下述步骤：
监测多晶硅的反应物所激发的光谱，判断多晶硅是否蚀刻完成。例如，利用光谱接收器接收SiCl4所激发的光谱，当蚀刻完成，SiCl4逐渐减少，其激发的光谱逐渐减弱，根据监测SiCl4所激发的光谱，就可以判断多晶硅是否蚀刻完成。
进一步地，激励电源和偏压电源的输出功率比值范围为：1/2～2/3。例如，激励电源和偏压电源的输出功率比值可以是1/2或者2/3。
一般而言，偏压电源的输出功率会高于激励电源的输出功率，其中，适当的提高激励电源的输出功率，可以提升等离子体反应器内的氟类气体、氧气/臭氧、氯气的解离度，使得等离子体反应器内部的气体可以更好的与多晶硅进行反应。提升偏压电源的输出功率，可以增加等离子体反应器内部气体对多晶硅的侧蚀，使得多晶硅的角度较小。
进一步地，氟类气体包括有：六氟化硫SF6、四氟化碳CF4中的至少一种。
进一步地，第一蚀刻气体对多晶硅蚀刻所对应的预设时间，根据预设的多晶硅线宽设定。具体而言，根据预设的多晶硅线宽，可以推算出多晶硅需要蚀刻的量，再根据等离子体反应器中进行蚀刻的氟类气体的含量及反应效率，即可推算得到进行蚀刻所需的时间，也即是预设时间；其中，氟类气体可以选择SF6、CF4中的任意一种或者两种成分的混合气体，SF6和CF4对多晶硅进行蚀刻所需的时间不一样。
进一步地，激励电源的输出功率范围为：3kw～20kw。
综上所述，本发明通过往等离子体反应器中通入氧气和/或臭氧，以及氟类气体，将氧气和/或臭氧，以及氟类气体进行电离后，产生氟离子和氧离子，氟离子即可以在垂直方向上对多晶硅进行物理轰击，还可以在横向上对多晶硅进行侧蚀，使得多晶硅的线宽可以较小，达到预设的线宽要求，而且氟离子对多晶硅的侧蚀可以减小多晶硅角度，使多晶硅角度变得更小，覆盖在多晶硅表面的下层膜也不易断裂；然后使用电离后的氯气对多晶硅进行蚀刻，达到最终的产品需求，电离后的氯气主要是在垂直方向上对多晶硅进行物理轰击较多，可以使得多晶硅的线宽损失更小，达到线宽损失可控的目的。
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明，不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本发明的保护范围。

Claims (20)

  1. 一种多晶硅蚀刻方法，其中，包括下述步骤：
    S1、将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第一蚀刻气体，在预设时间段通过所述第一蚀刻气体对涂布有光阻的多晶硅进行蚀刻处理；
    S2、将氯气进行电离，得到等离子体态的第二蚀刻气体，通过所述第二蚀刻气体对所述多晶硅进行蚀刻处理，直至所述多晶硅蚀刻完成。
  2. 根据权利要求1所述的多晶硅蚀刻方法，其中，所述步骤S1包括：
    将涂布有光阻的所述多晶硅放置于等离子体反应器中，往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体，且开启所述等离子体反应器的激励电源，对氧气和/或臭氧，以及氟类气体进行电离，得到所述第一蚀刻气体；
    开启所述等离子体反应器的偏压电源，控制所述第一蚀刻气体对所述多晶硅进行蚀刻达到所述预设时间。
  3. 根据权利要求2所述的多晶硅蚀刻方法，其中，所述步骤S1之后还包括：
    关闭所述激励电源和所述偏压电源，且停止往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体；
    将所述等离子体反应器中的残留气体抽出。
  4. 根据权利要求2所述的多晶硅蚀刻方法，其中，所述步骤S2进一步包括：
    往所述等离子体反应器中通入氯气，开启所述激励电源，对所述氯气进行电离，得到所述第二蚀刻气体；
    开启所述偏压电源，控制所述第二蚀刻气体对所述多晶硅进行蚀刻，直至将所述多晶硅蚀刻完成。
  5. 根据权利要求4所述多晶硅蚀刻方法，其中，还包括下述步骤：
    监测所述多晶硅的反应物所激发的光谱，判断所述多晶硅是否蚀刻完成。
  6. 根据权利要求4所述多晶硅蚀刻方法，其中，所述激励电源和所述 偏压电源的输出功率比值范围为：1/2～2/3。
  7. 根据权利要求4所述多晶硅蚀刻方法，其中，所述氟类气体包括有：六氟化硫SF6、四氟化碳CF4中的至少一种。
  8. 根据权利要求4所述多晶硅蚀刻方法，其中，所述预设时间根据预设的多晶硅线宽设定。
  9. 根据权利要求6所述多晶硅蚀刻方法，其中，所述激励电源的输出功率范围为：3kw～20kw。
  10. 一种多晶硅蚀刻方法，其中，包括下述步骤：
    S1、将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第一蚀刻气体，在预设时间段通过所述第一蚀刻气体对涂布有光阻的多晶硅进行蚀刻处理；
    S2、将氯气进行电离，得到等离子体态的第二蚀刻气体，通过所述第二蚀刻气体对所述多晶硅进行蚀刻处理，直至所述多晶硅蚀刻完成；
    所述步骤S1包括：
    将涂布有光阻的所述多晶硅放置于等离子体反应器中，往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体，且开启所述等离子体反应器的激励电源，对氧气和/或臭氧，以及氟类气体进行电离，得到所述第一蚀刻气体；
    开启所述等离子体反应器的偏压电源，控制所述第一蚀刻气体对所述多晶硅进行蚀刻达到所述预设时间；
    所述步骤S1之后还包括：
    关闭所述激励电源和所述偏压电源，且停止往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体；
    将所述等离子体反应器中的残留气体抽出。
  11. 根据权利要求10所述的多晶硅蚀刻方法，其中，所述步骤S2进一步包括：
    往所述等离子体反应器中通入氯气，开启所述激励电源，对所述氯气进行电离，得到所述第二蚀刻气体；
    开启所述偏压电源，控制所述第二蚀刻气体对所述多晶硅进行蚀刻，直 至将所述多晶硅蚀刻完成。
  12. 根据权利要求11所述多晶硅蚀刻方法，其中，还包括下述步骤：
    监测所述多晶硅的反应物所激发的光谱，判断所述多晶硅是否蚀刻完成。
  13. 根据权利要求11所述多晶硅蚀刻方法，其中，所述激励电源和所述偏压电源的输出功率比值范围为：1/2～2/3。
  14. 根据权利要求11所述多晶硅蚀刻方法，其中，所述氟类气体包括有：六氟化硫SF6、四氟化碳CF4中的至少一种。
  15. 根据权利要求11所述多晶硅蚀刻方法，其中，所述预设时间根据预设的多晶硅线宽设定。
  16. 根据权利要求13所述多晶硅蚀刻方法，其中，所述激励电源的输出功率范围为：3kw～20kw。
  17. 一种多晶硅蚀刻方法，其中，包括下述步骤：
    S1、将氧气和/或臭氧，以及氟类气体进行电离，得到等离子体态的第一蚀刻气体，在预设时间段通过所述第一蚀刻气体对涂布有光阻的多晶硅进行蚀刻处理；
    S2、将氯气进行电离，得到等离子体态的第二蚀刻气体，通过所述第二蚀刻气体对所述多晶硅进行蚀刻处理，直至所述多晶硅蚀刻完成；
    所述步骤S1包括：
    将涂布有光阻的所述多晶硅放置于等离子体反应器中，往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体，且开启所述等离子体反应器的激励电源，对氧气和/或臭氧，以及氟类气体进行电离，得到所述第一蚀刻气体；
    开启所述等离子体反应器的偏压电源，控制所述第一蚀刻气体对所述多晶硅进行蚀刻达到所述预设时间；
    所述步骤S2进一步包括：
    往所述等离子体反应器中通入氯气，开启所述激励电源，对所述氯气进行电离，得到所述第二蚀刻气体；
    开启所述偏压电源，控制所述第二蚀刻气体对所述多晶硅进行蚀刻，直 至将所述多晶硅蚀刻完成。
  18. 根据权利要求17所述的多晶硅蚀刻方法，其中，所述步骤S 1之后还包括：
    关闭所述激励电源和所述偏压电源，且停止往所述等离子体反应器中通入氧气和/或臭氧，以及氟类气体；
    将所述等离子体反应器中的残留气体抽出。
  19. 根据权利要求17所述多晶硅蚀刻方法，其中，还包括下述步骤：
    监测所述多晶硅的反应物所激发的光谱，判断所述多晶硅是否蚀刻完成；
    所述激励电源和所述偏压电源的输出功率比值范围为：1/2～2/3；
    所述氟类气体包括有：六氟化硫SF6、四氟化碳CF4中的至少一种；
    所述预设时间根据预设的多晶硅线宽设定。
  20. 根据权利要求19所述多晶硅蚀刻方法，其中，所述激励电源的输出功率范围为：3kw～20kw。
PCT/CN2017/114613 2017-07-24 2017-12-05 一种多晶硅蚀刻方法 Ceased WO2019019516A1 (zh)

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