WO2019007341A1 - Method for improving corrosion resistance of silicon nitride, and method for manufacturing semiconductor device - Google Patents

Abstract

A method for improving the corrosion resistance of silicon nitride, and a method for manufacturing a semiconductor device. The method for improving the corrosion resistance of silicon nitride comprises: providing a semiconductor substrate; depositing a silicon nitride layer on the semiconductor substrate by means of plasma enhanced chemical vapor deposition, the silicon nitride layer being deposited by using ammonia gas and a silane as reactants, and the gas flow ratio of the silane to the ammonia gas being within a range of 3-6; annealing the silicon nitride layer; performing wet etching on the silicon nitride layer and corroding a part of the substrate.

Description

Method for improving corrosion resistance of silicon nitride and preparation method of semiconductor device Technical field

The present invention relates to the field of semiconductor fabrication technology, and more particularly to a method for improving the corrosion resistance of silicon nitride and a method for fabricating a semiconductor device.

Background technique

Silicon nitride is a dielectric material commonly found in semiconductor fabrication. In current semiconductor fabrication, silicon nitride is mainly formed by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD). However, in the MEMS fabrication process, when a thick silicon nitride layer needs to be deposited, a silicon nitride layer is formed by plasma enhanced chemical vapor deposition (PECVD). However, in the wet etching process, the corrosion rate of the PECVD silicon nitride layer is fast, and the solution such as the buffer oxide etching solution (BOE) is relatively easy to be formed along the silicon nitride layer and other layers (low pressure chemical vapor deposition). The interface of the silicon nitride layer LPSIN or polysilicon layer is etched in to form lateral undercut at the interface.

Summary of the invention

Based on this, it is necessary to provide a method for improving the corrosion resistance of silicon nitride and a method for preparing a semiconductor device.

A method for improving the corrosion resistance of silicon nitride, comprising:

Providing a semiconductor substrate;

Depositing a silicon nitride layer on the semiconductor substrate by plasma enhanced chemical vapor deposition; the silicon nitride layer is deposited by using ammonia gas and silane as a reactant, and the gas flow ratio range of the silane and the ammonia gas 3 to 6;

Annealing the silicon nitride layer;

The silicon nitride layer is wet etched and etched a portion of the substrate.

Details of one or more embodiments of the present application are set forth in the accompanying drawings and description below. Other features, objects, and advantages of the invention will be apparent from the description and appended claims.

In another aspect, a method of fabricating a semiconductor device is provided, including:

Providing a semiconductor substrate;

Depositing a silicon nitride layer on the semiconductor substrate by plasma enhanced chemical vapor deposition; the silicon nitride layer is deposited by using ammonia gas and silane as a reactant, and the gas flow ratio range of the silane and the ammonia gas 3 to 6;

Performing dry etching patterning on the silicon nitride layer;

Annealing the silicon nitride layer;

The silicon nitride layer is wet etched and etched a portion of the substrate.

DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, the drawings of other embodiments may be obtained from the drawings without departing from the scope of the invention.

1 is a flow chart of a method for improving the corrosion resistance of silicon nitride in one embodiment;

Figure 2 is a cross-sectional view of a silicon nitride layer in one embodiment;

3 is an enlarged cross-sectional view showing an annealing process of a silicon nitride layer in one embodiment;

4 is an enlarged cross-sectional view showing an unannealed silicon nitride layer in one embodiment;

5 is an enlarged cross-sectional view showing an annealing treatment of a silicon nitride layer in another embodiment;

Figure 6 is a flow chart showing a method of fabricating a semiconductor device in one embodiment.

Detailed ways

The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

A method for improving the corrosion resistance of silicon nitride, comprising:

Step S110: providing a semiconductor substrate.

Referring to FIG. 2, a semiconductor substrate 100 is provided. In one embodiment, the semiconductor substrate includes a silicon substrate, an oxide layer (low pressure silicon nitride layer LPSIN or polysilicon layer) which are sequentially stacked. Of course, the semiconductor substrate may also include several layers of metal interconnects or several electrically interconnected semiconductor devices, such as MOS transistors, resistors, logic components, MEMS microphone backplane underlying structures, etc. For convenience, the semiconductor substrate is only Represented by the numeral 100.

Step S120: depositing a silicon nitride layer on the semiconductor substrate by plasma enhanced chemical vapor deposition; the silicon nitride layer is deposited by using ammonia gas and silane as a reactant, and the gas of the silane and the ammonia gas The flow ratio ranges from 3 to 6.

A silicon nitride layer 102 is deposited on the semiconductor substrate 100 using an applied P5000 device plasma enhanced chemical vapor deposition (PECVD). Plasma enhanced chemical vapor deposition (PECVD) is a method in which a luminescence electric field is generated by a radio frequency electric field to form a plasma under a low vacuum condition by using a silane gas, an ammonia gas, and a nitrogen gas to enhance a chemical reaction and thereby reduce a deposition temperature. The silicon nitride layer 102 is deposited at a normal temperature to 400 °C. Among them, the silicon nitride layer 102 is deposited by using ammonia gas and silane as reactants.

In one embodiment, the plasma-enhanced chemical vapor deposition technique is used to prepare the silicon nitride layer, and the gas passing therethrough and the flow rate thereof are: a gas flow ratio of silane to ammonia gas of 3:1. The gas flow rate of other gases (such as nitrogen) can be set according to actual needs.

In one embodiment, when a silicon nitride layer is prepared by plasma enhanced chemical vapor deposition, the passing gas and its flow rate are: a gas flow ratio of silane to ammonia of 6:1. The gas flow rate of other gases (such as nitrogen) can be set according to actual needs.

Through a large number of experiments, the higher the content of silicon in the silicide, the better the corrosion resistance. The embodiment of the present application controls the ratio of silane to ammonia by chemically enhanced plasma vapor deposition, and the gas of silane and ammonia. The flow ratio is controlled between 3:1 and 6:1, which not only reduces the corrosion rate of the silicon nitride layer 102 in the acid, but also improves the corrosion resistance of the silicon nitride layer 102 in the acid, and also reduces the nitrogen. The contact interface of the silicon layer 102 and the polysilicon layer is laterally etched in the acid.

In one embodiment, when the silicon nitride layer 102 is patterned and dry etched using CF ₄ /CHF ₃ or SF ₆ , the thickness d of the silicon nitride layer 102, referring to FIG. 2, has a thickness d of about 1 μm. Between 3μm.

Step S130: annealing the silicon nitride layer.

The silicon nitride layer 102 is annealed. The annealing method may be nitrogen annealing or laser annealing. When annealing by a nitrogen annealing process, the annealing temperature ranges from 400 to 800 ° C, and the annealing duration is from 30 minutes to 120 minutes.

In one embodiment, the silicon nitride layer 102 is annealed by a nitrogen annealing method after pattern etching is performed. Before the temperature rise, the nitrogen gas with a purity of 99.999% is flushed into the quartz tube annealing furnace for a period of time, and the silicon nitride layer 102 is placed on the quartz boat and pushed into the quartz furnace, and the temperature is raised to 420 ° C under a nitrogen atmosphere, and kept at 30 Minutes, the heating power is turned off, and the silicon nitride layer 102 is cooled and cooled to room temperature in the quartz furnace without any external cooling measures by the quartz tube annealing furnace itself.

In one embodiment, the silicon nitride layer 102 is annealed by a nitrogen annealing method after the patterned wet etching is performed. Before heating, a nitrogen gas with a purity of 99.999% was flushed into the quartz tube annealing furnace for a period of time. The silicon nitride layer 102 was placed on a quartz boat and pushed into a quartz furnace, and the temperature was raised to 700 ° C under a nitrogen atmosphere to maintain 60. Minutes, the heating power is turned off, and the silicon nitride layer 102 is cooled and cooled to room temperature in the quartz furnace without any external cooling measures by the quartz tube annealing furnace itself. In other embodiments, a suitable annealing temperature and annealing duration can be selected according to actual needs, wherein the annealing temperature ranges from 400 to 800 ° C and the annealing duration is from 30 minutes to 120 minutes. In other embodiments, different annealing temperatures, annealing durations, and gas ratios of silane to ammonia gas in step S120 may be arbitrarily combined.

In one embodiment, when the silicon nitride layer 102 is deposited on the substrate by plasma enhanced chemical vapor deposition, the passing gas and its flow rate are: a gas flow ratio of silane to ammonia of 5:1. The silicon nitride layer 102 is annealed by a nitrogen annealing method after pattern etching is performed. Annealing is carried out by means of nitrogen annealing. Before heating, a nitrogen gas with a purity of 99.999% was flushed into the quartz tube annealing furnace for a period of time. The silicon nitride layer 102 was placed on a quartz boat and pushed into a quartz furnace, and the temperature was raised to 750 ° C under a nitrogen atmosphere to maintain 100. Minutes, the heating power is turned off, and the silicon nitride layer 102 is cooled and cooled to room temperature in the quartz furnace without any external cooling measures by the quartz tube annealing furnace itself.

Step S140: wet etching the silicon nitride layer and etching a portion of the substrate.

The annealed silicon nitride layer is subjected to wet etching, and the wet etching etching solution is Buffered Oxide Etchant (BOE) or 49% hydrofluoric acid (HF). When the silicon nitride layer 102 is wet etched, a buffer oxide etchant or 49% hydrofluoric acid is implanted into the dry etched pattern, buffer oxide etchant or 49% hydrofluoric acid. The silicon nitride layer 102 is slowly or slightly etched, and the oxide layer on the semiconductor substrate 100 is quickly etched away by the dry etched silicon nitride pattern aperture. Specifically, the duration of the wet etching of the silicon nitride layer ranges from 45 to 55 minutes.

In the conventional ion-enhanced chemical vapor deposition, the ratio of silane to ammonia is 2:1, and the silicon nitride layer formed has a corrosion rate of 89-100 A/min in the buffer oxide etchant. In the embodiment of the present application, when the ratio of silane to ammonia gas is 3:1 in plasma enhanced chemical vapor deposition, the silicon nitride layer 102 formed is etched by the buffer oxide etchant for 50 minutes. It is between 48 and 58 A/min; when the ratio of silane to ammonia is 4:1 in plasma enhanced chemical vapor deposition, the silicon nitride layer 102 formed is etched by the buffer oxide etchant for 50 minutes. It is between 32 and 36 A/min; when the ratio of silane to ammonia is 5:1 in plasma enhanced chemical vapor deposition, the silicon nitride layer 102 formed is etched by the buffer oxide etchant for 50 minutes. It is between 12 and 16 A/min; when the ratio of silane to ammonia is 6:1 in plasma enhanced chemical vapor deposition, the silicon nitride layer 102 formed is etched by the buffer oxide etchant for 50 minutes. It is between 8 and 10 A/min. Wherein 1A = 0.1 nanometers (nm) = 10 ^{- 10} m.

As shown in FIG. 3, after the annealing process (heating to 420 ° C under nitrogen atmosphere for 30 minutes), the interface of the silicon nitride layer 102 after the wet etching process (the interface between the silicon nitride layer and the polysilicon) The lateral undercut is reduced to 1.3 um, and the annealed silicon nitride layer 102 is difficult to be stuck by the tape. The conventional silicon nitride layer 102 which is not subjected to the annealing process has a lateral undercut of 1.8 to 2 um after the wet etching process, referring to FIG. 4, and the silicon nitride layer 102 which is not annealed is wet-etched. It is easier to be stuck by tape after etching and other processes, and its adhesion is poor.

As shown in FIG. 5, after the annealing process (heating to 700 ° C in a nitrogen atmosphere for 60 minutes), the interface of the silicon nitride layer 102 after the wet etching process (the interface between the silicon nitride layer 102 and the polysilicon) The lateral undercut is reduced to 0.3 um, and the silicon nitride layer is difficult to be stuck by the tape after high temperature annealing.

The silicon nitride layer 102 prepared by the above method can significantly enhance the adhesion of the silicon nitride layer 102 to a film layer such as a polysilicon layer (or an oxide layer), and further reduce the silicon nitride layer 102 in wet etching, etc. The transverse ablation size of the interface after the process. The corrosion resistance of the silicon nitride layer 102 is enhanced, the adhesion of the silicon nitride layer 102 to the adjacent film layer (LPSIN, polysilicon layer or oxide layer) is enhanced, and the silicon nitride layer 102 is reduced in wet etching. The horizontal ablation size of the interface after etching and other processes.

In addition, a method for fabricating a semiconductor device is provided. In one embodiment, the semiconductor device is a MEMS microphone backplane, and the method for preparing the MEMS microphone backplane includes:

Step S610: providing a semiconductor substrate.

A semiconductor substrate is provided. In one embodiment, the semiconductor substrate is a stacked semiconductor substrate, a polysilicon layer, a low pressure silicon nitride layer. The semiconductor substrate may also be a semiconductor substrate, a polysilicon layer, and the semiconductor substrate may also be only a semiconductor substrate.

Step S620: depositing a silicon nitride layer on the polysilicon layer by plasma enhanced chemical vapor deposition; the silicon nitride layer is formed by depositing ammonia gas and silane as a reactant, and the gas of the silane and the ammonia gas The flow ratio ranges from 3 to 6.

A silicon nitride layer is deposited on the substrate by plasma enhanced chemical vapor deposition (PECVD). Plasma enhanced chemical vapor deposition (PECVD) is a method in which a luminescence electric field is generated by a radio frequency electric field to form a plasma under a low vacuum condition by using a silane gas, an ammonia gas, and a nitrogen gas to enhance a chemical reaction and thereby reduce a deposition temperature. The silicon nitride layer is deposited at a normal temperature to 400 ° C. Among them, the silicon nitride layer is deposited by using ammonia gas and silane as reactants.

In one embodiment, the plasma-enhanced chemical vapor deposition technique is used to prepare the silicon nitride layer, and the gas passing therethrough and the flow rate thereof are: a gas flow ratio of silane to ammonia gas of 3:1. The gas flow rate of other gases (such as nitrogen) can be set according to actual needs.

In one embodiment, the plasma-enhanced chemical vapor deposition technique is used to prepare the silicon nitride layer, and the gas passing therethrough is at a gas flow ratio of silane to ammonia of 6:1. The gas flow rate of other gases (such as nitrogen) can be set according to actual needs.

Through a large number of experiments, the higher the content of silicon in the silicide, the better the corrosion resistance. The embodiment of the present application controls the ratio of silane to ammonia by chemically enhanced plasma vapor deposition, and the gas of silane and ammonia. The flow ratio is controlled between 3:1 and 6:1, which not only reduces the corrosion rate of the silicon nitride layer in the acid, but also improves the corrosion resistance of the silicon nitride layer in the acid, and also reduces the silicon nitride. The cross-image undercut of the contact interface of the layer and the polysilicon layer in the wet etching process.

Step S630: performing dry etching patterning on the silicon nitride layer.

The silicon nitride layer is dry etched by CF ₄ /CHF ₃ or SF ₆ , that is, the silicon nitride layer is patterned by dry etching, and photoresist is needed in the process of dry etching. As a mask, a via array is etched on the silicon nitride layer to form vias in the MEMS microphone backplane.

Step S640: annealing the silicon nitride layer.

The silicon nitride forming the target pattern after the dry etching is annealed. The annealing method may be nitrogen annealing or laser annealing. When annealing by a nitrogen annealing process, the annealing temperature ranges from 400 to 800 ° C, and the annealing duration is from 30 minutes to 120 minutes.

In one embodiment, the annealing treatment is performed by nitrogen annealing. Before heating, a nitrogen gas with a purity of 99.999% was flushed into the quartz tube annealing furnace for a period of time. The silicon nitride layer was placed on a quartz boat and pushed into a quartz furnace, and the temperature was raised to 420 ° C under nitrogen atmosphere for 30 minutes. The heating power source is disconnected, and the silicon nitride layer is cooled in the quartz furnace to the room temperature by the quartz tube annealing furnace without any external cooling measures.

In one embodiment, the annealing treatment is performed by nitrogen annealing. Before heating, a nitrogen gas with a purity of 99.999% was flushed into the quartz tube annealing furnace for a period of time. The silicon nitride layer was placed on a quartz boat and pushed into a quartz furnace, and heated to 700 ° C in a nitrogen atmosphere for 60 minutes. The heating power source is disconnected, and the silicon nitride layer is cooled in the quartz furnace to the room temperature by the quartz tube annealing furnace without any external cooling measures. In other embodiments, a suitable annealing temperature and annealing duration can be selected according to actual needs, wherein the annealing temperature ranges from 400 to 800 ° C and the annealing duration is from 30 minutes to 120 minutes. Through a period of annealing treatment, the adhesion of the silicon nitride layer to the polysilicon layer (or oxide layer) and the like can be significantly enhanced, and the lateral drilling of the silicon nitride layer at the interface after the wet etching process can be further reduced. Etch size.

In other embodiments, different annealing temperatures, annealing durations, and gas ratios of silane to ammonia gas in step S620 can also be arbitrarily combined.

Step S650: wet etching the silicon nitride layer structure and etching a portion of the substrate.

The annealed silicon nitride layer (ie, a silicon nitride layer structure) is subjected to wet etching, and the wet etching etching solution is a buffer oxide etchant or 49% hydrofluoric acid. When the silicon nitride layer is wet etched, a buffer oxide etchant or 49% hydrofluoric acid is implanted into the via array, and the buffer oxide etchant or 49% hydrofluoric acid may be slowly or slightly corroded. A silicon nitride layer and etches away the oxide layer on the semiconductor substrate. Specifically, the duration of the wet etching of the silicon nitride layer ranges from 45 to 55 minutes.

In the conventional ion-enhanced chemical vapor deposition, the ratio of silane to ammonia is 2:1, and the silicon nitride layer formed has a corrosion rate of 89-100 A/min in the buffer oxide etchant. In the embodiment of the present application, when the ratio of silane to ammonia is 3:1 in the plasma enhanced chemical vapor deposition, the silicon nitride layer formed by the buffer oxide etchant is corroded for 50 minutes. Between 48 and 58 A/min; when the ratio of silane to ammonia is 4:1 in plasma enhanced chemical vapor deposition, the silicon nitride layer formed by the buffer oxide etchant is corroded for 50 minutes at a rate of 32. Between ~36A/min; when the ratio of silane to ammonia is 5:1 in plasma enhanced chemical vapor deposition, the silicon nitride layer formed by the buffer oxide etchant is corroded for 50 minutes for 12 minutes. Between 16A/min; when the ratio of silane to ammonia is 6:1 in plasma enhanced chemical vapor deposition, the silicon nitride layer formed by the buffer oxide etchant is corroded for 8 minutes at a rate of 8-10A. Between /min. Wherein 1A = 0.1 nanometers (nm) = 10 ^{- 10} m.

After annealing (heating to 420 ° C under nitrogen atmosphere for 30 minutes), the lateral undercut of the silicon nitride layer at the interface (the interface between the silicon nitride layer and the polysilicon) after the wet etching process is reduced to 1.3. Um, and the annealed silicon nitride layer is difficult to be stuck by the tape. However, the conventional silicon nitride layer which is not subjected to the annealing process has a lateral undercut of 1.8 to 2 um after the wet etching process, and the silicon nitride layer which is not annealed is relatively easy after the wet etching process. It is stuck by tape and has poor adhesion.

After the annealing process (heating to 700 ° C under nitrogen atmosphere for 60 minutes), the lateral ablation of the silicon nitride layer at the interface (the interface between the silicon nitride layer and the polysilicon) after the wet etching process is reduced to 0.3. Um, and after the high temperature annealing, the silicon nitride layer is difficult to be stuck by the tape.

The silicon nitride layer prepared by the above method can obviously enhance the adhesion of the silicon nitride layer and the polysilicon layer (or oxide layer) and the like, and further reduce the interface of the silicon nitride layer after the wet etching process. The horizontal erosion size. The corrosion resistance of the silicon nitride layer is enhanced, the adhesion of the silicon nitride layer to the adjacent film layer (low-pressure silicon nitride layer, polysilicon layer or oxide layer) is enhanced, and the silicon nitride layer is reduced in the wet method. The horizontal ablation size of the interface after etching and other processes.

The technical features of the above-described embodiments may be arbitrarily combined. For the sake of brevity of description, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction between the combinations of these technical features, All should be considered as the scope of this manual.

The above-described embodiments are merely illustrative of several embodiments of the present invention, and the description thereof is more specific and detailed, but is not to be construed as limiting the scope of the invention. It should be noted that a number of variations and modifications may be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of the invention should be determined by the appended claims.

Claims (15)

1. A method for improving the corrosion resistance of silicon nitride, comprising:

   Providing a semiconductor substrate;

   Depositing a silicon nitride layer on the semiconductor substrate by plasma enhanced chemical vapor deposition; the silicon nitride layer is deposited by using ammonia gas and silane as a reactant, and the gas flow ratio range of the silane and the ammonia gas 3 to 6;

   Annealing the silicon nitride layer;

   The silicon nitride layer is wet etched and etched a portion of the substrate.
2. The method according to claim 1, wherein before the step of annealing the silicon nitride layer, the method further comprises:

   The silicon nitride layer is subjected to dry etching patterning.
3. The method according to claim 2, wherein the dry etching is performed by using any one of CF ₄ , CHF ₃ and SF 6 .
4. The method according to claim 1, wherein the gas flow ratio of the silane to the ammonia gas is any one of 3, 4, 5 and 6.
5. The method of claim 1 wherein said silicon nitride layer has a thickness of from 1 micron to 3 microns.
6. The method of claim 1 wherein the annealing process is nitrogen annealing or laser annealing.
7. The method according to claim 6, wherein the nitrogen annealing temperature ranges from 400 to 800 ° C; and the nitrogen annealing has a duration ranging from 30 minutes to 120 minutes.
8. The method according to claim 1, wherein the wet etching etching solution is a buffer oxide etchant or hydrofluoric acid.
9. A method of fabricating a semiconductor device, comprising:

   Providing a semiconductor substrate;

   Depositing a silicon nitride layer on the semiconductor substrate by plasma enhanced chemical vapor deposition; the silicon nitride layer is formed by depositing ammonia gas and silane as a reactant, and the gas flow ratio range of the silane and the ammonia gas 3 to 6;

   Performing dry etching patterning on the silicon nitride layer;

   Annealing the silicon nitride layer;

   The silicon nitride layer is wet etched and etched a portion of the substrate.
10. The method according to claim 9, wherein the dry etching is performed by using any one of CF ₄ , CHF ₃ and SF 6 .
11. The method according to claim 9, wherein the gas flow ratio of the silane to the ammonia gas is any one of 3, 4, 5 and 6.
12. The method of claim 9 wherein said silicon nitride layer has a thickness of from 1 micron to 3 microns.
13. The method of claim 9 wherein the annealing process is nitrogen annealing or laser annealing.
14. The method according to claim 13, wherein the nitrogen annealing temperature ranges from 400 to 800 ° C; and the nitrogen annealing has a duration ranging from 30 minutes to 120 minutes.
15. The method according to claim 9, wherein the wet etching etching solution is a buffer oxide etchant or hydrofluoric acid.

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