WO2019007005A1 - 一种绝对信号校正方法及绝对信号的校正系统 - Google Patents

一种绝对信号校正方法及绝对信号的校正系统 Download PDF

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WO2019007005A1
WO2019007005A1 PCT/CN2017/118863 CN2017118863W WO2019007005A1 WO 2019007005 A1 WO2019007005 A1 WO 2019007005A1 CN 2017118863 W CN2017118863 W CN 2017118863W WO 2019007005 A1 WO2019007005 A1 WO 2019007005A1
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signal
absolute
value
absolute signal
incremental
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PCT/CN2017/118863
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English (en)
French (fr)
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彭玉礼
胡余生
钟成堡
肖胜宇
周溪
付兵非
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珠海格力节能环保制冷技术研究中心有限公司
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Publication of WO2019007005A1 publication Critical patent/WO2019007005A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D18/00—Testing or calibrating apparatus or arrangements provided for in groups G01D1/00 - G01D15/00
    • G01D18/001—Calibrating encoders
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/244—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains
    • G01D5/245—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains using a variable number of pulses in a train
    • G01D5/2454—Encoders incorporating incremental and absolute signals

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  • the present application relates to the field of automation technologies, and in particular, to an absolute signal correction method and an absolute signal correction system.
  • the absolute position is a combination of absolute and incremental signals.
  • Fig. 1A it is a waveform diagram of an absolute signal (6a) and an incremental signal (5a) in an ideal case, wherein the periodic variation of the absolute signal (6a) corresponds to the incremental signal (5a) one by one, and there is no error.
  • the signals of the absolute signal (6a) and the incremental signal (5a) have a certain error, that is, the absolute signal (6a) leads or lags the incremental signal (5a).
  • FIG. 1B a waveform diagram of the absolute signal (6a) and the incremental signal (5a) in actual conditions, there is an error ⁇ between the two.
  • the absolute encoder Due to the error between the absolute signal (6a) and the incremental signal (5a), the absolute encoder will output the wrong absolute position when combining the absolute signal with the incremental signal.
  • the present application provides an absolute signal correction method and apparatus.
  • the present application can correct an absolute signal to eliminate an error between an absolute signal and an incremental signal, thereby causing an absolute encoder to output when combining an absolute signal with an incremental signal. Correct absolute position.
  • a method for correcting an absolute signal comprising:
  • the current value of the absolute signal is assigned such that the absolute value of the difference between the current value of the absolute signal and the historical value is equal to one.
  • the method for correcting the absolute signal further includes:
  • the step of acquiring the first value of the original absolute signal is continued.
  • the method for correcting the absolute signal further includes:
  • the method for correcting the absolute signal further includes:
  • the incremental signal and the absolute signal are combined to obtain an absolute position.
  • An absolute signal correction system comprising:
  • a light source a grating, an incremental photosensitive element coupled to the grating, an incremental processing circuit coupled to the incremental photosensitive element, an absolute photosensitive element coupled to the grating, an absolute processing circuit coupled to the absolute photosensitive element, and said An absolute signal correction circuit connected to the incremental processing circuit and the absolute processing circuit;
  • the absolute signal correction circuit is configured to generate an incremental signal by using the incremental photosensitive element, generate an original absolute signal by using the absolute photosensitive element, and acquire a first value of the original absolute signal, if the system clock reaches an increment And obtaining a second value of the original absolute signal, and if the difference between the second value and the first value is equal to 1, assigning the second value to the absolute signal; The difference between the binary value and the first value is not equal to 1, and the first value is added to the absolute signal by one.
  • the absolute signal correction circuit is further configured to: if the system clock reaches a falling edge of the incremental signal, acquire a third value of the original absolute signal, and determine whether the absolute signal is equal to the third The value, if so, maintains the absolute signal, and if not, assigns the third value to the absolute signal.
  • the absolute signal correction system further includes:
  • a combining circuit for combining the incremental signal and the absolute signal to obtain an absolute position.
  • the incremental processing circuit includes:
  • I-V conversion circuit I-V conversion circuit, signal amplification circuit and signal comparison circuit.
  • the absolute processing circuit includes:
  • the present application uses the rising edge of the incremental signal 5a to correct the absolute signal 6a, and uses the falling edge of the incremental signal to correct the absolute signal, thereby eliminating the error between the absolute signal and the incremental signal, thereby ensuring the absolute signal and the incremental signal.
  • the accuracy of the combination uses the rising edge of the incremental signal 5a to correct the absolute signal 6a, and uses the falling edge of the incremental signal to correct the absolute signal, thereby eliminating the error between the absolute signal and the incremental signal, thereby ensuring the absolute signal and the incremental signal.
  • 1A is a schematic diagram of waveforms of an absolute signal (6a) and an incremental signal (5a) in an ideal case disclosed in an embodiment of the present application;
  • 1B is a schematic diagram of waveforms of an absolute signal (6a) and an incremental signal (5a) in an actual case disclosed in the embodiment of the present application;
  • FIG. 2 is a schematic structural diagram of an absolute signal correction system disclosed in an embodiment of the present application.
  • FIG. 3 is a flowchart of a method for correcting an absolute signal disclosed in an embodiment of the present application.
  • an absolute signal correction system provided by the present application includes:
  • a light source 1 a grating 2, an incremental photosensitive element 3 connected to the grating 2, an incremental processing circuit 5 connected to the incremental photosensitive element 3, an absolute photosensitive element 4 connected to the grating 2, and the absolute photosensitive element 4
  • a connected absolute processing circuit 6 an absolute signal correction circuit 7 connected to the incremental processing circuit 5 and the absolute processing circuit 6.
  • the light source 1 emits infrared rays using an infrared lamp, and the grating 2 is composed of an incremental code channel and an absolute code track.
  • the incremental photosensitive element 3 connected to the grating 2 can convert the optical signal of the light source 1 into an electrical signal according to the incremental code channel of the grating 2, and the output 3a is a sinusoidal photocurrent signal, and the output 3b is a cosine optical current signal.
  • the incremental processing circuit 5 includes an I-V conversion circuit, a signal amplifying circuit, and a signal comparison circuit for converting the sinusoidal photocurrent signal 3a and the cosine photocurrent signal 3b into pulse signals 5a, 5b, and outputting the pulse signals 5a, 5b.
  • the absolute photosensitive element 4 connected to the grating 2 converts the optical signal of the light source 1 into an electrical signal according to the absolute code channel of the grating 2, and outputs 4a as a photocurrent signal.
  • the absolute processing circuit 5 includes an I-V conversion circuit and a signal comparison circuit that converts the photocurrent signal 4a into a pulse signal 6a output.
  • the pulse signal 5a is an incremental signal
  • the pulse signal 6a is an absolute signal.
  • FIG. 1A it is a schematic diagram of the waveforms of the absolute signal (6a) and the incremental signal (5a) under ideal conditions. See FIG. 1B for a waveform diagram of the absolute signal (6a) and the incremental signal (5a) in actual situations. There is an error ⁇ between the two.
  • the absolute signal output by the absolute processing circuit 5 is referred to as the original absolute signal.
  • the present application provides an absolute signal correction circuit 7 that can receive the incremental signal and the original absolute signal and correct the original absolute signal so that the incremental signal and the corrected absolute signal can eliminate the error.
  • each absolute signal corresponds to one cycle of the incremental signal
  • the present embodiment uses the incremental signal as a reference to correct the original absolute signal.
  • the present application provides a method for correcting an absolute signal, which specifically includes the following steps:
  • Step S301 Acquire a first value of the original absolute signal.
  • the absolute processing circuit 5 takes the first value from the original absolute signal.
  • Step S302 It is determined whether the system clock has reached the rising edge of the incremental signal. If not, the process proceeds to step S301, and if yes, the process proceeds to step S303.
  • the absolute signal will jump at the rising edge of the incremental signal.
  • step S301 it is judged whether the rising edge of the system clock reaches the rising edge of the incremental signal, and if it indicates that the transition timing of the absolute signal has not yet reached, the process proceeds to step S301 to reacquire the first value of the original absolute signal.
  • step S303 If yes, it indicates that the transition timing of the absolute signal is reached, and the process proceeds to step S303 to obtain the second value of the original absolute signal.
  • Step S303 If the system clock reaches the rising edge of the incremental signal, the second value of the original absolute signal is obtained.
  • Step S304 determining whether the absolute value of the difference between the second value and the first value is equal to 1, if yes, proceeding to step S305; otherwise, proceeding to step S306.
  • the absolute value of the difference between the second value and the first value can be calculated. If the absolute value of the difference is equal to 1, it indicates that the second value of the original absolute signal is correct at this rising edge, and there is no error. That is, the absolute signal jumps at the rising edge of the incremental signal.
  • Step S305 assigning the second value to the current value of the absolute signal.
  • Step S306 Assign a value to the current value of the absolute signal such that the absolute value of the difference between the current value of the absolute signal and the historical value is equal to one.
  • Step S307 If the system clock reaches the falling edge of the incremental signal, obtain a third value of the original absolute signal.
  • the error is only near the rising edge of the incremental signal, and the absolute signal is correct near the falling edge of the incremental signal, ie no error occurs.
  • Step S308 determining whether the absolute signal is equal to the third value; if yes, proceeding to step S309, otherwise proceeding to step S310.
  • Step S309 If yes, maintaining the absolute signal
  • Step S310 If no, the third signal is assigned to the absolute signal.
  • the present application uses the rising edge of the incremental signal 5a to correct the absolute signal 6a, and uses the falling edge of the incremental signal to correct the absolute signal, thereby eliminating the error between the absolute signal and the incremental signal, thereby ensuring the absolute signal and the incremental signal.
  • the accuracy of the combination uses the rising edge of the incremental signal 5a to correct the absolute signal 6a, and uses the falling edge of the incremental signal to correct the absolute signal, thereby eliminating the error between the absolute signal and the incremental signal, thereby ensuring the absolute signal and the incremental signal.
  • the functions described in the method of the present embodiment can be stored in a computing device readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product. Based on such understanding, a portion of the embodiments of the present application that contributes to the prior art or a portion of the technical solution may be embodied in the form of a software product stored in a storage medium, including a plurality of instructions for causing a
  • the computing device (which may be a personal computer, server, mobile computing device, or network device, etc.) performs all or part of the steps of the methods described in various embodiments of the present application.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and the like, which can store a program generation signal. medium.

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Abstract

一种绝对信号校正方法及绝对信号的校正系统，其中绝对信号的校正方法包括：获取原始绝对信号（6a）的第一值，若系统时钟达到增量信号（5a）的上升沿，则获取原始绝对信号（6a）的第二值，若第二值与第一值差值的绝对值不等于 1，则为绝对信号的当前值赋值，使得绝对信号的当前值与历史值的差值的绝对值等于 1。此方法可以校正绝对信号，以消除绝对信号和增量信号之间的误差，从而使得绝对编码器在将绝对信号与增量信号组合时输出正确绝对位置。

Description

一种绝对信号校正方法及绝对信号的校正系统
相关申请
本申请要求2017年07月03日申请的，申请号为201710533511.3，名称为“一种绝对信号校正方法及绝对信号的校正系统”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及自动化技术领域，尤其涉及一种绝对信号校正方法及绝对信号的校正系统。
背景技术
在绝对编码器中，绝对位置是由绝对信号和增量信号组合而成。参见图1A，为理想情况下绝对信号(6a)和增量信号(5a)的波形示意图，其中，绝对信号(6a)周期变化与增量信号(5a)一一对应，没有误差。
但是在实际情况下，绝对信号(6a)和增量信号(5a)的信号是有一定误差的，即绝对信号(6a)超前或滞后增量信号(5a)。参见图1B为实际情况下绝对信号(6a)和增量信号(5a)的一种波形示意图，两者之间存在误差ε。
由于绝对信号(6a)和增量信号(5a)之间具有误差，会导致绝对编码器将绝对信号与增量信号组合时，输出错误绝对位置的问题。
发明内容
本申请提供了一种绝对信号的校正方法及装置，本申请可以校正绝对信号，以消除绝对信号和增量信号之间的误差，从而使得绝对编码器在将绝对信号与增量信号组合时输出正确绝对位置。
为了实现上述目的，本申请提供了以下技术特征：
一种绝对信号的校正方法，其特征在于，包括：
获取原始绝对信号的第一值；
若系统时钟达到增量信号的上升沿，则获取所述原始绝对信号的第二值；
若所述第二值与所述第一值差值的绝对值不等于1，则为绝对信号的当前值赋值，使得绝对信号的当前值与历史值的差值的绝对值等于1。
可选的，所述绝对信号的校正方法还包括：
若系统时钟未达到增量信号的上升沿，则继续执行获取原始绝对信号的第一值的步骤。
可选的，在为绝对信号赋予所述第二值之后，或者，在为绝对信号赋予所述第一值加1 之后，所述绝对信号的校正方法还包括：
若系统时钟到达所述增量信号的下降沿，则获取所述原始绝对信号的第三值；
判断所述绝对信号是否等于所述第三值；
若是，则维持所述绝对信号；
若否，则为所述绝对信号赋予所述第三值。
可选的，所述绝对信号的校正方法还包括：
组合所述增量信号和所述绝对信号获得绝对位置。
一种绝对信号的校正系统，包括：
光源、光栅、与光栅相连的增量感光元件、与所述增量感光元件相连的增量处理电路、与光栅相连的绝对感光元件、与所述绝对感光元件相连的绝对处理电路，与所述增量处理电路和所述绝对处理电路相连的绝对信号校正电路；
其中，所述绝对信号校正电路，用于利用所述增量感光元件生成增量信号，利用所述绝对感光元件生成原始绝对信号，并获取原始绝对信号的第一值，若系统时钟达到增量信号的上升沿，则获取所述原始绝对信号的第二值，若所述第二值与所述第一值的差值等于1，则为绝对信号赋予所述第二值；若所述第二值与所述第一值的差值不等于1，则为绝对信号赋予所述第一值加1。
可选的，所述绝对信号校正电路，还用于若系统时钟到达所述增量信号的下降沿，则获取所述原始绝对信号的第三值，判断所述绝对信号是否等于所述第三值，若是，则维持所述绝对信号，若否，则为所述绝对信号赋予所述第三值。
可选的，所述绝对信号的校正系统还包括：
合并电路，用于组合所述增量信号和所述绝对信号获得绝对位置。
可选的，所述增量处理电路包括：
I-V转换电路、信号放大电路和信号比较电路。
可选的，所述绝对处理电路包括：
I-V转换电路和信号比较电路。
通过上述内容，可以发现本申请具有以下有益效果：
本申请利用增量信号5a的上升沿校正绝对信号6a，利用增量信号的下降沿来校正绝对信号，以此来消除绝对信号和增量信号之间的误差，进而保证绝对信号与增量信号组合的准确性。
附图说明
为了使本申请的内容更容易被清楚的理解，下面根据本申请的具体实施例并结合附图， 对本申请作进一步详细的说明，其中
图1A为本申请实施例公开的理想情况下绝对信号(6a)和增量信号(5a)的波形示意图；
图1B为本申请实施例公开的实际情况下绝对信号(6a)和增量信号(5a)的波形示意图；
图2为本申请实施例公开的一种绝对信号的校正系统的结构示意图；
图3为本申请实施例公开的一种绝对信号的校正方法的流程图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
参见图2，为本申请提供的一种绝对信号的校正系统，包括：
光源1、光栅2、与光栅2相连的增量感光元件3、与所述增量感光元件3相连的增量处理电路5、与光栅2相连的绝对感光元件4、与所述绝对感光元件4相连的绝对处理电路6，与所述增量处理电路5和所述绝对处理电路6相连的绝对信号校正电路7。
下面介绍绝对信号的校正系统的处理过程：
光源1采用红外线灯发射红外线，光栅2由增量码道和绝对码道组成。与光栅2相连的增量感光元件3可以根据光栅2的增量码道，将光源1的光信号转换成电信号，并输出的3a为正弦光电流信号，输出3b为余弦光电流信号。
增量处理电路5包括I-V转换电路、信号放大电路和信号比较电路，其作用为将正弦光电流信号3a、余弦光电流信号3b转换为脉冲信号5a、5b，并输出脉冲信号5a、5b。
与光栅2相连的绝对感光元件4根据光栅2的绝对码道将光源1的光信号转换成电信号，并输出4a为光电流信号。绝对处理电路5包括I-V转换电路和信号比较电路，将光电流信号4a转换为脉冲信号6a输出。
上述脉冲信号5a即为增量信号，脉冲信号6a即为绝对信号。参见图1A，为理想情况下绝对信号(6a)和增量信号(5a)的波形示意图，参见图1B为实际情况下绝对信号(6a)和增量信号(5a)的一种波形示意图，两者之间存在误差ε。
为了便于称呼，将绝对处理电路5输出的绝对信号称为原始绝对信号。
本申请提供了绝对信号校正电路7，可以接收增量信号和原始绝对信号，并校正原始绝对信号，以便增量信号和校正后绝对信号可以消除误差。
正常情况下，每个绝对信号半个周期对应增量信号的一个周期，本实施例以增量信号为基准，来校正原始绝对信号。
参见图3，本申请提供绝对信号的校正方法，具体包括以下步骤：
步骤S301：获取原始绝对信号的第一值。
在每个系统时钟的上升沿，绝对处理电路5会从原始绝对信号上获取第一值。
步骤S302：判断系统时钟是否到达增量信号的上升沿，若否，则进入步骤S301，若是，则进入步骤S303。
通过图1A可知，在增量信号的上升沿时，绝对信号会发生跳变。
因此，判断系统时钟的上升沿是否达到增量信号的上升沿，若否则表明还未到绝对信号的跳变时机，继续进入步骤S301重新获取原始绝对信号的第一值。
若是，则表明达到绝对信号的跳变时机，进入步骤S303获取原始绝对信号的第二值。
步骤S303：若系统时钟达到增量信号的上升沿，则获取所述原始绝对信号的第二值。
步骤S304：判断所述第二值与所述第一值的差值的绝对值是否等于1，若是，则进入步骤S305；否则进入步骤S306。
正常情况下，在增量信号的上升沿发生跳变后，第一值与第二值则会不同，差值为1。因此，可以计算第二值与第一值的差值的绝对值，若差值的绝对值等于1，则说明原始绝对信号的第二值在此上升沿是正确的，没有误差。即，绝对信号在增量信号上升沿时刻发生跳变。
步骤S305：为绝对信号的当前值赋予所述第二值。
步骤S306：为绝对信号的当前值赋值，使得绝对信号的当前值与历史值的差值的绝对值等于1。
步骤S307：若系统时钟到达所述增量信号的下降沿，则获取所述原始绝对信号的第三值。
在增量信号的上升沿校正信号后，在系统时钟的达到增量信号的下降沿后，验证校正后的绝对信号是否正确。
通常情况下，误差仅在增量信号的上升沿附近，在增量信号的下降沿附近绝对信号是正确的，即没有发生误差的。
因此，在系统时钟达到增量信号的下降沿时，获取原始绝对信号的第三值。
步骤S308：判断所述绝对信号是否等于所述第三值；若是，则进入步骤S309，否则进入步骤S310。
步骤S309：若是，则维持所述绝对信号；
步骤S310：若否，则为所述绝对信号赋予所述第三值。
通过上述内容，可以发现本申请具有以下有益效果：
本申请利用增量信号5a的上升沿校正绝对信号6a，利用增量信号的下降沿来校正绝对信号，以此来消除绝对信号和增量信号之间的误差，进而保证绝对信号与增量信号组合的准确 性。
本实施例方法所述的功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算设备可读取存储介质中。基于这样的理解，本申请实施例对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该软件产品存储在一个存储介质中，包括若干指令用以使得一台计算设备(可以是个人计算机，服务器，移动计算设备或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代信号的介质。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其它实施例的不同之处，各个实施例之间相同或相似部分互相参见即可。
对所公开的实施例的上述说明，使本领域专业技术人员能够实现或使用本申请。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的，本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下，在其它实施例中实现。因此，本申请将不会被限制于本文所示的这些实施例，而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (9)

  1. 一种绝对信号的校正方法，其特征在于，包括：
    获取原始绝对信号的第一值；
    若系统时钟达到增量信号的上升沿，则获取所述原始绝对信号的第二值；
    若所述第二值与所述第一值差值的绝对值不等于1，则为绝对信号的当前值赋值，使得绝对信号的当前值与历史值的差值的绝对值等于1。
  2. 如权利要求1所述的绝对信号的校正方法，其特征在于，还包括：
    若系统时钟未达到增量信号的上升沿，则继续执行获取原始绝对信号的第一值的步骤。
  3. 如权利要求1所述的绝对信号的校正方法，其特征在于，在为绝对信号赋予所述第二值之后，或者，在为绝对信号赋予所述第一值加1之后，所述绝对信号的校正方法还包括：
    若系统时钟到达所述增量信号的下降沿，则获取所述原始绝对信号的第三值；
    判断所述绝对信号是否等于所述第三值；
    若是，则维持所述绝对信号；
    若否，则为所述绝对信号赋予所述第三值。
  4. 如权利要求1-3任一项所述的绝对信号的校正方法，其特征在于，还包括：
    组合所述增量信号和所述绝对信号获得绝对位置。
  5. 一种绝对信号的校正系统，其特征在于，包括：
    光源、光栅、与光栅相连的增量感光元件、与所述增量感光元件相连的增量处理电路、与光栅相连的绝对感光元件、与所述绝对感光元件相连的绝对处理电路，与所述增量处理电路和所述绝对处理电路相连的绝对信号校正电路；
    其中，所述绝对信号校正电路，用于利用所述增量感光元件生成增量信号，利用所述绝对感光元件生成原始绝对信号，并获取原始绝对信号的第一值，若系统时钟达到增量信号的上升沿，则获取所述原始绝对信号的第二值，若所述第二值与所述第一值的差值等于1，则为绝对信号赋予所述第二值；若所述第二值与所述第一值的差值不等于1，则为绝对信号赋予所述第一值加1。
  6. 如权利要求5所述的绝对信号的校正系统，其特征在于，
    所述绝对信号校正电路，还用于若系统时钟到达所述增量信号的下降沿，则获取所述原始绝对信号的第三值，判断所述绝对信号是否等于所述第三值，若是，则维持所述绝对信号，若否，则为所述绝对信号赋予所述第三值。
  7. 如权利要求5或6所述的绝对信号的校正系统，其特征在于，还包括：
    合并电路，用于组合所述增量信号和所述绝对信号获得绝对位置。
  8. 如权利要求5所述的绝对信号的校正系统，其特征在于，所述增量处理电路包括：I-V转换电路、信号放大电路和信号比较电路。
  9. 如权利要求6所述的绝对信号的校正系统，其特征在于，所述绝对处理电路包括：I-V转换电路和信号比较电路。
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