WO2019004609A1 - Multilayered ceramic substrate and method for manufacturing same - Google Patents

Multilayered ceramic substrate and method for manufacturing same Download PDF

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Publication number
WO2019004609A1
WO2019004609A1 PCT/KR2018/006066 KR2018006066W WO2019004609A1 WO 2019004609 A1 WO2019004609 A1 WO 2019004609A1 KR 2018006066 W KR2018006066 W KR 2018006066W WO 2019004609 A1 WO2019004609 A1 WO 2019004609A1
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WO
WIPO (PCT)
Prior art keywords
ceramic thin
ceramic
thin plates
thin plate
conductive paste
Prior art date
Application number
PCT/KR2018/006066
Other languages
French (fr)
Korean (ko)
Inventor
노태형
Original Assignee
주식회사 디아이티
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Filing date
Publication date
Application filed by 주식회사 디아이티 filed Critical 주식회사 디아이티
Priority to JP2020514483A priority Critical patent/JP7008369B2/en
Priority to CN201880033582.XA priority patent/CN110678434B/en
Priority to EP18824352.1A priority patent/EP3647299A4/en
Priority to US16/615,818 priority patent/US11419218B2/en
Publication of WO2019004609A1 publication Critical patent/WO2019004609A1/en

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    • C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/622—Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/62222—Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products obtaining ceramic coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
    • H05K3/1291—Firing or sintering at relative high temperatures for patterns on inorganic boards, e.g. co-firing of circuits on green ceramic sheets
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B18/00—Layered products essentially comprising ceramics, e.g. refractory products
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    • C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
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    • C04B37/003—Joining burned ceramic articles with other burned ceramic articles or other articles by heating by means of an interlayer consisting of a combination of materials selected from glass, or ceramic material with metals, metal oxides or metal salts
    • C04B37/005—Joining burned ceramic articles with other burned ceramic articles or other articles by heating by means of an interlayer consisting of a combination of materials selected from glass, or ceramic material with metals, metal oxides or metal salts consisting of glass or ceramic material
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    • G01—MEASURING; TESTING
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    • G01R31/2889—Interfaces, e.g. between probe and tester
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    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/225—Correcting or repairing of printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494—Heating methods for reflowing of solder
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
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    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
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    • H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
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    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/067—Etchants
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    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Definitions

  • the present invention relates to a multilayer ceramic substrate and a method of manufacturing the same.
  • a multilayer ceramic substrate is manufactured by stacking a plurality of ceramic sheets to integrate the components.
  • the multilayer ceramic substrate is widely used as a substitute for a printed circuit board (PCB) due to heat resistance, abrasion resistance, and excellent electrical characteristics, and the demand for the multilayer ceramic substrate is gradually increasing.
  • PCB printed circuit board
  • the multilayer ceramic substrate is generally manufactured by a method called a green sheet lamination method.
  • a ceramic green sheet is manufactured by molding a slurry of a ceramic powder and an organic binder by a tape casting method, punching the prepared ceramic green sheet to form a via hole in the ceramic green sheet
  • the conductive paste is screen-printed on the surface of the sheet, and then the ceramic green sheets are laminated by the required number of layers, heated and pressed to form a laminate, and then fired at a predetermined temperature.
  • the laminate undergoes thermal expansion and heat shrinkage, which causes defects such as cracks, warpage, gap generation, peeling, and the like in the ceramic thin plates constituting the laminate.
  • the degree of thermal expansion and the degree of thermal shrinkage of each layer of the laminate differ, and furthermore, the degree of thermal expansion and the degree of heat shrinkage There is no choice but to be different. Therefore, depending on the layer of the laminate, and also in one layer, the degree of defects varies depending on the portion of the ceramic thin plate. For this reason, there is a problem in that the via holes of the aligned layers are shifted before firing the stacked body, and the conductivity between the layers is also defective.
  • defects may occur in the internal electrodes and the external electrodes formed on the ceramic thin plate. In this case, whether defective or not is confirmed only after the laminate is fired There is a problem that the entire layered product must be discarded if defects occur.
  • the conductive paste printing layer formed on the surface of the ceramic green sheet is disposed between the layers of the green sheets in the laminating process to form internal electrodes of the finally obtained multilayer ceramic substrate.
  • a space is formed between the layers of the multilayer ceramic substrate due to the thickness of the internal electrode.
  • the empty space may cause defects such as substrate cracks and the like.
  • a difference in height between a portion having an internal electrode and a portion having no internal electrode in one multilayer ceramic substrate may occur, which may cause a problem that the surface flatness of the substrate is lowered.
  • the green sheet laminating method a green sheet is laminated and the laminate is baked at a constant temperature all at once to produce a multilayer ceramic substrate. Therefore, the green sheets of the respective layers constituting the laminate had to have the same material exhibiting the reaction at the same temperature, and as a result, there was a problem that the multilayer ceramic substrate could not be made variously from the material side.
  • probe cards semiconductor integrated circuit devices are typically formed by packaging a plurality of integrated circuit chips in a highly complex and precise manner. The electrical characteristics of the semiconductor integrated circuits are inspected for defects in the semiconductor integrated circuit.
  • a probe card is used.
  • the probe card electrically connects a wafer of a semiconductor integrated circuit to a tester, and is largely composed of a space transformer and a probe pin.
  • the space transformer fixes a probe pin contacting a bond pad of a chip of a semiconductor integrated circuit and connects the probe pin to a main board of the probe card.
  • Such a space transformer is composed of a multilayer ceramic substrate and a polyimide layer laminated on the multilayer ceramic substrate. Since the conventional space transformer is manufactured by the multilayer ceramic co-sintering method using the ceramic green sheet, the cost is high, the product shrinks due to contraction and expansion of the ceramic sheet due to the high temperature process, An electrical short circuit occurs and the semiconductor integrated circuit test is not properly performed. In addition, due to the warping of the ceramic thin plate, a flatness defect occurs, resulting in a defect in the flatness of the probe pin connected to the space transformer. This causes a portion where the probe pin does not contact with the semiconductor integrated circuit, There was a problem that inspection did not work properly.
  • Another object of the present invention is to provide a space transformer manufacturing method capable of reducing a flatness defect of a probe pin connected to a space transformer and a space transformer manufactured by the above method.
  • a method of manufacturing a multilayer ceramic substrate comprising: firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates; Filling the via holes of each of the plurality of ceramic thin plates with a conductive paste and forming a via electrode by heat treatment; printing a pattern on the cross section of each of the plurality of ceramic thin plates with a conductive paste to form an internal electrode Applying a bonding agent to a cross section of each of the remaining ceramic thin plates except the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid via holes, and electrically connecting the plurality of ceramic thin plates to each other through the via electrode and the internal electrode
  • the plurality of ceramic thin plates are aligned and laminated so as to be connected
  • the type and / or a plurality of ceramic sheet of the laminate can include the step of firing or heat treatment.
  • the conductive paste includes a glass component, and the plurality of laminated ceramic thin plates are heat-treated at a temperature higher than the melting point of the bonding agent and lower than a melting point of the ceramic thin plate and a melting point of the conductive paste have.
  • the conductive paste of the via hole or the conductive paste of the pattern may be etched using an etching solution and the via hole may be refilled if the conductive paste of the via hole or the internal electrode is inspected by checking the conductivity of the via electrode or the internal electrode
  • the pattern can be reprinted.
  • the thickness of each of the plurality of ceramic thin plates is 10 to 500 microns
  • the thickness of the bonding layer formed by the bonding agent is 2 to 100 microns
  • the diameter of each of the plurality of ceramic thin plates may be 12 inches or more.
  • a multilayer ceramic substrate is a multilayer ceramic substrate in which a plurality of ceramic thin plates are laminated, wherein the plurality of ceramic thin plates are produced by firing a plurality of ceramic green sheets, Each of which includes a via electrode and an internal electrode, the via electrode being formed by filling a via hole formed in each of the plurality of ceramic thin plates with a conductive paste and subjecting the paste to a heat treatment,
  • the multilayer ceramic substrate is formed by applying a bonding agent to a cross section of each of the remaining ceramic thin plates except the uppermost ceramic thin plate to avoid a via hole
  • each of the plurality of ceramic thin plates May be connected so that the enemy laminated by aligning the plurality of ceramic sheet with, and generating the plurality of the laminated ceramic sheet by firing or heat treatment.
  • the present invention can provide a method for manufacturing a multilayer ceramic substrate which does not cause a problem of misalignment of via-holes in each layer during the manufacturing process of the multilayer ceramic substrate, and a multilayer ceramic substrate manufactured by the method.
  • the present invention can provide a method for manufacturing a multilayer ceramic substrate which can confirm and repair defects in each layer during the manufacturing process of the multilayer ceramic substrate before the completion of the multilayer ceramic substrate and to provide a multilayer ceramic substrate produced by the method have.
  • the present invention can provide a method of manufacturing a multilayer ceramic substrate in which a height difference due to internal electrodes formed between layers of a multilayer ceramic substrate does not occur, and a multilayer ceramic substrate manufactured by the method.
  • the present invention can provide a method for manufacturing a multilayer ceramic substrate in which ceramic thin plates having different materials are laminated, and a multilayer ceramic substrate manufactured according to the method.
  • the present invention can provide a space transformer manufacturing method capable of reducing a flatness defect of a probe pin connected to a space transformer and a space transformer manufactured according to the method.
  • the present invention can provide a method of manufacturing a space transformer for enhancing durability of a probe pin connected to a space transformer, cost reduction, and easy maintenance, and a space transformer manufactured according to the method.
  • FIG. 1 is a view illustrating a method of manufacturing a ceramic thin plate according to an embodiment of the present invention.
  • FIG. 2 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
  • FIG 3 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
  • FIG. 4 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
  • FIG. 5 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
  • FIG. 6 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
  • FIG. 7 is a view showing the structure of a multilayer ceramic substrate manufactured according to the embodiment of FIG. 5 or FIG. 6;
  • FIG. 8 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
  • FIG. 9 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
  • FIG. 10 is a view illustrating a method of manufacturing a space transformer according to an embodiment of the present invention.
  • FIG. 11 is a front view of a space transformer manufactured in accordance with the embodiment of FIG.
  • FIG. 12 is a top view of a space transformer manufactured in accordance with the embodiment of FIG.
  • the ceramic material means a non-metallic inorganic material obtained through a heat treatment process. Ceramics can be named ceramics.
  • Firing refers to a process for producing a curable material having a hard and dense structure by heating a combined raw material to a high temperature. That is, firing refers to a process for producing a compound having different properties by heating a combined raw material at a high temperature.
  • Heat treatment refers to heating to give the original function of the material to the extent that the properties of the material do not change
  • a via hole is a plating through hole used for connection between two or more layers of internal conductors without inserting components in a multilayer printed wiring board.
  • the plated through hole refers to a hole through which a metal is deposited on a wall surface to perform a through connection of a printed wiring board.
  • the via hole may be called a via hole or a through hole.
  • the conductive paste means a composite material in which conductive powder, binder, and the like are dispersed in a fluid resin solution.
  • Etching refers to the use of chemicals to corrode surfaces of metals, ceramics, semiconductors, and the like.
  • a probe card refers to a device that connects a semiconductor chip and a test device to check the operation of the semiconductor.
  • the probe needle attached to the probe card contacts the wafer and sends electricity, and the defective semiconductor chip is selected according to the return signal.
  • Electrostatic discharge is an electrostatic phenomenon that occurs when an electric charge accumulated on an object due to friction is instantaneously released from the moment of connection with another object.
  • the multilayer ceramic substrate refers to a substrate in which thin layers made of a ceramic material are laminated in multiple layers and each layer is electrically connected.
  • the multilayer ceramic substrate can be named MLC (Multi Layer Ceramic) substrate.
  • the multilayer ceramic substrate is composed of a plurality of ceramic thin plates, and in this specification, the ceramic thin plate may mean one layer of a ceramic thin plate.
  • the green sheet refers to a product obtained by suspending aluminum powder or the like in a solvent, a plasticizer, etc., and drying it in a sheet form.
  • Ceramic green sheet refers to a green sheet made from ceramic powder.
  • FIG. 1 is a view illustrating a method of manufacturing a ceramic thin plate according to an embodiment of the present invention.
  • ceramic powder is first prepared to produce a ceramic laminate.
  • the ceramic powder may be made of any one of LTCC, mullite, BaO, SiO2, Al2O3, B2O3, and CaO, and two or more kinds of such ceramic powders may be prepared.
  • the ceramic powder is mixed with a binder, a plasticizer and an organic solvent to prepare a slurry, which is cast into a sheet.
  • a method of making a ceramic sheet is known, and a sheet made or commercialized may be used. That is, a ceramic sheet is adhered to a releasing paper such as a PET film.
  • the thickness of the ceramic sheet may be between 5 and 200 microns (um).
  • the ceramic sheet is first fired to obtain a ceramic thin plate, and then the ceramic thin plate can be processed as required.
  • a ceramic thin plate having a generally flat surface can not be obtained.
  • the temperature and pressure of all the surfaces of the ceramic sheet must be the same during the firing process. This is because the thermodynamic parameters of the ceramic particles constituting the ceramic sheet, If the thermal behavior is the same, the strain due to stress does not occur and the flat surface is uniform. That is, when a thin ceramic sheet is fired using a general firing process, a thin ceramic laminate having a thickness of 200 microns or less undergoes a stress phenomenon and almost all of the cracks and wrinkles are deformed. Therefore, one embodiment of the present invention has found the following firing method, which can produce a thin ceramic plate having a uniform flat surface with a thickness of 20 to 250 microns.
  • a ceramic plate having a planar surface is first prepared to produce a ceramic thin plate.
  • a ceramic sheet is placed on the table.
  • the area of the surface plate is wider than the sheet area, and a margin portion is required.
  • a spacer (spacer) is arranged in the margin portion.
  • the height of the support that is, the distance between the base and the base is higher than the thickness of the ceramic sheet, but is preferably as small as possible.
  • the height of the struts can be, for example, 50 to 1000 microns. Further, since it is productive to fuse a plurality of ceramic sheets at one time, it is possible to repeatedly stack the ceramic sheets by placing another ceramic sheet on the base plate and laying the base plate thereon.
  • a ceramic sheet is disposed between the base plates and firing is performed at a high temperature of 1000 to 1600 ⁇ .
  • the firing time may vary depending on the area and / or number of the ceramic sheets. For example, when one ceramic sheet having a width of 12 inches is fired, the high-temperature firing may be 1 to 5 hours.
  • the firing is carried out in an oxygen-free reducing atmosphere or an air atmosphere.
  • the thickness of the ceramic thin plate having the uniform flat surface thus produced can reach a very thin level of about 20 microns. Because of its rigid plate shape, which has a thin thickness but is not a sheet but a fired solid substrate, the precision of post-processing is greatly improved, and the handling itself becomes very easy. In the case of the above-mentioned multi-layer ceramic substrate for a probe card, a very high yield can be obtained by using a ceramic thin plate having a thickness of about 80 microns manufactured as described above.
  • Multi-layer ceramic substrate and manufacturing method thereof Multi-layer ceramic substrate and manufacturing method thereof
  • FIG. 2 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
  • a via hole is formed in the ceramic thin plate according to an embodiment of the present invention by laser processing, and the via hole is filled with a conductive paste.
  • the conductive paste may include one of Ag, Cu, Au, Pd, Pt, Ag-Pd, Ni, Mo and W,
  • the firing does not necessarily require an oxygen-free environment.
  • the conductive paste Ag can be fired at 700 to 900 deg. C, preferably 800 deg. C in an air atmosphere.
  • the firing time may vary depending on the number and area of the substrates, and may be from 0.5 hours to 2 hours in the case of a multilayer ceramic substrate having a width of 12 inches.
  • the amount / defect of the layered via hole filled with the conductive paste is inspected by vision.
  • Good products are subjected to the following steps, and defects are etched away after the conductor is recycled.
  • Good products are heat treated for via holes for each layer, and conductor patterns are printed for each layer to inspect positive / defective by vision. In the case of good products, the printed conductor pattern is heat-treated and the next step is taken, and the defective conductor can be etched away and then recycled.
  • the good products are printed with the bonding material for each layer and the layers are aligned to laminate and heat the bonded body after bonding. The electrical and mechanical properties of the finished assembly are checked.
  • the multilayer ceramic substrate can be stably supplied.
  • the method of processing the ceramic thin plate can be widely applied to a multilayer ceramic substrate for a probe card where a processed thin ceramic plate is required.
  • Such a method for producing a multilayer ceramic substrate has a high yield, and when a problem occurs in the baking process of the conductive paste, the conductor portion of the layer is etched away with an etching solution, and the ceramic thin plate can be recycled, which is more efficient .
  • Etching solutions which only etch metal and not etch ceramic are well known in the art and are not specifically limited.
  • FIG 3 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
  • a method of manufacturing a multilayer ceramic substrate includes the following steps. (1) firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates, (2) forming via holes in each of the plurality of ceramic thin plates, (3) forming via holes in each of the plurality of ceramic thin plates (4) forming an internal electrode by printing a pattern on a cross section of each of the plurality of ceramic thin plates with a conductive paste and subjecting the paste to a heat treatment, (5) (6) applying a bonding agent to the cross-section of each of the ceramic thin plates except the uppermost ceramic thin plate among the plurality of ceramic thin plates to electrically connect the plurality of ceramic thin plates through the via electrode and the internal electrode, Aligning and laminating each of the ceramic thin plates; and (7) heat treating the plurality of stacked ceramic thin plates.
  • an embodiment of the present invention can produce a plurality of ceramic thin plates by firing a plurality of ceramic green sheets. That is, in one embodiment of the present invention, one ceramic green sheet is fired to produce one ceramic thin sheet, and another ceramic green sheet is fired to produce another one of the ceramic thin sheets, Can be generated.
  • the firing temperature may be 1000 to 1500 ° C.
  • the ceramic green sheet may have a thickness of 50 to 600 microns, and the ceramic laminate may have a thickness of 10 to 500 microns.
  • the diameter of the ceramic green sheet and the ceramic thin plate may be 12 inches or more.
  • one embodiment of the present invention may calcine the ceramic green sheet in an oxygen-free or atmospheric environment for 1 to 5 hours.
  • one embodiment of the present invention may form a via hole in each of the plurality of ceramic thin plates.
  • One embodiment of the present invention can form one or more via holes in one ceramic thin plate.
  • the via hole may be formed through processes such as laser irradiation and chemical etching.
  • the diameter of the via hole may be 30 to 200 microns.
  • the via-holes formed in one layer may have the same size. Specifically, the reason why the size of the via-holes formed in one layer can be the same is because the conventional problem in which the alignment of the interlayer via-holes is deviated by using the method of forming and laminating ceramic thin plates independently for each layer is solved.
  • the via holes are made larger in the case of severe distortion and the via holes are made smaller in the places where the distortion is relatively less.
  • Such conventional processes have various sizes of via holes, which are difficult to design and inconvenient in terms of cost and / or time.
  • the via hole of each of the plurality of ceramic thin plates may be filled with the conductive paste and heat-treated to form the via electrode.
  • the reason why the conductive paste is filled in the via-hole of the ceramic thin plate is for electrical connection between a plurality of ceramic thin plates to be stacked later.
  • the conductor used in the conductive paste of this step may correspond to one or more of Ag, Cu, Au, Pd, Pt, Ag-Pd, Ni, Mo and W.
  • an embodiment of the present invention can print a pattern using a conductive paste on the cross section of each of the plurality of ceramic thin plates.
  • the patterns printed for each ceramic thin plate may be different.
  • the printed and heat-treated pattern may correspond to the internal electrode.
  • the thickness of the internal electrode may be 1 to 10 microns.
  • the bonding agent may be applied to the cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid the via holes.
  • the uppermost ceramic thin plate may refer to a ceramic thin plate to be placed on the uppermost layer when a plurality of ceramic thin plates are stacked.
  • the bonding agent can be applied on the pattern as a material that does not affect the pattern printed on the cross section of the ceramic thin plate. Further, the bonding agent can be used to adhere the ceramic thin plates to be laminated later.
  • the bonding agent may be an inorganic material and / or an organic material, and the inorganic material may include glass, ceramics and the like, and the organic material may include an epoxy and the like. According to an embodiment of the present invention, the bonding agent may form a bonding layer, and the thickness of the bonding layer may be 2 to 100 microns.
  • an embodiment of the present invention may stack the plurality of ceramic thin plates so that the plurality of ceramic thin plates are electrically connected through the via electrode and the internal electrode, respectively have). That is, the pattern printed on the surface of the ceramic thin plate of one layer can be electrically connected to the pattern printed on the surface of the ceramic thin plate of the other layer through the via hole.
  • the inner electrode of one layer is electrically connected to the inner electrode of the lower layer through the via electrode of the layer
  • the inner electrode of one layer is electrically connected to the inner electrode of the upper layer through the via electrode of the upper layer .
  • the lowermost layer input terminal electrode and the probe pin terminal which is the uppermost layer measurement terminal can be electrically connected.
  • one embodiment of the present invention may fuse or heat treat a plurality of laminated ceramic thin plates. That is, one embodiment of the present invention can bond a plurality of ceramic thin plates to each other by melting a bonding agent applied to the end faces of the plurality of ceramic thin plates by firing or heat-treating a plurality of laminated ceramic thin plates. At this time, the melting point of the bonding agent may vary depending on the material constituting the bonding agent.
  • the melting point of the bonding agent is set to the melting point of the ceramic thin plate, May be lower than the melting point of the used conductive paste (melting point of the internal electrode material) and the melting point of the conductive paste filled in the via hole.
  • the melting point of the ceramic thin plate may be different depending on the material constituting the ceramic thin plate. Therefore, one embodiment of the present invention is capable of firing or heat-treating a plurality of laminated ceramic thin plates at a temperature higher than the melting point of the bonding agent and lower than the melting point of the ceramic thin plate.
  • one embodiment of the present invention can prevent defects such as cracks in the ceramic thin plate itself by firing or heat treating a plurality of ceramic thin plates laminated at a temperature not affecting the ceramic thin plate.
  • one embodiment of the present invention is capable of firing or heat-treating a plurality of ceramic thin plates laminated in an atmospheric environment at 600 ° C to 900 ° C, preferably at 800 ° C.
  • the firing time or the heat treatment time may vary depending on the number and area of the plurality of laminated ceramic thin plates.
  • each of the plurality of stacked ceramic thin plates has a diameter of 12 inches
  • one embodiment of the present invention can fuse or heat treat a plurality of stacked ceramic thin plates for 0.5 to 2 hours.
  • An embodiment of the present invention can manufacture the multilayer ceramic substrate through the steps (1) to (7).
  • an embodiment of the present invention can check the conductance of via holes and / or patterns of each of the plurality of ceramic thin plates after the step (3) and / or the step (4).
  • an embodiment of the present invention may etch the conductive paste used for the via-hole and / or the pattern using the etching solution and again perform the step (3) Can be performed. At this time, the etching solution may be etched only with the conductive paste and the ceramic thin plate may not be etched.
  • the conductive paste used for the internal electrode or the via electrode may contain 0 to 20% of the glass component.
  • the bonding agent can be applied on the ceramic thin plate while avoiding the internal electrode and the via electrode.
  • some glass components contained in the internal electrodes are exposed on the upper surface of the conductive paste to form a thin glass layer, so that the plurality of ceramic thin plates can be more strongly adhered.
  • some of the glass components contained in the internal electrode are present under the conductive paste, so that the adhesive force between the ceramic thin plate and the internal electrode of the layer can be enhanced.
  • a bonding agent is applied to a cross section of a ceramic thin plate to avoid a via hole to form a bonding layer, and a conductive paste is filled in the via hole by the thickness of the bonding layer to electrically .
  • FIG. 4 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
  • the multilayer ceramic substrate 4010 may include a plurality of laminated ceramic thin plates 4020.
  • Each of the plurality of ceramic thin plates 4020 may include a via electrode 4030 and an internal electrode 4040.
  • the via-electrode may be formed by filling a via hole formed in each of the plurality of ceramic thin plates with a conductive paste and performing a heat treatment, and the internal electrode prints a pattern on the end face of each of the plurality of ceramic thin plates with conductive paste And can be formed by heat treatment.
  • the plurality of ceramic thin plates may be produced by firing a plurality of ceramic green sheets, and the multilayer ceramic substrate may be formed by applying a bonding agent to the end faces of the remaining ceramic thin plates except for the uppermost ceramic thin plate, And aligning and laminating the plurality of ceramic thin plates so that each of the plurality of ceramic thin plates is electrically connected via the via electrode and the internal electrode, and firing or heat-treating the plurality of laminated ceramic thin plates.
  • a detailed description of the method for manufacturing the multilayer ceramic substrate has been described above with reference to FIG.
  • FIG. 5 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
  • a method of manufacturing a multilayer ceramic substrate includes the following steps. (1) firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates, (2) forming via holes in each of the plurality of ceramic thin plates, (3) forming via holes in each of the plurality of ceramic thin plates (4) forming an internal electrode by printing a pattern on the cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates with a conductive paste and heat-treating the conductive paste; (5) applying a bonding agent to a cross section of each of the remaining ceramic thin plates except the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid via holes, (6) applying a bonding agent to the plurality of ceramic thin plates through the via- Aligning and laminating each of the plurality of ceramic thin plates so as to be electrically connected to each other, (7) (8) forming an outer electrode on an end face of the uppermost ceramic thin plate; (9) forming an outer electrode on the opposite side of the cross-
  • the via hole of each of the plurality of ceramic thin plates may be filled with the conductive paste and heat-treated to form the via electrode.
  • the via-electrode may mean a via hole filled with a conductive paste.
  • an inner electrode may be formed by printing a pattern on a cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates with a conductive paste and heat-treating the pattern.
  • the internal electrode may mean a pattern itself printed on a cross section of the ceramic thin plate.
  • the internal electrode may be electrically connected to the via electrode. That is, an embodiment of the present invention may not print a pattern on the uppermost ceramic thin plate in this step.
  • an embodiment of the present invention can print an external electrode on the surface of the uppermost ceramic thin plate. That is, an embodiment of the present invention can form an external electrode on the surface of the uppermost ceramic thin plate after stacking a plurality of ceramic thin plates and firing or heat treatment. At this time, the external electrode may be formed through application of a conductive paste as an electrode exposed to the outside of a plurality of ceramic thin plates.
  • the outer electrode may be formed on the opposite side of the cross-section of the lowest ceramic thin plate among the plurality of ceramic thin plates.
  • the lowermost ceramic thin plate may refer to a ceramic thin plate positioned in the lowest layer among a plurality of laminated ceramic thin plates.
  • the external electrode may be formed through application of a conductive paste as an electrode exposed to the outside of a plurality of ceramic thin plates. That is, one embodiment of the present invention can print out the outer electrode in accordance with the position of the via electrode on the outer end surface of the lowermost ceramic thin plate after stacking and firing or heat-treating a plurality of ceramic thin plates.
  • an embodiment of the present invention can electrically connect the outer electrode of the uppermost ceramic thin plate and the external electrode of the lowermost ceramic thin plate of the multilayer ceramic substrate through the via-electrode existing in the ceramic thin plate of each layer.
  • the outer electrode of the uppermost ceramic thin plate, the outer electrode of the lowermost ceramic thin plate, and the inner electrode of each layer can be electrically connected through the via electrode of each layer.
  • An embodiment of the present invention can manufacture the multilayer ceramic substrate through the steps (1) to (9).
  • FIG. 6 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
  • a method of manufacturing a multilayer ceramic substrate includes the following steps. (1) firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates, (2) forming via holes in each of the plurality of ceramic thin plates, (3) forming via holes in each of the plurality of ceramic thin plates (4) forming an internal electrode by printing a pattern on the cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates with a conductive paste and heat-treating the conductive paste; (5) forming external electrodes on the cross-section of the uppermost ceramic thin plate, (6) forming external electrodes on the opposite side of the cross-section of the lowest ceramic thin plate among the plurality of ceramic thin plates on which the internal electrodes are formed, ) A bonding agent is applied to the cross sections of the remaining ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid the via holes (7) aligning and stacking the plurality of ceramic thin plates so that each of the plurality of ceramic thin plates is
  • FIG. 7 is a view showing the structure of a multilayer ceramic substrate manufactured according to the embodiment of FIG. 5 or FIG. 6;
  • the multilayer ceramic substrate 7010 may include a plurality of laminated ceramic thin plates 7020, 7030, and 7040.
  • the plurality of ceramic thin plates may include a topmost ceramic thin plate 7030 and a lowermost ceramic thin plate 7040.
  • Each of the ceramic thin plates 7020 located inside the multilayer ceramic substrate may include a via electrode 7050 and / or an internal electrode 7060, and the uppermost ceramic thin plate 7030 located at the outermost periphery of the multilayer ceramic substrate,
  • the lowermost ceramic thin plate 7040 may include a via electrode 7050, an internal electrode 7060, and / or an external electrode 7070.
  • FIG. 5 A detailed description of the method of manufacturing the multilayer ceramic substrate has been described above with reference to FIGS. 5 and 6.
  • FIG. 5 A detailed description of the method of manufacturing the multilayer ceramic substrate has been described above with reference to FIGS. 5 and 6.
  • Multi-layer ceramic substrate with different layer materials and manufacturing method thereof Multi-layer ceramic substrate with different layer materials and manufacturing method thereof
  • FIG. 8 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
  • a method of manufacturing a multilayer ceramic substrate includes the following steps. (1) firing a plurality of first ceramic green sheets to produce a plurality of first ceramic thin sheets, (2) firing a second ceramic green sheet having a different material from that of the first ceramic green sheet, (3) forming a via hole in each of the plurality of first ceramic thin plates and the second ceramic thin plate, (4) forming a via hole in each of the plurality of first ceramic thin plates and the second ceramic thin plate, Filling the via hole with a conductive paste and forming a via electrode by heat treatment; (5) patterning the end faces of the first ceramic thin plate and the second ceramic thin plate with a conductive paste to form an internal electrode (6) removing the via holes from the cross sections of the remaining ceramic thin plates except for the uppermost ceramic thin plate among the plurality of first ceramic thin plates and the second ceramic thin plates, (7) a step of applying the first ceramic thin plate and the second ceramic thin plate so that the first ceramic thin plate and the second ceramic thin plate are electrically connected to each other through the via electrode and
  • the second ceramic thin plate may have a material having an electrical property different from that of the material of the first ceramic thin plate.
  • a ceramic thin plate of a material suitable for the specific layer is used, and the thickness and the area of the pattern of the ceramic thin plate are kept the same as those of the other layers.
  • the pattern can be easily designed.
  • the manufactured multilayer ceramic substrate should have a certain range of impedance values, and in the case of a multilayer ceramic substrate in which all layers have the same material, it may not be easy to design to have the impedance value.
  • the second ceramic thin plate may have a material stronger than the material of the first ceramic thin plate.
  • the second ceramic thin plate has a different material from that of the first ceramic thin plate, thereby making it possible to more easily improve the entire manufacturing process of the multilayer ceramic substrate.
  • a material layer for example, a material that facilitates via hole processing
  • the second ceramic thin plate may have a material functioning differently from the material of the first ceramic thin plate.
  • the second ceramic lamina may have a magnetic material that is designed for a functional material or a noise filter to eliminate frequency pulse noise that is exhibited by electrostatic discharge (ESD) and / or pulsing.
  • ESD electrostatic discharge
  • a plurality of ground layers were interposed between the layers in order to remove the noise of the interlayer electrical signals. This was due to design limitations in which all layers were made of the same material. However, when the magnetic material is used, it is not necessary to insert the ground layer into several layers.
  • the second ceramic thin plate having a different material from that of the first ceramic thin plate May be disposed on more than one layer in the layer.
  • the bending strength refers to the bending strength of the entire multilayer ceramic substrate.
  • the multilayer ceramic substrate includes not only the first ceramic thin plate and the second ceramic thin plate but also a ceramic thin plate having a material different from that of the first ceramic thin plate and the second ceramic thin plate can do.
  • a multilayer ceramic substrate in addition to the above-described step (2) according to the above-described embodiment of the embodiment of FIG. 5 or the embodiment of FIG. 6, a multilayer ceramic substrate have.
  • FIG. 9 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
  • the multilayer ceramic substrate 9010 may include a plurality of first ceramic thin plates 9020 and a second ceramic thin plate 9030.
  • Each of the first ceramic thin plate 9020 and the second ceramic thin plate 9030 may include a via electrode 9040 and an internal electrode 9050.
  • FIG. 10 is a view illustrating a method of manufacturing a space transformer according to an embodiment of the present invention.
  • a method of manufacturing a space transformer according to an embodiment of the present invention includes the following steps.
  • an embodiment of the present invention can produce a ceramic thin plate 11050 for fixing a probe pin by firing a new ceramic green sheet.
  • a hole 11080 having the shape of the bottom surface of the probe pin 11010 may be formed on the ceramic thin plate 11050 for fixing the probe pin.
  • the reason why the bottom surface of the probe pin has a shape is to insert and fix the probe pin into the hole.
  • the side interval 11090 between the hole and the probe pin may be designed to have a distance of 20 microns or less.
  • the ceramic thin plate for fixing the probe pin is made of ceramic material, holes can be formed in the end face of the thin plate without breaking the thin plate.
  • the thickness of the ceramic thin plate for fixing the probe pins on which the holes are formed may be 20 to 100 microns.
  • the hole may be formed at a position where the internal electrode 11070 of the multilayer ceramic substrate 11030 in contact with the ceramic thin plate for fixing the probe pin exists. The probe pin may be inserted into and fixed to the hole through solder to be electrically connected to the internal electrode 11070 of the multilayer ceramic substrate 11030.
  • an embodiment of the present invention may apply the electrode material 11040 to the side of the hole 11080 formed.
  • the electrode material may be Ag, Cu, Au, Ni, Sn or the like and may be used to fix the probe pin 11010 to the probe pin fixing ceramic thin plate 11050 using the solder 11020 have.
  • the bonding agent 11060 may be applied to the upper surface of the multilayer ceramic substrate 11030 to avoid a portion of the upper surface of the multilayer ceramic substrate 11030 that abuts the hole 11080.
  • the bonding agent 11060 may be the same as the bonding agent used for bonding the layers of the multilayer ceramic substrate 11030. A detailed description of the bonding agent has been described above.
  • an embodiment of the present invention is characterized in that an inner electrode 11070 formed on the upper surface of the multilayer ceramic substrate and a hole 11080 formed on the ceramic pin plate for fixing the probe pin are brought into contact with the multilayer ceramic substrate
  • a ceramic thin plate for fixing the probe pin can be laminated. That is, one layer of the ceramic thin plate for fixing the probe pin can be further laminated on the generated multilayer ceramic substrate.
  • the laminated multilayer ceramic substrate and the ceramic thin plate for fixing the probe pins may be fired or heat-treated.
  • an embodiment of the present invention may form the solder 11020 on the internal electrode 11070 of the multilayer ceramic substrate existing in the hole.
  • the solder may have a spherical shape of a cream solder.
  • the hole may be a hole passing through the thin plate on which the hole is formed, and the bottom of the hole where the solder is formed may be the upper surface of the internal electrode 11070 of the multilayer ceramic substrate.
  • the probe pin 11010 may be inserted into the hole 11080 to press the solder.
  • the solder may be heat treated to fix the probe pin to the hole and the internal electrode 11070 of the multilayer ceramic substrate.
  • the solder 11020 is turned into a liquid by applying pressure to the probe pin at the same time as the heat treatment, so that the probe pin can be fixed to the hole by flowing between the hole and the probe pin and solidifying as it is.
  • the probe pin may be electrically connected to the internal electrode 11070 of the multilayer ceramic substrate through the solid lead.
  • a plurality of holes may be formed in the ceramic thin plate for fixing the probe pins, and the solder may be collectively formed by mask printing or dispensing.
  • the number of probe pins equal to the number of the holes may be attached to and inserted back into a fixing plate (jig) arranged to coincide with the positions of the plurality of holes formed.
  • a plurality of probe pins attached to the fixing plate can be collectively inserted into the plurality of holes. Thereafter, the plurality of probe pins are fixed to the plurality of holes by collectively heat-treating the formed solder, and then a plurality of probe pins can be detached from the fixing plate.
  • Another embodiment of the present invention is a method of manufacturing a multilayer ceramic substrate for mounting a probe pin on a multilayer ceramic substrate, comprising the steps of: And thereafter, the ceramic thin plate for fixing the probe pin can be laminated on the multilayer ceramic substrate.
  • FIG. 11 is a front view of a space transformer manufactured in accordance with the embodiment of FIG.
  • the space transformer 11200 may include a laminated multilayer ceramic substrate 11030 and a ceramic thin plate 11050 for fixing a probe pin.
  • Each of the plurality of ceramic thin plates constituting the multilayer ceramic substrate may include a via electrode and an internal electrode.
  • the probe pin fixing ceramic thin plate 11050 includes a hole 11080 having the shape of the bottom surface of the probe pin 11010 and a hole 11080 formed on the side surface of the hole for fixing the probe pin 11010 to the hole 11080 And an electrode material 11040.
  • the space transformer may include the solder 11020 and the probe pin 11010 fixed to the hole through the electrode material 11040.
  • the probe pin may be fixed to the multilayer ceramic substrate 11030 and the ceramic thin plate 11050 for fixing the probe pin by heat-treating the solder 11020 formed in the hole.
  • Reference numeral 11100 in FIG. 11 is a view immediately before inserting and pressing the probe pin.
  • Reference numeral 11200 denotes a solder paste in which the probe pin is inserted and compressed, and the solder is heat-treated to complete the finished space after fixing the probe pin to the probe pin-
  • Fig. 7 is a view showing a transformer.
  • Fig. Reference numeral 11060 denotes a bonding agent for bonding a ceramic thin plate for fixing a probe pin to a multilayer ceramic substrate, and 11030 denotes a multilayer ceramic substrate. 11, has been described above in the description of FIG.
  • FIG. 12 is a top view of a space transformer manufactured in accordance with the embodiment of FIG.
  • FIG. 12 A detailed description of FIG. 12 has been given above in the description of FIG.
  • the present invention can be used in all industrial fields in which a multilayer ceramic substrate is used.

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Abstract

The present invention relates to a method for manufacturing a multilayered ceramic substrate. A method for manufacturing a multilayered ceramic substrate according to the present invention comprises: a step of sintering a plurality of ceramic green sheets to create a plurality of ceramic thin sheets; a step of forming a via-hole in each of the plurality of ceramic thin sheets; a step of filling the via-hole in each of the plurality of ceramic thin sheets with conductive paste and performing heat treatment to thereby form a via-electrode; a step of printing a pattern onto an end surface of each of the plurality of ceramic thin sheets with conductive paste and performing heat treatment to thereby form an internal electrode; a step of applying a bonding agent onto the end surface of each ceramic thin sheets except for the uppermost ceramic thin plate among the plurality of ceramic thin sheets while avoiding the via-holes; a step of aligning and laminating each of the plurality of ceramic thin sheets so that the plurality of ceramic thin sheets are electrically connected to each other through the via-electrode and the internal electrode; and a step of sintering or heat-treating the laminated plurality of ceramic thin sheets.

Description

다층 세라믹 기판 및 그의 제조 방법Multi-layer ceramic substrate and manufacturing method thereof
본 발명은 다층 세라믹 기판 및 그의 제조 방법에 관한 것이다.The present invention relates to a multilayer ceramic substrate and a method of manufacturing the same.
최근 전자기기 기술 발달과 더불어 기기 자체가 경박단소화 및 박형화되는 추세에 비추어 볼 때 부품의 집적화는 필수적이며, 상기 부품의 집적화를 위해 다수개의 세라믹 시트를 적층하여 다층 세라믹 기판을 제조하고 있다. 또한, 상기 다층 세라믹 기판은 내열성, 내마모성 및 우수한 전기적 특성으로 인하여 기존의 PCB(printed circuit board)의 대체품으로 많이 이용되고 있으며, 점점 그 수요가 늘어가고 있는 추세이다.In recent years, along with the development of electronic devices and the tendency of the devices themselves to be thin, thin, and thin, it is essential to integrate the components, and a multilayer ceramic substrate is manufactured by stacking a plurality of ceramic sheets to integrate the components. In addition, the multilayer ceramic substrate is widely used as a substitute for a printed circuit board (PCB) due to heat resistance, abrasion resistance, and excellent electrical characteristics, and the demand for the multilayer ceramic substrate is gradually increasing.
상기 다층 세라믹 기판은 일반적으로 그린 시트 적층법(green sheet lamination method)이라 불리는 방법으로 제조된다. 이러한 방법은, 세라믹 분말과 유기 바인더로 된 슬러리(slurry)를 테이프 캐스팅법(tape casting method)으로 성형하여 세라믹 그린 시트를 제조하고, 제조된 세라믹 그린 시트를 펀칭하여 세라믹 그린 시트에 비아 홀을 형성한 후 도전성 페이스트(paste)를 구멍에 충전하고, 시트 표면에 도전성 페이스트를 스크린 인쇄한 다음, 상기 세라믹 그린 시트를 필요한 층수만큼 적층하고 가열 및 가압하여 적층체로 제조한 후 일정온도로 소성하는 것이다.The multilayer ceramic substrate is generally manufactured by a method called a green sheet lamination method. In this method, a ceramic green sheet is manufactured by molding a slurry of a ceramic powder and an organic binder by a tape casting method, punching the prepared ceramic green sheet to form a via hole in the ceramic green sheet The conductive paste is screen-printed on the surface of the sheet, and then the ceramic green sheets are laminated by the required number of layers, heated and pressed to form a laminate, and then fired at a predetermined temperature.
그런데, 상기 적층체를 소성하고 냉각하는 과정에서, 적층체는 열 팽창 및 열 수축을 하게 되고 이에 따라 적층체를 이루는 세라믹 박판들에 크랙, 휨, 갭 생성, 박리 현상 등이 불량이 생기게 된다. 나아가, 적층체의 모든 부분에 일정한 온도가 가해지는 것이 아니기 때문에, 적층체의 각 층마다 열 팽창 정도 및 열 수축 정도가 다르고 나아가, 한 층에서도 세라믹 박판의 부분마다 열 팽창 정도 및 열 수축 정도가 다를 수 밖에 없다. 따라서, 적층체의 층에 따라 및 한 층에서도 세라믹 박판의 부분에 따라 상기 불량의 정도가 다르게 된다. 그리고 이 때문에, 적층체를 소성하기 전에 정렬되어있던 각 층의 비아 홀이 어긋나면서 층간의 도전성에도 불량이 생길 수 있는 문제점이 있다.However, during the process of firing and cooling the laminate, the laminate undergoes thermal expansion and heat shrinkage, which causes defects such as cracks, warpage, gap generation, peeling, and the like in the ceramic thin plates constituting the laminate. Further, since a constant temperature is not applied to all the portions of the laminate, the degree of thermal expansion and the degree of thermal shrinkage of each layer of the laminate differ, and furthermore, the degree of thermal expansion and the degree of heat shrinkage There is no choice but to be different. Therefore, depending on the layer of the laminate, and also in one layer, the degree of defects varies depending on the portion of the ceramic thin plate. For this reason, there is a problem in that the via holes of the aligned layers are shifted before firing the stacked body, and the conductivity between the layers is also defective.
또한, 상기 적층체를 소성하는 과정에서, 세라믹 박판 자체에 생기는 불량 외에도, 세라믹 박판에 형성된 내부 전극 및 외부 전극에 불량이 생기는 경우가 있는데, 이 경우 불량 여부는 상기 적층체를 소성한 이후에야 확인할 수 있어서, 불량이 생기는 경우 적층체 전체를 폐기해야하는 문제점이 있다.Further, in the process of firing the laminate, in addition to the defects occurring in the ceramic thin plate itself, defects may occur in the internal electrodes and the external electrodes formed on the ceramic thin plate. In this case, whether defective or not is confirmed only after the laminate is fired There is a problem that the entire layered product must be discarded if defects occur.
또한, 상기 세라믹 그린 시트의 표면에 형성된 도전성 페이스트 인쇄층은 적층시 그린 시트들의 층간에 배치되어, 최종 얻어지는 다층 세라믹 기판의 내부 전극을 형성하게 된다. 이때, 상기 내부 전극의 두께때문에 다층 세라믹 기판의 층간에 떨어져 있는 공간이 발생된다. 상기 빈 공간은 이후 기판 크랙 등의 불량을 야기할 수 있다. 나아가, 하나의 다층 세라믹 기판 내에서 내부 전극이 있는 부분과 없는 부분의 높이 차가 발생하여 기판의 표면 평탄도가 저하되는 문제가 발생할 수 있다. Further, the conductive paste printing layer formed on the surface of the ceramic green sheet is disposed between the layers of the green sheets in the laminating process to form internal electrodes of the finally obtained multilayer ceramic substrate. At this time, a space is formed between the layers of the multilayer ceramic substrate due to the thickness of the internal electrode. The empty space may cause defects such as substrate cracks and the like. Furthermore, a difference in height between a portion having an internal electrode and a portion having no internal electrode in one multilayer ceramic substrate may occur, which may cause a problem that the surface flatness of the substrate is lowered.
나아가, 종래의 그린 시트 적층법은 그린 시트를 적층하고 적층체를 한꺼번에 일정 온도로 소성하여 다층 세라믹 기판을 생성한다. 따라서, 적층체를 구성하는 각 층의 그린 시트는 동일한 온도에서 반응이 나타나는 동일한 소재를 가질수 밖에 없었고, 이에 따라 다층 세라믹 기판을 소재면에서 다양하게 구성하지 못하는 문제점이 있었다.Furthermore, in the conventional green sheet laminating method, a green sheet is laminated and the laminate is baked at a constant temperature all at once to produce a multilayer ceramic substrate. Therefore, the green sheets of the respective layers constituting the laminate had to have the same material exhibiting the reaction at the same temperature, and as a result, there was a problem that the multilayer ceramic substrate could not be made variously from the material side.
프로브 카드에 대하여, 일반적으로 반도체 집적 회로 장치들은 복수의 집적 회로 칩들이 아주 복잡하면서 정교하게 패키징되어 형성된다. 이러한 반도체 집적 회로들에 대한 전기적 특성 검사를 수행하여, 반도체 집적 회로의 불량 여부를 검사하게되는데, 일반적으로 프로브 카드(probe card)라는 검사 장치가 사용된다. 상기 프로브 카드는 반도체 집적 회로의 웨이퍼와 테스터(tester)를 전기적으로 연결하는 기능을 하며, 스페이스 트랜스포머(space transformer)와 프로브 핀으로 크게 구성된다. 특히, 상기 스페이스 트랜스포머는 반도체 집적 회로의 칩의 본드 패드에 접촉되는 프로브 핀을 고정시키고, 그 프로브 핀을 프로브 카드의 메인 보드에 연결하는 역할을 하게 된다.For probe cards, semiconductor integrated circuit devices are typically formed by packaging a plurality of integrated circuit chips in a highly complex and precise manner. The electrical characteristics of the semiconductor integrated circuits are inspected for defects in the semiconductor integrated circuit. In general, a probe card is used. The probe card electrically connects a wafer of a semiconductor integrated circuit to a tester, and is largely composed of a space transformer and a probe pin. In particular, the space transformer fixes a probe pin contacting a bond pad of a chip of a semiconductor integrated circuit and connects the probe pin to a main board of the probe card.
이러한 스페이스 트랜스포머는 다층 세라믹 기판과 상기 다층 세라믹 기판 위에 적층되는 폴리미드 층으로 구성된다. 종래의 이러한 스페이스 트랜스포머는 세라믹 그린 시트를 이용하여 다층 세라믹 동시 소결 방법으로 제조하기 때문에 단가가 비싸고, 고온 공정에 의한 세라믹 시트의 수축 및 팽창으로 제품의 변형이 발생하여 제품 수율이떨어지게 되며, 이에 의한 전기적 단락이 발생하게 되어 반도체 집적 회로 검사가 제대로 이루어지지 않게 된다. 또한, 이러한 세라믹 박판의 뒤틀림 현상으로 평탄도 불량이 발생하여 스페이스 트랜스포머에 접속되어 있는 프로브 핀의 평탄도에 불량이 발생하게 되며, 이는 반도체 집적 회로에 프로브 핀이 접촉되지 않는 부분이 발생하게되어, 검사가 제대로 되지 않는 문제점이 있었다.Such a space transformer is composed of a multilayer ceramic substrate and a polyimide layer laminated on the multilayer ceramic substrate. Since the conventional space transformer is manufactured by the multilayer ceramic co-sintering method using the ceramic green sheet, the cost is high, the product shrinks due to contraction and expansion of the ceramic sheet due to the high temperature process, An electrical short circuit occurs and the semiconductor integrated circuit test is not properly performed. In addition, due to the warping of the ceramic thin plate, a flatness defect occurs, resulting in a defect in the flatness of the probe pin connected to the space transformer. This causes a portion where the probe pin does not contact with the semiconductor integrated circuit, There was a problem that inspection did not work properly.
또한, 종래의 이러한 스페이스 트랜스포머는 폴리미드 상면에 프로브 핀을 접착하기 위한 본딩 패드를 형성하고 레이저 조사를 통해 프로브 핀을 상기 본딩 패드에 개별적으로 정교하게 접착시켰다. 따라서, 종래에는 프로브 핀을 접착하기 위해 고가의 장비가 필요했고, 수만개의 핀을 접착하기 위해 많은 시간이 소요되는 문제점이 있었다. 또한, 검사를 여러 차례 진행하다 보면, 상기 프로브 핀과 상기 본딩 패드의 접착 부분의 내구성이 약해서, 상기 프로브 핀이 상기 본딩 패드로부터 쉽게 떨어져버리는 문제점이 있었다. 나아가, 떨어진 프로브 핀은 레이저 조사를 통해 상기 본딩 패드에 일일이 접착시키는 보수 작업이 필요했고, 이에 따르 인력이 직접 투입돼야하고 보수 시간이 오래 걸리는 문제점이 있었다.In addition, in the conventional space transformer, bonding pads for bonding probe pins on the upper surface of the polyimide are formed and the probe pins are individually and precisely bonded to the bonding pads through laser irradiation. Therefore, conventionally, in order to bond the probe pins, expensive equipments were required and it took a long time to attach tens of thousands of pins. Further, when the probe pin is repeatedly tested, the durability of the bonding portion between the probe pin and the bonding pad is weak, so that the probe pin easily separates from the bonding pad. Further, the detached probe pins are required to be repaired by bonding the bonding pads to the bonding pads through laser irradiation. Accordingly, there is a problem that the retraction force must be directly applied and the maintenance time is long.
위와 같은 문제점을 해결하기 위하여, 본 발명의 목적은 다층 세라믹 기판의 제조 과정 중 각 층의 비아 홀의 정렬이 어긋나는 문제가 생기지 않는 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공하는 것이다.In order to solve the above problems, it is an object of the present invention to provide a method of manufacturing a multilayer ceramic substrate which does not cause a problem of misalignment of via-holes in each layer during the manufacturing process of the multilayer ceramic substrate and a multilayer ceramic substrate manufactured by the method .
본 발명의 다른 목적은, 다층 세라믹 기판의 제조 과정 중 각 층에 생기는 불량을 다층 세라믹 기판이 완성되기 전에 미리 확인하고 보수할 수 있는 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공하는 것이다.It is another object of the present invention to provide a method of manufacturing a multilayer ceramic substrate which can confirm and repair defects in each layer during the manufacturing process of the multilayer ceramic substrate before the multilayer ceramic substrate is completed and a method of manufacturing a multilayer ceramic substrate .
본 발명의 다른 목적은, 다층 세라믹 기판의 층간에 형성되는 내부 전극에 의한 높이 차가 생기지 않는 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공하는 것이다.It is another object of the present invention to provide a method of manufacturing a multilayer ceramic substrate in which a difference in height is not caused by internal electrodes formed between the layers of the multilayer ceramic substrate, and a multilayer ceramic substrate manufactured by the method.
본 발명의 다른 목적은, 다층 세라믹 기판 각 층의 소재를 다양하게 구성할 수 있는 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공하는 것이다.It is another object of the present invention to provide a method for manufacturing a multilayer ceramic substrate which can constitute various layers of the multilayer ceramic substrate, and a multilayer ceramic substrate produced by the method.
본 발명의 다른 목적은, 스페이스 트랜스포머에 접속되어 있는 프로브 핀의 평탄도 불량을 줄일 수 있는 스페이스 트랜스포머 제조 방법 및 상기 방법에 따라 제조된 스페이스 트랜스포머를 제공하는 것이다.Another object of the present invention is to provide a space transformer manufacturing method capable of reducing a flatness defect of a probe pin connected to a space transformer and a space transformer manufactured by the above method.
본 발명의 다른 목적은, 스페이스 트랜스포머에 접속되어 있는 프로브 핀의 내구성 강화, 비용절감 및 수월한 보수를 위한 스페이스 트랜스포머 제조 방법 및 상기 방법에 따라 제조된 스페이스 트랜스포머를 제공하는 것이다.It is another object of the present invention to provide a space transformer manufacturing method for enhancing durability, cost reduction and easy maintenance of a probe pin connected to a space transformer and a space transformer manufactured by the above method.
위와 같은 목적을 달성하기 위하여, 본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법은 복수의 세라믹 그린 시트를 소성하여 복수의 세라믹 박판을 생성하는 단계, 상기 복수의 세라믹 박판 각각에 비아 홀을 형성하는 단계, 상기 복수의 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성하는 단계, 상기 복수의 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성하는 단계, 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하는 단계, 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판 각각을 정렬하여 적층하는 단계 및/또는 상기 적층된 복수의 세라믹 박판을 소성 또는 열처리하는 단계를 포함할 수 있다.According to an aspect of the present invention, there is provided a method of manufacturing a multilayer ceramic substrate, the method comprising: firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates; Filling the via holes of each of the plurality of ceramic thin plates with a conductive paste and forming a via electrode by heat treatment; printing a pattern on the cross section of each of the plurality of ceramic thin plates with a conductive paste to form an internal electrode Applying a bonding agent to a cross section of each of the remaining ceramic thin plates except the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid via holes, and electrically connecting the plurality of ceramic thin plates to each other through the via electrode and the internal electrode The plurality of ceramic thin plates are aligned and laminated so as to be connected The type and / or a plurality of ceramic sheet of the laminate can include the step of firing or heat treatment.
바람직하게는, 상기 도전성 페이스트는 유리 성분을 포함하고, 상기 적층된 복수의 세라믹 박판을 상기 본딩제의 녹는점보다 높고 상기 세라믹 박판의 녹는점 및 상기 도전성 페이스트의 녹는점보다 낮은 온도로 열처리할 수 있다.Preferably, the conductive paste includes a glass component, and the plurality of laminated ceramic thin plates are heat-treated at a temperature higher than the melting point of the bonding agent and lower than a melting point of the ceramic thin plate and a melting point of the conductive paste have.
바람직하게는, 상기 비아 전극 또는 상기 내부 전극의 전도성을 검사하여, 전도성에 문제가 있는 경우, 상기 비아 홀의 도전성 페이스트 또는 상기 패턴의 도전성 페이스트를 에칭 용액을 이용하여 애칭하고 상기 비아 홀을 재충진하거나 상기 패턴을 재인쇄할 수 있다.The conductive paste of the via hole or the conductive paste of the pattern may be etched using an etching solution and the via hole may be refilled if the conductive paste of the via hole or the internal electrode is inspected by checking the conductivity of the via electrode or the internal electrode The pattern can be reprinted.
바람직하게는, 상기 복수의 세라믹 박판 각각의 두께는 10 내지 500마이크론이고, 상기 본딩제가 형성하는 본딩층의 두께는 2 내지 100마이크론이고, 상기 복수의 세라믹 박판 각각의 지름은 12인치 이상일 수 있다.Preferably, the thickness of each of the plurality of ceramic thin plates is 10 to 500 microns, the thickness of the bonding layer formed by the bonding agent is 2 to 100 microns, and the diameter of each of the plurality of ceramic thin plates may be 12 inches or more.
본 발명의 다른 일 실시예에 따르면, 다층 세라믹 기판은 복수의 세라믹 박판이 적층되어 형성되는 다층 세라믹 기판으로서, 상기 복수의 세라믹 박판은 복수의 세라믹 그린 시트를 소성하여 생성되고, 상기 복수의 세라믹 박판 각각은 비아 전극 및 내부 전극을 포함하고, 상기 비아 전극은 상기 복수의 세라믹 박판 각각에 형성된 비아 홀에 도전성 페이스트를 충진하고 열처리함으로써 형성되고, 상기 내부 전극은 상기 복수의 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리함으로써 형성되고, 상기 다층 세라믹 기판은 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하고, 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판을 정렬하여 적층하고, 상기 적층된 복수의 세라믹 박판을 소성 또는 열처리함으로써 생성될 수 있다.According to another embodiment of the present invention, a multilayer ceramic substrate is a multilayer ceramic substrate in which a plurality of ceramic thin plates are laminated, wherein the plurality of ceramic thin plates are produced by firing a plurality of ceramic green sheets, Each of which includes a via electrode and an internal electrode, the via electrode being formed by filling a via hole formed in each of the plurality of ceramic thin plates with a conductive paste and subjecting the paste to a heat treatment, Wherein the multilayer ceramic substrate is formed by applying a bonding agent to a cross section of each of the remaining ceramic thin plates except the uppermost ceramic thin plate to avoid a via hole, Wherein each of the plurality of ceramic thin plates May be connected so that the enemy laminated by aligning the plurality of ceramic sheet with, and generating the plurality of the laminated ceramic sheet by firing or heat treatment.
본 발명은 다층 세라믹 기판의 제조 과정 중 각 층의 비아 홀의 정렬이 어긋나는 문제가 생기지 않는 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공할 수 있다.The present invention can provide a method for manufacturing a multilayer ceramic substrate which does not cause a problem of misalignment of via-holes in each layer during the manufacturing process of the multilayer ceramic substrate, and a multilayer ceramic substrate manufactured by the method.
본 발명은 다층 세라믹 기판의 제조 과정 중 각 층에 생기는 불량을 다층 세라믹 기판이 완성되기 전에 미리 확인하고 보수할 수 있는 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공할 수 있다.The present invention can provide a method for manufacturing a multilayer ceramic substrate which can confirm and repair defects in each layer during the manufacturing process of the multilayer ceramic substrate before the completion of the multilayer ceramic substrate and to provide a multilayer ceramic substrate produced by the method have.
본 발명은 다층 세라믹 기판의 층간에 형성되는 내부 전극에 의한 높이 차가 생기지 않는 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공할 수 있다.The present invention can provide a method of manufacturing a multilayer ceramic substrate in which a height difference due to internal electrodes formed between layers of a multilayer ceramic substrate does not occur, and a multilayer ceramic substrate manufactured by the method.
본 발명은 서로 다른 소재를 갖는 세라믹 박판이 적층된 다층 세라믹 기판의 제조 방법 및 상기 방법에 따라 제조된 다층 세라믹 기판을 제공할 수 있다.The present invention can provide a method for manufacturing a multilayer ceramic substrate in which ceramic thin plates having different materials are laminated, and a multilayer ceramic substrate manufactured according to the method.
본 발명은 스페이스 트랜스포머에 접속되어 있는 프로브 핀의 평탄도 불량을 줄일 수 있는 스페이스 트랜스포머 제조 방법 및 상기 방법에 따라 제조된 스페이스 트랜스포머를 제공할 수 있다.The present invention can provide a space transformer manufacturing method capable of reducing a flatness defect of a probe pin connected to a space transformer and a space transformer manufactured according to the method.
본 발명은 스페이스 트랜스포머에 접속되어 있는 프로브 핀의 내구성 강화, 비용절감 및 수월한 보수를 위한 스페이스 트랜스포머 제조 방법 및 상기 방법에 따라 제조된 스페이스 트랜스포머를 제공할 수 있다.The present invention can provide a method of manufacturing a space transformer for enhancing durability of a probe pin connected to a space transformer, cost reduction, and easy maintenance, and a space transformer manufactured according to the method.
도 1은 본 발명의 일 실시예에 따른 세라믹 박판의 제조 방법을 나타낸 도면이다.1 is a view illustrating a method of manufacturing a ceramic thin plate according to an embodiment of the present invention.
도 2는 본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.2 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
도 3은 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.3 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
도 4는 도 3의 실시예에 따라 제조된 다층 세라믹 기판의 구성을 나타낸 도면이다.4 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
도 5는 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.5 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
도 6은 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.6 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
도 7은 도 5 또는 도 6의 실시예에 따라 제조된 다층 세라믹 기판의 구성을 나타낸 도면이다.FIG. 7 is a view showing the structure of a multilayer ceramic substrate manufactured according to the embodiment of FIG. 5 or FIG. 6;
도 8은 본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.8 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
도 9는 도 8의 실시예에 따라 제조된 다층 세라믹 기판의 구성을 나타낸 도면이다.9 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
도 10은 본 발명의 일 실시예에 따른 스페이스 트랜스포머의 제조 방법을 나타낸 도면이다.10 is a view illustrating a method of manufacturing a space transformer according to an embodiment of the present invention.
도 11은 도 10의 실시예에 따라 제조된 스페이스 트랜스포머의 정면도이다.11 is a front view of a space transformer manufactured in accordance with the embodiment of FIG.
도 12는 도 10의 실시예에 따라 제조된 스페이스 트랜스포머의 상면도이다.12 is a top view of a space transformer manufactured in accordance with the embodiment of FIG.
이하, 첨부된 도면을 참조하여 본 발명의 실시를 위한 구체적인 내용을 설명한다. 그리고 본 발명을 설명함에 있어서, 관련된 공지기능 등 이 분야의 기술자에게 자명한 사항으로서 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 경우에는 그 상세한 설명을 생략한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention unclear.
먼저, 본 명세서에서 사용되는 용어는 다음과 같이 정의된다.First, terms used in this specification are defined as follows.
세라믹 재료는 열처리 공정을 거쳐 얻어지는 비금속무기재료를 의미한다. 세라믹은 세라믹스로 명명될 수 있다.The ceramic material means a non-metallic inorganic material obtained through a heat treatment process. Ceramics can be named ceramics.
소성이란 조합된 원료를 높은 온도로 가열하여 단단하고 치밀한 구조를 가지는 경화성 물질을 만드는 공정을 말한다. 즉, 소성은 조합된 원료를 고온 가열하여 다른 성질을 갖는 화합물을 만드는 과정을 말한다.Firing refers to a process for producing a curable material having a hard and dense structure by heating a combined raw material to a high temperature. That is, firing refers to a process for producing a compound having different properties by heating a combined raw material at a high temperature.
열처리는 물질의 성질이 바뀌지 않는 범위 내에서 물질의 원래 기능을 부여하기 위하여 가열하는 것을 말한다Heat treatment refers to heating to give the original function of the material to the extent that the properties of the material do not change
비아 홀은 다층 프린트 배선 기판 내에서 부품을 삽입하지 않은 채, 2층 또는 그 이상의 내부 도체간의 접속에 이용되는 도금 쓰루 홀을 말한다. 도금 쓰루 홀은 프린트 배선 기판의 관통 접속을 행하기 위하여 벽면에 금속을 석출시킨 구멍을 말한다. 비아 홀은 바이어 홀 또는 관통 홀으로 명명될 수 있다.A via hole is a plating through hole used for connection between two or more layers of internal conductors without inserting components in a multilayer printed wiring board. The plated through hole refers to a hole through which a metal is deposited on a wall surface to perform a through connection of a printed wiring board. The via hole may be called a via hole or a through hole.
도전성 페이스트는 유동성이 있는 수지용액에 도체 분말, 바인더 등이 분산된 상태의 복합 재료를 의미한다.The conductive paste means a composite material in which conductive powder, binder, and the like are dispersed in a fluid resin solution.
에칭은 화학약품을 사용하여 금속, 세라믹스, 반도체 등의 표면을 부식시키는 것을 의미한다.Etching refers to the use of chemicals to corrode surfaces of metals, ceramics, semiconductors, and the like.
프로브 카드는 반도체의 동작을 검사하기 위하여 반도체 칩과 테스트 장비를 연결하는 장치를 의미한다. 프로브 카드에 장착되어 있는 프로브 바늘이 웨이퍼를 접촉하면서 전기를 보내고, 그 때 돌아오는 신호에 따라 불량 반도체 칩을 선별한다.A probe card refers to a device that connects a semiconductor chip and a test device to check the operation of the semiconductor. The probe needle attached to the probe card contacts the wafer and sends electricity, and the defective semiconductor chip is selected according to the return signal.
정전기 방전(Electro Static Discharge, ESD)은 마찰로 인하여 물체에 축적된 전하가 다른 물체와 접속하는 순간 순식간에 빠져나가는 정전기 현상을 말한다.Electrostatic discharge (ESD) is an electrostatic phenomenon that occurs when an electric charge accumulated on an object due to friction is instantaneously released from the moment of connection with another object.
다층 세라믹 기판은 세라믹 재료를 사용한 박판을 다층으로 중첩시켜 각 층간이 전기적으로 접속된 기판을 말한다. 다층 세라믹 기판은 MLC(Multi Layer Ceramic) 기판으로 명명될 수 있다. 다층 세라믹 기판은 복수의 세라믹 박판으로 구성되고, 본 명세서에서 세라믹 박판은 세라믹 박판 한 층을 의미할 수 있다.The multilayer ceramic substrate refers to a substrate in which thin layers made of a ceramic material are laminated in multiple layers and each layer is electrically connected. The multilayer ceramic substrate can be named MLC (Multi Layer Ceramic) substrate. The multilayer ceramic substrate is composed of a plurality of ceramic thin plates, and in this specification, the ceramic thin plate may mean one layer of a ceramic thin plate.
그린 시트는 알루미늄 분말 등을 용제, 가소제 등에 현탁시키고 이것을 시트 모양으로 하여 건조시킨 것을 말한다. 세라믹 그린 시트는 세라믹 분말을 이용해 만든 그린 시트를 말한다.The green sheet refers to a product obtained by suspending aluminum powder or the like in a solvent, a plasticizer, etc., and drying it in a sheet form. Ceramic green sheet refers to a green sheet made from ceramic powder.
세라믹 박판 및 그의 제조 방법Ceramic foil and manufacturing method thereof
도 1을 참조하여, 본 발명의 일 실시예에 따른 세라믹 박판 및 그의 제조 방법에 대하여 설명한다. 1, a ceramic thin plate and a method of manufacturing the same according to an embodiment of the present invention will be described.
도 1은 본 발명의 일 실시예에 따른 세라믹 박판의 제조 방법을 나타낸 도면이다.1 is a view illustrating a method of manufacturing a ceramic thin plate according to an embodiment of the present invention.
본 발명의 일 실시예에 따르면, 세라믹 박판을 제조하기 위하여 먼저 세라믹 파우더를 준비한다. 세라믹 파우더는, LTCC, mullite, BaO, SiO2, Al2O3, B2O3, CaO 중 어느 하나의 소재로 될 수 있고, 이러한 세라믹 파우더를 두 종류 이상 혼합한 것을 준비할 수 있다. 세라믹 파우더를 바인더, 가소제 및 유기용제와 혼합하여 슬러리를 만들고, 이를 시트 상으로 캐스팅한다. 세라믹 시트를 만드는 방법은 공지되어 있어 그에 따라 제작되거나 상용화된 것을 이용할 수 있다. 즉, PET 필름과 같은 이형지에 세라믹 시트가 접착된 상태로 유통되고 있다. 세라믹 시트의 두께는 5 내지 200마이크론(um)일 수 있다. 프로브 카드용 MLC를 제작할 경우, 기존에는 이러한 세라믹 시트에 대해 레이저 가공으로 비아 홀을 형성하고 비아 홀 내부에 도전성 페이스트를 채운 다음, 도전성 페이스트를 통해 패턴을 형성 하고, 여러층을 압착하여 붙인 후, 등방 소성을 실시하였다. 그러나 등방 소성의 성공률이 매우 낮아 제품 수율이 낮다는 점은 상술한 바와 같다.According to one embodiment of the present invention, ceramic powder is first prepared to produce a ceramic laminate. The ceramic powder may be made of any one of LTCC, mullite, BaO, SiO2, Al2O3, B2O3, and CaO, and two or more kinds of such ceramic powders may be prepared. The ceramic powder is mixed with a binder, a plasticizer and an organic solvent to prepare a slurry, which is cast into a sheet. A method of making a ceramic sheet is known, and a sheet made or commercialized may be used. That is, a ceramic sheet is adhered to a releasing paper such as a PET film. The thickness of the ceramic sheet may be between 5 and 200 microns (um). Conventionally, when a MLC for a probe card is manufactured, a via hole is formed by laser processing on such a ceramic sheet, a conductive paste is filled in the via hole, a pattern is formed through the conductive paste, Isotropic firing. However, since the success rate of isotropic firing is very low, the product yield is low as described above.
본 발명의 일 실시예는 상기 세라믹 시트를 먼저 소성하여 세라믹 박판을 얻고, 이후 세라믹 박판에 필요한 가공을 할 수 있게 하였다. 얇은 세라믹 시트를 소성하면 일반적으로 평탄면을 유지한 세라믹 박판을 얻을 수 없다. 소성 과정에서 세라믹 시트의 모든 면에 대한 온도, 압력과 같은 변수가 동일하여야 하며, 이는 1500℃내외의 고온 소성 이후 상온에 이르는 냉각 과정에서, 세라믹 시트를 구성하는 입자 성분들의 열역학적 변수 내지 조성 입자들의 열적 행동이 동일하여야 스트레스로 인한 변형이 일어나지 않아 균일한 평탄면을 갖게 된다. 즉, 일반적인 소성 공정을 이용하여 얇은 세라믹 시트를 소성하면 두께가 200마이크론 이하의 얇은 세라믹 박판은 스트레스 현상을 겪어 거의 모두 크랙, 주름 등의 변형된 상태를 지니게 된다. 따라서, 본 발명의 일 실시예는 균일한 평탄면을 갖는 두께 20 내지 250마이크론의 세라믹 박판을 만들 수 있는, 다음과 같은 소성 방법을 안출하였다.In one embodiment of the present invention, the ceramic sheet is first fired to obtain a ceramic thin plate, and then the ceramic thin plate can be processed as required. When a thin ceramic sheet is fired, a ceramic thin plate having a generally flat surface can not be obtained. The temperature and pressure of all the surfaces of the ceramic sheet must be the same during the firing process. This is because the thermodynamic parameters of the ceramic particles constituting the ceramic sheet, If the thermal behavior is the same, the strain due to stress does not occur and the flat surface is uniform. That is, when a thin ceramic sheet is fired using a general firing process, a thin ceramic laminate having a thickness of 200 microns or less undergoes a stress phenomenon and almost all of the cracks and wrinkles are deformed. Therefore, one embodiment of the present invention has found the following firing method, which can produce a thin ceramic plate having a uniform flat surface with a thickness of 20 to 250 microns.
본 발명의 일 실시예에 따르면, 세라믹 박판을 제조하기 위하여 먼저 평탄면을 갖는 세라믹 정반을 준비한다. 상기 정반 위에 세라믹 시트를 올려 놓는다. 이때, 정반의 면적은 시트의 면적보다 넓어 마진부가 있어야 한다. 마진부에는 지주(스페이서)를 배치한다. 지주의 상단에는 다시 정반을 올려 놓는다. 지주의 높이, 즉, 정반과 정반 사이의 간격은 세라믹 시트의 두께보다 높지만 가급적이면 작게 한다. 지주의 높이는 예를 들면, 50 내지 1000마이크론 일 수 있다. 나아가, 여러 장의 세라믹 시트를 한 번에 소성하는 것이 생산적이므로 정반 위에 다시 다른 세라믹 시트를 놓고 지주를 세우며 그 위에 다시 정반을 놓는 식으로 반복 적층할 수 있다. 이와 같이 정반 사이에 세라믹 시트를 배치하여 1000 내지 1600℃의 고온으로 소성을 실시한다. 소성 시간은 세라믹 시트의 면적 및/또는 개수에 따라 달라질 수 있다. 예를 들면, 가로와 세로가 12인치인 세라믹 시트 1장을 소성할 경우, 고온 소성은 1 내지 5시간일 수 있다. 상기 소성은 무산소 환원 분위기 또는 대기분위기에서 실시된다. 이러한 소성 방법은 얇은 세라믹 시트에 대해 균일한 온도와 압력 분포를 조성하여 줄 수 있어 열응력이 발생 되는 것을 막아주며, 고온 소성 후, 냉각 단계를 조절함으로써 열 수축에 의한 변형 문제를 해소하여 매우 균일한 평탄면을 갖는 세라믹 박판을 제공한다. 이와 같이 하여 제조된 균일한 평탄면을 갖는 세라믹 박판의 두께는 20마이크론 정도의 매우 얇은 수준까지 도달할 수 있다. 그와 같이 얇은 두께를 가지면서도 시트가 아닌 소성된 단단한 기판인 강체 판 형태이기 때문에 후 가공의 정밀도는 크게 향상되면서도 핸들링 자체가 매우 쉬워진다. 앞서 언급한 프로브 카드용 다층 세라믹 기판의 경우, 상기와 같이 소성 제작된 두께 80마이크론 정도의 세라믹 박판을 이용하면 매우 높은 수율을 낼 수 있다. According to one embodiment of the present invention, a ceramic plate having a planar surface is first prepared to produce a ceramic thin plate. A ceramic sheet is placed on the table. At this time, the area of the surface plate is wider than the sheet area, and a margin portion is required. A spacer (spacer) is arranged in the margin portion. Place the table on the top of the column. The height of the support, that is, the distance between the base and the base is higher than the thickness of the ceramic sheet, but is preferably as small as possible. The height of the struts can be, for example, 50 to 1000 microns. Further, since it is productive to fuse a plurality of ceramic sheets at one time, it is possible to repeatedly stack the ceramic sheets by placing another ceramic sheet on the base plate and laying the base plate thereon. In this manner, a ceramic sheet is disposed between the base plates and firing is performed at a high temperature of 1000 to 1600 캜. The firing time may vary depending on the area and / or number of the ceramic sheets. For example, when one ceramic sheet having a width of 12 inches is fired, the high-temperature firing may be 1 to 5 hours. The firing is carried out in an oxygen-free reducing atmosphere or an air atmosphere. This sintering method prevents the generation of thermal stress by forming a uniform temperature and pressure distribution on a thin ceramic sheet, and by controlling the cooling step after high temperature sintering, the problem of deformation due to heat shrinking is solved, A ceramic thin plate having a flat surface is provided. The thickness of the ceramic thin plate having the uniform flat surface thus produced can reach a very thin level of about 20 microns. Because of its rigid plate shape, which has a thin thickness but is not a sheet but a fired solid substrate, the precision of post-processing is greatly improved, and the handling itself becomes very easy. In the case of the above-mentioned multi-layer ceramic substrate for a probe card, a very high yield can be obtained by using a ceramic thin plate having a thickness of about 80 microns manufactured as described above.
다층 세라믹 기판 및 그의 제조 방법Multi-layer ceramic substrate and manufacturing method thereof
도 2를 참조하여, 본 발명의 일 실시예에 따른 다층 세라믹 기판 및 그의 제조 방법을 설명한다. 2, a multilayer ceramic substrate according to an embodiment of the present invention and a method of manufacturing the same will be described.
도 2는 본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.2 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
본 발명의 일 실시예에 따라 제조된 세라믹 박판에 레이저 가공으로 층별 비아 홀을 형성하고, 층별 비아 홀에 도전성 페이스트를 충진한다. 이 때, 도전성 페이스트는 Ag, Cu, Au, Pd, Pt, Ag-Pd, Ni, Mo, W 중 하나를 포함할 수 있고, 바람직하게는 Ag을 포함한다. 소성은 반드시 무산소 환경일 필요가 없으며, 도전성 페이스트로 Ag를 사용하는 경우, 도전성 페이스트 Ag는 대기분위기에서 700℃내지 900℃, 바람직하게는 800℃정도에서 소성될 수 있다. 소성 시간은 기판 개수와 면적에 따라 다를 수 있으며, 가로와 세로가 12인치인 다층 세라믹 기판 한 장일 경우, 0.5시간 내지 2시간일 수 있다.A via hole is formed in the ceramic thin plate according to an embodiment of the present invention by laser processing, and the via hole is filled with a conductive paste. At this time, the conductive paste may include one of Ag, Cu, Au, Pd, Pt, Ag-Pd, Ni, Mo and W, The firing does not necessarily require an oxygen-free environment. When Ag is used as the conductive paste, the conductive paste Ag can be fired at 700 to 900 deg. C, preferably 800 deg. C in an air atmosphere. The firing time may vary depending on the number and area of the substrates, and may be from 0.5 hours to 2 hours in the case of a multilayer ceramic substrate having a width of 12 inches.
도전성 페이스트가 충진된 층별 비아홀의 양/불량을 비젼으로 검사한다. 양품은 다음 단계를 밟고, 불량은 도체를 에칭 제거 후 재활용한다. 양품은 층별로 비아 홀을 위해 열처리하고 층별로 도체 패턴을 인쇄하여 양/불량을 비젼으로 검사한다. 양품인 경우, 인쇄된 도체 패턴을 열처리하고 다음 단계를 밟고, 불량은 도체를 에칭 제거 후 재활용할 수 있다. 양품은 층별로 본딩 재료를 인쇄하고 층들을 얼라인하여 적층 결합 후 결합체를 열처리한다. 완성된 결합체에 대해 전기적 및 기계적 특성을 검사한다.The amount / defect of the layered via hole filled with the conductive paste is inspected by vision. Good products are subjected to the following steps, and defects are etched away after the conductor is recycled. Good products are heat treated for via holes for each layer, and conductor patterns are printed for each layer to inspect positive / defective by vision. In the case of good products, the printed conductor pattern is heat-treated and the next step is taken, and the defective conductor can be etched away and then recycled. The good products are printed with the bonding material for each layer and the layers are aligned to laminate and heat the bonded body after bonding. The electrical and mechanical properties of the finished assembly are checked.
이와 같이 하여 다층 세라믹 기판을 안정되게 공급할 수 있다. 또한, 상기 세라믹 박판의 가공 방법은 프로브 카드용 다층 세라믹 기판 외에 가공된 세라믹 박판을 필요로 하는 곳에 널리 응용될 수 있다. 이와 같은 다층 세라믹 기판의 제조 방법은 수율이 매우 높고, 도전성 페이스트의 소성 과정에서 문제 발생된 경우, 해당 층(layer)의 도체 부분을 에칭 용액으로 에칭 제거하여 세라믹 박판은 재활용할 수 있어 더더욱 효율적이다. 금속만 에칭하고 세라믹은 에칭되지 않게 하는 에칭용액은 당업계에 널리 알려진 바, 특별히 한정 나열하지 않는다.Thus, the multilayer ceramic substrate can be stably supplied. In addition, the method of processing the ceramic thin plate can be widely applied to a multilayer ceramic substrate for a probe card where a processed thin ceramic plate is required. Such a method for producing a multilayer ceramic substrate has a high yield, and when a problem occurs in the baking process of the conductive paste, the conductor portion of the layer is etched away with an etching solution, and the ceramic thin plate can be recycled, which is more efficient . Etching solutions which only etch metal and not etch ceramic are well known in the art and are not specifically limited.
도 3 및 도 4를 참조하여, 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판 및 그의 제조 방법을 설명한다. 3 and 4, a multilayer ceramic substrate according to another embodiment of the present invention and a manufacturing method thereof will be described.
도 3은 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.3 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법은 다음의 단계를 포함한다. (1) 복수의 세라믹 그린 시트를 소성하여 복수의 세라믹 박판을 생성하는 단계, (2) 상기 복수의 세라믹 박판 각각에 비아 홀을 형성하는 단계, (3) 상기 복수의 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성하는 단계, (4) 상기 복수의 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성하는 단계, (5) 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하는 단계, (6) 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판 각각을 정렬하여 적층하는 단계, (7) 상기 적층된 복수의 세라믹 박판을 열처리하는 단계.A method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention includes the following steps. (1) firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates, (2) forming via holes in each of the plurality of ceramic thin plates, (3) forming via holes in each of the plurality of ceramic thin plates (4) forming an internal electrode by printing a pattern on a cross section of each of the plurality of ceramic thin plates with a conductive paste and subjecting the paste to a heat treatment, (5) (6) applying a bonding agent to the cross-section of each of the ceramic thin plates except the uppermost ceramic thin plate among the plurality of ceramic thin plates to electrically connect the plurality of ceramic thin plates through the via electrode and the internal electrode, Aligning and laminating each of the ceramic thin plates; and (7) heat treating the plurality of stacked ceramic thin plates.
상기 (1) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 그린 시트를 소성하여 복수의 세라믹 박판을 생성할 수 있다. 즉, 본 발명의 일 실시예는 하나의 세라믹 그린 시트를 소성하여 하나의 세라믹 박판을 생성하고, 또 다른 하나의 세라믹 그린 시트를 소성하여 또 다른 하나의 세라믹 박판을 생성하는 형태로 복수의 세라믹 박판을 생성할 수 있다. 본 단계에서 소성 온도는 1000 내지 1500℃일 수 있다. 나아가, 상기 세라믹 그린 시트는 50 내지 600마이크론의 두께를 가질 수 있고, 상기 세라믹 박판은 10 내지 500마이크론의 두께를 가질 수 있다. 또한, 상기 세라믹 그린 시트 및 세라믹 박판의 지름은 12인치 이상일 수 있다. 나아가, 본 단계에서, 본 발명의 일 실시예는 무산소 환원 환경 또는 대기 환경에서 세라믹 그린 시트를 1시간 내지 5시간 동안 소성할 수 있다.In the step (1), an embodiment of the present invention can produce a plurality of ceramic thin plates by firing a plurality of ceramic green sheets. That is, in one embodiment of the present invention, one ceramic green sheet is fired to produce one ceramic thin sheet, and another ceramic green sheet is fired to produce another one of the ceramic thin sheets, Can be generated. In this step, the firing temperature may be 1000 to 1500 ° C. Further, the ceramic green sheet may have a thickness of 50 to 600 microns, and the ceramic laminate may have a thickness of 10 to 500 microns. The diameter of the ceramic green sheet and the ceramic thin plate may be 12 inches or more. Further, in this step, one embodiment of the present invention may calcine the ceramic green sheet in an oxygen-free or atmospheric environment for 1 to 5 hours.
상기 (2) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 박판 각각에 비아 홀을 형성할 수 있다. 본 발명의 일 실시예는 하나의 세라믹 박판에 하나 이상의 비아 홀을 형성할 수 있다. 이 때, 상기 비아 홀은 레이저 조사 및 케미칼 에칭 등의 공정을 통해 형성될 수 있다. 나아가, 상기 비아홀의 지름은 30 내지 200마이크론일 수 있다. 본 발명의 다른 일 실시예에 따르면, 한 층에 형성되는 비아 홀은 동일한 크기를 가질 수 있다. 구체적으로, 한 층에 형성되는 비아 홀의 크기가 같을 수 있는 것은 층별로 독립적으로 세라믹 박판을 생성하여 적층하는 방법을 사용하여 층 간 비아 홀의 정렬이 어긋나는 종래 문제를 해결했기 때문이다. 종래에는 세라믹 그린 시트의 적층 후 일괄적으로 소성하는 과정에서 발생하는 비아 홀의 정렬이 어긋나는 문제를 대비하기 위하여 왜곡이 심한 곳에는 비아 홀을 크게 만들었고 왜곡이 상대적으로 덜한 곳에는 비아 홀을 작게 만들었다. 이러한 종래 과정은 비아 홀의 크기가 다양해서 설계가 어렵고 비용 및/또는 시간 측면에서 불편함이 있었다.In the step (2), one embodiment of the present invention may form a via hole in each of the plurality of ceramic thin plates. One embodiment of the present invention can form one or more via holes in one ceramic thin plate. At this time, the via hole may be formed through processes such as laser irradiation and chemical etching. Further, the diameter of the via hole may be 30 to 200 microns. According to another embodiment of the present invention, the via-holes formed in one layer may have the same size. Specifically, the reason why the size of the via-holes formed in one layer can be the same is because the conventional problem in which the alignment of the interlayer via-holes is deviated by using the method of forming and laminating ceramic thin plates independently for each layer is solved. Conventionally, in order to prevent the problem of the misalignment of the via holes occurring in the process of collectively firing the ceramic green sheets after lamination, the via holes are made larger in the case of severe distortion and the via holes are made smaller in the places where the distortion is relatively less. Such conventional processes have various sizes of via holes, which are difficult to design and inconvenient in terms of cost and / or time.
상기 (3) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성할 수 있다. 이 때, 세라믹 박판의 비아 홀에 도전성 페이스트를 충진하는 이유는 추후 층층이 쌓일 복수의 세라믹 박판 사이의 전기적 접속을 위함이다. 나아가, 본 단계의 도전성 페이스트에 사용되는 도체는 Ag, Cu, Au, Pd, Pt, Ag-Pd, Ni, Mo, W 중 하나 이상의 물질에 해당할 수 있다.In the step (3), the via hole of each of the plurality of ceramic thin plates may be filled with the conductive paste and heat-treated to form the via electrode. At this time, the reason why the conductive paste is filled in the via-hole of the ceramic thin plate is for electrical connection between a plurality of ceramic thin plates to be stacked later. Further, the conductor used in the conductive paste of this step may correspond to one or more of Ag, Cu, Au, Pd, Pt, Ag-Pd, Ni, Mo and W.
상기 (4) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 박판 각각의 단면에 도전성 페이스트를 이용하여 패턴을 인쇄할 수 있다. 이 때, 세라믹 박판마다 인쇄되는 패턴은 다를 수 있다. 이 때, 인쇄되어 열처리된 패턴은 내부 전극에 해당할 수 있다. 본 발명의 일 실시예에 따르면, 상기 내부 전극의 두께는 1 내지 10마이크론 일 수 있다.In the step (4), an embodiment of the present invention can print a pattern using a conductive paste on the cross section of each of the plurality of ceramic thin plates. At this time, the patterns printed for each ceramic thin plate may be different. At this time, the printed and heat-treated pattern may correspond to the internal electrode. According to an embodiment of the present invention, the thickness of the internal electrode may be 1 to 10 microns.
상기 (5) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포할 수 있다. 이 때, 상기 최상위 세라믹 박판은 추후 복수의 세라믹 박판을 층층이 쌓았을 때 최상위 층에 위치할 세라믹 박판을 의미할 수 있다. 그리고, 본딩제는 세라믹 박판의 단면에 인쇄된 패턴에 영향을 주지 않는 재료로 패턴 위에 도포될 수 있다. 나아가, 상기 본딩제는 추후 적층될 세라믹 박판들을 접착시키는데 사용될 수 있다. 또한, 상기 본딩제는 무기물 및/또는 유기물일 수 있고, 무기물은 유리, 세라믹 등을 포함하고, 유기물은 에폭시 등을 포함할 수 있다. 본 발명의 일 실시예에 따르면, 상기 본딩제는 본딩층을 형성할 수 있고, 상기 본딩층의 두께는 2 내지 100마이크론일 수 있다.In the step (5), the bonding agent may be applied to the cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid the via holes. In this case, the uppermost ceramic thin plate may refer to a ceramic thin plate to be placed on the uppermost layer when a plurality of ceramic thin plates are stacked. Then, the bonding agent can be applied on the pattern as a material that does not affect the pattern printed on the cross section of the ceramic thin plate. Further, the bonding agent can be used to adhere the ceramic thin plates to be laminated later. The bonding agent may be an inorganic material and / or an organic material, and the inorganic material may include glass, ceramics and the like, and the organic material may include an epoxy and the like. According to an embodiment of the present invention, the bonding agent may form a bonding layer, and the thickness of the bonding layer may be 2 to 100 microns.
상기 (6) 단계에서, 본 발명의 일 실시예는 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 복수의 세라믹 박판 각각을 정렬하여 층층이 쌓을 수 있다(적층할 수 있다). 즉, 한 층의 세라믹 박판의 표면에 인쇄된 패턴은 비아 홀을 통하여 다른 층의 세라믹 박판의 표면에 인쇄된 패턴과 전기적으로 접속될 수 있다. 다른 말로 하면, 한 층의 내부 전극은 해당 층의 비아 전극을 통해 하위 층의 내부 전극과 전기적으로 연결되고, 한 층의 내부 전극은 상위 층의 비아 전극을 통해 상위 층의 내부 전극과 전기적으로 연결될 수 있다. 최종적으로, 최하위층 입력단 전극과 최상층 측정단인 프로브 핀 단자가 전기적으로 연결될 수 있다.In the step (6), an embodiment of the present invention may stack the plurality of ceramic thin plates so that the plurality of ceramic thin plates are electrically connected through the via electrode and the internal electrode, respectively have). That is, the pattern printed on the surface of the ceramic thin plate of one layer can be electrically connected to the pattern printed on the surface of the ceramic thin plate of the other layer through the via hole. In other words, the inner electrode of one layer is electrically connected to the inner electrode of the lower layer through the via electrode of the layer, and the inner electrode of one layer is electrically connected to the inner electrode of the upper layer through the via electrode of the upper layer . Finally, the lowermost layer input terminal electrode and the probe pin terminal which is the uppermost layer measurement terminal can be electrically connected.
상기 (7) 단계에서, 본 발명의 일 실시예는 적층된 복수의 세라믹 박판을 소성 또는 열처리할 수 있다. 즉, 본 발명의 일 실시예는 적층된 복수의 세라믹 박판을 소성 또는 열처리하여 복수의 세라믹 박판 각각의 단면에 도포된 본딩제를 녹임으로써 복수의 세라믹 박판을 서로 접착시킬 수 있다. 이 때, 상기 본딩제의 녹는점은 상기 본딩제를 구성하는 소재에 따라 다를 수 있다. 나아가, 이 과정에서 세라믹 박판, 세라믹 박판에 인쇄된 패턴 및/또는 세라믹 박판의 비아 홀에 충진된 도전성 페이스트까지 녹는 것을 방지하기 위하여, 상기 본딩제의 녹는점은 세라믹 박판의 녹는점, 패턴 인쇄에 사용된 도전성 페이스트의 녹는점(내부 전극재료의 녹는점) 및 비아 홀에 충진된 도전성 페이스트의 녹는점보다 낮을 수 있다. 이 때, 세라믹 박판의 녹는점은 상기 세라믹 박판을 구성하는 소재에 따라 다를 수 있다. 따라서, 본 발명의 일 실시예는 적층된 복수의 세라믹 박판을 본딩제의 녹는점보다 높고 세라믹 박판의 녹는점보다는 낮은 온도에서 소성 또는 열처리할 수 있다. 즉, 본 발명의 일 실시예는 세라믹 박판에 영향을 주지 않는 온도로 적층된 복수의 세라믹 박판을 소성 또는 열처리함으로써 세라믹 박판 자체에 생기는 크랙 등의 불량을 방지할 수 있다. 예를 들어, 본 발명의 일 실시예는 대기 환경에서 600℃ 내지 900℃바람직하게는 800℃로 적층된 복수의 세라믹 박판을 소성 또는 열처리할 수 있다. 이 때, 소성 또는 열처리 시간은 적층된 복수의 세라믹 박판의 개수 및 면적에 따라 다를 수 있다. 예를 들어, 적층된 복수의 세라믹 박판 각각의 지름이 12인치인 경우, 본 발명의 일 실시예는 적층된 복수의 세라믹 박판을 0.5시간 내지 2시간동안 소성 또는 열처리할 수 있다. 본 발명의 일 실시예는 상기 (1) 내지 (7) 단계를 거쳐 다층 세라믹 기판을 제조할 수 있다.In the step (7), one embodiment of the present invention may fuse or heat treat a plurality of laminated ceramic thin plates. That is, one embodiment of the present invention can bond a plurality of ceramic thin plates to each other by melting a bonding agent applied to the end faces of the plurality of ceramic thin plates by firing or heat-treating a plurality of laminated ceramic thin plates. At this time, the melting point of the bonding agent may vary depending on the material constituting the bonding agent. Further, in order to prevent the melting of the conductive paste filled in the ceramic thin plate, the pattern printed on the ceramic thin plate and / or the via hole of the ceramic thin plate in this process, the melting point of the bonding agent is set to the melting point of the ceramic thin plate, May be lower than the melting point of the used conductive paste (melting point of the internal electrode material) and the melting point of the conductive paste filled in the via hole. At this time, the melting point of the ceramic thin plate may be different depending on the material constituting the ceramic thin plate. Therefore, one embodiment of the present invention is capable of firing or heat-treating a plurality of laminated ceramic thin plates at a temperature higher than the melting point of the bonding agent and lower than the melting point of the ceramic thin plate. That is, one embodiment of the present invention can prevent defects such as cracks in the ceramic thin plate itself by firing or heat treating a plurality of ceramic thin plates laminated at a temperature not affecting the ceramic thin plate. For example, one embodiment of the present invention is capable of firing or heat-treating a plurality of ceramic thin plates laminated in an atmospheric environment at 600 ° C to 900 ° C, preferably at 800 ° C. In this case, the firing time or the heat treatment time may vary depending on the number and area of the plurality of laminated ceramic thin plates. For example, in the case where each of the plurality of stacked ceramic thin plates has a diameter of 12 inches, one embodiment of the present invention can fuse or heat treat a plurality of stacked ceramic thin plates for 0.5 to 2 hours. An embodiment of the present invention can manufacture the multilayer ceramic substrate through the steps (1) to (7).
나아가, 본 발명의 일 실시예는 상기 (3) 단계 및/또는 상기 (4) 단계 이후, 복수의 세라믹 박판 각각의 비아 홀 및/또는 패턴의 전도성을 검사할 수 있다. 검사 결과, 전도성에 문제가 있는 경우, 본 발명의 일 실시예는 비아 홀 및/또는 패턴에 사용된 도전성 페이스트를 에칭 용액을 이용하여 에칭하고 다시 상기 (3) 단계 및/또는 상기 (4) 단계를 수행할 수 있다. 이 때, 상기 에칭 용액은 도전성 페이스트만 에칭하고 세라믹 박판은 에칭하지 않을 수 있다.Furthermore, an embodiment of the present invention can check the conductance of via holes and / or patterns of each of the plurality of ceramic thin plates after the step (3) and / or the step (4). In the case where there is a problem with the conductivity as a result of the inspection, an embodiment of the present invention may etch the conductive paste used for the via-hole and / or the pattern using the etching solution and again perform the step (3) Can be performed. At this time, the etching solution may be etched only with the conductive paste and the ceramic thin plate may not be etched.
본 발명의 다른 일 실시예에 따르면, 내부 전극 또는 비아 전극에 사용되는 도전성 페이스트는 유리 성분을 0 내지 20프로 포함할 수 있다. 이 경우, 본딩제는 내부 전극 및 비아 전극을 피해서 세라믹 박판 위에 도포될 수 있다. 본딩제를 도포하고 복수의 세라믹 박판을 적층한 뒤 열처리하면 내부 전극에 포함된 일부 유리 성분이 도전성 페이스트의 상부 표면에 표출되어 얇은 유리 층을 형성함으로써 복수의 세라믹 박판을 보다 강하게 접착시킬 수 있다. 나아가, 내부 전극에 포함된 일부 유리 성분은 도전성 페이스트 하부에 존재하여 해당 층의 세라믹 박판과 내부 전극 사이의 접착력을 강화시킬 수 있다.According to another embodiment of the present invention, the conductive paste used for the internal electrode or the via electrode may contain 0 to 20% of the glass component. In this case, the bonding agent can be applied on the ceramic thin plate while avoiding the internal electrode and the via electrode. When a bonding agent is applied and a plurality of ceramic thin plates are stacked and then heat-treated, some glass components contained in the internal electrodes are exposed on the upper surface of the conductive paste to form a thin glass layer, so that the plurality of ceramic thin plates can be more strongly adhered. Further, some of the glass components contained in the internal electrode are present under the conductive paste, so that the adhesive force between the ceramic thin plate and the internal electrode of the layer can be enhanced.
본 발명의 다른 일 실시예는 세라믹 박판의 단면에 비아 홀을 피해 본딩제를 도포하여 본딩층을 형성하고, 상기 비아 홀의 자리에는 상기 본딩층의 두께만큼 도전성 페이스트를 충진하여 복수의 세라믹 박판을 전기적으로 연결할 수 있다.According to another embodiment of the present invention, a bonding agent is applied to a cross section of a ceramic thin plate to avoid a via hole to form a bonding layer, and a conductive paste is filled in the via hole by the thickness of the bonding layer to electrically .
도 4는 도 3의 실시예에 따라 제조된 다층 세라믹 기판의 구성을 나타낸 도면이다.4 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
본 발명의 일 실시예에 따른 다층 세라믹 기판(4010)은 적층된 복수의 세라믹 박판(4020)을 포함할 수 있다. 그리고, 상기 복수의 세라믹 박판 각각(4020)은 비아 전극(4030) 및 내부 전극(4040)을 포함할 수 있다. 이 때, 상기 비아 전극은 상기 복수의 세라믹 박판 각각에 형성된 비아 홀에 도전성 페이스트를 충진하고 열처리함으로써 형성될 수 있고, 상기 내부 전극은 상기 복수의 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리함으로써 형성될 수 있다.The multilayer ceramic substrate 4010 according to an embodiment of the present invention may include a plurality of laminated ceramic thin plates 4020. Each of the plurality of ceramic thin plates 4020 may include a via electrode 4030 and an internal electrode 4040. In this case, the via-electrode may be formed by filling a via hole formed in each of the plurality of ceramic thin plates with a conductive paste and performing a heat treatment, and the internal electrode prints a pattern on the end face of each of the plurality of ceramic thin plates with conductive paste And can be formed by heat treatment.
상기 복수의 세라믹 박판은 복수의 세라믹 그린 시트를 소성하여 생성될 수 있고, 상기 다층 세라믹 기판은 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하고, 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판을 정렬하여 적층하고, 상기 적층된 복수의 세라믹 박판을 소성 또는 열처리함으로써 생성될 수 있다. 상기 다층 세라믹 기판의 제조 방법에 대한 상세한 설명은 도 3에서 전술하였다.The plurality of ceramic thin plates may be produced by firing a plurality of ceramic green sheets, and the multilayer ceramic substrate may be formed by applying a bonding agent to the end faces of the remaining ceramic thin plates except for the uppermost ceramic thin plate, And aligning and laminating the plurality of ceramic thin plates so that each of the plurality of ceramic thin plates is electrically connected via the via electrode and the internal electrode, and firing or heat-treating the plurality of laminated ceramic thin plates. A detailed description of the method for manufacturing the multilayer ceramic substrate has been described above with reference to FIG.
도 5를 참조하여, 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판 및 그의 제조 방법을 설명한다. 5, a multilayer ceramic substrate according to another embodiment of the present invention and a method of manufacturing the same will be described.
도 5는 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.5 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법은 다음의 단계를 포함한다. (1) 복수의 세라믹 그린 시트를 소성하여 복수의 세라믹 박판을 생성하는 단계, (2) 상기 복수의 세라믹 박판 각각에 비아 홀을 형성하는 단계, (3) 상기 복수의 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성하는 단계, (4) 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성하는 단계, (5) 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하는 단계, (6) 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판 각각을 정렬하여 적층하는 단계, (7) 상기 적층된 복수의 세라믹 박판을 소성 또는 열처리하는 단계, (8) 상기 최상위 세라믹 박판의 단면에 외부 전극을 형성하는 단계, (9) 상기 복수의 세라믹 박판 중 최하위 세라믹 박판의 상기 패턴이 인쇄된 단면의 반대면에 외부 전극을 형성하는 단계.A method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention includes the following steps. (1) firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates, (2) forming via holes in each of the plurality of ceramic thin plates, (3) forming via holes in each of the plurality of ceramic thin plates (4) forming an internal electrode by printing a pattern on the cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates with a conductive paste and heat-treating the conductive paste; (5) applying a bonding agent to a cross section of each of the remaining ceramic thin plates except the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid via holes, (6) applying a bonding agent to the plurality of ceramic thin plates through the via- Aligning and laminating each of the plurality of ceramic thin plates so as to be electrically connected to each other, (7) (8) forming an outer electrode on an end face of the uppermost ceramic thin plate; (9) forming an outer electrode on the opposite side of the cross-section of the lowermost ceramic thin plate, Forming an electrode.
상기 (1), (2), (5), (6) 및 (7) 단계에 대한 설명은 도 3에 따른 실시예의 해당 단계에 대한 설명으로 대체한다.The description of the steps (1), (2), (5), (6), and (7) is replaced with a description of the step in the embodiment according to FIG.
상기 (3) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성할 수 있다. 이 때, 상기 비아 전극은 도전성 페이스트가 충진된 비아 홀 자체를 의미할 수 있다.In the step (3), the via hole of each of the plurality of ceramic thin plates may be filled with the conductive paste and heat-treated to form the via electrode. In this case, the via-electrode may mean a via hole filled with a conductive paste.
상기 (4) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성할 수 있다. 이 때, 상기 내부 전극은 세라믹 박판의 단면에 인쇄된 패턴 자체를 의미할 수 있다. 나아가, 상기 내부 전극은 비아 전극과 전기적으로 접속될 수 있다. 즉, 본 발명의 일 실시예는 본 단계에서 최상위 세라믹 박판에는 패턴을 인쇄하지 않을 수 있다.In the step (4), an inner electrode may be formed by printing a pattern on a cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates with a conductive paste and heat-treating the pattern. In this case, the internal electrode may mean a pattern itself printed on a cross section of the ceramic thin plate. Further, the internal electrode may be electrically connected to the via electrode. That is, an embodiment of the present invention may not print a pattern on the uppermost ceramic thin plate in this step.
상기 (8) 단계에서, 본 발명의 일 실시예는 최상위 세라믹 박판의 표면에 외부 전극을 인쇄할 수 있다. 즉, 본 발명의 일 실시예는 복수의 세라믹 박판을 적층하고 소성 또는 열처리한 이후에 최상위 세라믹 박판의 표면에 외부 전극을 형성할 수 있다. 이 때, 상기 외부 전극은 복수의 세라믹 박판 외부로 노출된 전극으로서 도전성 페이스트의 도포 등을 통해 형성될 수 있다.In the step (8), an embodiment of the present invention can print an external electrode on the surface of the uppermost ceramic thin plate. That is, an embodiment of the present invention can form an external electrode on the surface of the uppermost ceramic thin plate after stacking a plurality of ceramic thin plates and firing or heat treatment. At this time, the external electrode may be formed through application of a conductive paste as an electrode exposed to the outside of a plurality of ceramic thin plates.
상기 (9) 단계에서, 본 발명의 일 실시예는 복수의 세라믹 박판 중 최하위 세라믹 박판의 패턴이 기 인쇄된 단면의 반대면에 외부 전극을 형성할 수 있다. 이 때, 상기 최하위 세라믹 박판은 적층된 복수의 세라믹 박판 중 최하위 층에 위치한 세라믹 박판을 의미할 수 있다. 이 때, 상기 외부 전극은 복수의 세라믹 박판 외부로 노출된 전극으로서 도전성 페이스트의 도포 등을 통해 형성될 수 있다. 즉, 본 발명의 일 실시예는 복수의 세라믹 박판을 적층하고 소성 또는 열처리한 이후에 최하위 세라믹 박판의 외부 단면에 비아전극 위치에 맞추어 외부 전극을 인쇄할 수 있다. 이로써, 본 발명의 일 실시예는 다층 세라믹 기판의 최상위 세라믹 박판의 외부 전극과 최하위 세라믹 박판의 외부 전극을 각 층의 세라믹 박판에 존재하는 비아 전극을 통해 전기적으로 접속시킬 수 있다. 결국, 최상위 세라믹 박판의 외부 전극, 최하위 세라믹 박판의 외부 전극, 각 층의 내부 전극은 각 층의 비아 전극을 통해 전기적으로 연결될 수 있다. 본 발명의 일 실시예는 상기 (1) 내지 (9) 단계를 거쳐 다층 세라믹 기판을 제조할 수 있다.In the step (9), the outer electrode may be formed on the opposite side of the cross-section of the lowest ceramic thin plate among the plurality of ceramic thin plates. At this time, the lowermost ceramic thin plate may refer to a ceramic thin plate positioned in the lowest layer among a plurality of laminated ceramic thin plates. At this time, the external electrode may be formed through application of a conductive paste as an electrode exposed to the outside of a plurality of ceramic thin plates. That is, one embodiment of the present invention can print out the outer electrode in accordance with the position of the via electrode on the outer end surface of the lowermost ceramic thin plate after stacking and firing or heat-treating a plurality of ceramic thin plates. Thus, an embodiment of the present invention can electrically connect the outer electrode of the uppermost ceramic thin plate and the external electrode of the lowermost ceramic thin plate of the multilayer ceramic substrate through the via-electrode existing in the ceramic thin plate of each layer. As a result, the outer electrode of the uppermost ceramic thin plate, the outer electrode of the lowermost ceramic thin plate, and the inner electrode of each layer can be electrically connected through the via electrode of each layer. An embodiment of the present invention can manufacture the multilayer ceramic substrate through the steps (1) to (9).
도 6을 참조하여, 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판 및 그의 제조 방법을 설명한다.6, a multilayer ceramic substrate according to another embodiment of the present invention and a method of manufacturing the same will be described.
도 6은 본 발명의 다른 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.6 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.
본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법은 다음의 단계를 포함한다. (1) 복수의 세라믹 그린 시트를 소성하여 복수의 세라믹 박판을 생성하는 단계, (2) 상기 복수의 세라믹 박판 각각에 비아 홀을 형성하는 단계, (3) 상기 복수의 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성하는 단계, (4) 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성하는 단계, (5) 상기 최상위 세라믹 박판의 단면에 외부 전극을 형성하는 단계, (6) 상기 복수의 세라믹 박판 중 최하위 세라믹 박판의 상기 내부 전극이 형성된 단면의 반대면에 외부 전극을 형성하는 단계, (6) 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하는 단계, (7) 상기 비아 전극, 상기 내부 전극 및 상기 외부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판 각각을 정렬하여 적층하는 단계, (8) 상기 적층된 복수의 세라믹 박판을 소성 또는 열처리하는 단계.A method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention includes the following steps. (1) firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates, (2) forming via holes in each of the plurality of ceramic thin plates, (3) forming via holes in each of the plurality of ceramic thin plates (4) forming an internal electrode by printing a pattern on the cross-section of each of the ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates with a conductive paste and heat-treating the conductive paste; (5) forming external electrodes on the cross-section of the uppermost ceramic thin plate, (6) forming external electrodes on the opposite side of the cross-section of the lowest ceramic thin plate among the plurality of ceramic thin plates on which the internal electrodes are formed, ) A bonding agent is applied to the cross sections of the remaining ceramic thin plates except for the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid the via holes (7) aligning and stacking the plurality of ceramic thin plates so that each of the plurality of ceramic thin plates is electrically connected via the via electrode, the internal electrode, and the external electrode, (8) And firing or heat-treating the thin ceramic plate.
상술한 본 발명의 일 실시예는 도 5에 따른 실시예와 달리, 복수의 세라믹 박판을 적층하기 전에 최상위 세라믹 박판 및 최하위 세라믹 박판의 단면에 외부 전극을 형성할 수 있다. 본 실시예의 나머지 단계에 대한 설명은 도 5에 따른 실시예의 해당 단계에 대한 설명으로 대체한다.The above-described embodiment of the present invention differs from the embodiment according to FIG. 5 in that external electrodes may be formed on the uppermost ceramic thin plate and the lowermost ceramic thin plate before stacking the plurality of ceramic thin plates. The description of the remaining steps of this embodiment is replaced with a description of the corresponding step of the embodiment according to Fig.
도 7은 도 5 또는 도 6의 실시예에 따라 제조된 다층 세라믹 기판의 구성을 나타낸 도면이다.FIG. 7 is a view showing the structure of a multilayer ceramic substrate manufactured according to the embodiment of FIG. 5 or FIG. 6;
본 발명의 일 실시예에 따른 다층 세라믹 기판(7010)은 적층된 복수의 세라믹 박판(7020, 7030, 7040)을 포함할 수 있다. 그리고, 상기 복수의 세라믹 박판은 최상위 세라믹 박판(7030) 및 최하위 세라믹 박판(7040)을 포함할 수 있다. 나아가, 다층 세라믹 기판 내부에 위치하는 세라믹 박판 각각(7020)은 비아 전극(7050) 및/또는 내부 전극(7060)을 포함할 수 있고, 다층 세라믹 기판의 최외곽에 위치하는 최상위 세라믹 박판(7030) 및 최하위 세라믹 박판(7040)은 비아 전극(7050), 내부 전극(7060) 및/또는 외부 전극(7070)을 포함할 수 있다.The multilayer ceramic substrate 7010 according to an embodiment of the present invention may include a plurality of laminated ceramic thin plates 7020, 7030, and 7040. The plurality of ceramic thin plates may include a topmost ceramic thin plate 7030 and a lowermost ceramic thin plate 7040. Each of the ceramic thin plates 7020 located inside the multilayer ceramic substrate may include a via electrode 7050 and / or an internal electrode 7060, and the uppermost ceramic thin plate 7030 located at the outermost periphery of the multilayer ceramic substrate, And the lowermost ceramic thin plate 7040 may include a via electrode 7050, an internal electrode 7060, and / or an external electrode 7070.
상기 다층 세라믹 기판의 제조 방법에 대한 상세한 설명은 도 5 및 도 6에서 전술하였다.A detailed description of the method of manufacturing the multilayer ceramic substrate has been described above with reference to FIGS. 5 and 6. FIG.
층별 소재가 다른 다층 세라믹 기판 및 그의 제조 방법Multi-layer ceramic substrate with different layer materials and manufacturing method thereof
도 8 및 도 9를 참조하여, 본 발명의 일 실시예에 따른 다층 세라믹 기판 및 그의 제조 방법을 설명한다.8 and 9, a multilayer ceramic substrate and a method of manufacturing the same according to an embodiment of the present invention will be described.
도 8은 본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법을 나타낸 도면이다.8 is a view illustrating a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention.
본 발명의 일 실시예에 따른 다층 세라믹 기판의 제조 방법은 다음의 단계를 포함한다. (1) 복수의 제 1 세라믹 그린 시트를 소성하여 복수의 제 1 세라믹 박판을 생성하는 단계, (2) 상기 제 1 세라믹 그린 시트의 소재와 다른 소재를 갖는 제 2 세라믹 그린 시트를 소성하여 제 2 세라믹 박판을 생성하는 단계, (3) 상기 복수의 제 1 세라믹 박판 및 상기 제 2 세라믹 박판 각각에 비아 홀을 형성하는 단계, (4) 상기 복수의 제 1 세라믹 박판 및 상기 제 2 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성하는 단계, (5) 상기 복수의 제 1 세라믹 박판 및 상기 제 2 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성하는 단계, (6) 상기 복수의 제 1 세라믹 박판 및 상기 제 2 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하는 단계, (7) 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 제 1 세라믹 박판 및 상기 제 2 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 제 1 세라믹 박판 및 상기 제 2 세라믹 박판 각각을 정렬하여 적층하는 단계, (8) 상기 적층된 복수의 제 1 세라믹 박판 및 제 2 세라믹 박판을 소성 또는 열처리하는 단계.A method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention includes the following steps. (1) firing a plurality of first ceramic green sheets to produce a plurality of first ceramic thin sheets, (2) firing a second ceramic green sheet having a different material from that of the first ceramic green sheet, (3) forming a via hole in each of the plurality of first ceramic thin plates and the second ceramic thin plate, (4) forming a via hole in each of the plurality of first ceramic thin plates and the second ceramic thin plate, Filling the via hole with a conductive paste and forming a via electrode by heat treatment; (5) patterning the end faces of the first ceramic thin plate and the second ceramic thin plate with a conductive paste to form an internal electrode (6) removing the via holes from the cross sections of the remaining ceramic thin plates except for the uppermost ceramic thin plate among the plurality of first ceramic thin plates and the second ceramic thin plates, (7) a step of applying the first ceramic thin plate and the second ceramic thin plate so that the first ceramic thin plate and the second ceramic thin plate are electrically connected to each other through the via electrode and the internal electrode, And (8) firing or heat-treating the plurality of laminated first ceramic thin plates and second ceramic thin plates.
상기 (2) 단계에서, 본 발명의 일 실시예에 따르면, 상기 제 2 세라믹 박판은 상기 제 1 세라믹 박판의 소재와 전기적 물성이 다른 소재를 가질 수 있다. 예를 들어, 특정 층에 인쇄되는 패턴이 복잡한 경우, 그 특정 층에만 유전율이 적합한 소재의 세라믹 박판을 사용함으로써, 세라믹 박판의 두께 및 패턴의 면적을 다른 층과 동일하게 유지한 채, 해당 층의 패턴을 용이하게 설계할 수 있다. 다른 예로, 제조된 다층 세라믹 기판은 특정 범위의 임피던스 값을 가져야 하는데, 모든 층이 동일한 소재를 갖는 다층 세라믹 기판의 경우 상기 임피던스 값을 갖도록 설계되기가 쉽지 않을 수 있다. 이 때, 본 실시예는 다층 세라믹 기판을 구성하는 특정 층의 소재를 자유롭게 구성할 수 있으므로, 전체 다층 세라믹 기판이 상기 임피던스 값을 갖도록 설계하기가 용이할 수 있다. 본 발명의 다른 일 실시예에 따르면, 상기 제 2 세라믹 박판은 상기 제 1 세라믹 박판의 소재보다 강도가 좋은 소재를 가질 수 있다. 이로써, 다층 세라믹 기판 전체의 곡강도를 개선할 수 있다. 본 발명의 다른 일 실시예에 따르면, 상기 제 2 세라믹 박판은 상기 제 1 세라믹 박판의 소재와 다른 소재를 가짐으로써 다층 세라믹 기판의 전체 제조 공정을 보다 용이하게 개선할 수 있다. 예를 들어, 본 발명의 일 실시예는 전체 층 중 내부 전극 없이 비아 홀만 필요한 특정 층에는 내부 전극 설계의 고려 없이 비아 홀 형성에 용이한 소재(예를 들어, 비아 홀 가공이 용이한 소재)를 사용함으로써 설계에 소요되는 시간 및 비용을 개선할 수 있다. 본 발명의 다른 일 실시예에 따르면, 상기 제 2 세라믹 박판은 상기 제 1 세라믹 박판의 소재와 다른 기능을 하는 소재를 가질 수 있다. 예를 들어, 상기 제 2 세라믹 박판은 정전기 방전 현상(ESD) 및/또는 펄스성으로 나타나는 주파수 펄스 노이즈(pulse noise)를 제거하는 기능성 소재 또는 노이즈 필터 설계가 된 자성 소재를 가질 수 있다. 부연하면, 기존에는 층간 전기적 신호의 노이즈 제거를 위하여 층간에 복수의 그라운드 층을 삽입했었는데, 이는 모든 층의 소재를 동일하게 사용해야하는 설계의 한계 때문이었다. 하지만, 상기 자성 소재를 사용하면 그라운드 층을 여러 층 삽입할 필요가 없다.In the step (2), according to an embodiment of the present invention, the second ceramic thin plate may have a material having an electrical property different from that of the material of the first ceramic thin plate. For example, when a pattern to be printed on a specific layer is complicated, a ceramic thin plate of a material suitable for the specific layer is used, and the thickness and the area of the pattern of the ceramic thin plate are kept the same as those of the other layers. The pattern can be easily designed. As another example, the manufactured multilayer ceramic substrate should have a certain range of impedance values, and in the case of a multilayer ceramic substrate in which all layers have the same material, it may not be easy to design to have the impedance value. In this case, since the material of the specific layer constituting the multilayer ceramic substrate can be freely configured in this embodiment, it is easy to design the entire multilayer ceramic substrate to have the impedance value. According to another embodiment of the present invention, the second ceramic thin plate may have a material stronger than the material of the first ceramic thin plate. Thus, the bending strength of the entire multilayer ceramic substrate can be improved. According to another embodiment of the present invention, the second ceramic thin plate has a different material from that of the first ceramic thin plate, thereby making it possible to more easily improve the entire manufacturing process of the multilayer ceramic substrate. For example, in an embodiment of the present invention, a material layer (for example, a material that facilitates via hole processing) can be formed on a specific layer that requires only via holes without internal electrodes in all layers, The time and cost required for the design can be improved. According to another embodiment of the present invention, the second ceramic thin plate may have a material functioning differently from the material of the first ceramic thin plate. For example, the second ceramic lamina may have a magnetic material that is designed for a functional material or a noise filter to eliminate frequency pulse noise that is exhibited by electrostatic discharge (ESD) and / or pulsing. In addition, in the past, a plurality of ground layers were interposed between the layers in order to remove the noise of the interlayer electrical signals. This was due to design limitations in which all layers were made of the same material. However, when the magnetic material is used, it is not necessary to insert the ground layer into several layers.
상기 (1), (3) 내지 (8) 단계에 대한 설명은 도 3에 따른 실시예의 해당 단계에 대한 설명으로 대체한다.The description of the steps (1), (3) to (8) is replaced with the description of the step in the embodiment according to FIG.
본 발명의 다른 일 실시예에 따르면, 다층 세라믹 기판에서 상기 제 1 세라믹 박판과 소재가 다른 상기 제 2 세라믹 박판은, 전체 구조물인 다층 세라믹 기판의 곡강도, 안정성 및 설계 용이성 등을 강화하기 위하여, 전체 층 중에 한 층 이상에 배치될 수 있다. 여기서, 곡강도는 다층 세라믹 기판 전체의 굽힘 강도를 말한다.According to another embodiment of the present invention, in the multilayer ceramic substrate, the second ceramic thin plate having a different material from that of the first ceramic thin plate, May be disposed on more than one layer in the layer. Here, the bending strength refers to the bending strength of the entire multilayer ceramic substrate.
본 발명의 다른 일 실시예에 따르면, 다층 세라믹 기판은 상기 제 1 세라믹 박판 및 상기 제 2 세라믹 박판뿐만 아니라, 상기 제 1 세라믹 박판 및 상기 제 2 세라믹 박판의 소재와 다른 소재를 갖는 세라믹 박판을 포함할 수 있다.According to another embodiment of the present invention, the multilayer ceramic substrate includes not only the first ceramic thin plate and the second ceramic thin plate but also a ceramic thin plate having a material different from that of the first ceramic thin plate and the second ceramic thin plate can do.
본 발명의 다른 일 실시예에 따르면, 상술한 실시예에 따른 상기 (2) 단계를 전술한 도 5의 실시예 또는 도 6의 실시예에 추가하여, 층별 소재가 다른 다층 세라믹 기판을 제조할 수 있다.According to another embodiment of the present invention, in addition to the above-described step (2) according to the above-described embodiment of the embodiment of FIG. 5 or the embodiment of FIG. 6, a multilayer ceramic substrate have.
도 9는 도 8의 실시예에 따라 제조된 다층 세라믹 기판의 구성을 나타낸 도면이다.9 is a view showing a configuration of a multilayer ceramic substrate manufactured according to the embodiment of FIG.
본 발명의 일 실시예에 따른 다층 세라믹 기판(9010)은 복수의 제 1 세라믹 박판(9020) 및 제 2 세라믹 박판(9030)을 포함할 수 있다. 그리고, 상기 복수의 제 1 세라믹 박판(9020) 및 제 2 세라믹 박판(9030) 각각은 비아 전극(9040) 및 내부 전극(9050)을 포함할 수 있다.The multilayer ceramic substrate 9010 according to an embodiment of the present invention may include a plurality of first ceramic thin plates 9020 and a second ceramic thin plate 9030. Each of the first ceramic thin plate 9020 and the second ceramic thin plate 9030 may include a via electrode 9040 and an internal electrode 9050.
상기 다층 세라믹 기판의 제조 방법에 대한 상세한 설명은 도 8에서 전술하였다.A detailed description of the method for manufacturing the multilayer ceramic substrate has been described above with reference to FIG.
프로브 핀의 내구성 강화를 위한 스페이스 트랜스포머 및 그의 제조 방법Space transformer for durability enhancement of probe pin and method for manufacturing the same
도 10, 11 및 12를 참조하여, 본 발명의 일 실시예에 따른 스페이스 트랜스포머 및 그의 제조 방법을 설명한다.10, 11 and 12, a space transformer according to an embodiment of the present invention and a manufacturing method thereof will be described.
도 10은 본 발명의 일 실시예에 따른 스페이스 트랜스포머의 제조 방법을 나타낸 도면이다.10 is a view illustrating a method of manufacturing a space transformer according to an embodiment of the present invention.
본 발명의 일 실시예에 따른 스페이스 트랜스포머의 제조 방법은 다음의 단계를 포함한다. A method of manufacturing a space transformer according to an embodiment of the present invention includes the following steps.
(1) 복수의 세라믹 그린 시트를 소성하여 복수의 세라믹 박판을 생성하는 단계, (2) 상기 복수의 세라믹 박판 각각에 비아 홀을 형성하는 단계, (3) 상기 형성된 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성하는 단계, (4) 상기 복수의 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성하는 단계, (5) 상기 복수의 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하는 단계, (6) 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판 각각을 정렬하여 적층하는 단계, (7) 상기 적층된 복수의 세라믹 박판을 소성 또는 열처리하여 다층 세라믹 기판을 생성하는 단계, (8) 세라믹 그린 시트를 소성하여 프로브 핀 고정용 세라믹 박판을 생성하는 단계, (9) 상기 프로브 핀 고정용 세라믹 박판에 프로브 핀의 바닥면의 형상을 갖는 홀을 형성하는 단계, (10) 상기 형성된 홀의 측면에 전극 재료를 도포하는 단계, (11) 상기 다층 세라믹 기판의 상부 표면에 상기 홀과 맞닿을 부분을 피해 본딩제를 도포하는 단계, (12) 상기 다층 세라믹 기판의 상부 표면에 형성된 내부 전극과 상기 프로브 핀 고정용 세라믹 박판에 형성된 홀이 맞닿도록 상기 다층 세라믹 기판에 상기 프로브 핀 고정용 세라믹 박판을 적층하는 단계, (13) 상기 적층된 다층 세라믹 기판 및 프로브 핀 고정용 세라믹 박판을 소성 또는 열처리하는 단계, (14) 상기 홀 안에 존재하는 상기 다층 세라믹 기판의 내부 전극 위에 땜납을 형성하는 단계, (15) 상기 홀에 상기 프로브 핀을 삽입하여 상기 땜납을 압착 단계, (16) 상기 땜납을 열처리하여 상기 프로브 핀을 상기 홀 및 상기 다층 세라믹 기판의 내부 전극에 고정시키는 단계.(1) firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates, (2) forming via holes in each of the plurality of ceramic thin plates, (3) filling the via holes with the conductive paste (4) forming an internal electrode by printing a pattern of a conductive paste on the end face of each of the plurality of ceramic thin plates and performing heat treatment; (5) (6) aligning and laminating each of the plurality of ceramic thin plates so that each of the plurality of ceramic thin plates is electrically connected via the via electrode and the internal electrode, (7) A step of firing or heat-treating a plurality of laminated ceramic thin plates to produce a multilayer ceramic substrate; (8) firing the ceramic green sheet to fix the probe pins (9) forming a hole having the shape of the bottom surface of the probe pin on the ceramic thin plate for fixing the probe pin, (10) applying an electrode material to the side surface of the hole formed, (11) ) Applying a bonding agent to an upper surface of the multilayer ceramic substrate to avoid a portion thereof abutting on the hole, (12) inserting an inner electrode formed on an upper surface of the multilayer ceramic substrate and a hole formed in the ceramic thin plate for fixing the probe pin (13) firing or heat-treating the laminated multilayer ceramic substrate and the ceramic thin plate for fixing the probe pins, (14) laminating the ceramic thin plate for fixing the probe pin on the multilayer ceramic substrate Forming a solder on the internal electrode of the multilayer ceramic substrate; (15) inserting the probe pin into the hole to compress the solder; (16) The step of thermally treating the solder fixing the probe pin in the hole and the internal electrode of the multilayer ceramic substrate.
상기 (1) 내지 (7) 단계에 대한 설명은 도 3에 따른 실시예의 해당 단계에 대한 설명으로 대체한다.The description of the steps (1) to (7) is replaced with a description of the corresponding step in the embodiment according to FIG.
상기 (8) 단계에서, 본 발명의 일 실시예는 새로운 세라믹 그린 시트를 소성하여 프로브 핀 고정용 세라믹 박판(11050)을 생성할 수 있다.In the step (8), an embodiment of the present invention can produce a ceramic thin plate 11050 for fixing a probe pin by firing a new ceramic green sheet.
상기 (9) 단계에서, 본 발명의 일 실시예는 프로브 핀 고정용 세라믹 박판(11050)에 프로브 핀(11010)의 바닥면의 형상을 갖는 홀(11080)을 형성할 수 있다. 이 때, 프로브 핀의 바닥면의 형상을 가져야하는 이유는 프로브 핀을 상기 홀에 삽입하여 고정하기 위함이다. 본 발명의 일 실시예에 따르면, 프로브 핀이 상기 홀에 삽입되었을 때, 상기 홀과 상기 프로브 핀의 측면 간격(11090)은 20마이크론 이하의 거리를 갖도록 설계될 수 있다. 본 발명의 일 실시예는 상기 프로브 핀 고정용 세라믹 박판이 세라믹 소재로 이루어져 있기 때문에, 박판의 깨짐 없이, 박판의 단면에 홀을 형성할 수 있다. 본 발명의 일 실시예에 따르면, 상기 홀이 형성되는 상기 프로브 핀 고정용 세라믹 박판의 두께는 20 내지 100마이크론일 수 있다. 나아가, 본 발명의 일 실시예에 따르면, 상기 홀은 상기 프로브 핀 고정용 세라믹 박판과 맞닿아 있는 다층 세라믹 기판(11030)의 내부 전극(11070)이 존재하는 위치에 형성될 수 있다. 그리고, 상기 프로브 핀은 땜납을 통해 상기 홀에 삽입되고 고정되어 다층 세라믹 기판(11030)의 내부 전극(11070)과 전기적으로 연결될 수 있다.In the step (9), a hole 11080 having the shape of the bottom surface of the probe pin 11010 may be formed on the ceramic thin plate 11050 for fixing the probe pin. At this time, the reason why the bottom surface of the probe pin has a shape is to insert and fix the probe pin into the hole. According to an embodiment of the present invention, when the probe pin is inserted into the hole, the side interval 11090 between the hole and the probe pin may be designed to have a distance of 20 microns or less. According to an embodiment of the present invention, since the ceramic thin plate for fixing the probe pin is made of ceramic material, holes can be formed in the end face of the thin plate without breaking the thin plate. According to an embodiment of the present invention, the thickness of the ceramic thin plate for fixing the probe pins on which the holes are formed may be 20 to 100 microns. Further, according to an embodiment of the present invention, the hole may be formed at a position where the internal electrode 11070 of the multilayer ceramic substrate 11030 in contact with the ceramic thin plate for fixing the probe pin exists. The probe pin may be inserted into and fixed to the hole through solder to be electrically connected to the internal electrode 11070 of the multilayer ceramic substrate 11030.
상기 (10) 단계에서, 본 발명의 일 실시예는 상기 형성된 홀(11080)의 측면에 전극 재료(11040)를 도포할 수 있다. 이 때, 상기 전극 재료는 Ag, Cu, Au, Ni, Sn 등에 해당할 수 있고, 땜납(11020)을 이용해 프로브 핀(11010)을 상기 프로브 핀 고정용 세라믹 박판(11050)에 고정시키기 위해 사용될 수 있다.In step (10), an embodiment of the present invention may apply the electrode material 11040 to the side of the hole 11080 formed. The electrode material may be Ag, Cu, Au, Ni, Sn or the like and may be used to fix the probe pin 11010 to the probe pin fixing ceramic thin plate 11050 using the solder 11020 have.
상기 (11) 단계에서, 본 발명의 일 실시예는 다층 세라믹 기판(11030)의 상부 표면에 상기 홀(11080)과 맞닿을 부분을 피해 본딩제(11060)를 도포할 수 있다. 이 때, 본딩제(11060)은 다층 세라믹 기판(11030)의 층간을 접착시키기 위해 사용하는 본딩제와 동일할 수 있다. 본딩제에 대한 상세한 설명은 전술하였다.In the step (11), the bonding agent 11060 may be applied to the upper surface of the multilayer ceramic substrate 11030 to avoid a portion of the upper surface of the multilayer ceramic substrate 11030 that abuts the hole 11080. In this case, the bonding agent 11060 may be the same as the bonding agent used for bonding the layers of the multilayer ceramic substrate 11030. A detailed description of the bonding agent has been described above.
상기 (12) 단계에서, 본 발명의 일 실시예는 다층 세라믹 기판의 상부 표면에 형성된 내부 전극(11070)과 상기 프로브 핀 고정용 세라믹 박판에 형성된 홀(11080)이 맞닿도록 상기 다층 세라믹 기판에 상기 프로브 핀 고정용 세라믹 박판을 적층할 수 있다. 즉, 생성된 다층 세라믹 기판 위에 프로브 핀 고정용 세라믹 박판을 한 층 더 적층할 수 있다.In step (12), an embodiment of the present invention is characterized in that an inner electrode 11070 formed on the upper surface of the multilayer ceramic substrate and a hole 11080 formed on the ceramic pin plate for fixing the probe pin are brought into contact with the multilayer ceramic substrate A ceramic thin plate for fixing the probe pin can be laminated. That is, one layer of the ceramic thin plate for fixing the probe pin can be further laminated on the generated multilayer ceramic substrate.
상기 (13) 단계에서, 본 발명의 일 실시예는 적층된 다층 세라믹 기판 및 프로브 핀 고정용 세라믹 박판을 소성 또는 열처리할 수 있다.In the step (13), the laminated multilayer ceramic substrate and the ceramic thin plate for fixing the probe pins may be fired or heat-treated.
상기 (14) 단계에서, 본 발명의 일 실시예는 상기 홀 안에 존재하는 상기 다층 세라믹 기판의 내부 전극(11070) 위에 땜납(11020)을 형성할 수 있다. 이 때, 상기 땜납은 크림 솔더(solder)의 공 형상을 가질 수 있다. 본 발명의 일 실시예에 따르면, 상기 홀은 상기 홀이 형성되는 박판을 관통하는 홀으로서 상기 땜납이 형성되는 상기 홀의 바닥은 다층 세라믹 기판의 내부 전극(11070)의 상면이 될 수 있다.In step (14), an embodiment of the present invention may form the solder 11020 on the internal electrode 11070 of the multilayer ceramic substrate existing in the hole. At this time, the solder may have a spherical shape of a cream solder. According to an embodiment of the present invention, the hole may be a hole passing through the thin plate on which the hole is formed, and the bottom of the hole where the solder is formed may be the upper surface of the internal electrode 11070 of the multilayer ceramic substrate.
상기 (15), (16) 단계에서, 본 발명의 일 실시예는 상기 홀(11080)에 상기 프로브 핀(11010)을 삽입하여 상기 땜납을 압착할 수 있다. 나아가, 본 발명의 일 실시예는 상기 땜납을 열처리하여 프로브 핀을 상기 홀 및 상기 다층 세라믹 기판의 내부 전극(11070)에 고정시킬 수 있다. 구체적으로, 열처리와 동시에 상기 프로브 핀으로 압착을 가함으로써 상기 땜납(11020)은 액체로 변하여 상기 홀과 상기 프로브 핀의 사이에 흘러들어가고 그대로 굳음으로써 상기 프로브 핀을 상기 홀에 고정시킬 수 있다. 이로써, 본 발명의 일 실시예는 상기 프로브 핀의 하면뿐만 아니라 모든 측면을 프로브 핀 고정용 세라믹 박판에 고정시킬 수 있다. 나아가, 상기 프로브 핀은 굳어진 납을 통해 다층 세라믹 기판의 내부 전극(11070)에 전기적으로 연결될 수 있다.In the steps (15) and (16), the probe pin 11010 may be inserted into the hole 11080 to press the solder. Further, in an embodiment of the present invention, the solder may be heat treated to fix the probe pin to the hole and the internal electrode 11070 of the multilayer ceramic substrate. Concretely, the solder 11020 is turned into a liquid by applying pressure to the probe pin at the same time as the heat treatment, so that the probe pin can be fixed to the hole by flowing between the hole and the probe pin and solidifying as it is. Thus, in one embodiment of the present invention, not only the bottom surface but also all the side surfaces of the probe pin can be fixed to the ceramic thin plate for fixing the probe pins. Further, the probe pin may be electrically connected to the internal electrode 11070 of the multilayer ceramic substrate through the solid lead.
본 발명의 다른 일 실시예는 프로브 핀 고정용 세라믹 박판에 복수 개의 홀을 형성할 수 있고, 상기 형성된 복수 개의 홀에 땜납을 마스크 프린팅이나 디스팬싱 방법으로 일괄적으로 형성할 수 있다. 그리고, 상기 형성된 홀의 개수와 같은 수의 프로브 핀은 상기 형성된 복수 개의 홀의 위치와 일치되도록 배열된 고정판(지그, jig)에 부착 및 역삽입될 수 있다. 그리고, 이 고정판에 부착된 복수 개의 프로브 핀을 일괄적으로 상기 복수 개의 홀에 삽입할 수 있다. 이 후, 형성된 땜납을 일괄적으로 열처리함으로써 복수 개의 프로브 핀을 복수 개의 홀에 고정시키고나서, 복수 개의 프로브 핀을 상기 고정판으로부터 탈착시킬 수 있다. 상술한 방법을 통해, 시간 및 비용 측면에서 효율적으로 프로브 핀을 다층 세라믹 기판에 고정시킬 수 있다.According to another embodiment of the present invention, a plurality of holes may be formed in the ceramic thin plate for fixing the probe pins, and the solder may be collectively formed by mask printing or dispensing. The number of probe pins equal to the number of the holes may be attached to and inserted back into a fixing plate (jig) arranged to coincide with the positions of the plurality of holes formed. A plurality of probe pins attached to the fixing plate can be collectively inserted into the plurality of holes. Thereafter, the plurality of probe pins are fixed to the plurality of holes by collectively heat-treating the formed solder, and then a plurality of probe pins can be detached from the fixing plate. With the above-described method, it is possible to fix the probe pin to the multilayer ceramic substrate efficiently in terms of time and cost.
본 발명의 다른 일 실시예는, 프로브 핀 고정용 세라믹 박판을 다층 세라믹 기판에 적층하기 전에, 프로브 핀 고정용 세라믹 박판과 맞닿을 다층 세라믹 기판의 상면에 존재하는 내부 전극의 위치를 고려하여 홀을 형성하고, 그 이후에 다층 세라믹 기판 위에 프로브 핀 고정용 세라믹 박판을 적층할 수 있다.Another embodiment of the present invention is a method of manufacturing a multilayer ceramic substrate for mounting a probe pin on a multilayer ceramic substrate, comprising the steps of: And thereafter, the ceramic thin plate for fixing the probe pin can be laminated on the multilayer ceramic substrate.
도 11은 도 10의 실시예에 따라 제조된 스페이스 트랜스포머의 정면도이다.11 is a front view of a space transformer manufactured in accordance with the embodiment of FIG.
본 발명의 일 실시예에 따른 스페이스 트랜스포머(11200)는 적층된 다층 세라믹 기판(11030) 및 프로브 핀 고정용 세라믹 박판(11050)을 포함할 수 있다. 그리고, 상기 다층 세라믹 기판을 구성하는 복수의 세라믹 박판 각각은 비아 전극 및 내부 전극을 포함할 수 있다. 상기 프로브 핀 고정용 세라믹 박판(11050)은 프로브 핀(11010)의 바닥면의 형상을 갖는 홀(11080) 및 상기 홀의 측면에 도포되어 상기 프로브 핀(11010)을 상기 홀(11080)에 고정시키기 위한 전극 재료(11040)를 포함할 수 있다. 나아가, 상기 스페이스 트랜스포머는 땜납(11020) 및 상기 전극 재료(11040)를 통해 상기 홀에 고정되는 상기 프로브 핀(11010)을 포함할 수 있다. 구체적으로, 상기 프로브 핀은 상기 홀에 형성된 땜납(11020)을 열처리함으로써 다층 세라믹 기판(11030) 및 프로브 핀 고정용 세라믹 박판(11050)에 고정될 수 있다.The space transformer 11200 according to an embodiment of the present invention may include a laminated multilayer ceramic substrate 11030 and a ceramic thin plate 11050 for fixing a probe pin. Each of the plurality of ceramic thin plates constituting the multilayer ceramic substrate may include a via electrode and an internal electrode. The probe pin fixing ceramic thin plate 11050 includes a hole 11080 having the shape of the bottom surface of the probe pin 11010 and a hole 11080 formed on the side surface of the hole for fixing the probe pin 11010 to the hole 11080 And an electrode material 11040. Further, the space transformer may include the solder 11020 and the probe pin 11010 fixed to the hole through the electrode material 11040. Specifically, the probe pin may be fixed to the multilayer ceramic substrate 11030 and the ceramic thin plate 11050 for fixing the probe pin by heat-treating the solder 11020 formed in the hole.
상기 스페이스 트랜스포머의 제조 방법에 대한 상세한 설명은 도 10에서 전술하였다.A detailed description of the method of manufacturing the space transformer has been given above with reference to FIG.
도 11의 11100은 프로브 핀을 삽입 및 압착하기 직전의 모습을 나타낸 도면이고, 11200은 프로브 핀을 삽입 및 압착하고 땜납을 열처리하여, 프로브 핀을 프로브 핀 고정용 세라믹 박판에 고정시킨 후의 완성된 스페이스 트랜스포머의 모습을 나타낸 도면이다. 11060은 프로브 핀 고정용 세라믹 박판을 다층 세라믹 기판에 접착하기 위한 본딩제를 나타내고, 11030은 다층 세라믹 기판을 나타낸다. 나머지, 도 11에 대한 상세한 설명은 도 10의 설명 부분에서 전술하였다. Reference numeral 11100 in FIG. 11 is a view immediately before inserting and pressing the probe pin. Reference numeral 11200 denotes a solder paste in which the probe pin is inserted and compressed, and the solder is heat-treated to complete the finished space after fixing the probe pin to the probe pin- Fig. 7 is a view showing a transformer. Fig. Reference numeral 11060 denotes a bonding agent for bonding a ceramic thin plate for fixing a probe pin to a multilayer ceramic substrate, and 11030 denotes a multilayer ceramic substrate. 11, has been described above in the description of FIG.
도 12는 도 10의 실시예에 따라 제조된 스페이스 트랜스포머의 상면도이다.12 is a top view of a space transformer manufactured in accordance with the embodiment of FIG.
도 12에 대한 상세한 설명은 도 10의 설명 부분에서 전술하였다.A detailed description of FIG. 12 has been given above in the description of FIG.
본 발명의 보호범위가 이상에서 명시적으로 설명한 실시예의 기재와 표현에 제한되는 것은 아니다. 또한, 본 발명이 속하는 기술분야에서 자명한 변경이나 치환으로 말미암아 본 발명이 보호범위가 제한될 수도 없음을 다시 한 번 첨언한다.The scope of protection of the present invention is not limited to the description and the expression of the embodiments explicitly described in the foregoing. It is again to be understood that the present invention is not limited by the modifications or substitutions that are obvious to those skilled in the art.
본 발명은 다층 세라믹 기판이 사용되는 모든 산업 분야에서 이용될 수 있다.The present invention can be used in all industrial fields in which a multilayer ceramic substrate is used.

Claims (5)

  1. 복수의 세라믹 그린 시트를 소성하여 복수의 세라믹 박판을 생성하는 단계;Firing a plurality of ceramic green sheets to produce a plurality of ceramic thin plates;
    상기 복수의 세라믹 박판 각각에 비아 홀을 형성하는 단계;Forming via holes in each of the plurality of ceramic thin plates;
    상기 복수의 세라믹 박판 각각의 비아 홀에 도전성 페이스트를 충진하고 열처리하여 비아 전극을 형성하는 단계;Filling a via hole of each of the plurality of ceramic thin plates with a conductive paste and performing heat treatment to form a via electrode;
    상기 복수의 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리하여 내부 전극을 형성하는 단계;Forming an internal electrode by printing a pattern on a cross section of each of the plurality of ceramic thin plates with a conductive paste and subjecting the pattern to a heat treatment;
    상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하는 단계;Applying a bonding agent to a cross section of each of the remaining ceramic thin plates excluding the uppermost ceramic thin plate among the plurality of ceramic thin plates to avoid a via hole;
    상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판 각각을 정렬하여 적층하는 단계; 및Aligning and stacking the plurality of ceramic thin plates so that each of the plurality of ceramic thin plates is electrically connected through the via electrode and the internal electrode; And
    상기 적층된 복수의 세라믹 박판을 소성 또는 열처리하는 단계;Firing or heat-treating the plurality of laminated ceramic thin plates;
    를 포함하는 다층 세라믹 기판 제조 방법.≪ / RTI >
  2. 제 1 항에 있어서,The method according to claim 1,
    상기 도전성 페이스트는 유리 성분을 포함하고,Wherein the conductive paste comprises a glass component,
    상기 적층된 복수의 세라믹 박판을 상기 본딩제의 녹는점보다 높고 상기 세라믹 박판의 녹는점 및 상기 도전성 페이스트의 녹는점보다 낮은 온도로 열처리하는 다층 세라믹 기판 제조 방법.Wherein the plurality of laminated ceramic thin plates are heated to a temperature higher than a melting point of the bonding agent and lower than a melting point of the ceramic thin plate and a melting point of the conductive paste.
  3. 제 1 항에 있어서,The method according to claim 1,
    상기 비아 전극 또는 상기 내부 전극의 전도성을 검사하여, 전도성에 문제가 있는 경우, 상기 비아 홀의 도전성 페이스트 또는 상기 패턴의 도전성 페이스트를 에칭 용액을 이용하여 애칭하고 상기 비아 홀을 재충진하거나 상기 패턴을 재인쇄하는 다층 세라믹 기판 제조 방법.The conductive paste of the via hole or the conductive paste of the pattern is etched using an etching solution to refill the via hole or to insulate the conductive paste of the pattern using the etching solution, Layer printed ceramic substrate.
  4. 제 1 항에 있어서,The method according to claim 1,
    상기 복수의 세라믹 박판 각각의 두께는 10 내지 500마이크론이고, 상기 본딩제가 형성하는 본딩층의 두께는 2 내지 100마이크론이고, 상기 복수의 세라믹 박판 각각의 지름은 12인치 이상인 다층 세라믹 기판 제조 방법.Wherein the thickness of each of the plurality of ceramic thin plates is 10 to 500 microns, the thickness of the bonding layer formed by the bonding agent is 2 to 100 microns, and the diameter of each of the plurality of ceramic thin plates is 12 inches or more.
  5. 복수의 세라믹 박판이 적층되어 형성되는 다층 세라믹 기판으로서,A multilayer ceramic substrate comprising a plurality of ceramic thin plates laminated,
    상기 복수의 세라믹 박판은 복수의 세라믹 그린 시트를 소성하여 생성되고,The plurality of ceramic thin plates are produced by firing a plurality of ceramic green sheets,
    상기 복수의 세라믹 박판 각각은 비아 전극 및 내부 전극을 포함하고, 상기 비아 전극은 상기 복수의 세라믹 박판 각각에 형성된 비아 홀에 도전성 페이스트를 충진하고 열처리함으로써 형성되고, 상기 내부 전극은 상기 복수의 세라믹 박판 각각의 단면에 도전성 페이스트로 패턴을 인쇄하고 열처리함으로써 형성되고,Wherein each of the plurality of ceramic thin plates includes a via electrode and an internal electrode, wherein the via electrode is formed by filling a via hole formed in each of the plurality of ceramic thin plates with a conductive paste and performing heat treatment, A pattern is printed on each end face with a conductive paste and heat-treated,
    상기 다층 세라믹 기판은 상기 복수의 세라믹 박판 중 최상위 세라믹 박판을 제외한 나머지 세라믹 박판 각각의 단면에 비아 홀을 피해 본딩제를 도포하고, 상기 비아 전극과 상기 내부 전극을 통해 상기 복수의 세라믹 박판 각각이 전기적으로 접속되도록 상기 복수의 세라믹 박판을 정렬하여 적층하고, 상기 적층된 복수의 세라믹 박판을 소성 또는 열처리함으로써 생성되는 다층 세라믹 기판.Wherein the multilayer ceramic substrate is formed by applying a bonding agent to an end surface of each of the remaining ceramic thin plates except for the uppermost ceramic thin plate to avoid a via hole and electrically connecting the ceramic thin plate with the via electrode, And a plurality of ceramic thin plates laminated to align and laminate the plurality of ceramic thin plates so as to be connected to the plurality of ceramic thin plates, and firing or heat-treating the plurality of laminated ceramic thin plates.
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