WO2018233068A1 - 显示面板的测试电路及测试方法 - Google Patents

显示面板的测试电路及测试方法 Download PDF

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Publication number
WO2018233068A1
WO2018233068A1 PCT/CN2017/100254 CN2017100254W WO2018233068A1 WO 2018233068 A1 WO2018233068 A1 WO 2018233068A1 CN 2017100254 W CN2017100254 W CN 2017100254W WO 2018233068 A1 WO2018233068 A1 WO 2018233068A1
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WIPO (PCT)
Prior art keywords
test
display panel
pad
pads
electrically connected
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Ceased
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PCT/CN2017/100254
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English (en)
French (fr)
Inventor
陈猷仁
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Priority to US16/623,200 priority Critical patent/US11158222B2/en
Publication of WO2018233068A1 publication Critical patent/WO2018233068A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133707—Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133711—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by organic films, e.g. polymeric films
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof

Definitions

  • the present disclosure relates to display technologies, such as test circuits and test methods for a display panel.
  • liquid crystal molecular orientation needs to be performed on the display panel.
  • the liquid crystal molecular orientation process may adopt the following steps: applying a voltage signal or a current signal between the array substrate and the color filter substrate, at least in the array substrate and the color filter substrate.
  • An alignment film is formed on the film, and the alignment film forms a polymer protrusion under the above voltage or current, and the polymer protrusion forms a pretilt angle, and the pretilt angle can arrange the liquid crystal molecules between the array substrate and the color filter substrate in a specific direction.
  • each display panel requires a separate lead and a pad connected to the lead. This results in a large number of lines, and one solution in the related art is to connect one lead to a plurality of display panels.
  • the present disclosure provides a test circuit and a test method for a display panel, so that each display panel is tested separately during the array test, and a plurality of display panels are simultaneously tested while performing liquid crystal molecular orientation.
  • a test circuit for a display panel comprising:
  • each of the first test leads is disposed to be electrically connected to a corresponding one of the display panels; each of the first The test pad is electrically connected to the output end of the corresponding switch unit, and each of the first test pads is electrically connected to the corresponding first test lead; the second test pad and the second test lead are both And electrically connected to the input ends of the plurality of switch units.
  • test method for a display panel comprising: connecting a display panel to a test circuit, wherein the test circuit comprises:
  • each of the first test leads is disposed to be electrically connected to a corresponding one of the display panels; each of the first The test pad is electrically connected to the output end of the corresponding switch unit, and each of the first test pads is electrically connected to the corresponding first test lead; the second test pad and the second test lead are both Electrically connecting with the input ends of the plurality of switch units;
  • a test circuit for a display panel comprising:
  • each of the first test leads is disposed to be electrically connected to a corresponding one of the display panels; each of the first The test pad is electrically connected to the output end of the corresponding switch unit, and each of the first test pads is electrically connected to the corresponding first test lead; the second test pad and the second test lead are both Electrically connecting with the input ends of the plurality of switch units;
  • the test circuit further includes a plurality of third test pads, each of the display panels corresponding to the first a third test pad, each of the third test pads being electrically connected to an input end of the corresponding switch unit; the first test pad and the third test pad are disposed adjacent to each other; the switch unit is a diode, An input end of the diode is an input end of the switch unit, an output end of the diode is an output end of the switch unit, and the plurality of first test pads are arranged in an array along an extending direction of the second test lead .
  • FIG. 1 is a test circuit of a display panel according to an embodiment of the present invention
  • FIG. 3 is a test circuit of another display panel according to the embodiment.
  • FIG. 4 is a test circuit of another display panel according to the embodiment.
  • FIG. 1 is a test circuit of a display panel according to the embodiment.
  • the test circuit of the display panel provided by the embodiment includes: a plurality of switch units 60, a plurality of first test leads 20, and a plurality of The first test pad 30, the second test pad 40, and the second test lead 50.
  • the plurality of display panels 10 are formed on a mother substrate 100.
  • Each of the display panels 10 corresponds to a switch unit 60, a first test lead 20, and a first test pad 30, and each of the first test leads 20 corresponds to The display panel 10 is electrically connected.
  • Each of the first test pads 30 is electrically connected to the output end of the corresponding switch unit 60 and the corresponding first test lead 20, and the second test pad 40 and the second test lead 50 are connected to the plurality of switch units.
  • the input of 60 is electrically connected.
  • a plurality of first test pads 30 are arranged in an array along the extending direction of the second test leads 50.
  • a plurality of first test pad arrays are arranged to facilitate application of a test signal to the first test pad using the probe.
  • the embodiment provides a test circuit for the display panel.
  • the switch unit 60 When the array panel is tested on the display panel, the switch unit 60 is turned off, thereby avoiding the problem that the test signals interfere with each other due to the connection of the plurality of display panels 10 .
  • Each display panel 10 is tested separately during the array test, which improves the accuracy of the array test; when the display panel 10 is subjected to liquid crystal molecular orientation, the switch single When the element 60 is turned on, the pretilt angle is simultaneously formed in the plurality of display panels 10 when the liquid crystal molecules are aligned, and the efficiency of liquid crystal molecule orientation on the display panel is improved.
  • a chemical monomer may be added to the liquid crystal. During the alignment process, the chemical monomer is polymerized by ultraviolet irradiation to form a polymer bump for fixing the liquid crystal to form a pretilt angle.
  • the liquid crystal molecular orientation process may be: applying a aligning voltage sequence to the display panel, the liquid crystal is poured down in an order under the electric field, and then maintaining the voltage unchanged, and the display panel is irradiated with ultraviolet rays, and the chemical monomer in the display panel is exposed to ultraviolet rays.
  • the polymerization forms an ordered array of polymer bumps to form a pretilt angle of the display panel, so that the liquid crystal molecules are sequentially arranged under the pretilt angle of the display panel.
  • FIG. 2 is a test circuit of another display panel according to the embodiment. As shown in FIG. 2, on the basis of the above embodiment, the test circuit further includes a plurality of third test pads 70, and each display panel 10 corresponds to one.
  • the third test pad 70 is electrically connected to the input end of the corresponding switch unit 60, and is disposed adjacent to the first test pad 30 and the third test pad 70 corresponding to the same display panel.
  • the switch unit 60 When the display panel 10 is subjected to the array test, it is required to apply a test signal on the first test pad 30, and it is necessary to ensure that there is no mutual signal interference between the plurality of display panels 10, that is, the switch unit 60 is required to be in a closed state, and thus The first test pad 30 and the third test pad 70 are disposed adjacent to each other, so that the signal sent by the signal source is simultaneously loaded on the first test pad 30 and the third test pad 70 by using the probe, and the switch unit is controlled by the third test pad 70. 60 is turned off while a test signal is sent to the display panel 10 through the first test pad 30.
  • FIG. 3 is a test circuit of another display panel according to the embodiment.
  • the switch unit 60 is a triode, and the input end and the control end of the triode are short-circuited as the switch unit 60.
  • the output of the triode is the output of the switching unit 60.
  • the triode can be an electron triode, a field effect transistor, a thin film transistor, or the like.
  • the input can be the source or the drain
  • the output can be the drain or the source
  • the control can be the gate.
  • the test circuit may also include a plurality of third test pads, each display panel corresponding to a third test pad, and each third test pad and a corresponding switch unit (for example, a triode in the embodiment)
  • the terminal is electrically connected, and is disposed adjacent to the first test pad and the third test pad corresponding to the same display panel.
  • the test circuit may also include a plurality of third test pads, each display panel corresponding to a third test pad, and input of each third test pad and a corresponding switch unit (eg, the diode in this embodiment)
  • the terminal is electrically connected, and is disposed adjacent to the first test pad and the third test pad corresponding to the same display panel.
  • the display panel may include a liquid crystal display panel, a quantum dot liquid crystal display panel, or other display panel, and the display panel may be applied to, for example, a mobile phone, a tablet computer, or a television.
  • the mother substrate 100 shown in FIGS. 1 to 4 can be fabricated by using a glass substrate.
  • a plurality of display panels 10 are simultaneously formed on the same mother substrate 100, and the production efficiency of the display panel 10 is improved by making only a single display panel 10 at a time.
  • the mother substrate 100 is cut to obtain a separate display panel 10, and the test circuit can be cut during the process of cutting the mother substrate 100.
  • the cutting removal that is, the above-described test circuit may not be included in the independent display panel 10 after the cutting is completed.
  • the embodiment also provides a test method for a display panel.
  • the test circuit of the display panel includes: a plurality of switch units 60 , a plurality of first test leads 20 , and a plurality of First test pad 30, second test pad 40 and second test lead 50.
  • Each of the display panels 10 corresponds to a switch unit 60, a first test lead 20, and a first test pad 30, and each of the first test leads 20 is electrically connected to the corresponding display panel 10, and each of the first test pads 30 is electrically connected to the output end of the corresponding switch unit 60 and the corresponding first test lead 20, and both the second test pad 40 and the second test lead 50 are electrically connected to the input ends of the plurality of switch units 60.
  • the testing method of the display panel provided in this embodiment includes: when performing array testing on the display panel 10, controlling the plurality of switch units 60 to be turned off, and applying the first test signal to the first test pad through the plurality of first test pads 30. 30 corresponds to the display panel 10; when the display panel 10 is subjected to liquid crystal molecular orientation, the plurality of switching units 60 are controlled to be turned on, and the second test signal is applied to the plurality of display panels 10 through the second test pad 40.
  • a control signal is input through the second test pad 40, the plurality of switch units 60 are controlled to be turned off, and the first test signal is applied to the plurality of first test pads 30 to The first test pad 30 corresponds to the display panel 10; when the display panel 10 is subjected to liquid crystal molecular orientation, the second test pad 40 inputs a second test signal to control the plurality of switch units 60. The second test signal is applied to the plurality of display panels 10.
  • the test circuit further includes a plurality of third test pads 70, each of the display panels 10 corresponding to a third test pad 70, and each of the third test pads 70 is electrically connected to the input end of the corresponding switch unit 60.
  • the first test pad 30 and the third test pad 70 corresponding to the same display panel are disposed adjacent to each other.
  • a control signal is input through the third test pad 70 to control the plurality of switch units 60 to be turned off.
  • the signal controls the plurality of switching units 60 to be turned on, and applies the second test signal to the plurality of display panels 10.
  • the switch unit 60 is a triode, and the input end and the control end of the triode are short-circuited as an input end of the switch unit 60, and the output end of the triode is an output end of the switch unit 60.
  • the triode can be an electron triode, a field effect transistor, a thin film transistor, or the like.
  • the input can be the source or the drain
  • the output can be the drain or the source
  • the control can be the gate.
  • the switch unit 60 is a diode
  • the input end of the diode is an input end of the switch unit 60
  • the output end of the diode is an output end of the switch unit 60.
  • a plurality of diodes are controlled to be turned off, for example, a PN junction of the diode is applied with a reverse voltage, the PN junction of the diode is turned off, exhibits high resistance, and the first test is applied through the plurality of first test pads 30.
  • the present embodiment provides a test method for a display panel, which is controlled by controlling a plurality of switch units 60 to perform an array test on the display panel 10. This avoids the presence of test signals between the plurality of display panels 10 due to the connection of one lead.
  • the problem of interference is achieved by testing each display panel 10 separately during the array test, thereby improving the accuracy of the array test; and controlling the plurality of switch units 60 to conduct the liquid crystal molecules when the display panel 10 is turned on, thereby realizing When the liquid crystal molecules are aligned, the plurality of display panels 10 are simultaneously tested, and the efficiency of liquid crystal molecule alignment on the display panel is improved.

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  • Engineering & Computer Science (AREA)
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Abstract

一种显示面板的测试电路及测试方法，测试电路包括：多个开关单元；多条第一测试引线；多个第一测试垫；第二测试垫和第二测试引线；其中，所述开关单元、所述第一测试引线以及所述第一测试垫的数量相同；且每一所述第一测试引线设置为与对应的所述显示面板电连接；每一所述第一测试垫与对应的所述开关单元的输出端电连接，以及每一所述第一测试垫与对应的所述第一测试引线电连接；所述第二测试垫和所述第二测试引线均与多个所述开关单元的输入端电连接。

Description

显示面板的测试电路及测试方法 技术领域
本公开涉及显示技术，例如涉及一种显示面板的测试电路及测试方法。
背景技术
制作显示面板的过程中需要对显示面板进行液晶分子取向，液晶分子取向过程可以采用如下步骤：在阵列基板和彩膜基板之间施加一电压信号或电流信号，阵列基板和彩膜基板中的至少一个上具有配向膜，配向膜在上述电压或电流作用下形成聚合物凸起，该聚合物凸起形成预倾角，预倾角能够使位于阵列基板和彩膜基板之间的液晶分子按照特定方向排列，可以提高显示面板的显示品质。在进行液晶分子取向时，每个显示面板都需要一个单独的引线以及与该引线相连接的焊盘。这样就造成线路繁多，相关技术中的一种解决方式是将一条引线连接多个显示面板。
但是采用将一条引连接多个显示面板的方式存在如下问题：在对显示面板进行阵列测试时，多个显示面板之间由于由一条引线相连接因而存在测试信号干扰的问题。
发明内容
本公开提供一种显示面板的测试电路及测试方法，以实现在进行阵列测试时分别对每个显示面板进行测试，在进行液晶分子取向时同时对多个显示面板进行测试。
一种显示面板的测试电路，包括：
多个开关单元；
多条第一测试引线；
多个第一测试垫；
第二测试垫和第二测试引线；
其中，所述开关单元、所述第一测试引线以及所述第一测试垫的数量相同；且每一所述第一测试引线设置为与对应的一个显示面板电连接；每一所述第一 测试垫与对应的所述开关单元的输出端电连接，以及每一所述第一测试垫与对应的所述第一测试引线电连接；所述第二测试垫和所述第二测试引线均与多个所述开关单元的输入端电连接。
一种显示面板的测试方法，包括：将显示面板与测试电路连接，其中，所述测试电路包括：
多个开关单元；
多条第一测试引线；
多个第一测试垫；
第二测试垫和第二测试引线；
其中，所述开关单元、所述第一测试引线以及所述第一测试垫的数量相同；且每一所述第一测试引线设置为与对应的一个显示面板电连接；每一所述第一测试垫与对应的所述开关单元的输出端电连接，以及每一所述第一测试垫与对应的所述第一测试引线电连接；所述第二测试垫和所述第二测试引线均与多个所述开关单元的输入端电连接；
控制多个所述开关单元关闭，并通过多个所述第一测试垫施加第一测试信号到与所述第一测试垫相对应的所述显示面板；
控制所述多个开关单元导通，并通过所述第二测试垫将第二测试信号施加到多个所述显示面板。
一种显示面板的测试电路，包括：
多个开关单元；
多条第一测试引线；
多个第一测试垫；
第二测试垫和第二测试引线；
其中，所述开关单元、所述第一测试引线以及所述第一测试垫的数量相同；且每一所述第一测试引线设置为与对应的一个显示面板电连接；每一所述第一测试垫与对应的所述开关单元的输出端电连接，以及每一所述第一测试垫与对应的所述第一测试引线电连接；所述第二测试垫和所述第二测试引线均与多个所述开关单元的输入端电连接；
其中，所述测试电路还包括多个第三测试垫，每一显示面板对应一所述第 三测试垫，每一所述第三测试垫与对应的所述开关单元的输入端电连接；所述第一测试垫和所述第三测试垫相邻设置；所述开关单元为二极管，所述二极管的输入端为所述开关单元的输入端，所述二极管的输出端为所述开关单元的输出端；所述多个第一测试垫沿所述第二测试引线的延伸方向阵列排布。
附图说明
图1为本实施例提供的一种显示面板的测试电路；
图2为本实施例提供的另一种显示面板的测试电路；
图3为本实施例提供的另一种显示面板的测试电路；
图4为本实施例提供的另一种显示面板的测试电路。
具体实施方式
下面结合附图和实施例对本公开进行说明。
图1为本实施例提供的一种显示面板的测试电路，如图1所示，本实施例提供的显示面板的测试电路包括：多个开关单元60、多条第一测试引线20、多个第一测试垫30、第二测试垫40和第二测试引线50。其中，多个显示面板10形成在一母基板100上，每一显示面板10对应一开关单元60、一第一测试引线20以及一第一测试垫30，且每一第一测试引线20与对应的显示面板10电连接，每一第一测试垫30与对应开关单元60的输出端以及对应的第一测试引线20电连接，第二测试垫40和第二测试引线50均与多个开关单元60的输入端电连接。
可选地，多个第一测试垫30沿所述第二测试引线50的延伸方向阵列排布。将多个第一测试垫阵列排布，方便使用探针对第一测试垫施加测试信号。
图1中仅示例性地设置第二测试垫和第二测试引线与三个开关单元的输入端电连接，本实施例对与第二测试垫和第二测试引线电连接的开关单元的数量不做限定。
本实施例提供了一种显示面板的测试电路，在对显示面板进行阵列测试时开关单元60关闭，避免了多个显示面板10之间由于由一条引线相连接因而存在测试信号干扰的问题，实现了在进行阵列测试时分别对每个显示面板10进行测试，提高了阵列测试的精准度；在对显示面板10进行液晶分子取向时开关单 元60导通，实现了在进行液晶分子取向时同时对多个显示面板10内形成预倾角，提高了对显示面板进行液晶分子取向的效率。
另外，本实施例中仅仅设置一个第二测试垫40和一条第二测试引线50，相对于相关技术中每一显示面板10均需要设置一第二测试引线50和一第二测试垫40的情况来说，简化了线路，节约了成本。其中，对显示面板液晶分子取向，例如可以在液晶中加入化学单体，在配向过程中，化学单体受到紫外线照射聚合形成聚合物凸点，用于固定液晶形成预倾角。液晶分子取向过程可以为：对显示面板施加配向电压序列，液晶在电场作用下有序倾倒，接着保持电压不变，同时使用紫外线照射显示面板，显示面板中的化学单体在紫外线照射的条件下聚合，形成有序排列的聚合物凸点，使显示面板形成预倾角，使液晶分子在显示面板的预倾角作用下有序排列。
图2为本实施例提供的另一种显示面板的测试电路，如图2所示，在上述实施例的基础上，测试电路还包括多个第三测试垫70，每一个显示面板10对应一第三测试垫70，每一第三测试垫70与对应的开关单元60的输入端电连接，与同一个显示面板对应的第一测试垫30和第三测试垫70相邻设置。由于对显示面板10进行阵列测试时，需要在第一测试垫30上施加测试信号，且需要保证多个显示面板10之间不能有相互的信号干扰，即需要开关单元60处于关闭状态，因此将第一测试垫30和第三测试垫70相邻设置，方便使用探针将信号源发出的信号同时加载在第一测试垫30和第三测试垫70上，通过第三测试垫70控制开关单元60关闭，同时通过第一测试垫30发送测试信号到显示面板10。
图3为本实施例提供的另一种显示面板的测试电路，如图3所示，在上述实施例的基础上，开关单元60为三极管，三极管的输入端和控制端短接作为开关单元60的输入端，三极管的输出端为开关单元60的输出端。三极管可以采用电子三极管、场效应管、薄膜晶体管等。对于场效应管和薄膜晶体管来说，输入端可以是源极或漏极，输出端可以是漏极或源极，控制端可以是栅极。本实施方式中，测试电路也可以包括多个第三测试垫，每一显示面板对应一第三测试垫，每一第三测试垫与对应的开关单元(例如本实施例中的三极管)的输入端电连接，与同一个显示面板对应的第一测试垫和第三测试垫相邻设置。
图4为本实施例提供的另一种显示面板的测试电路，如图4所示，在上述 实施例的基础上，开关单元60为二极管，二极管的输入端为开关单元60的输入端，二极管的输出端为开关单元60的输出端。本实施方式中，测试电路也可以包括多个第三测试垫，每一显示面板对应一第三测试垫，每一第三测试垫与对应的开关单元(例如本实施例中的二极管)的输入端电连接，与同一个显示面板对应的第一测试垫和第三测试垫相邻设置。
在一些实施例中，显示面板可以包括液晶显示面板、量子点液晶显示面板或其他显示面板，显示面板可以应用在例如手机、平板电脑或电视上。
图1-图4中所示母基板100可以采用玻璃基板来制作，在同一母基板100上同时制作多个显示面板10，相对于一次只制作单个显示面板10提高了显示面板10的制作效率，在对母基板100上的多个显示面板10进行阵列测试和液晶分子取向后，将母基板100进行切割以便得到独立的显示面板10，上述测试电路在对母基板100进行切割的过程中可以被切割去除，即切割完成后独立的显示面板10中可以不包含上述测试电路。
本实施例还提供了一种显示面板的测试方法，请参照图1、图2、图3、图4，显示面板的测试电路包括：多个开关单元60、多条第一测试引线20、多个第一测试垫30、第二测试垫40和第二测试引线50。其中，每一显示面板10对应一开关单元60、一第一测试引线20以及一第一测试垫30，且每一第一测试引线20与对应的显示面板10电连接，每一第一测试垫30与对应开关单元60的输出端以及对应的第一测试引线20电连接，第二测试垫40和第二测试引线50均与多个开关单元60的输入端电连接。
本实施例提供的显示面板的测试方法包括：在对显示面板10进行阵列测试时，控制多个开关单元60关闭，并通过多个第一测试垫30施加第一测试信号到与第一测试垫30相对应的显示面板10；在对显示面板10进行液晶分子取向时，控制多个开关单元60导通，并通过第二测试垫40将第二测试信号施加到多个显示面板10。
在一实施方式中，在对显示面板10进行阵列测试时，通过第二测试垫40输入控制信号，控制多个开关单元60关闭，并通过多个第一测试垫30施加第一测试信号到与第一测试垫30相对应的显示面板10；在对显示面板10进行液晶分子取向时，通过第二测试垫40输入第二测试信号控制多个开关单元60导 通，并将第二测试信号施加到多个显示面板10。
在另一实施方式中，测试电路还包括多个第三测试垫70，每一显示面板10对应一第三测试垫70，每一第三测试垫70与对应的开关单元60的输入端电连接，与同一个显示面板对应的第一测试垫30和第三测试垫70相邻设置，在对显示面板10进行阵列测试时，通过第三测试垫70输入控制信号，控制多个开关单元60关闭，并通过多个第一测试垫30施加第一测试信号到与第一测试垫30相对应的显示面板10，在对显示面板10进行液晶分子取向时，通过第二测试垫40输入第二测试信号控制多个开关单元60导通，并将第二测试信号施加到多个显示面板10。
可选地，开关单元60为三极管，三极管的输入端和控制端短接作为开关单元60的输入端，三极管的输出端为开关单元60的输出端。三极管可以采用电子三极管、场效应管、薄膜晶体管等。对于场效应管和薄膜晶体管来说，输入端可以是源极或漏极，输出端可以是漏极或源极，控制端可以是栅极。在对显示面板10进行阵列测试时，控制多个三极管关闭，例如施加一低电平信号控制多个三极管关闭，并通过多个第一测试垫30施加第一测试信号到与第一测试垫30相对应的显示面板10；在对显示面板10进行液晶分子取向时，通过第二测试垫40输入第二测试信号控制多个三极管导通，并将第二测试信号施加到多个显示面板10。在其他实施方式中还可以为，在对显示面板10进行阵列测试时，并没有在三极管的栅极施加控制信号，此时三极管的栅极是关闭的，通过第一测试垫30施加第一测试信号到与第一测试垫30相对应的显示面板。在对显示面板10进行阵列测试时，可以通过第二测试垫40或第三测试垫70输入控制信号，控制多个三极管关闭。
可选地，开关单元60为二极管，二极管的输入端为开关单元60的输入端，二极管的输出端为开关单元60的输出端。在对显示面板10进行阵列测试时，控制多个二极管关闭，例如二极管的PN结加反向电压，二极管的PN结截止，呈现出高电阻，并通过多个第一测试垫30施加第一测试信号到与第一测试垫30相对应的显示面板10；在对显示面板10进行液晶分子取向时，通过第二测试垫40输入第二测试信号控制多个二极管导通，例如二极管的PN结加正向电压，二极管的PN结导通，呈现出低电阻，并将第二测试信号施加到多个显示面板10。
本实施例提供了一种显示面板的测试方法，通过控制多个开关单元60在对显示面板10进行阵列测试时关闭，避免了多个显示面板10之间由于由一条引线相连接因而存在测试信号干扰的问题，实现了在进行阵列测试时分别对每个显示面板10进行测试，提高了阵列测试的精准度；通过控制多个开关单元60在对显示面板10进行液晶分子取向时导通，实现了在进行液晶分子取向时同时对多个显示面板10进行测试，提高了对显示面板进行液晶分子取向的效率。

Claims (20)

  1. 一种显示面板的测试电路，包括：
    多个开关单元；
    多条第一测试引线；
    多个第一测试垫；
    第二测试垫和第二测试引线；
    其中，所述开关单元、所述第一测试引线以及所述第一测试垫的数量相同；且每一所述第一测试引线设置为与对应的一个显示面板电连接；每一所述第一测试垫与对应的所述开关单元的输出端电连接，以及每一所述第一测试垫与对应的所述第一测试引线电连接；所述第二测试垫和所述第二测试引线均与多个所述开关单元的输入端电连接。
  2. 根据权利要求1所述的测试电路，其中，所述测试电路还包括多个第三测试垫，每个所述第三测试垫对应一个显示面板，每一所述第三测试垫与对应的所述开关单元的输入端电连接；
    与同一个显示面板对应的所述第一测试垫和所述第三测试垫相邻设置。
  3. 根据权利要求1所述的测试电路，其中，所述开关单元为三极管；所述三极管的输入端和控制端短接作为所述开关单元的输入端；所述三极管的输出端为所述开关单元的输出端。
  4. 根据权利要求3所述的测试电路，其中，所述三极管包括电子三极管、场效应管或者薄膜晶体管。
  5. 根据权利要求4所述的测试电路，其中，所述场效应管的输入端为源极或漏极，所述场效应管的输出端为漏极或源极，所述场效应管的控制端为栅极；
    所述薄膜晶体管的输入端为源极或漏极，所述薄膜晶体管的输出端为漏极或源极，所述薄膜晶体管的控制端为栅极。
  6. 根据权利要求1所述的测试电路，其中，所述开关单元为二极管，所述二极管的输入端为所述开关单元的输入端，所述二极管的输出端为所述开关单元的输出端。
  7. 根据权利要求1所述的测试电路，其中，所述多个第一测试垫沿所述第二测试引线的延伸方向阵列排布。
  8. 根据权利要求1所述的测试电路，其中，所述显示面板包括液晶显示面板或者量子点液晶显示面板。
  9. 一种显示面板的测试方法，包括：将显示面板与测试电路连接，其中，所述测试电路包括：
    多个开关单元；
    多条第一测试引线；
    多个第一测试垫；
    第二测试垫和第二测试引线；
    其中，所述开关单元、所述第一测试引线以及所述第一测试垫的数量相同；且每一所述第一测试引线设置为与对应的一个显示面板电连接；每一所述第一测试垫与对应的所述开关单元的输出端电连接，以及每一所述第一测试垫与对应的所述第一测试引线电连接；所述第二测试垫和所述第二测试引线均与多个所述开关单元的输入端电连接；
    控制多个所述开关单元关闭，并通过多个所述第一测试垫施加第一测试信号到与所述第一测试垫相对应的所述显示面板；
    控制所述多个开关单元导通，并通过所述第二测试垫将第二测试信号施加到多个所述显示面板。
  10. 根据权利要求9所述的测试方法，其中，所述控制多个所述开关单元关闭，包括：通过所述第二测试垫输入控制信号，控制多个所述开关单元关闭；
    所述控制所述多个开关单元导通，包括：通过所述第二测试垫输入所述第二测试信号，控制多个所述开关单元导通。
  11. 根据权利要求9所述的测试方法，其中，所述测试电路还包括多个第三测试垫，每个所述第三测试垫对应一个显示面板，每一所述第三测试垫与对应的所述开关单元的输入端电连接；与同一个显示面板对应的所述第一测试垫和所述第三测试垫相邻设置；
    通过所述第三测试垫输入控制信号，控制多个所述开关单元关闭，并通过多个所述第一测试垫施加第一测试信号到与所述第一测试垫相对应的所述显示面板。
  12. 根据权利要求9所述的测试方法，其中，所述开关单元为三极管；所述三极管的输入端和控制端短接作为所述开关单元的输入端；所述三极管的输出端为所述开关单元的输出端。
  13. 根据权利要求12所述的测试方法，其中，所述三极管包括电子三极管、场效应管或者薄膜晶体管。
  14. 根据权利要求13所述的测试方法，其中，所述场效应管的输入端为源极或漏极，所述场效应管的输出端为漏极或源极，所述场效应管的控制端为栅极；
    所述薄膜晶体管的输入端为源极或漏极，所述薄膜晶体管的输出端为漏极或源极，所述薄膜晶体管的控制端为栅极。
  15. 根据权利要求12所述的测试方法，其中，所述控制多个所述三极管关闭，包括：施加一低电平信号控制多个所述三极管关闭。
  16. 根据权利要求13所述的测试方法，其中，所述控制多个所述三极管关闭，包括：在所述多个三极管的栅极不施加控制信号，以使多个所述三极管关闭。
  17. 根据权利要求9所述的测试方法，其中，所述开关单元为二极管；所述二极管的输入端为所述开关单元的输入端，所述二极管的输出端为所述开关单元的输出端。
  18. 根据权利要求17所述的测试方法，其中，所述控制多个所述二极管关闭，包括：对所述二极管施加反向电压控制所述二极管关闭；
    所述控制所述多个二极管导通，包括：通过第二测试垫输入第二测试信号控制多个二极管导通。
  19. 根据权利要求9所述的测试方法，其中，所述多个第一测试垫沿所述第二测试引线的延伸方向阵列排布。
  20. 一种显示面板的测试电路，包括：
    多个开关单元；
    多条第一测试引线；
    多个第一测试垫；
    第二测试垫和第二测试引线；
    其中，所述开关单元、所述第一测试引线以及所述第一测试垫的数量相同；且每一所述第一测试引线设置为与对应的一个显示面板电连接；每一所述第一测试垫与对应的所述开关单元的输出端电连接，以及每一所述第一测试垫与对应的所述第一测试引线电连接；所述第二测试垫和所述第二测试引线均与多个所述开关单元的输入端电连接；
    其中，所述测试电路还包括多个第三测试垫，每一显示面板对应一所述第三测试垫，每一所述第三测试垫与对应的所述开关单元的输入端电连接；所述第一测试垫和所述第三测试垫相邻设置；所述开关单元为二极管，所述二极管的输入端为所述开关单元的输入端，所述二极管的输出端为所述开关单元的输出端；所述多个第一测试垫沿所述第二测试引线的延伸方向阵列排布。
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CN107065313B (zh) * 2017-06-20 2018-08-24 惠科股份有限公司 一种显示面板的测试电路及测试方法
CN108873406A (zh) * 2018-06-26 2018-11-23 深圳市华星光电半导体显示技术有限公司 液晶显示面板及液晶显示面板的制作方法
CN109448618B (zh) * 2018-12-25 2022-03-25 武汉天马微电子有限公司 一种显示面板、显示装置和显示装置的驱动方法
CN109584802B (zh) 2019-01-04 2021-09-21 京东方科技集团股份有限公司 一种驱动电路及其工作方法、显示装置
CN112068375B (zh) * 2020-09-23 2022-10-11 北海惠科光电技术有限公司 母基板和显示面板
CN114938568B (zh) * 2022-06-15 2024-08-09 昆山国显光电有限公司 电路板结构和电路测试方法

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