WO2018233053A1 - 显示面板的驱动电路、方法及显示装置 - Google Patents

显示面板的驱动电路、方法及显示装置 Download PDF

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Publication number
WO2018233053A1
WO2018233053A1 PCT/CN2017/100032 CN2017100032W WO2018233053A1 WO 2018233053 A1 WO2018233053 A1 WO 2018233053A1 CN 2017100032 W CN2017100032 W CN 2017100032W WO 2018233053 A1 WO2018233053 A1 WO 2018233053A1
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Prior art keywords
data
nth row
module
driving
voltage signal
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Ceased
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PCT/CN2017/100032
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English (en)
French (fr)
Inventor
陈猷仁
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Priority to US15/744,203 priority Critical patent/US10553185B2/en
Publication of WO2018233053A1 publication Critical patent/WO2018233053A1/zh
Anticipated expiration legal-status Critical
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
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    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
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    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
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    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
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    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
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    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
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    • G09G2320/0285—Improving the quality of display appearance using tables for spatial correction of display data
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2340/02—Handling of images in compressed format, e.g. JPEG, MPEG
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/16—Determination of a pixel data signal depending on the signal applied in the previous frame
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/121—Frame memory handling using a cache memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/18—Use of a frame buffer in a display terminal, inclusive of the display panel

Definitions

  • the present disclosure belongs to the field of display technologies, and in particular, to a driving circuit, a method, and a display device for a display panel.
  • the wide viewing angle panel overcomes the problem that the ordinary display panel cannot normally view the picture on the side or the large viewing angle, and is widely used as a development trend of the display panel.
  • the TCON (Timer Control Register) of the wide viewing angle panel usually adopts the OD (over drive) technology to improve the response speed.
  • Embodiments of the present disclosure provide a driving circuit, a method, and a display device for a display panel, which are intended to solve the problem of using a double rate synchronous dynamic random access memory (DDR) and a corresponding DDR control module to realize liquid crystal driving acceleration, which is seriously increased.
  • DDR double rate synchronous dynamic random access memory
  • a corresponding DDR control module to realize liquid crystal driving acceleration, which is seriously increased.
  • An embodiment of the present disclosure provides a driving circuit for a display panel, including:
  • the driving voltage signal obtained by converting the data of the Nth row of the current frame data by the embodiment of the present disclosure Inverting processing obtains the Nth row data of the previous frame data of the Nth row data of the next frame data and buffers it, and can implement the previous frame without using the double rate synchronous dynamic random access memory.
  • the data of the Nth row of data is buffered, so that the actual driving data is obtained according to the data of the Nth row of the current frame data and the data of the Nth row of the previous frame data, thereby realizing the liquid crystal driving acceleration function, which can effectively reduce the manufacturing of the screen driving board. cost.
  • FIG. 1 is a schematic diagram of a driving circuit of a display panel according to an embodiment of the present disclosure
  • FIG. 2 is a timing comparison diagram of data input by a switch module and a data buffer module of an Nth row of a current frame according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a driving circuit of a display panel according to another embodiment of the present disclosure.
  • FIG. 4 is a flow chart of a driving method of a display panel according to an embodiment of the present disclosure
  • FIG. 5 is a structural block diagram of a driving system of a display panel according to an embodiment of the present disclosure
  • FIG. 6 is a structural block diagram of a display device according to an embodiment of the present disclosure.
  • an embodiment of the present disclosure provides a driving circuit 100 for a display panel, including an upper frame Nth row data buffer module 10, a current frame Nth row data buffer module 20, a driving acceleration module 30, and a source.
  • the pole drive module 40, the switch module 50 and the signal inverter module 60 are included in an embodiment of the present disclosure.
  • the Nth row data buffer module 20 of the current frame is configured to buffer the Nth row of the current frame data when the Nth row of the current frame data is received, and the Nth row of the current frame data is used for the drive The Nth row of pixels on the display panel, where N ⁇ 1 and N is a positive integer.
  • the Nth row of data of the current frame data is data input in the current frame scan period for driving the Nth row of pixels on the display panel.
  • a frame is input for driving all the pixels on the display panel in one frame scanning period, and one frame of data includes several rows of data equal to the number of rows of pixels, and each row of data corresponds to driving one row of pixels.
  • the N-th data buffer module 20 of the current frame is externally connected to a timer/counter control register (TCON, Timer Control Register, also known as a screen driver board).
  • TCON Timer Control Register
  • the Nth line of the current frame is slow.
  • the flush module 20 is arranged to write one row of data in the current frame data when the rising edge of the output signal of the timer/counter control register is connected.
  • the data stream buffer module 20 of the Nth row of the current frame may be a buffer, or may be another storage device having the same buffer storage function, and is not specifically limited in this embodiment.
  • the Nth row data buffer module 10 of the upper frame is arranged to buffer the Nth row data for driving the Nth row of pixels in the previous frame data when the data of the Nth row of the current frame data is buffered.
  • the Nth row data in the previous frame data refers to the data input in the previous frame scanning period for driving the Nth row of pixels on the display panel.
  • the N-th row data buffer module 10 of the upper frame may be a buffer, or may be another storage device having an equivalent buffer storage function, and is not specifically limited in this embodiment.
  • the driving acceleration module 30 is connected to the upper frame Nth row data buffering module 10 and the current frame Nth row data buffering module 20, and is configured to read the Nth row data of the current frame data and the Nth of the previous frame data. Row data, and in its pre-stored data lookup table, search for drive data corresponding to the Nth row data of the current frame data and the Nth row data of the previous frame data and output.
  • the driving acceleration module 30 compares the data of the Nth row of the current frame data with the data of the Nth row of the previous frame data, and finds a data of the Nth row and the previous row of the current frame data in the pre-stored data lookup table.
  • the data of the Nth row of the frame data corresponds to and drives the data with a larger or smaller value than the current row data to drive the display panel.
  • the magnitude of the driving value is proportional to the voltage of the driving voltage for driving the display panel. Similarly, it is proportional The gray value of the display panel.
  • the data lookup table records the drive data corresponding to the current frame data and each row of data in the previous frame of data. For example, when the data of the i-th row of the previous frame data is 16, and the data of the i-th row of the current frame data is 48, the corresponding driving data found according to the data lookup table is 53, which is larger than the current frame data.
  • the data of the i-th row is 48; the data of the j-th row of the previous frame data is 144, and the data of the j-th row of the current frame data is 32, and the corresponding driving data found according to the data lookup table is 13, which is larger than the current frame data.
  • the j-th row of data is small.
  • the driving acceleration module 20 may be a liquid crystal drive acceleration controller (ODC) with a liquid crystal drive acceleration function implemented by a liquid crystal drive acceleration technology or a device having an equivalent data search output function.
  • ODC liquid crystal drive acceleration controller
  • the specific implementation is not specifically limited.
  • the drive acceleration module 20 of the present disclosure does not include a double rate synchronous dynamic random access memory.
  • the source driving module 40 is connected to the driving acceleration module 30, and is configured to obtain a first driving voltage signal and a second driving voltage signal identical to the first driving voltage signal according to the driving data.
  • the driving data is a digital signal
  • the first driving voltage signal and the second driving voltage signal are analog signals.
  • the source driving module 40 includes, for example, a digital to analog converter (DAC).
  • the first driving voltage signal and the second driving signal are analog voltage signals corresponding to the driving data.
  • the second driving voltage signal is equivalent to being a copy of the first driving voltage signal, and the second driving voltage signal is inversely processed by the signal inverting module into a digital signal as the Nth row of data of the previous frame data with respect to the next frame of data. use.
  • the source driving module may be a source drive IC or a device or circuit having the same source driving function.
  • the specific type is not particularly limited in this embodiment.
  • the switch module 50 is connected to the source driving module 40 and the display panel (not shown), and is set to be turned on when receiving the first level signal, turned off when receiving the second level signal, and turned off when the signal is turned off.
  • the first driving voltage signal is output to the display panel to drive the display panel display.
  • the display panel typically includes a plurality of columns of pixel cells that need to be driven for scanning, and thus the driving voltage signal output to the display panel actually includes multiple output signals. Illustratively shown in Figure 1 out1, out2 Out3, ..., outn have a total of n output signals, where n > 1 and n is a positive integer.
  • the switch module 50 may specifically be an electronic switch tube such as a MOS tube or a triode.
  • the first level signal may be a high level signal, which is set to turn on the switching module; the second level signal may be a low level signal, which is set to turn off the switching module.
  • the switch module can also be turned off at a high level and turned on at a low level.
  • the first level signal is a low level signal, and the second level signal is a high level signal.
  • the signal inversion module 60 is connected to the switch module 50, and is configured to be connected to the source driving module 40 when the switch module 50 is turned on, and inversely process the second driving voltage signal into the previous frame data with respect to the next frame data.
  • the Nth row of data is stored in the Nth row data buffer module 10 of the upper frame; when the switch module 50 is turned off, the connection with the source driver module 40 is broken.
  • one embodiment of the present disclosure exemplarily shows a timing diagram of the switch module 50 and the data frame buffer module of the Nth row of the current frame.
  • the control signals of the switch module 50 ie, the first level signal (high level signal) and the second level signal (low level signal)
  • TPX the first level signal
  • the second level signal low level signal
  • the input data is represented by TP.
  • the data buffer module of the Nth row of the current frame inputs the data of the Nth row when the data is high level, and the switch module 50 turns on the source driver module and the signal inverter module before inputting the data of the Nth row of the data buffer module of the Nth row of the current frame.
  • the connection between the signals enables the signal inversion module to process the second driving voltage signal corresponding to the data of the Nth row of the previous frame data to the Nth row of data of the previous frame data of the current frame data, so as to drive the acceleration module.
  • the corresponding driving data can be found in the data lookup table according to the Nth row data of the previous frame data and the Nth row data of the current frame data, and then processed by the source driving module as the current driving first driving voltage signal, and When the switch module inputs a low level, the current driving first driving voltage signal is output to the display panel to drive the display panel display.
  • the data of the Nth row of the previous frame data of the data of the Nth row of the next frame data is further advanced.
  • Line buffering which can buffer the data of the Nth row of the previous frame data without using the double rate synchronous dynamic random access memory, so that the Nth row data of the current frame data and the Nth data of the previous frame data
  • the line data look-up table obtains the actual driving data, realizes the liquid crystal driving acceleration function, and can effectively reduce the manufacturing cost of the screen driving board.
  • the drive acceleration module 30 in the embodiment corresponding to FIG. 1 includes a first data decompression unit 31, a second data decompression unit 32, and a display lookup table unit 33.
  • the source driving module 40 includes a first level converting unit 41, a digital to analog converting unit 42, an output buffer unit 43, and an output multiplexing unit 44.
  • the signal inversion module 60 includes an input buffer unit 61, an analog to digital conversion unit 62, and a second level conversion unit 63.
  • connection relationship and working principle of each unit in the drive acceleration module 30 are as follows:
  • the first data decompressing unit 31 is connected to the Nth row data buffering module 10 of the upper frame, and is configured to read and decompress the Nth row of data of the previous frame of data.
  • the first data decompression unit 31 may be a software program in the drive acceleration module 30, and is configured to implement a data decompression function.
  • the second data decompressing unit 32 is connected to the Nth row data buffer module 20 of the current frame, and is configured to read and decompress the Nth row of data of the current frame data.
  • the second data decompression unit 32 may be a software program in the drive acceleration module 30, and is configured to implement a data decompression function.
  • the first data decompression unit 31 and the second data decompression unit 32 may be combined into one software program unit capable of decompressing the Nth row data of the previous frame data and the Nth row data of the current frame data simultaneously.
  • the display lookup table unit 33 is respectively connected to the first data decompression unit 31 and the second data decompression unit 32, and is configured to prestore the data lookup table and according to the Nth of the current frame data after decompression The row data and the Nth row data of the previous frame data are searched for corresponding drive data from the data lookup table and output.
  • the display lookup table unit may be a look-up table (LUT, look-up-table), or may be another data table or a random access memory (RAM) storage medium having equivalent functions. .
  • LUT look-up table
  • RAM random access memory
  • connection relationship and working principle of each unit in the source driving module 40 are as follows:
  • the first level converting unit 41 is connected to the driving acceleration module 30 and is arranged to level-shift the driving data to change the voltage level of the driving data.
  • the first level shifting unit 41 is arranged to convert the voltage magnitude of the drive data into a voltage magnitude suitable for driving the display panel.
  • the first level converting unit 41 may be a level shifter or other equivalent device or circuit structure, which is not specifically limited in this embodiment.
  • the digital-to-analog conversion unit 42 is connected to the first level conversion unit 41, and is configured to perform digital-to-analog conversion on the drive data after the level conversion to obtain a driving voltage signal.
  • digital to analog conversion unit 42 may be a digital to analog converter or other logic device having equivalent functionality.
  • the output buffer unit 43 is connected to the digital-to-analog conversion unit 42 and is configured to buffer the driving voltage signal and synchronously output all voltage data in the driving voltage signal to increase the driving capability of the driving voltage signal.
  • the output buffer unit 43 can be a buffer or other equivalent device.
  • the output multiplexing unit 44 is coupled to the output buffer unit 43 and configured to process the driving voltage signal into a first driving voltage signal and a second driving voltage signal.
  • the output multiplexing unit 44 is arranged to multiplex the signals it inputs, i.e., by copying, splitting, or recombining the input signals to obtain a plurality of output signals.
  • connection relationship and working principle of each unit in the signal inverter module 60 are as follows:
  • the input buffer unit 61 is connected to the switch module 50, and is configured to be connected to the source driving module 40 when the switch module 50 is turned on, buffer the second driving voltage signal, and synchronously output all voltages in the second driving voltage signal. Data; when the switch module 50 is turned off, the connection to the source drive module 40 is broken.
  • the input buffer unit 61 can be a buffer or other equivalent device that functions the same as the output buffer unit.
  • the analog to digital conversion unit 62 is connected to the input buffer unit 61 and configured to perform analog to digital conversion on the second driving voltage signal to obtain a digital signal.
  • analog to digital conversion unit 62 may be an analog to digital converter or other logic device having equivalent functionality.
  • the second level converting unit 63 is respectively connected to the analog-to-digital converting unit 62 and the upper frame N-th row data buffering module 10, and is configured to level-convert the digital signal and store it in the N-th row data buffering module 10 of the upper frame to The level-converted digital signal is used as the Nth line of data of the previous frame data with respect to the next frame of data.
  • the second level converting unit 63 is arranged to restore the voltage magnitude of the analog-to-digital converted driving data to the magnitude of the voltage before being converted by the first level converting unit 41.
  • the second level converting unit 63 may be a level shifter or other device or circuit structure having equivalent functions, and is not specifically limited in this embodiment.
  • an embodiment of the present disclosure provides a driving method of a display panel, including:
  • Step S101 When receiving the Nth row of the current frame data, buffering the Nth row of the current frame data, and the Nth row of the current frame data is used to drive the Nth row on the display panel.
  • a pixel wherein N ⁇ 1 and N is a positive integer;
  • Step S102 When the data of the Nth row of the current frame data is buffered, buffer the data of the Nth row for driving the pixel of the Nth row in the previous frame data;
  • Step S103 reading the Nth row data of the current frame data and the Nth row data of the previous frame data, and searching for the Nth row data and the current frame data in the prestored data lookup table. Describe driving data corresponding to the Nth row of data of one frame of data and output;
  • Step S104 processing the driving data into a first driving voltage signal and a second driving voltage signal that is the same as the first driving voltage signal;
  • Step S105 When receiving the first level signal, output the first driving voltage signal to the display panel to drive the display panel display;
  • Step S106 When receiving the second level signal, the second driving voltage signal is inversely processed into the Nth row data of the previous frame data with respect to the next frame data and buffered.
  • the foregoing method may be performed by the driving circuit 100 in the foregoing embodiment, where the step S101 may be specifically performed by the current frame Nth row data buffering module 20, and the step S102 may be specifically performed by the Nth row of the upper frame.
  • the buffer module 10 is executed, and the step S103 may be specifically performed by the driving acceleration module 30.
  • the step S104 and the step S105 may be specifically performed by the source driving module 40, and the step S106 may be specifically performed by the signal inverting module 60.
  • the data of the Nth row of the previous frame data of the data of the Nth row of the next frame data is further advanced.
  • Line buffering which can buffer the data of the Nth row of the previous frame data without using the double rate synchronous dynamic random access memory, so that the Nth row data of the current frame data and the Nth data of the previous frame data
  • the line data look-up table obtains the actual driving data, realizes the liquid crystal driving acceleration function, and can effectively reduce the manufacturing cost of the screen driving board.
  • a driving system 200 of a display panel is provided to perform the method steps in the embodiment corresponding to FIG. 4, which includes: a first cache module 101 and a second cache module 102.
  • the first cache module 101 is configured to buffer the Nth row of the current frame data when the Nth row of the current frame data is received, and set the Nth row of the current frame data to the display panel. Driving on the Nth row of pixels, where N ⁇ 1 and N is a positive integer;
  • the second cache module 102 is configured to cache, when the data of the Nth row of the current frame data is buffered, the data of the Nth row of the previous frame data that is set to drive the pixels of the Nth row;
  • the data search module 103 is configured to read the Nth row data of the current frame data and the Nth row data of the previous frame data, and search for the Nth of the current frame data in the prestored data lookup table.
  • the row data and the driving data corresponding to the Nth row data of the previous frame data are output and output;
  • the first data processing module 104 is configured to process the driving data into a first driving voltage signal and a second driving voltage signal that is the same as the first driving voltage signal;
  • the data output module 105 is configured to output the first driving voltage signal to the display panel to drive the display panel display when receiving the first level signal;
  • the second data processing module 106 is configured to, when receiving the second level signal, inversely process the second driving voltage signal into the Nth row of data of the previous frame data at the next moment and cache.
  • the above system may be a software program of the driving circuit 100 in the foregoing embodiment.
  • the system wherein the first cache module 101 can be a software program module in the data stream buffer module 20 of the Nth row of the current frame, and the second cache module 102 can be a software program module in the data buffer module 10 of the Nth row of the previous frame.
  • the search module 103 can be a software program module in the drive acceleration module 30.
  • the first data processing module 104 and the data output module 105 can be software program modules in the source drive module 40, and the second data processing module 106 can be a signal inverter. Software program module in the module.
  • the Nth row data of the previous frame data of the Nth row data of the next frame data is obtained and buffered.
  • the data of the Nth row of the previous frame data can be buffered without using the double rate synchronous dynamic random access memory, so that the data of the Nth row of the current frame data and the Nth row of the previous frame data are checked.
  • the table obtains the actual driving data, realizes the liquid crystal driving acceleration function, and can effectively reduce the manufacturing cost of the screen driving board.
  • all the modules in the embodiment corresponding to FIG. 5 may be implemented by a general-purpose integrated circuit, such as a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit). achieve.
  • a general-purpose integrated circuit such as a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit).
  • an embodiment of the present invention further provides a display device 300 including a display panel 301 and a control unit 302, wherein the control unit 302 includes the drive circuit 100 in the above embodiment.
  • the display device may be any type of display device provided with the above-mentioned driving circuit 100, such as an LCD (Liquid Crystal Display), an OLED (Organic Electroluminescence Display) display device, and a QLED. (Quantum Dot Light Emitting Diodes) display device or curved display device.
  • LCD Liquid Crystal Display
  • OLED Organic Electroluminescence Display
  • QLED Quantum Dot Light Emitting Diodes
  • display panel 301 includes a pixel array comprised of multiple rows of pixels and columns of pixels.
  • control unit 302 can be implemented by a general-purpose integrated circuit, such as a CPU (Central Processing Unit), or by an ASIC (Application Specific Integrated Circuit).
  • a CPU Central Processing Unit
  • ASIC Application Specific Integrated Circuit
  • the storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

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Abstract

公开了一种显示面板的驱动电路、方法及显示装置，通过对当前帧数据的第N行数据转换后得到的驱动电压信号进行逆变处理得到相对于下一帧数据的第N行数据的上一帧数据的第N行数据并进行缓存，可以在不使用双倍速率同步动态随机存储器的情况下，实现对上一帧数据的第N行数据的缓存。

Description

显示面板的驱动电路、方法及显示装置 技术领域
本公开属于显示技术领域，尤其涉及一种显示面板的驱动电路、方法及显示装置。
背景技术
随着显示技术的不断发展，液晶面板、显示器等显示设备不断向着轻薄化、大屏化、低功耗、低成本的方向发展。广视角面板因其良好的视觉效果，克服了普通显示面板在侧面或大视角情况下无法正常观看画面的问题，而被广泛使用，成为显示面板的一种发展趋势。目前，广视角面板的屏驱动板(TCON，Timer Control Register)通常会采用液晶驱动加速(OD，over drive)技术，来提高响应速度。
然而，在使用液晶驱动加速技术时，通常会用到双倍速率同步动态随机存储器(DDR，Dual Date Rate)及对应的DDR控制模块来存储设置为驱动面板显示的上一帧驱动数据，以实现液晶驱动加速，严重增加了屏驱动板的制造成本。
发明内容
本公开实施例提供一种显示面板的驱动电路、方法及显示装置，旨在解决使用双倍速率同步动态随机存储器(DDR，Dual Date Rate)及对应的DDR控制模块来实现液晶驱动加速，严重增加了屏驱动板的制造成本的问题。
本公开的一个实施例提供一种显示面板的驱动电路，包括：
本公开实施例通过对当前帧数据的第N行数据转换后得到的驱动电压信号 进行逆变处理得到相对于下一帧数据的第N行数据的上一帧数据的第N行数据并进行缓存，可以在不使用双倍速率同步动态随机存储器的情况下，实现对上一帧数据的第N行数据的缓存，从而根据当前帧数据的第N行数据和上一帧数据的第N行数据查表得到实际驱动数据，实现液晶驱动加速功能，可以有效降低屏驱动板的制造成本。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本公开的一个实施例提供的显示面板的驱动电路的示意图；
图2是本公开的一个实施例提供的开关模块和当前帧第N行数据缓冲模块输入的数据的时序对比示意图；
图3是本公开的另一个实施例提供的显示面板的驱动电路的示意图；
图4是本公开的一个实施例提供的显示面板的驱动方法的流程框图；
图5是本公开的一个实施例提供的显示面板的驱动系统的结构框图；
图6是本公开的一个实施例提供的显示装置的结构框图。
具体实施方式
下面结合附图并通过具体实施方式来说明本公开的技术方案。此处所描述的实施例仅仅设置为解释本公开，而非对本公开的限定。另外还需要说明的是，为了便于描述，附图中仅示出了与本公开相关的部分而非全部结构。在不冲突 的情况下，以下实施例以及实施例中的特征可以任意相互组合。
为了使本技术领域的人员更好地理解本公开方案，下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚地描述，显然，所描述的实施例是本公开一部分的实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本公开保护的范围。
本公开的说明书和权利要求书及上述附图中的术语“包括”以及它们任何变形，意图在于覆盖不排他的包含。例如包含一系列步骤或单元的过程、方法或系统、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。此外，术语“第一”、“第二”和“第三”等是设置为区别不同对象，而非设置为描述特定顺序。
如图1所示，本公开的一个实施例提供一种显示面板的驱动电路100，其包括上帧第N行数据缓冲模块10，当前帧第N行数据缓冲模块20，驱动加速模块30，源极驱动模块40，开关模块50和信号逆变模块60。
当前帧第N行数据缓冲模块20设置为在接收到当前帧数据的第N行数据时，对当前帧数据的第N行数据进行缓存，所述当前帧数据的第N行数据用于驱动所述显示面板上的第N行像素，其中，N≥1且N为正整数。
当前帧数据的第N行数据是在当前帧扫描周期中输入的、用于驱动显示面板上的第N行像素的数据。在一个帧扫描周期中总共输入一帧用于驱动显示面板上所有像素的数据，一帧数据包括与像素的行数相等的若干行数据，每行数据对应驱动一行像素。当前帧第N行数据缓冲模块20外接定时器/计数器控制寄存器(TCON，Timer Control Register，又名屏驱动板)。当前帧第N行数据缓 冲模块20设置为在所述接定时器/计数器控制寄存器的输出信号的上升沿时，写入当前帧数据中的一行数据。
在一个实施例中，当前帧第N行数据缓冲模块20可以是缓冲器，也可以是其他具有同等缓冲存储功能的存储器件，本实施例中不对其具体类型作特别限定。
上帧第N行数据缓冲模块10设置为在所述当前帧数据的第N行数据被缓存时，对上一帧数据中用于驱动所述第N行像素的第N行数据进行缓存。
上一帧数据中的第N行数据是指，在上一个帧扫描周期中输入的、用于驱动显示面板上的第N行像素的数据。
在一个实施例中，上帧第N行数据缓冲模块10可以是缓冲器，也可以是其他具有同等缓冲存储功能的存储器件，本实施例中不对其具体类型作特别限定。
驱动加速模块30与上帧第N行数据缓冲模块10和当前帧第N行数据缓冲模块20连接，设置为读取所述当前帧数据的第N行数据和所述上一帧数据的第N行数据，并在其预存的数据查找表中查找与所述当前帧数据的第N行数据和所述上一帧数据的第N行数据对应的驱动数据并输出。
驱动加速模块30通过对当前帧数据的第N行数据和上一帧数据的第N行数据进行比较，在预先存储的数据查找表中查找到一个与当前帧数据的第N行数据和上一帧数据的第N行数据对应且驱动数值比当前行数据更大或更小的数据来驱动显示面板，驱动数值的大小正比于用于驱动显示面板的驱动电压的电压大小，同理，也正比于显示面板的灰度值大小。
在一个实施例中，数据查找表中记录有当前帧数据和上一帧数据中各行数据所对应的驱动数据。例如，上一帧数据的第i行数据为16、当前帧数据的第i行数据为48时，根据数据查找表查找到的对应的驱动数据为53，比当前帧数据 的第i行数据48大；上一帧数据的第j行数据为144、当前帧数据的第j行数据为32时，根据数据查找表查找到的对应的驱动数据为13，比当前帧数据的第j行数据小。
在一个实施例中，驱动加速模块20可以是基于液晶驱动加速技术实现的具有液晶驱动加速功能的液晶驱动加速控制器(ODC，over drive controller)或者具有同等的数据查找输出功能的器件，本实施例不对其具体实现方式作特别限定。本公开的驱动加速模块20不包括双倍率同步动态随机存储器。
源极驱动模块40与驱动加速模块30连接，设置为根据驱动数据获得第一驱动电压信号以及与第一驱动电压信号相同的第二驱动电压信号。在本实施例中，驱动数据为数字信号，第一驱动电压信号和第二驱动电压信号为模拟信号。源极驱动模块40例如包括数模转换器(Digital to analog converter，DAC)。
第一驱动电压信号和第二驱动信号均为与驱动数据对应的模拟电压信号。第二驱动电压信号相当于是第一驱动电压信号的一个拷贝，第二驱动电压信号经过信号逆变模块逆变处理为数字信号，作为相对于下一帧数据的上一帧数据的第N行数据使用。
在一个实施例中，源极驱动模块具体可以是源极驱动芯片(source drive IC)，也可以是其他具有同等源极驱动功能的器件或电路，本实施例中不对其具体类型作特别限定。
开关模块50与源极驱动模块40和显示面板(图中未示出)连接，设置为在接收到第一电平信号时导通、在接收到第二电平信号时截止，并在截止时将第一驱动电压信号输出至显示面板，以驱动显示面板显示。
显示面板通常包括多列需要进行驱动扫描的像素单元，因此，输出给显示面板的驱动电压信号实际上包括多路输出信号。图1中示例性的示出out1、out2、 out3、……、outn共n路输出信号，其中，n＞1且n为正整数。
在一个实施例中，开关模块50具体可以是MOS管、三极管等电子开关管。
第一电平信号可以为高电平信号，设置为使开关模块导通；第二电平信号可以为低电平信号，设置为使开关模块截止。同理，开关模块也可以在高电平时截止、低电平时导通，对应的，第一电平信号为低电平信号，第二电平信号为高电平信号。
信号逆变模块60与开关模块50连接，设置为：在开关模块50导通时，与源极驱动模块40连接，将第二驱动电压信号逆处理为相对于下一帧数据的上一帧数据的第N行数据并存储至上帧第N行数据缓冲模块10；在开关模块50截止时，断开与源极驱动模块40的连接。
如图2所示，本公开的一个实施例示例性的示出了开关模块50和当前帧第N行数据缓冲模块的时序图。图1和3中，开关模块50的控制信号(即第一电平信号(高电平信号)和第二电平信号(低电平信号))用TPX表示，当前帧第N行数据缓冲模块输入的数据用TP表示。当前帧第N行数据缓冲模块在高电平时输入第N行数据，开关模块50则在当前帧第N行数据缓冲模块输入第N行数据之前，接通源极驱动模块和信号逆变模块之间的连接，使信号逆变模块可以将上一帧数据的第N行数据所对应的第二驱动电压信号处理为相对于当前帧数据的上一帧数据的第N行数据，使驱动加速模块可以根据上一帧数据的第N行数据和当前帧数据的第N行数据在数据查找表中查找到对应的驱动数据，然后通过源极驱动模块处理为当前行第一驱动电压信号，并在开关模块输入低电平时，将该当前行第一驱动电压信号输出至显示面板，以驱动显示面板显示。
本实施例通过对当前帧数据的第N行数据转换后得到的驱动电压信号进行逆变处理得到相对于下一帧数据的第N行数据的上一帧数据的第N行数据并进 行缓存，可以在不使用双倍速率同步动态随机存储器的情况下，实现对上一帧数据的第N行数据的缓存，从而根据当前帧数据的第N行数据和上一帧数据的第N行数据查表得到实际驱动数据，实现液晶驱动加速功能，可以有效降低屏驱动板的制造成本。
如图3所示，在本公开的一个实施例中，图1所对应的实施例中的驱动加速模块30包括第一数据解压单元31，第二数据解压单元32和显示查找表单元33。源极驱动模块40包括第一电平转换单41，数模转换单元42，输出缓冲单元43和输出多路复用单元44。信号逆变模块60包括输入缓冲单元61、模数转换单元62和第二电平转换单元63。
驱动加速模块30中各单元的连接关系和工作原理如下：
第一数据解压单元31，与上帧第N行数据缓冲模块10连接，设置为读取并解压所述上一帧数据的第N行数据。
第一数据解压单元31可以为驱动加速模块30中的软件程序，设置为实现数据解压功能。
第二数据解压单元32，与当前帧第N行数据缓冲模块20连接，设置为读取并解压所述当前帧数据的第N行数据。
第二数据解压单元32可以为驱动加速模块30中的软件程序，设置为实现数据解压功能。
在一个实施例中，第一数据解压单元31和第二数据解压单元32可以合并为一个能够同时对上一帧数据的第N行数据和当前帧数据的第N行数据进行解压的软件程序单元。
显示查找表单元33，分别与第一数据解压单元31和第二数据解压单元32连接，设置为预存所述数据查找表，并根据解压之后的所述当前帧数据的第N 行数据和所述上一帧数据的第N行数据从所述数据查找表中查找对应的驱动数据并输出。
在一个实施例中，显示查找表单元可以为显示查找表(LUT，look-up-table)，还可以是具有同等功能的其他数据表或随机存储记忆体(Random Access Memory，RAM)类存储介质。
源极驱动模块40中各单元的连接关系和工作原理如下：
第一电平转换单元41，与驱动加速模块30连接，设置为对驱动数据进行电平转换，以改变驱动数据的电压大小。
在具体应用中，第一电平转换单元41设置为将驱动数据的电压大小转换为适于对显示面板进行驱动的电压大小。
在一个实施例中，第一电平转换单元41可以为电平转换器或其他具有同等功能的器件或电路结构，本实施例中不对其具体类型作特别限定。
数模转换单元42，与第一电平转换单元41连接，设置为对电平转换之后的驱动数据进行数模转换，以得到驱动电压信号。
在一个实施例中，数模转换单元42可以为数模转换器或其他具有同等功能的逻辑器件。
输出缓冲单元43，与数模转换单元42连接，设置为对驱动电压信号进行缓冲，同步输出驱动电压信号中的所有电压数据，以增加驱动电压信号的驱动能力。
在一个实施例中，输出缓冲单元43可以为缓冲器或其他具有同等功能的器件。
输出多路复用单元44，与输出缓冲单元43连接，设置为将驱动电压信号处理为第一驱动电压信号和第二驱动电压信号。
输出多路复用单元44设置为对其输入的信号进行多路复用，即通过将输入的信号进行复制、拆分或重新组合得到多路输出信号。
信号逆变模块60中各单元的连接关系和工作原理如下：
输入缓冲单元61，与开关模块50连接，设置为在开关模块50导通时，与源极驱动模块40连接，对第二驱动电压信号进行缓冲，并同步输出第二驱动电压信号中的所有电压数据；在开关模块50截止时，断开与源极驱动模块40的连接。
在一个实施例中，输入缓冲单元61可以为缓冲器或其他具有同等功能的器件，其作用与输出缓冲单元相同。
模数转换单元62，与输入缓冲单元61连接，设置为对第二驱动电压信号进行模数转换，以得到数字信号。
在一个实施例中，模数转换单元62可以为模数转换器或其他具有同等功能的逻辑器件。
第二电平转换单元63，分别与模数转换单元62和上帧第N行数据缓冲模块10连接，设置为对数字信号进行电平转换并存储至上帧第N行数据缓冲模块10，以将电平转换后的数字信号作为相对于下一帧数据的上一帧数据的第N行数据。
在具体应用中，第二电平转换单元63设置为将模数转换后的驱动数据的电压大小还原为经第一电平转换单元41转换之前的电压大小。
在一个实施例中，第二电平转换单元63可以为电平转换器或其他具有同等功能的器件或电路结构，本实施例中不对其具体类型作特别限定。
本实施例通过对驱动电压信号进行逆处理，可以实现对相对于当前帧数据的上一帧数据的第N行数据的缓存，从而使得在不使用双倍速率同步动态随机 存储器的情况下，也能够实现液晶驱动加速功能。
如图4所示，本公开的一个实施例提供一种显示面板的驱动方法，其包括：
步骤S101：在接收到当前帧数据的第N行数据时，对当前帧数据的第N行数据进行缓存，所述当前帧数据的第N行数据用于驱动所述显示面板上的第N行像素，其中，N≥1且N为正整数；
步骤S102：在所述当前帧数据的第N行数据被缓存时，对上一帧数据中用于驱动所述第N行像素的第N行数据进行缓存；
步骤S103：读取所述当前帧数据的第N行数据和所述上一帧数据的第N行数据，并在预存的数据查找表中查找与所述当前帧数据的第N行数据和所述上一帧数据的第N行数据对应的驱动数据并输出；
步骤S104：将所述驱动数据处理为第一驱动电压信号以及与所述第一驱动电压信号相同的第二驱动电压信号；
步骤S105：在接收到第一电平信号时，将所述第一驱动电压信号输出至所述显示面板，以驱动所述显示面板显示；
步骤S106：在接收到第二电平信号时，将所述第二驱动电压信号逆处理为相对于下一帧数据的上一帧数据的第N行数据并进行缓存。
在一个实施例，上述方法可以由前述实施例中的驱动电路100来执行，其中，步骤S101具体可以由当前帧第N行数据缓冲模块20来执行，步骤S102具体可以由上帧第N行数据缓冲模块10来执行，步骤S103具体可以由驱动加速模30来执行，步骤S104和步骤S105具体可以由源极驱动模块40来执行，步骤S106具体可以由信号逆变模块60来执行。
本实施例通过对当前帧数据的第N行数据转换后得到的驱动电压信号进行逆变处理得到相对于下一帧数据的第N行数据的上一帧数据的第N行数据并进 行缓存，可以在不使用双倍速率同步动态随机存储器的情况下，实现对上一帧数据的第N行数据的缓存，从而根据当前帧数据的第N行数据和上一帧数据的第N行数据查表得到实际驱动数据，实现液晶驱动加速功能，可以有效降低屏驱动板的制造成本。
如图5所示，本公开的一个实施例一种显示面板的驱动系统200，设置为执行图4所对应的实施例中的方法步骤，其包括：第一缓存模块101、第二缓存模块102、数据查找模块103、第一数据处理模块104、数据输出模块105以及第二数据处理模块106。
第一缓存模块101，设置为在接收到当前帧数据的第N行数据时，对当前帧数据的第N行数据进行缓存，所述当前帧数据的第N行数据设置为对所述显示面板上的第N行像素进行驱动，其中，N≥1且N为正整数；
第二缓存模块102，设置为在所述当前帧数据的第N行数据被缓存时，对上一帧数据中设置为驱动所述第N行像素的第N行数据进行缓存；
数据查找模块103，设置为读取所述当前帧数据的第N行数据和所述上一帧数据的第N行数据，并在预存的数据查找表中查找与所述当前帧数据的第N行数据和所述上一帧数据的第N行数据对应的驱动数据并输出；
第一数据处理模块104，设置为将所述驱动数据处理为第一驱动电压信号以及与所述第一驱动电压信号相同的第二驱动电压信号；
数据输出模块105，设置为在接收到第一电平信号时，将所述第一驱动电压信号输出至所述显示面板，以驱动所述显示面板显示；
第二数据处理模块106，设置为在接收到第二电平信号时，将所述第二驱动电压信号逆处理为相对于下一时刻的上一帧数据的第N行数据并进行缓存。
在一个实施例，上述系统可以为前述实施例中的驱动电路100的软件程序 系统，其中，第一缓存模块101可以为当前帧第N行数据缓冲模块20中的软件程序模块，第二缓存模块102可以为上帧第N行数据缓冲模块10中的软甲程序模块，数据查找模块103可以为驱动加速模30中的软件程序模块，第一数据处理模块104和数据输出模块105可以为源极驱动模块40中的软件程序模块，第二数据处理模块106可以为信号逆变模块中的软件程序模块。
本实施例通过对当前帧数据的第N行数据转换后得到的驱动电压信号进行逆变处理得到相对于下一帧数据的第N行数据的上一帧数据的第N行数据并进行缓存，可以在不使用双倍速率同步动态随机存储器的情况下，实现对上一帧数据的第N行数据的缓存，从而根据当前帧数据的第N行数据和上一帧数据的第N行数据查表得到实际驱动数据，实现液晶驱动加速功能，可以有效降低屏驱动板的制造成本。
在一个实施例中，图5所对应的实施例中的所有模块，可以通过通用集成电路，例如CPU(Central Processing Unit，中央处理器)，或通过ASIC(Application Specific Integrated Circuit，专用集成电路)来实现。
如图6所示，本发明的一个实施例还提供一种显示装置300，其包括显示面板301以及控制单元302，其中，控制单元302包括上述实施例中的驱动电路100。
在一个实施例中，显示装置可以为设置有上述驱动电路100的任意类型的显示装置，例如LCD(Liquid Crystal Display，液晶显示装置)、OLED(Organic Electroluminesence Display，有机电激光显示)显示装置、QLED(Quantum Dot Light Emitting Diodes，量子点发光二极管)显示装置或曲面显示装置等。
在一个实施例中，显示面板301包括由多行像素和多列像素组成的像素阵列。
在一个实施例中，控制单元302，可以通过通用集成电路，例如CPU(Central Processing Unit，中央处理器)，或通过ASIC(Application Specific Integrated Circuit，专用集成电路)来实现。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，所述的存储介质可为磁碟、光盘、只读存储记忆体(Read-Only Memory，ROM)或随机存储记忆体(Random Access Memory，RAM)等。
以上所述仅为本公开的较佳实施例而已，并不用以限制本公开，凡在本公开的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本公开的保护范围之内。

Claims (20)

  1. 一种显示面板的驱动电路，包括：
    当前帧第N行数据缓冲模块，设置为在接收到当前帧数据的第N行数据时，对当前帧数据的第N行数据进行缓存，所述当前帧数据的第N行数据用于对所述显示面板上的第N行像素进行驱动，其中，N≥1且N为正整数；
    上帧第N行数据缓冲模块，设置为在所述当前帧数据的第N行数据被缓存时，对上一帧数据中用于驱动所述第N行像素的第N行数据进行缓存；
    驱动加速模块，与所述上帧第N行数据缓冲模块和所述当前帧第N行数据缓冲模块连接，设置为读取所述当前帧数据的第N行数据和所述上一帧数据的第N行数据，并在其预存的数据查找表中查找与所述当前帧数据的第N行数据和所述上一帧数据的第N行数据对应的驱动数据；
    源极驱动模块，与所述驱动加速模块连接，设置为根据所述驱动数据得到第一驱动电压信号以及与所述第一驱动电压信号相同的第二驱动电压信号；
    开关模块，分别与所述源极驱动模块和所述显示面板连接，设置为在接收到第一电平信号时导通、在接收到第二电平信号时截止，并在截止时将所述第一驱动电压信号输出至所述显示面板，以驱动所述显示面板显示；以及
    信号逆变模块，与所述开关模块连接，设置为在所述开关模块导通时，与所述源极驱动模块连接，将所述第二驱动电压信号逆处理并存储至所述上帧第N行数据缓冲模块；还设置为在所述开关模块截止时，断开与所述源极驱动模块的连接。
  2. 如权利要求1所述的显示面板的驱动电路，其中，所述驱动加速模块包括：
    第一数据解压单元，与所述上帧第N行数据缓冲模块连接，设置为读取并解压所述上一帧数据的第N行数据；
    第二数据解压单元，与所述当前帧第N行数据缓冲模块连接，设置为读取并解压所述当前帧数据的第N行数据；
    显示查找表单元，分别与所述第一数据解压单元和所述第二数据解压单元连接，设置为预存所述数据查找表，并根据解压之后的所述当前帧数据的第N行数据和所述上一帧数据的第N行数据从所述数据查找表中查找对应的驱动数据并输出。
  3. 如权利要求2所述的显示面板的驱动电路，其中，所述显示查找表单元为显示查找表。
  4. 如权利要求1所述的显示面板的驱动电路，其中，所述源极驱动模块包括：
    第一电平转换单元，与所述驱动加速模块连接，设置为对所述驱动数据进行电平转换，以改变所述驱动数据的电压大小；
    数模转换单元，与所述第一电平转换单元连接，设置为对电平转换之后的所述驱动数据进行数模转换，以得到驱动电压信号；
    输出缓冲单元，与所述数模转换单元连接，设置为对所述驱动电压信号进行缓冲，同步输出所述驱动电压信号中的所有电压数据，以增加所述驱动电压信号的驱动能力；
    输出多路复用单元，与所述输出缓冲单元连接，设置为将所述驱动电压信号处理为所述第一驱动电压信号和所述第二驱动电压信号。
  5. 如权利要求1所述的显示面板的驱动电路，其中，所述信号逆变模块包括：
    输入缓冲单元，与所述开关模块连接，设置为在所述开关模块导通时，与所述源极驱动模块连接，对所述第二驱动电压信号进行缓冲，并同步输出所述 第二驱动电压信号中的所有电压数据；在所述开关模块截止时，断开与所述源极驱动模块的连接；
    模数转换单元，与所述输入缓冲单元连接，设置为对所述第二驱动电压信号进行模数转换，以得到数字信号；
    第二电平转换单元，分别与所述模数转换单元和所述上帧第N行数据缓冲模块连接，设置为对所述数字信号进行电平转换并存储至所述上帧第N行数据缓冲模块，以将电平转换后的所述数字信号作为相对于下一帧数据的上一帧数据的第N行数据。
  6. 如权利要求1所述的显示面板的驱动电路，其中，所述第一电平信号为高电平信号，所述第二电平信号为低电平信号。
  7. 如权利要求1所述的显示面板的驱动电路，其中，所述开关模块为电子开关管。
  8. 如权利要求1所述的显示面板的驱动电路，其中，所述当前帧第N行数据缓冲模块外接定时器/计数器控制寄存器，设置为在所述定时器/计数器控制寄存器的输出信号的上升沿时，写入当前帧数据中的一行数据。
  9. 一种显示面板的驱动方法，包括：
    在接收到当前帧数据的第N行数据时，对当前帧数据的第N行数据进行缓存，所述当前帧数据的第N行数据用于驱动所述显示面板上的第N行像素，其中，N≥1且N为正整数；
    在所述当前帧数据的第N行数据被缓存时，对上一帧数据中用于驱动所述第N行像素的第N行数据进行缓存；
    读取所述当前帧数据的第N行数据和所述上一帧数据的第N行数据，并在预存的数据查找表中查找与所述当前帧数据的第N行数据和所述上一帧数据的 第N行数据对应的驱动数据并输出；
    将所述驱动数据处理为第一驱动电压信号以及与所述第一驱动电压信号相同的第二驱动电压信号；
    在接收到第一电平信号时，将所述第一驱动电压信号输出至所述显示面板，以驱动所述显示面板显示；
    在接收到第二电平信号时，将所述第二驱动电压信号逆处理为相对于下一帧数据的上一帧数据的第N行数据并进行缓存。
  10. 一种显示装置，包括：显示面板和控制单元，
    其中，所述控制单元包括驱动电路，所述驱动电路包括：
    当前帧第N行数据缓冲模块，设置为在接收到当前帧数据的第N行数据时，对当前帧数据的第N行数据进行缓存，所述当前帧数据的第N行数据用于对所述显示面板上的第N行像素进行驱动，其中，N≥1且N为正整数；
    上帧第N行数据缓冲模块，设置为在所述当前帧数据的第N行数据被缓存时，对上一帧数据中用于驱动所述第N行像素的第N行数据进行缓存；
    驱动加速模块，与所述上帧第N行数据缓冲模块和所述当前帧第N行数据缓冲模块连接，设置为读取所述当前帧数据的第N行数据和所述上一帧数据的第N行数据，并在其预存的数据查找表中查找与所述当前帧数据的第N行数据和所述上一帧数据的第N行数据对应的驱动数据；
    源极驱动模块，与所述驱动加速模块连接，设置为根据所述驱动数据得到第一驱动电压信号以及与所述第一驱动电压信号相同的第二驱动电压信号；
    开关模块，分别与所述源极驱动模块和所述显示面板连接，设置为在接收到第一电平信号时导通、在接收到第二电平信号时截止，并在截止时将所述第一驱动电压信号输出至所述显示面板，以驱动所述显示面板显示；以及
    信号逆变模块，与所述开关模块连接，设置为在所述开关模块导通时，与所述源极驱动模块连接，将所述第二驱动电压信号逆处理并存储至所述上帧第N行数据缓冲模块；还设置为在所述开关模块截止时，断开与所述源极驱动模块的连接。
  11. 如权利要求10所述的显示装置，其中，所述驱动加速模块包括：
    第一数据解压单元，与所述上帧第N行数据缓冲模块连接，设置为读取并解压所述上一帧数据的第N行数据；
    第二数据解压单元，与所述当前帧第N行数据缓冲模块连接，设置为读取并解压所述当前帧数据的第N行数据；
    显示查找表单元，分别与所述第一数据解压单元和所述第二数据解压单元连接，设置为预存所述数据查找表，并根据解压之后的所述当前帧数据的第N行数据和所述上一帧数据的第N行数据从所述数据查找表中查找对应的驱动数据并输出。
  12. 如权利要求11所述的显示装置，其中，所述显示查找表单元为显示查找表。
  13. 如权利要求10所述的显示装置，其中，所述源极驱动模块包括：
    第一电平转换单元，与所述驱动加速模块连接，设置为对所述驱动数据进行电平转换，以改变所述驱动数据的电压大小；
    数模转换单元，与所述第一电平转换单元连接，设置为对电平转换之后的所述驱动数据进行数模转换，以得到驱动电压信号；
    输出缓冲单元，与所述数模转换单元连接，设置为对所述驱动电压信号进行缓冲，同步输出所述驱动电压信号中的所有电压数据，以增加所述驱动电压信号的驱动能力；
    输出多路复用单元，与所述输出缓冲单元连接，设置为将所述驱动电压信号处理为所述第一驱动电压信号和所述第二驱动电压信号。
  14. 如权利要求10所述的显示装置，其中，所述信号逆变模块包括：
    输入缓冲单元，与所述开关模块连接，设置为在所述开关模块导通时，与所述源极驱动模块连接，对所述第二驱动电压信号进行缓冲，并同步输出所述第二驱动电压信号中的所有电压数据；在所述开关模块截止时，断开与所述源极驱动模块的连接；
    模数转换单元，与所述输入缓冲单元连接，设置为对所述第二驱动电压信号进行模数转换，以得到数字信号；
    第二电平转换单元，分别与所述模数转换单元和所述上帧第N行数据缓冲模块连接，设置为对所述数字信号进行电平转换并存储至所述上帧第N行数据缓冲模块，以将电平转换后的所述数字信号作为相对于下一帧数据的上一帧数据的第N行数据。
  15. 如权利要求10所述的显示装置，其中，所述第一电平信号为高电平信号，所述第二电平信号为低电平信号。
  16. 如权利要求10所述的显示装置，其中，所述开关模块为电子开关管。
  17. 如权利要求10所述的显示装置，其中，所述当前帧第N行数据缓冲模块外接定时器/计数器控制寄存器，设置为在所述定时器/计数器控制寄存器的输出信号的上升沿时，写入当前帧数据中的一行数据。
  18. 如权利要求10所述的显示装置，其中，所述显示面板包括设置成m行n列的m*n个像素，所述开关模块具有n个输出端，每个输出端与n列中的一列像素连接。
  19. 如权利要求18所述的显示装置，其中，所述开关模块还具有与信号逆 变模块连接的第(n+1)输出端。
  20. 如权利要求19所述的显示装置，其中，所述开关模块还具有与源极驱动模块的输入端以及接收控制信号的控制端。
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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107045862B (zh) 2017-06-20 2019-12-13 惠科股份有限公司 一种显示面板的驱动电路、方法及显示装置
CN110970000B (zh) * 2019-12-25 2020-10-27 Tcl华星光电技术有限公司 驱动方法、驱动装置及液晶显示装置
TWI730839B (zh) 2020-07-08 2021-06-11 友達光電股份有限公司 顯示裝置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW413976B (en) * 1997-11-13 2000-12-01 Samsung Electro Mech Single-phase disk-type non-rectifying DC motor
CN1672188A (zh) * 2002-07-29 2005-09-21 皇家飞利浦电子股份有限公司 用于驱动lcd显示器的方法和电路
CN101599256A (zh) * 2008-05-28 2009-12-09 恩益禧电子股份有限公司 显示装置、显示面板驱动器和驱动方法、数据提供方法
CN103151015A (zh) * 2013-03-12 2013-06-12 京东方科技集团股份有限公司 过驱动方法、电路、显示面板和显示装置
CN107045862A (zh) * 2017-06-20 2017-08-15 惠科股份有限公司 一种显示面板的驱动电路、方法及显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0764522A (ja) * 1993-08-30 1995-03-10 Hitachi Ltd マルチディスプレイ装置の自動調整システム
CN100446081C (zh) * 2006-06-07 2008-12-24 友达光电股份有限公司 液晶显示面板及其时序控制器与过驱动参数的产生方法
KR101388588B1 (ko) * 2007-03-14 2014-04-23 삼성디스플레이 주식회사 액정표시장치
CN101345026B (zh) * 2007-07-10 2010-12-01 联詠科技股份有限公司 帧数据缓冲装置以及其相关帧数据取得方法
TWI404033B (zh) * 2009-01-06 2013-08-01 Mstar Semiconductor Inc 液晶面板之驅動方法與裝置以及液晶面板之時間控制器
KR101623582B1 (ko) * 2009-07-31 2016-05-24 엘지디스플레이 주식회사 액정표시장치와 그 응답시간 보상방법
US9732976B2 (en) * 2014-01-28 2017-08-15 Zhongshan Broad-Ocean Motor Co., Ltd. Direct power control for constant airflow control with advanced motor system modeling
KR102320425B1 (ko) * 2014-12-24 2021-11-03 엘지디스플레이 주식회사 표시장치 및 데이터 구동부
CN104916264B (zh) * 2015-07-02 2017-11-14 新港海岸(北京)科技有限公司 一种液晶屏过驱动电路

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW413976B (en) * 1997-11-13 2000-12-01 Samsung Electro Mech Single-phase disk-type non-rectifying DC motor
CN1672188A (zh) * 2002-07-29 2005-09-21 皇家飞利浦电子股份有限公司 用于驱动lcd显示器的方法和电路
CN101599256A (zh) * 2008-05-28 2009-12-09 恩益禧电子股份有限公司 显示装置、显示面板驱动器和驱动方法、数据提供方法
CN103151015A (zh) * 2013-03-12 2013-06-12 京东方科技集团股份有限公司 过驱动方法、电路、显示面板和显示装置
CN107045862A (zh) * 2017-06-20 2017-08-15 惠科股份有限公司 一种显示面板的驱动电路、方法及显示装置

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