WO2018206165A1 - Transistor de puissance vertical présentant une conductivité améliorée et des performances de blocage élevées - Google Patents
Transistor de puissance vertical présentant une conductivité améliorée et des performances de blocage élevées Download PDFInfo
- Publication number
- WO2018206165A1 WO2018206165A1 PCT/EP2018/053282 EP2018053282W WO2018206165A1 WO 2018206165 A1 WO2018206165 A1 WO 2018206165A1 EP 2018053282 W EP2018053282 W EP 2018053282W WO 2018206165 A1 WO2018206165 A1 WO 2018206165A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- power transistor
- vertical power
- semiconductor material
- trench
- epitaxial layer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 46
- 239000000463 material Substances 0.000 claims abstract description 39
- 239000002800 charge carrier Substances 0.000 claims abstract description 20
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 7
- 239000010410 layer Substances 0.000 description 49
- 230000007704 transition Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1608—Silicon carbide
Abstract
L'invention concerne un transistor de puissance vertical (100, 200) comprenant au moins une couche épitaxiale (103, 203) qui comprend un premier matériau semi-conducteur qui est dopé avec des premiers porteurs de charge, le transistor comprenant en outre une pluralité de tranchées (107, 207) qui s'étendent à l'intérieur de la couche épitaxiale (103, 203) à partir d'une surface de ladite couche épitaxiale (103, 203). L'invention est caractérisée en ce que chaque tranchée (107, 207) présente une zone (108, 208) qui s'étend depuis le fond de la tranchée jusqu'à une hauteur déterminée, la zone (108, 208) étant remplie au moins en partie d'un deuxième matériau semi-conducteur (109, 209) qui est dopé avec des deuxièmes porteurs de charge et la zone (108, 208) étant reliée électriquement à une région de source (105, 205), les premiers porteurs de charge et les deuxièmes porteurs de charge étant différents.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP18708342.3A EP3646387A1 (fr) | 2017-05-10 | 2018-02-09 | Transistor de puissance vertical présentant une conductivité améliorée et des performances de blocage élevées |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102017207848.0 | 2017-05-10 | ||
| DE102017207848.0A DE102017207848A1 (de) | 2017-05-10 | 2017-05-10 | Vertikaler Leistungstransistor mit verbesserter Leitfähigkeit und hohem Sperrverhalten |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2018206165A1 true WO2018206165A1 (fr) | 2018-11-15 |
Family
ID=61557230
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP2018/053282 WO2018206165A1 (fr) | 2017-05-10 | 2018-02-09 | Transistor de puissance vertical présentant une conductivité améliorée et des performances de blocage élevées |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP3646387A1 (fr) |
| DE (1) | DE102017207848A1 (fr) |
| TW (1) | TW201907564A (fr) |
| WO (1) | WO2018206165A1 (fr) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102019206148A1 (de) * | 2019-04-30 | 2020-11-05 | Robert Bosch Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070194364A1 (en) * | 2001-08-30 | 2007-08-23 | Shindengen Electric Manufacturing Co., Ltd. | Diode |
| US20110254010A1 (en) * | 2010-04-16 | 2011-10-20 | Cree, Inc. | Wide Band-Gap MOSFETs Having a Heterojunction Under Gate Trenches Thereof and Related Methods of Forming Such Devices |
| US20140284709A1 (en) * | 2013-03-25 | 2014-09-25 | Renesas Electronics Corporation | Semiconductor device |
-
2017
- 2017-05-10 DE DE102017207848.0A patent/DE102017207848A1/de active Pending
-
2018
- 2018-02-09 EP EP18708342.3A patent/EP3646387A1/fr not_active Withdrawn
- 2018-02-09 WO PCT/EP2018/053282 patent/WO2018206165A1/fr unknown
- 2018-05-09 TW TW107115786A patent/TW201907564A/zh unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070194364A1 (en) * | 2001-08-30 | 2007-08-23 | Shindengen Electric Manufacturing Co., Ltd. | Diode |
| US20110254010A1 (en) * | 2010-04-16 | 2011-10-20 | Cree, Inc. | Wide Band-Gap MOSFETs Having a Heterojunction Under Gate Trenches Thereof and Related Methods of Forming Such Devices |
| US20140284709A1 (en) * | 2013-03-25 | 2014-09-25 | Renesas Electronics Corporation | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3646387A1 (fr) | 2020-05-06 |
| DE102017207848A1 (de) | 2018-11-15 |
| TW201907564A (zh) | 2019-02-16 |
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