WO2018198797A1 - シリコン単結晶の製造方法、エピタキシャルシリコンウェーハの製造方法、シリコン単結晶、および、エピタキシャルシリコンウェーハ - Google Patents
シリコン単結晶の製造方法、エピタキシャルシリコンウェーハの製造方法、シリコン単結晶、および、エピタキシャルシリコンウェーハ Download PDFInfo
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 279
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 279
- 239000010703 silicon Substances 0.000 title claims abstract description 279
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 46
- 229910021421 monocrystalline silicon Inorganic materials 0.000 title abstract 6
- 239000013078 crystal Substances 0.000 claims description 210
- 238000001816 cooling Methods 0.000 claims description 60
- 238000000034 method Methods 0.000 claims description 58
- 238000010438 heat treatment Methods 0.000 claims description 45
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 34
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 31
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 29
- 239000001257 hydrogen Substances 0.000 claims description 28
- 229910052739 hydrogen Inorganic materials 0.000 claims description 28
- 229910052786 argon Inorganic materials 0.000 claims description 17
- 238000000137 annealing Methods 0.000 claims description 14
- 239000012298 atmosphere Substances 0.000 claims description 11
- 239000007789 gas Substances 0.000 claims description 11
- 238000005520 cutting process Methods 0.000 claims description 5
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 79
- 238000007711 solidification Methods 0.000 description 20
- 230000008023 solidification Effects 0.000 description 20
- 239000002019 doping agent Substances 0.000 description 16
- 238000002474 experimental method Methods 0.000 description 11
- 239000010453 quartz Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 239000000155 melt Substances 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 230000004048 modification Effects 0.000 description 6
- 229910052732 germanium Inorganic materials 0.000 description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 229910002804 graphite Inorganic materials 0.000 description 2
- 239000010439 graphite Substances 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000011835 investigation Methods 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- SLLGVCUQYRMELA-UHFFFAOYSA-N chlorosilicon Chemical compound Cl[Si] SLLGVCUQYRMELA-UHFFFAOYSA-N 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- -1 for example Substances 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
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- 238000005507 spraying Methods 0.000 description 1
- 238000004781 supercooling Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 description 1
- 239000005052 trichlorosilane Substances 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/20—Controlling or regulating
- C30B15/206—Controlling or regulating the thermal history of growing the ingot
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/20—Controlling or regulating
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/02—Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt
- C30B15/04—Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt adding doping materials, e.g. for n-p-junction
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/14—Heating of the melt or the crystallised materials
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/02—Heat treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02598—Microstructure monocrystalline
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Definitions
- the present invention relates to a method for producing a silicon single crystal, a method for producing an epitaxial silicon wafer, a silicon single crystal, and an epitaxial silicon wafer.
- an epitaxial silicon wafer for a power MOS (Metal Oxide Semiconductor) transistor is required to have a very low electrical resistivity.
- MOS Metal Oxide Semiconductor
- a method of manufacturing an epitaxial silicon wafer including a silicon wafer doped with phosphorus (P) at a high concentration as an n-type dopant and an epitaxial film has been studied (for example, patents). Reference 1).
- a silicon single crystal containing red phosphorus is manufactured so that the electric resistivity is 0.7 m ⁇ ⁇ cm or more and 0.9 m ⁇ ⁇ cm or less.
- the silicon single crystal is pulled so that the time during which the temperature of the silicon single crystal falls within the range of 570 ° C. ⁇ 70 ° C. is 20 minutes or more and 200 minutes or less.
- generation of micro pits in the silicon wafer is suppressed, and generation of stacking faults (stacking fault, hereinafter referred to as SF) due to the micro pits is also suppressed.
- SF stacking fault
- An object of the present invention is to provide a silicon single crystal manufacturing method, an epitaxial silicon wafer manufacturing method, and a silicon single crystal capable of obtaining a high-quality epitaxial silicon wafer having a low electrical resistivity, and an electrical resistance. It is to provide an epitaxial silicon wafer having a low rate and a high quality.
- the method for producing a silicon single crystal of the present invention includes a chamber, a crucible disposed in the chamber and capable of storing a dopant-added melt obtained by adding red phosphorus to a silicon melt, and a seed crystal as the dopant-added melt.
- a single crystal pulling apparatus including a pulling unit that pulls up after contact is used.
- the method for producing the silicon single crystal includes adding the red phosphorus to the silicon melt so that the electric resistivity of the silicon single crystal is 0.5 m ⁇ ⁇ cm or more and less than 0.7 m ⁇ ⁇ cm, The silicon single crystal is pulled up so that the time at which the temperature in at least a part of the straight body of the crystal is within a range of 570 ° C. ⁇ 70 ° C. is 10 minutes or more and 50 minutes or less.
- the time during which the temperature in at least a part of the straight body portion of the silicon single crystal is within the range of 570 ° C. ⁇ 70 ° C. (hereinafter sometimes referred to as the residence time at 570 ° C. ⁇ 70 ° C.) exceeds 50 minutes. In this case, unlike the case where the electrical resistivity is 0.7 m ⁇ ⁇ cm or more, SF frequently occurs. On the other hand, when the residence time is less than 10 minutes, there is a risk that the silicon single crystal is broken by heat shock. According to the present invention, a heat treatment (heating in a hydrogen atmosphere at 1200 ° C.
- Another method for producing a silicon single crystal of the present invention includes a chamber, a crucible disposed in the chamber and capable of storing a dopant-added melt obtained by adding red phosphorus to a silicon melt, and a heating unit for heating the crucible. And a single crystal pulling device including a pulling unit that pulls the seed crystal after bringing it into contact with the dopant-added melt.
- the method for producing the silicon single crystal includes adding the red phosphorus to the silicon melt so that the electric resistivity of the silicon single crystal is 0.5 m ⁇ ⁇ cm or more and less than 0.7 m ⁇ ⁇ cm, A single crystal forming step of pulling up the crystal, and a cooling step of cooling the silicon single crystal. The cooling step raises the silicon single crystal by 400 mm or more within 180 minutes after separating the silicon single crystal from the dopant-added melt.
- the residence time at 570 ° C. ⁇ 70 ° C. in at least a partial region of the straight body portion of the silicon single crystal can be 10 minutes or more and 50 minutes or less.
- a silicon wafer obtained from at least a partial region of the straight body portion of the silicon single crystal is subjected to a heat treatment similar to the hydrogen baking step, the density of micro pits that cause SF generation is 2.5 / cm 2 or less. Therefore, a high-quality epitaxial silicon wafer having a low electrical resistivity can be obtained.
- germanium may be added to the silicon melt together with red phosphorus.
- the cooling step raises the silicon single crystal in a state where the power of the heating unit is 50% or less of the power of the heating unit immediately before the start of the cooling step.
- the power of the heating unit is preferably 0%.
- the amount of heat of the silicon single crystal in the cooling process can be further reduced, and the residence time at 570 ° C. ⁇ 70 ° C. in at least a part of the straight body portion of the silicon single crystal is 10 minutes to 50 minutes.
- This range can be further expanded.
- the power of the heating unit is set at any timing after the silicon single crystal is separated from the dopant-added melt. It may be 50% or less.
- An epitaxial silicon wafer manufacturing method of the present invention includes a wafer cutting step of cutting a silicon wafer from the silicon single crystal manufactured by the above-described silicon single crystal manufacturing method, and a hydrogen baking step of heating the silicon wafer in a hydrogen atmosphere. And an epitaxial film forming step of forming an epitaxial film on the silicon wafer.
- the method for producing an epitaxial silicon wafer of the present invention includes an argon annealing step of performing a heat treatment for 60 minutes to 120 minutes in an argon atmosphere of 1200 ° C. to 1220 ° C. with respect to the silicon wafer before the hydrogen baking step. It is preferable.
- oxygen and red phosphorus clusters which are the cause of generation of micropits, can be formed into a solution by an argon annealing process, and the density of LPD is as high as less than 0.3 / cm 2.
- Quality epitaxial silicon wafers can be manufactured.
- the silicon single crystal of the present invention contains red phosphorus and has an electrical resistivity of 0.5 m ⁇ ⁇ cm or more and less than 0.7 m ⁇ ⁇ cm.
- the silicon single crystal has an LPD density of 90 nm or more on the surface of the silicon wafer, which was measured after a silicon wafer cut from the silicon single crystal was heated in a hydrogen atmosphere at 1200 ° C. for 30 seconds.
- the epitaxial silicon wafer of the present invention includes a silicon wafer cut out from the crystal region in the straight body portion of the above-described silicon single crystal, and an epitaxial film provided on the silicon wafer.
- the density of LPD on the surface of the epitaxial film is 2.5 pieces / cm 2 or less.
- Another epitaxial silicon wafer of the present invention includes a silicon wafer cut out from the crystal region in the straight body portion of the silicon single crystal and an epitaxial film provided on the silicon wafer.
- the density of LPD on the surface of the epitaxial film is 0.3 piece / cm 2 or less.
- the graph which shows the result of the experiment 2 for deriving the manufacturing conditions of the silicon single crystal and shows the relationship between the electrical resistivity of the epitaxial silicon wafer and the LPD density.
- the schematic diagram which shows schematic structure of the single crystal pulling apparatus which concerns on one Embodiment of this invention.
- the schematic diagram which shows the manufacturing method of the single crystal by the multi pulling method in the modification of this invention The schematic diagram which shows the manufacturing method of the single crystal by the sampling pull-up method in the other modification of this invention. It is a graph showing the installation effect of the heater (after-heater) in the further another modification of this invention, Comprising: The graph which shows the relationship between the solidification rate and the temperature of a single-crystal center. It is a graph showing the installation effect of the heater (after-heater) in the said further another modification, Comprising: The graph which shows the relationship between a solidification rate and the stay time in 570 degreeC +/- 70 degreeC.
- a single crystal forming step for pulling up the silicon single crystal and a cooling step for cooling the silicon single crystal are performed.
- the single crystal forming step includes a step of forming a shoulder portion that is continuous with the seed crystal and gradually increases in diameter (shoulder portion forming step), and a straight body portion that is continuously formed on the shoulder portion and has a substantially uniform diameter.
- a cooling step is performed to take out the silicon single crystal from the pulling apparatus. Due to the manufacturing conditions as described above, the closer to the lower end of the silicon single crystal (the higher the solidification rate), the shorter the cooling time after exiting from the dopant-added melt, and the quicker cooling occurs. The staying time will be shortened. The following description will be given assuming that the solidification rate at the upper end of the shoulder is 0%.
- the present inventors further reduce the occurrence of SF by shortening the residence time at 570 ° C. ⁇ 70 ° C. even in a silicon single crystal having an electrical resistivity of 0.5 m ⁇ ⁇ cm or more and less than 0.7 m ⁇ ⁇ cm. It was investigated whether it could be suppressed.
- the silicon single crystal of Experimental Example 1 was manufactured, and the residence time at 570 ° C. ⁇ 70 ° C. at each solidification rate was examined.
- the power source of the heating unit for heating the crucible was turned off immediately after the tail part was separated from the dopant-added melt.
- the silicon single crystal was raised under the conditions shown in FIG. In FIG. 1, which means the start of the cooling process, “cooling start” means “when the silicon single crystal leaves the dopant-added melt”, and “crystal growth” means “the silicon single crystal is doped with the dopant-added melt” "Amount of increase after leaving”.
- the silicon single crystal was raised by 100 mm in 1 minute from the start of cooling, and was raised at a constant speed from the surface of the dopant added melt to 220 mm in the subsequent 14 minutes. Thereafter, the silicon single crystal was left as it was, and after 180 minutes from the start of cooling, the silicon single crystal was taken out from the pulling apparatus.
- a silicon single crystal of Experimental Example 2 was manufactured under the conditions shown in FIG. 1, and the residence time at 570 ° C. ⁇ 70 ° C. at each solidification rate was examined.
- Experimental Example 2 the same conditions as in Experimental Example 1 were applied until 1 minute from the start of cooling, and in the subsequent 102 minutes, the silicon single crystal was raised at a constant speed from the dopant-added melt surface to a position of 1000 mm. The silicon single crystal was left as it was until 180 minutes passed from the start of cooling, and then the silicon single crystal was taken out from the pulling apparatus.
- 10 mm silicon wafers each having a diameter of 200 mm corresponding to a plurality of solidification rates are obtained from the region A in which the solidification rates in the silicon single crystals of Experimental Example 1 and Experimental Example 2 are approximately 52% or more and 87% or less. Cut out one by one.
- the cut silicon wafer was subjected to a hydrogen baking process performed before forming an epitaxial film, and LPD was evaluated. In the hydrogen baking process, the silicon wafer was heated in a hydrogen atmosphere at 1200 ° C. for 30 seconds.
- the number of LPDs was measured in the DCN mode of SP-1 manufactured by KLA-Tencor, and the LPD measurement target at that time was 90 nm or more.
- the silicon single crystals of Experimental Examples 3 to 7 were manufactured under the conditions shown in FIG. Examined.
- red phosphorus was added to the silicon melt as a dopant so that the electrical resistivity of the silicon wafer was 0.5 m ⁇ ⁇ cm or more and less than 0.7 m ⁇ ⁇ cm.
- Experimental Example 3 to Experimental Example 6, the same conditions as in Experimental Example 1 were applied until 1 minute from the start of cooling.
- the silicon single crystal was raised at a constant speed from the surface of the dopant-added melt to 400 mm in 33 minutes after 1 minute from the start of cooling, and left as it was until 180 minutes had passed from the start of cooling, and then pulled up. Removed from the device.
- the silicon single crystal was raised at a constant speed from the surface of the dopant-added melt to 600 mm in 56 minutes after 1 minute from the start of cooling, and left as it was until 180 minutes had passed from the start of cooling, and then pulled up. Removed from the device.
- the silicon single crystal was raised at a constant speed from the dopant-added melt surface to a position of 800 mm in 77 minutes after 1 minute from the start of cooling, and left as it was until 180 minutes had passed from the start of cooling, and then pulled up. Removed from the device.
- the silicon single crystal was raised from the dopant-added melt surface to a position of 1000 mm at a constant speed in 179 minutes after 1 minute from the start of cooling, and taken out from the pulling apparatus.
- the silicon single crystal was raised at a constant speed from the surface of the dopant-added melt to 400 mm in 180 minutes from the start of cooling and taken out from the pulling device.
- the residence time at 570 ° C. ⁇ 70 ° C. in the region A having a solidification rate of about 52% or more and about 87% or less shown in FIG. 3 was 50 minutes or less in Experimental Example 3, Experimental Example 5, and Experimental Example 6.
- the residence time at 570 ° C. ⁇ 70 ° C. was 50 minutes or less in the region B where the solidification rate was about 53% or more and about 87% or less.
- the residence time at 570 ° C. ⁇ 70 ° C. was 50 minutes or less in the region C where the solidification rate was about 62% or more and about 87% or less.
- the silicon single crystal is raised by 400 mm or more within 180 minutes, thereby at least a partial region of the straight body portion of the silicon single crystal. It was found that the residence time at 570 ° C. ⁇ 70 ° C. can be reduced to 50 minutes or less.
- a silicon single crystal manufactured under the same conditions as in Experimental Example 2 (residence time at 570 ° C. ⁇ 70 ° C. of 50 minutes or less (with rapid cooling)) was prepared, and a plurality of silicon wafers were cut out from region A in FIG. Then, the epitaxial silicon wafer of Experimental Example 10 was manufactured using about half of the cut silicon wafers, and the epitaxial silicon wafer of Experimental Example 11 was manufactured using the remaining half.
- Experimental Example 10 the same process as in Experimental Example 8 was performed, and in Experimental Example 11, the same process as in Experimental Example 9 was performed.
- the LPD density on the epitaxial film surface of the epitaxial silicon wafer can be reduced to 2.5 pieces / cm 2 or less by setting the stay time at 570 ° C. ⁇ 70 ° C. in the cooling step to 50 minutes or less. all right. It was also found that the LPD density on the surface of the epitaxial film of the epitaxial silicon wafer can be reduced to 0.3 / cm 2 by further performing argon annealing treatment. It was found that even if the residence time at 570 ° C. ⁇ 70 ° C. exceeds 50 minutes, the LPD density can be made substantially equal to that of Experimental Example 10 by performing the argon annealing treatment as in Experimental Example 9. In Experimental Example 10, it was found that an epitaxial silicon wafer having a reduced LPD density can be produced by a simple process because an argon annealing process is unnecessary.
- the single crystal pulling apparatus 1 is an apparatus used in the CZ method, and includes a single crystal pulling apparatus main body 3, a doping apparatus (not shown), and a control unit (not shown) as shown in FIG.
- the single crystal pulling apparatus main body 3 includes a chamber 30, a crucible 31 disposed in the chamber 30, a heating unit 32 that radiates and heats the crucible 31, a pulling cable 33 as a pulling unit, and heat insulation
- a tube 34 and a shield 36 are provided.
- an inert gas for example, argon gas
- argon gas is introduced at a predetermined gas flow rate from the upper side to the lower side through the introduction unit 30 ⁇ / b> A provided in the upper part of the chamber 30 under the control of the control unit.
- the pressure in the chamber 30 can be controlled by the control unit.
- the crucible 31 melts polycrystalline silicon, which is a raw material for a silicon wafer, to form a silicon melt 4.
- the crucible 31 includes a bottomed quartz quartz crucible 311 and a graphite graphite crucible 312 which is disposed outside the quartz crucible 311 and accommodates the quartz crucible 311.
- the crucible 31 is supported by a support shaft 37 that rotates at a predetermined speed.
- the heating unit 32 is disposed outside the crucible 31 and heats the crucible 31 to melt the polycrystalline silicon in the crucible 31.
- One end of the pulling cable 33 is connected to, for example, a pulling drive unit (not shown) disposed at the top of the crucible 31.
- the pulling cable 33 is configured to be rotatable by driving a pulling drive unit.
- the pull-up cable 33 is raised at a predetermined pull-up speed by the control of the pull-up drive unit by the control unit.
- the heat insulating cylinder 34 is disposed so as to surround the crucible 31 and the heating unit 32.
- the shield 36 is a heat shielding shield that blocks radiant heat radiated upward from the heating unit 32.
- the shield 36 is installed so as to cover the surface of the silicon melt 4.
- the shield 36 has a conical shape in which the opening on the lower end side is smaller than the opening on the upper end side.
- the doping apparatus volatilizes red phosphorus as a volatile dopant in a solid state to dope the silicon melt 4 in the crucible 31. That is, a dopant-added melt 41 is generated by adding red phosphorus as a volatile dopant to the silicon melt 4.
- a doping apparatus a configuration in which the lower end portion of the cylindrical portion is immersed in the silicon melt 4 and red phosphorus is added to the silicon melt 4 can be applied.
- the doping apparatus a configuration in which red phosphorus is added to the silicon melt 4 by spraying volatilized red phosphorus on the silicon melt 4 by separating the lower end portion of the cylindrical portion from the silicon melt 4 is applied. be able to.
- the control unit appropriately controls the gas flow rate in the chamber 30, the pressure in the furnace, and the pulling speed of the pulling cable 33 based on the operator's setting input, thereby performing control during the production of the silicon single crystal 6.
- the single crystal pulling apparatus 1 heats and melts the polysilicon material under the control of the control unit. Thereafter, the single crystal pulling apparatus 1 controls the control unit to set the gas flow rate and the furnace pressure in the chamber 30 to a predetermined state and add red phosphorus as a volatile dopant to the silicon melt 4 to add the dopant. A melt 41 is generated.
- germanium may be added together with red phosphorus. The amount of red phosphorus added is such that the electrical resistivity of the silicon wafer cut out from the silicon single crystal 6 is 0.5 m ⁇ ⁇ cm or more and less than 0.7 m ⁇ ⁇ cm.
- control unit of the single crystal pulling apparatus 1 immerses the seed crystal in the melt based on the setting input by the operator. Thereafter, the control unit of the single crystal pulling apparatus 1 pulls the seed crystal at a predetermined pulling rate to manufacture a silicon single crystal 6 having a general size (for example, 60 kg or more and 180 kg or less).
- the control unit When pulling up the seed crystal, the control unit includes a neck portion forming step, a shoulder portion forming step for forming the shoulder portion 61, a straight body portion forming step for forming the straight body portion 62, and a tail portion forming step.
- a silicon single crystal 6 is manufactured by performing a forming process and a cooling process. In the cooling step, after the tail portion is separated from the dopant-added melt 41, the silicon single crystal 6 is raised by 400 mm or more within 180 minutes from the timing when the tail portion is separated from the dopant-added melt 41.
- the rise control of the silicon single crystal 6 in the cooling process may be the same as in any one of the experimental examples 2 to 7, and may be raised in a curved line or stepwise.
- the power of the heating unit 32 is set to 50% or less of the power immediately before the tail part is separated from the dopant-added melt 41. It is preferable to set it to 0% (more preferably, the power of the heating unit 32 is turned off).
- the condition of the cooling step is a condition for setting the time in which the temperature in at least a part of the straight body portion 62 of the silicon single crystal 6 is within a range of 570 ° C. ⁇ 70 ° C. to 10 minutes to 50 minutes. .
- the residence time at 570 ° C. ⁇ 70 ° C. is as shown in FIG.
- the furnace pressure is adjusted to 13.3 kPa (100 torr) or more and 60 kPa (450 torr) or less. It is preferable to do.
- the pressure in the furnace is less than 13.3 kPa, red phosphorus, which is a volatile dopant, evaporates, so that the electrical resistivity of the silicon single crystal 6 to be manufactured next increases.
- the furnace pressure exceeds 60 kPa, the evaporant easily adheres to the chamber 30, which hinders the single crystallization of the silicon single crystal 6.
- the electrical resistivity of the silicon wafer obtained from the region where the time within the range of 570 ° C. ⁇ 70 ° C. is from 10 minutes to 50 minutes is 0.5 m ⁇ ⁇ cm. This is less than 0.7 m ⁇ ⁇ cm.
- the oxygen concentration of the silicon wafer is 4 ⁇ 10 17 to 10 ⁇ 10 17 atoms / cm 3 (IGFA (Inert Gas Fusion Analysis)).
- the concentration of red phosphorus is 1.1 ⁇ 10 20 to 1.7 ⁇ 10 20 atoms / cm 3 .
- the concentration of germanium is 3.0 ⁇ 10 19 to 3.0 ⁇ 10 20 atoms / cm 3 .
- LPD LPD of 90 nm or more measured in the DCN mode of KLA-Tencor SP-1 on the surface of the silicon wafer, and is caused by SF
- the density of LPD is 2.5 pieces / cm 2 or less. That is, the density of pits generated on the surface of the silicon wafer is 2.5 pieces / cm 2 or less.
- an epitaxial film is formed on the silicon wafer by a CVD (Chemical Vapor Deposition) method (epitaxial film forming step).
- the process temperature of the epitaxial growth is in the range of 1000 ° C. to 1150 ° C., and preferably in the range of 1050 ° C. to 1080 ° C.
- the argon annealing treatment is performed in an argon gas atmosphere of 1200 ° C. or more and 1220 ° C. or less, and the treatment time is 60 minutes or more and 120 minutes or less.
- the electrical resistivity of the silicon wafer is as low as 0.5 m ⁇ ⁇ cm to less than 0.7 m ⁇ ⁇ cm, the misfit dislocation of the epitaxial film is extremely small, and the epitaxial film caused by SF
- An epitaxial silicon wafer having an LPD density on the surface of 2.5 / cm 2 or less is manufactured.
- the epitaxial silicon wafer is sufficiently practical for power MOS transistors.
- the LPD density on the surface of the epitaxial film can be further reduced to 0.3 pieces / cm 2 or less.
- a high-quality epitaxial silicon wafer having a very low electrical resistivity and a very low LPD due to SF cannot be manufactured by a conventional manufacturing method, and is in accordance with the above-described present invention. It can be manufactured only by the manufacturing method.
- the timing at which the power of the heating unit 32 is set to 50% or less of the power of the heating unit immediately before the start of the cooling step may be the same as when the tail unit is separated from the dopant-added melt 41. May be at an arbitrary timing before the rising amount of the silicon single crystal 6 reaches 400 mm after being separated from the dopant-added melt 41. Even with such a configuration, the amount of heat of the silicon single crystal 6 in the cooling process can be reduced compared with the case where the power of the heating unit 32 is not changed, and the residence time at 570 ° C. ⁇ 70 ° C. is 10 minutes or more and 50 minutes. The following range can be expanded.
- the power of the heating unit 32 may be 50% or less of the power of the heating unit immediately before the start of the cooling step before the tail part is separated from the dopant-added melt 41. In this case, the power of the heating unit 32 is reduced. It is preferable that the time from when the tail is cut down to when the tail portion is separated from the dopant-added melt 41 is within 10 minutes. When the time from when the power of the heating part 32 is reduced to when the tail part is separated from the dopant-added melt 41 exceeds 10 minutes, the temperature of the dopant-added melt 41 decreases and the melt surface is solidified. This is because unnecessary silicon may be attached to the tail portion.
- a so-called multi-pull method is used to pull up a plurality of silicon single crystals 6.
- the silicon single crystal 6 may be manufactured. At this time, first, a 70 kg polysilicon material is used to generate a dopant added melt 41 to which red phosphorus as a volatile dopant is added, and then the silicon single crystal 6 is pulled up.
- the control unit performs at least the pulling time in the straight body forming step among the neck forming process, the shoulder forming process, the straight drum forming process, and the tail forming process in the silicon single crystal 6.
- the silicon single crystal 6 having a length of 31 kg and shorter than that of the above embodiment is produced.
- the silicon single crystal 6 is raised by 400 mm or more within 180 minutes after the tail portion is separated from the dopant-added melt 41 as in the above embodiment.
- the residence time at 570 ° C. ⁇ 70 ° C. in the entire silicon single crystal 6 becomes, for example, the region A of Experimental Example 2 in FIG.
- the lower end portion of the silicon single crystal (solidification rate 52 in Experimental Example 2 in FIG. %) Is heated at a temperature higher than 570 ° C. ⁇ 70 ° C. Since the lower end portion of the silicon single crystal is rapidly cooled from this state, it is considered that the time required for 570 ° C. ⁇ 70 ° C. is shortened (50 minutes or less). On the other hand, the upper end portion of the silicon single crystal (the portion where the solidification rate of Experimental Example 2 in FIG. 2 is smaller than 52%) is lowered to a temperature lower than 570 ° C. ⁇ 70 ° C.
- the silicon single crystal 6 having a shorter dimension than that of the above embodiment is manufactured. The whole can be brought to a temperature higher than 570 ° C. ⁇ 70 ° C.
- the time of 570 ° C. ⁇ 70 ° C. is set as the region A in Experiment Example 2, Experiment Example 3, Experiment Example 5, Experiment Example 6 in FIG. It can be considered that it can be shortened similarly to the region B in Experimental Example 4 or the region C in Experimental Example 7.
- the time during which the temperature of the silicon single crystal 6 is within the range of 570 ° C. ⁇ 70 ° C. is 10 minutes or more and 50 minutes or less, and generation of LPD can be further suppressed over the entire length in the length direction of the silicon single crystal. .
- the single crystal pulling apparatus 1 puts a material 411 (silicon, red phosphorus, germanium) for generating a 31 kg dopant-added melt 41 into the quartz crucible 311. Then, the next 31 kg of silicon single crystal 6 is manufactured.
- a material 411 silicon, red phosphorus, germanium
- the pressure in the furnace it is preferable to adjust the pressure in the furnace to 13.3 kPa or more and 60 kPa or less during the cooling step other than the silicon single crystal 6 to be finally manufactured. The reason why it is preferable to adjust the furnace pressure in this way is the same as the reason described in the above embodiment.
- the single crystal pulling apparatus 1 is used to charge a plurality of dopant-added melts 41 at a time using the same quartz crucible 311. Thereafter, a silicon single crystal 6 having the same size as the silicon single crystal 6 described in the multi-pull method may be manufactured by a so-called pulling-up method in which a plurality of silicon single crystals 6 are pulled up one by one. At this time, in the cooling step, the silicon single crystal 6 is raised by 400 mm or more within 180 minutes after the tail portion is separated from the dopant-added melt 41 as in the above embodiment.
- the furnace pressure when manufacturing the two silicon single crystals 6, it is preferable to adjust the furnace pressure to 13.3 kPa or more and 60 kPa or less during the cooling step after pulling up the first silicon single crystal 6.
- the reason why it is preferable to adjust the furnace pressure in this way is the same as the reason described in the above embodiment.
- the pull-up method can be applied without adding a raw material when pulling up the final silicon single crystal.
- a method in which 157 kg of dopant-added melt 41 is charged and 31 kg of silicon single crystal 6 is continuously pulled up five times may be applied.
- the time for the temperature of the silicon single crystal 6 to be within the range of 570 ° C. ⁇ 70 ° C. can be set to 10 minutes or more and 50 minutes or less.
- silicon is used in a state where the power of the heating unit 32 is 50% or less of the power of the heating unit immediately before the start of the cooling step, as in the above-described embodiment or the above-described modification.
- the single crystal 6 may be raised. However, since it is necessary to increase the power of the heating unit 32 before manufacturing the next silicon single crystal 6, it is preferable to raise the silicon single crystal 6 without reducing the power of the heating unit 32.
- an after heater 51 as a heater may be provided.
- the after heater 51 may be formed in a cylindrical shape, for example.
- the arrangement position of the after heater 51 is preferably a position where the distance D1 from the surface of the dopant-added melt 41 to the lower end of the after heater 51 is 1.5 to 3.0 times the diameter R of the silicon single crystal 6. .
- the after heater 51 is arranged at a position where the distance D1 is less than 1.5 times the diameter R of the silicon single crystal 6, the after heater 51 is close to the surface of the dopant-added melt 41. This is because the gradient becomes gentle and there is a risk of dislocation formation due to compositional supercooling.
- the silicon single crystal 6 was manufactured under the same conditions as in the experimental example 1. And the temperature distribution of the single-crystal center in each solidification rate when the tail part cut
- the silicon single crystal 6 was manufactured by heating the silicon single crystal 6 with the after heater 51 while suppressing the temperature drop of the silicon single crystal 6.
- the temperature distribution at the center of the single crystal and the residence time at 570 ° C. ⁇ 70 ° C. at each solidification rate were examined. The respective results are shown by solid lines in FIGS.
- the straight body portion forming step is performed with the after heater 51 turned on, and in the cooling step after the tail portion forming step, the after heater 51 is turned off, and the tail portion is melted with the dopant as in the above embodiment.
- the silicon single crystal 6 is raised by 400 mm or more within 180 minutes, and the portion having a temperature of 640 ° C. or more is rapidly cooled.
- the portion where the time during which the temperature of the silicon single crystal 6 is within the range of 570 ° C. ⁇ 70 ° C. is 10 minutes or more and 50 minutes or less. That is, the number of pits generated on the silicon wafer can be increased to 2.5 / cm 2 or less.
- the portion where the temperature of the silicon single crystal 6 is within the range of 570 ° C. ⁇ 70 ° C. is 10 minutes to 50 minutes is greatly increased. I was able to confirm that.
Abstract
Description
前記シリコン単結晶から得られたシリコンウェーハにエピタキシャル膜を形成すると、シリコンウェーハにおける微小ピットの発生が抑制され、前記微小ピットに起因する積層欠陥(スタッキングフォルト、以下、SFという)の発生も抑制される。その結果、90nm以上のLPD(Light Point Defect)の密度が0.1個/cm2以下になり、電気抵抗率が低くかつ高品質のエピタキシャルシリコンウェーハを得ることができる。
本発明によれば、シリコン単結晶の前記少なくとも一部の領域から得られるシリコンウェーハに対して、エピタキシャル膜形成前の水素ベーク工程と同様の熱処理(1200℃の水素雰囲気中で30秒間加熱)を行うと、SFの発生原因である微小ピットの密度を2.5個/cm2以下にすることができる。したがって、上述のようなシリコン単結晶を用いてエピタキシャルシリコンウェーハを製造すると、KLA-Tencor社製SP-1のDCNモードで測定される90nm以上のLPDの密度を2.5個/cm2以下にすることができる。よって、電気抵抗率が低くかつ高品質のエピタキシャルシリコンウェーハを得ることができる。
シリコン融液に赤リンとともに、ゲルマニウム(Ge)を添加してもよい。上述のような構成にすれば、シリコンウェーハとエピタキシャル膜との界面部分での赤リンの濃度差に起因する転位欠陥(ミスフィット転位)の発生をさらに抑制することができる。
本発明においても、シリコン融液に赤リンとともに、ゲルマニウムを添加してもよい。
「前記加熱部のパワーを、前記冷却工程の開始直前の加熱部のパワーの50%以下にした状態で前記シリコン単結晶を上昇させる」ために、シリコン単結晶をドーパント添加融液から切り離す前、シリコン単結晶をドーパント添加融液から切り離すと同時、シリコン単結晶をドーパント添加融液から切り離した後の、いずれかのタイミングで加熱部のパワーを、前記冷却工程の開始直前の加熱部のパワーの50%以下にしてもよい。
本発明の別のエピタキシャルシリコンウェーハは、上述のシリコン単結晶の前記直胴部における前記結晶領域から切り出されたシリコンウェーハと、前記シリコンウェーハ上に設けられたエピタキシャル膜とを備える。前記エピタキシャル膜の表面におけるLPDの密度が0.3個/cm2以下である。
〔実験1:冷却工程の条件と570℃±70℃での滞在時間およびLPDの発生状況との関係調査〕
CZ法(チョクラルスキー法)を用いたシリコン単結晶の製造では、シリコン単結晶を引き上げる単結晶形成工程と、シリコン単結晶を冷却する冷却工程とを行う。単結晶形成工程は、種子結晶に連続し直径が徐々に増加する肩部を形成する工程(肩部形成工程)と、肩部に連続して形成され直径が略均一の直胴部を形成する工程(直胴部形成工程)と、直胴部の下端に連続し直径が徐々に減少してゼロになるテール部を形成する工程(テール部形成工程)とを備えている。
テール部形成工程が終了した後、冷却工程を行い、シリコン単結晶を引き上げ装置から取り出す。
上述のような製造条件のため、シリコン単結晶の下端に近くなるほど(固化率が大きくなるほど)、ドーパント添加融液から出た後の冷却時間が短くなるため急冷され、570℃±70℃での滞在時間が短くなると考えられる。
肩部の上端における固化率を0%として、以下の説明を行う。
実験例1では、冷却開始から1分間でシリコン単結晶を100mm上昇させ、その後の14分間で、ドーパント添加融液表面から220mmの位置まで等速度で上昇させた。その後、シリコン単結晶をそのまま放置し、冷却開始から180分経過後に、シリコン単結晶を引き上げ装置から取り出した。
実験例1および実験例2において、シリコンウェーハの電気抵抗率が0.5mΩ・cm以上0.7mΩ・cm未満となるように、ドーパントとして赤リンをシリコン融液に添加して、ドーパント添加融液を生成した。ドーパント添加融液のチャージ量を100kgとした。シリコン単結晶の直径を210mmにした。
実験例1および実験例2における570℃±70℃での滞在時間を図2および図3に示す。図3に示すような領域Aであって、固化率が約52%以上約87%以下の領域における570℃±70℃での滞在時間は、実験例1では50分を超えていたのに対して、実験例2では50分以下となっていた。
上記特許文献1にも記載されているように、水素ベーク工程後に発生する微小ピットを、KLA-Tencor社製SP-1のDCNモードで90nm以上のLPDとして測定することができる。このことから、実験例2のシリコン単結晶から得られるシリコンウェーハにおける水素ベーク工程後の微小ピットの密度は、0.46個/cm2であると考えられる。
実験例3では、冷却開始1分後からの33分間でシリコン単結晶をドーパント添加融液表面から400mmの位置まで等速度で上昇させ、冷却開始から180分を経過するまでそのまま放置した後、引き上げ装置から取り出した。
実験例4では、冷却開始1分後からの56分間でシリコン単結晶をドーパント添加融液表面から600mmの位置まで等速度で上昇させ、冷却開始から180分を経過するまでそのまま放置した後、引き上げ装置から取り出した。
実験例5では、冷却開始1分後からの77分間でシリコン単結晶をドーパント添加融液表面から800mmの位置まで等速度で上昇させ、冷却開始から180分を経過するまでそのまま放置した後、引き上げ装置から取り出した。
実験例6では、冷却開始1分後からの179分間でシリコン単結晶をドーパント添加融液表面から1000mmの位置まで等速度で上昇させ、引き上げ装置から取り出した。
実験例7では、冷却開始からの180分間でシリコン単結晶をドーパント添加融液表面から400mmの位置まで等速度で上昇させ、引き上げ装置から取り出した。
これらのことから、冷却工程において、シリコン単結晶をドーパント添加融液から切り離した後、180分以内にシリコン単結晶を400mm以上上昇させることで、シリコン単結晶の直胴部の少なくとも一部の領域における570℃±70℃での滞在時間を、50分以下にすることができることがわかった。
表1に示すように、平均LPD個数および平均LPD密度ともに、実験例1よりも実験例3~実験例7の方が小さく、実験例3~実験例7の平均LPD密度は、それぞれ2.5個/cm2以下であった。
実験例1(570℃±70℃での滞在時間が50分を超えている(急冷無し))と同じ条件で製造したシリコン単結晶を準備し、図3の領域Aから複数のシリコンウェーハを切り出した。そして、切り出したシリコンウェーハのうち約半数を用いて、以下の表2に示すような条件で、実験例8のエピタキシャルシリコンウェーハを製造し、残りの約半数を用いて実験例9のエピタキシャルシリコンウェーハを製造した。
[エピタキシャル膜形成条件]
ドーパントガス:フォスフィン(PH3)ガス
原料ソースガス:トリクロロシラン(SiHCl3)ガス
キャリアガス:水素ガス
成長温度:1080℃
エピタキシャル膜の厚さ:3μm
エピタキシャル膜の電気抵抗率:1Ω・cm
[アルゴンアニール条件]
雰囲気:アルゴンガス
熱処理温度:1200℃
熱処理時間:60分
実験例10では実験例8と同じ工程を行い、実験例11では実験例9と同じ工程を行った。
図4に示すように、実験例8~実験例11のいずれにおいても、電気抵抗率の低い方が、LPD密度が大きくなった。
実験例8~実験例11における最大のLPD密度は、実験例8が約30個/cm2、実験例9が3個/cm2、実験例10が2.5個/cm2、実験例11が0.3個/cm2であった。このことから、冷却工程における570℃±70℃での滞在時間を50分以下にすることで、エピタキシャルシリコンウェーハのエピタキシャル膜表面におけるLPD密度を2.5個/cm2以下にすることができることがわかった。また、さらにアルゴンアニール処理を行うことで、エピタキシャルシリコンウェーハのエピタキシャル膜表面におけるLPD密度を0.3個/cm2にすることができることがわかった。
570℃±70℃での滞在時間が50分を超えていても、実験例9のようにアルゴンアニール処理を行えば、LPD密度を実験例10とほぼ同等にすることができることがわかった。なお、実験例10では、アルゴンアニール処理が不要な分、簡単な処理でLPD密度が低減されたエピタキシャルシリコンウェーハを製造することができることがわかった。
以下、本発明の実施形態を、図面を参照して説明する。
〔単結晶引き上げ装置の構成〕
まず、単結晶引き上げ装置の構成について説明する。
単結晶引き上げ装置1は、CZ法に用いられる装置であって、図5に示すように、単結晶引き上げ装置本体3と、図示しないドーピング装置と、図示しない制御部とを備える。
単結晶引き上げ装置本体3は、チャンバ30と、前記チャンバ30内に配置された坩堝31と、前記坩堝31に熱を放射して加熱する加熱部32と、引き上げ部としての引き上げケーブル33と、断熱筒34と、シールド36とを備える。
加熱部32は、坩堝31の外側に配置されており、坩堝31を加熱して、坩堝31内の多結晶のシリコンを融解する。
引き上げケーブル33は、例えば坩堝31の上部に配置された図示しない引き上げ駆動部に、一端が接続されている。引き上げケーブル33は、他端に、種子結晶を保持するシードホルダ38、または、図示しないドーピング装置が適宜取り付けられる。引き上げケーブル33は、引き上げ駆動部の駆動により回転可能に構成されている。前記引き上げケーブル33は、制御部による引き上げ駆動部の制御により、所定の引き上げ速度で上昇する。
断熱筒34は、坩堝31および加熱部32の周囲を取り囲むように配置されている。
シールド36は、加熱部32から上方に向かって放射される輻射熱を遮断する熱遮蔽用シールドである。前記シールド36は、シリコン融液4の表面を覆うように設置されている。前記シールド36は、下端側の開口部が上端側の開口部より小さくなった円錐形状となっている。
制御部は、作業者の設定入力に基づいて、チャンバ30内のガス流量、炉内圧力、引き上げケーブル33の引き上げ速度を適宜制御して、シリコン単結晶6製造時の制御を行う。
次に、単結晶引き上げ装置1を用いて、直径が210mmのシリコン単結晶6を製造する方法の一例について説明する。
単結晶引き上げ装置1は、制御部の制御により、ポリシリコン素材を加熱して融解させる。その後、単結晶引き上げ装置1は、制御部の制御により、チャンバ30内のガス流量および炉内圧力を所定の状態にして、シリコン融液4に揮発性ドーパントとしての赤リンを添加してドーパント添加融液41を生成する。
エピタキシャルシリコンウェーハのミスフィット転位を抑制するために、赤リンとともにゲルマニウムを添加してもよい。また、赤リンの添加量は、シリコン単結晶6から切り出したシリコンウェーハの電気抵抗率が、0.5mΩ・cm以上0.7mΩ・cm未満となるような量である。
前記冷却工程の条件は、シリコン単結晶6の直胴部62の少なくとも一部の領域における温度が570℃±70℃の範囲内となる時間を10分以上50分以下とするための条件である。例えば、実験例2~実験例7の条件を用いた場合、570℃±70℃での滞在時間は、図2に示すようになる。
前記シリコンウェーハを1200℃の水素雰囲気中で30秒以上加熱すると、前記シリコンウェーハの表面においてKLA-Tencor社製SP-1のDCNモードで測定される90nm以上のLPDであって、SFに起因するLPDの密度は、2.5個/cm2以下となる。すなわち、シリコンウェーハの表面に発生するピットの密度は2.5個/cm2以下となる。
次に、上述の製造方法で製造されたシリコン単結晶6から、図示しないエピタキシャルシリコンウェーハを製造する方法について説明する。
まず、シリコン単結晶6からシリコンウェーハを切り出した(ウェーハ切り出し工程)後、前記切り出したシリコンウェーハの表層から酸素をアニールアウトするために、シリコンウェーハの水素ベーク処理を行う(水素ベーク工程)。
ここで、水素ベーク処理は、1150℃以上1200℃以下の水素雰囲気中で行われ、処理時間は30秒以上(例えば最短の30秒間)である。
水素ベーク処理の後に、CVD(Chemical Vapor Deposition)法によりシリコンウェーハ上にエピタキシャル膜を形成する(エピタキシャル膜形成工程)。ここで、エピタキシャル成長のプロセス温度は、1000℃以上1150℃以下の範囲内であり、望ましくは、1050℃以上1080℃以下の範囲内である。
水素ベーク工程前のシリコンウェーハに対し、アルゴンアニール処理を行う(アルゴンアニール工程)ことが好ましい。アルゴンアニール処理は、1200℃以上1220℃以下のアルゴンガス雰囲気中で行われ、処理時間は60分以上120分以下である。
特に、アルゴンアニールを行うことで、エピタキシャル膜表面におけるLPD密度をさらに低減でき、0.3個/cm2以下にすることができる。
本発明は上記実施形態にのみ限定されるものではなく、本発明の要旨を逸脱しない範囲内において種々の改良ならびに設計の変更などが可能である。
テール部がドーパント添加融液41から切り離れる前に加熱部32のパワーを、前記冷却工程の開始直前の加熱部のパワーの50%以下にしてもよいが、この場合、加熱部32のパワーをダウンしてからテール部をドーパント添加融液41から切り離すまでの時間を、10分以内にすることが好ましい。加熱部32のパワーをダウンしてからテール部をドーパント添加融液41から切り離すまでの時間が10分を超える場合、ドーパント添加融液41の温度が下がり、融液表面が凝固して形成された不要なシリコンがテール部に付着する危険性があるためである。
この際、まず、70kgのポリシリコン素材を用いて、揮発性ドーパントとしての赤リンが添加されたドーパント添加融液41を生成してから、シリコン単結晶6を引き上げる。
これに対して、図6に示す製造方法では、寸法が上記実施形態よりも短いシリコン単結晶6を製造することで、テール部形成工程が終了して冷却工程に入るときに、シリコン単結晶6全体を570℃±70℃よりも高い温度にすることができる。上述の状態からシリコン単結晶6全体を急激に冷却することで、570℃±70℃となる時間を、図3の実験例2、実験例3、実験例5、実験例6における領域A、または、実験例4における領域B、または、実験例7における領域Cと同様に短くすることができると考えられる。
その結果として、シリコン単結晶6の温度が570℃±70℃の範囲内となる時間が10分以上50分以下となり、LPDの発生をシリコン単結晶の長さ方向全長にわたってさらに抑制することができる。
ここで、最後に製造するシリコン単結晶6以外の冷却工程の間、炉内圧力を13.3kPa以上、60kPa以下に調整することが好ましい。このように炉内圧力を調整することが好ましい理由は、上記実施形態で説明した理由と同じである。
ここで、2本のシリコン単結晶6を製造する場合、1本目のシリコン単結晶6を引き上げた後の冷却工程の間、炉内圧力を13.3kPa以上、60kPa以下に調整することが好ましい。このように炉内圧力を調整することが好ましい理由は、上記実施形態で説明した理由と同じである。
例えば、初期段階として、157kgのドーパント添加融液41をチャージして、31kgのシリコン単結晶6を5回連続で引き上げる方法を適用してもよい。このような方法によっても、シリコン単結晶6の温度が570℃±70℃の範囲内となる時間を10分以上50分以下とすることができる。
マルチ引き上げ法や抜き取り引き上げ法の冷却工程において、上記実施形態や上記変形例のように、加熱部32のパワーを、前記冷却工程の開始直前の加熱部のパワーの50%以下にした状態でシリコン単結晶6を上昇させてもよい。しかし、次のシリコン単結晶6を製造する前に加熱部32のパワーを上げる必要があるため、加熱部32のパワーを下げずにシリコン単結晶6を上昇させることが好ましい。
単結晶引き上げ装置1にアフターヒーター51を配置しない状態において、例えば上記実験例1と同様の条件でシリコン単結晶6を製造した。そして、テール部がドーパント添加融液41から切り離れた時点での、各固化率における単結晶中心の温度分布を調べた。その結果を、図8に一点鎖線で示す。さらに、各固化率における570℃±70℃での滞在時間を調べた。その結果を、図9に一点鎖線で示す。
図5に二点鎖線で示す位置にアフターヒーター51を配置したこと以外は、上記実験例1と同様の条件でシリコン単結晶6を製造した。すなわち、直胴部形成工程において、シリコン単結晶6をアフターヒーター51で加熱することでシリコン単結晶6の温度の下降を抑制しながら前記シリコン単結晶6を製造した。そして、各固化率における単結晶中心の温度分布および570℃±70℃での滞在時間を調べた。それぞれの結果を、図8および図9に実線で示す。
Claims (8)
- チャンバと、
前記チャンバ内に配置され、シリコン融液に赤リンを添加したドーパント添加融液を収納可能な坩堝と、
種子結晶を前記ドーパント添加融液に接触させた後に引き上げる引き上げ部とを備えた単結晶引き上げ装置を利用したシリコン単結晶の製造方法であって、
前記シリコン単結晶の電気抵抗率が0.5mΩ・cm以上0.7mΩ・cm未満となるように、前記シリコン融液に前記赤リンを添加し、前記シリコン単結晶の直胴部の少なくとも一部の領域における温度が570℃±70℃の範囲内となる時間が10分以上50分以下となるように、前記シリコン単結晶を引き上げることを特徴とするシリコン単結晶の製造方法。 - チャンバと、
前記チャンバ内に配置され、シリコン融液に赤リンを添加したドーパント添加融液を収納可能な坩堝と、
前記坩堝を加熱する加熱部と、
種子結晶を前記ドーパント添加融液に接触させた後に引き上げる引き上げ部とを備えた単結晶引き上げ装置を利用したシリコン単結晶の製造方法であって、
前記シリコン単結晶の電気抵抗率が0.5mΩ・cm以上0.7mΩ・cm未満となるように、前記シリコン融液に前記赤リンを添加し、前記シリコン単結晶を引き上げる単結晶形成工程と、
前記シリコン単結晶を冷却する冷却工程とを備え、
前記冷却工程は、前記シリコン単結晶を前記ドーパント添加融液から切り離した後、180分以内に前記シリコン単結晶を400mm以上上昇させることを特徴とするシリコン単結晶の製造方法。 - 請求項2に記載のシリコン単結晶の製造方法において、
前記冷却工程は、前記加熱部のパワーを、前記冷却工程の開始直前の加熱部のパワーの50%以下にした状態で前記シリコン単結晶を上昇させることを特徴とするシリコン単結晶の製造方法。 - 請求項1から請求項3のいずれか一項に記載のシリコン単結晶の製造方法で製造されたシリコン単結晶からシリコンウェーハを切り出すウェーハ切り出し工程と、
前記シリコンウェーハを水素雰囲気中で加熱する水素ベーク工程と、
前記シリコンウェーハ上にエピタキシャル膜を形成するエピタキシャル膜形成工程とを備えていることを特徴とするエピタキシャルシリコンウェーハの製造方法。 - 請求項4に記載のエピタキシャルシリコンウェーハの製造方法において、
前記水素ベーク工程前の前記シリコンウェーハに対して、1200℃以上1220℃以下のアルゴンガス雰囲気中で60分以上120分以下の熱処理を行うアルゴンアニール工程を備えていることを特徴とするエピタキシャルシリコンウェーハの製造方法。 - 赤リンを含有し、電気抵抗率が0.5mΩ・cm以上0.7mΩ・cm未満のシリコン単結晶であって、
前記シリコン単結晶から切り出されたシリコンウェーハに対して1200℃の水素雰囲気中で30秒間加熱する熱処理を施した後に測定した、前記シリコンウェーハの表面における90nm以上のLPDの密度が2.5個/cm2以下である結晶領域を含む直胴部を有することを特徴とするシリコン単結晶。 - 請求項6に記載のシリコン単結晶の前記直胴部における前記結晶領域から切り出されたシリコンウェーハと、
前記シリコンウェーハ上に設けられたエピタキシャル膜とを備え、前記エピタキシャル膜の表面におけるLPDの密度が2.5個/cm2以下であることを特徴とするエピタキシャルシリコンウェーハ。 - 請求項6に記載のシリコン単結晶の前記直胴部における前記結晶領域から切り出されたシリコンウェーハと、
前記シリコンウェーハ上に設けられたエピタキシャル膜とを備え、前記エピタキシャル膜の表面におけるLPDの密度が0.3個/cm2以下であることを特徴とするエピタキシャルシリコンウェーハ。
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JP2007119332A (ja) * | 2005-09-27 | 2007-05-17 | Toshiba Ceramics Co Ltd | シリコンウエハの製造方法 |
WO2014175120A1 (ja) * | 2013-04-24 | 2014-10-30 | Sumco Techxiv株式会社 | 単結晶の製造方法およびシリコンウェーハの製造方法 |
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KR102413304B1 (ko) | 2022-06-24 |
US20200135460A1 (en) | 2020-04-30 |
DE112018002163T5 (de) | 2020-01-02 |
JP6897764B2 (ja) | 2021-07-07 |
JPWO2018198797A1 (ja) | 2020-02-27 |
CN110730831A (zh) | 2020-01-24 |
KR20190124801A (ko) | 2019-11-05 |
KR20210122914A (ko) | 2021-10-12 |
KR102311321B1 (ko) | 2021-10-08 |
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