WO2018198594A1 - Pilote de del, et dispositif de circuit d'attaque de del et équipement électronique utilisant ledit pilote de del - Google Patents

Pilote de del, et dispositif de circuit d'attaque de del et équipement électronique utilisant ledit pilote de del Download PDF

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Publication number
WO2018198594A1
WO2018198594A1 PCT/JP2018/010704 JP2018010704W WO2018198594A1 WO 2018198594 A1 WO2018198594 A1 WO 2018198594A1 JP 2018010704 W JP2018010704 W JP 2018010704W WO 2018198594 A1 WO2018198594 A1 WO 2018198594A1
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Prior art keywords
led
voltage
output
terminal
current
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PCT/JP2018/010704
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English (en)
Japanese (ja)
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幸司 桂
泰典 村松
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ローム株式会社
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the present invention relates to an LED driver for driving an LED (Light Emitting Diode).
  • LEDs are widely used, such as liquid crystal panels, lighting devices, traffic lights, various light sources, and the like.
  • a switching regulator is used in combination with these various devices, and this switching regulator is controlled by a PWM (Pulse Width Modulation) method.
  • PWM Pulse Width Modulation
  • LEDs are often PWM controlled.
  • Patent Document 1 discloses a semiconductor integrated circuit for power supply control that drives a switching element that causes a current to flow intermittently through an inductor, and rectifies the current flowing through the inductor to generate a drive current for the LED.
  • the power control semiconductor integrated circuit includes a plurality of external terminals that draw current from each of the plurality of LED units, a plurality of current sources respectively connected to the plurality of external terminals, and voltages of the plurality of external terminals And an error amplifier that outputs a voltage corresponding to the potential difference from the reference voltage. Then, a drive pulse for the switching element is generated based on the output corresponding to the output having the lowest voltage at the external terminal among the plurality of outputs of the error amplifier. According to this, it is possible to suppress an increase in the number of components and mounting area due to the increase in the number of LEDs, and to avoid occurrence of unevenness in the brightness of the screen.
  • Patent Document 2 discloses a drive circuit for a light-emitting element, and a light-emitting device and an electronic apparatus using the drive circuit.
  • Patent document 2 stabilizes the brightness
  • the error amplifier generates a source current corresponding to the error when the reference voltage is higher, based on the error between the lowest voltage among the voltages of each of the n LED terminals and the predetermined reference voltage. When the voltage is lower, a sink current corresponding to the error is generated, and the feedback voltage generated at the feedback terminal is changed.
  • Patent Document 1 generates a drive pulse corresponding to the voltage of an external terminal provided in a plurality of LED units and applies it to a switching element, it cannot be expected to stabilize the luminance of the plurality of LED units. This is because the detection of the voltage at the external terminal is different from the application of an appropriate voltage to the plurality of LED units.
  • the feedback voltage generated at the feedback terminal is changed by the sink current or source current output from the transconductance amplifier to control the drive voltage applied to the light emitting element. Therefore, the luminance of the light emitting element can be stabilized.
  • the feedback terminal in Patent Document 2 is an external terminal to which the output side of the error amplifier, that is, the feedback capacitor (CFB) for phase compensation and the feedback resistor (RFB) are connected in series. Therefore, it cannot be expected to control the output voltage with high accuracy, and it cannot be expected to control the stabilization of the luminance of the LED with high accuracy.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide an LED driver capable of further stabilizing the luminance of a light emitting element used in an LED drive circuit device.
  • One aspect of the LED driver according to the present invention includes a switching element that allows current to flow intermittently through an inductor, smoothing means that smoothes the inductor current flowing through the inductor and outputs a predetermined output voltage to an output terminal, and the output
  • a feedback voltage generation circuit for generating a feedback voltage obtained by dividing the voltage, and a switching regulator characterized by varying the output voltage according to the feedback voltage, and using the output voltage as a drive voltage source, a plurality of A plurality of LED strings connected in series, and an LED driver capable of being connected to the LED string,
  • the LED constant current source connected to each of the plurality of LED strings via an LED connection terminal, and the LED connection terminal of the LED string having the highest total LED forward voltage among the plurality of LED strings is subsequently detected.
  • a selection unit that selects as the LED connection terminal for use, and a comparison unit that compares the voltage of the LED connection terminal for detection and the first reference voltage, and transforms the feedback voltage based on the output of the comparison unit ( First configuration).
  • the feedback voltage generation circuit includes a first voltage dividing resistor connected to the output terminal and a second voltage dividing resistor connected to the ground potential and connected in series with the first voltage dividing resistor. It is good also as comprised by (2nd structure).
  • an operational amplifier having the selection unit and the comparison unit is provided, and an output of the operational amplifier is coupled to a common connection node of the first voltage dividing resistor and the second voltage dividing resistor. It is good also as a thing (3rd structure).
  • the operational amplifier when the voltage of the detection LED connection terminal is lower than the first reference voltage, the operational amplifier causes a sink current to flow from the common connection node to the ground potential.
  • the feedback voltage may be stepped down (fourth configuration).
  • a third voltage dividing resistor is connected between the common connection node and the output side of the operational amplifier, and the third voltage dividing resistor is connected in parallel with the second voltage dividing resistor. It is good also as a thing (5th structure).
  • the operational amplifier may be a transconductance amplifier (sixth configuration).
  • the transconductance amplifier has a sink current from the common connection node to the output stage of the transconductance amplifier when the voltage of the detection LED connection terminal is lower than the first reference voltage.
  • the feedback voltage may be stepped down by flowing (seventh configuration).
  • the transconductance amplifier when the voltage of the detection LED connection terminal is higher than the first reference voltage, the transconductance amplifier has a source current from the output stage of the transconductance amplifier to the common connection node side. May be supplied to boost the feedback voltage (eighth configuration).
  • a source current supply for switching on / off of a source current flowing into a common connection node of the first voltage dividing resistor and the second voltage dividing resistor in accordance with the output of the comparator serving as the comparison unit It is good also as having a part (9th structure).
  • the source current supply unit includes a switch that is turned on / off according to an output of the comparator, a constant current circuit connected to the switch, and a current mirror circuit,
  • the switch may be connected between both ends of one transistor in the current mirror circuit (tenth configuration).
  • the selection unit includes at least one other driver connection terminal capable of connecting another LED driver and a minimum voltage output terminal, and the selection unit includes the detection LED connection terminal. And the voltage of the other driver connection terminal may be selected and output to the comparison unit and the lowest voltage output terminal (eleventh configuration).
  • the LED constant current source may generate current intermittently by a first pulse width modulation signal (a twelfth configuration).
  • An aspect of the LED drive circuit device is an LED drive circuit device comprising the LED driver having any one of the above configurations, the switching regulator, and the LED string.
  • the switching regulator further includes a slope signal generation circuit, an error amplifier, and a PWM comparator,
  • the slope signal generation circuit generates a triangular or sawtooth slope signal
  • the error amplifier compares the feedback voltage with a second reference voltage, and outputs a difference voltage as an error voltage
  • the PWM comparator The error voltage and the slope signal are compared, a second pulse width modulation signal having a pulse width corresponding to the pulse comparison result is output, and the switching element is turned on or off by the second pulse width modulation signal. Controlled.
  • the luminance of the LED string is controlled by the switching regulator that converts the input voltage into a predetermined output voltage by the second pulse width modulation signal, and the first pulse width modulation signal.
  • the switching regulator that converts the input voltage into a predetermined output voltage by the second pulse width modulation signal, and the first pulse width modulation signal.
  • the lowest voltage among the plurality of LED strings to which the drive voltage is applied is compared with the predetermined reference voltage, and the magnitude of the feedback voltage generated by the feedback voltage generation circuit based on the comparison result. Since the drive voltage supplied to the LED string is controlled by controlling the height, it can be adjusted to an output voltage suitable for the voltage drop in the LED string, the brightness of the LED string is maintained at a predetermined brightness, and the output of the switching regulator The problem that the output voltage of the terminal becomes higher than necessary and the power consumption in the LED drive circuit device increases can be eliminated.
  • 1 is a circuit diagram showing an LED drive circuit device according to a first embodiment of the present invention.
  • 2 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 1 is driven by a PWM signal having a relatively wide pulse width.
  • 2 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 1 is driven by a PWM signal having a relatively narrow pulse width.
  • It is a circuit diagram which shows the LED drive circuit device which concerns on the 2nd Embodiment of this invention.
  • 3 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 2 is driven by a PWM signal having a relatively wide pulse width. 3 shows signal waveforms of main nodes when the LED drive circuit device of FIG.
  • FIG. 2 is driven by a PWM signal having a relatively narrow pulse width.
  • FIG. 6 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 5 is driven by a PWM signal.
  • FIG. 5 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 5 is driven by a PWM signal.
  • FIG. 5 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 5 is driven by a PWM signal.
  • FIG. 5 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 5 is driven by a PWM signal.
  • FIG. 5 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 5 is driven by a PWM signal.
  • FIG. 5 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 5 is driven by a PWM signal.
  • FIG. 5 shows signal waveforms of main nodes when the LED drive circuit device of FIG. 5 is driven by a PWM signal.
  • FIG. 1 shows an LED drive circuit device 1 according to a first embodiment of the present invention.
  • the LED drive circuit device 1 includes a switching control circuit 2, an output circuit 3, an LED driver (constant current driver) 5, and LED strings 4_1 to 4_n (n is a natural number of 2 or more).
  • the output circuit 3 includes an output voltage Vout, an inductor L1, a capacitor C1, and voltage dividing resistors R1 and R2.
  • the switching control circuit 2 and the output circuit 3 constitute a switching regulator.
  • the switching control circuit 2 steps down the input voltage Vin supplied to the input terminal IN in cooperation with the output circuit 3 and outputs a desired output voltage Vout to the output terminal OUT.
  • the switching control circuit 2 and the output circuit 3 can be configured not to be a step-down type but to be a step-up type or a step-up / step-down type.
  • the LED driving circuit device according to the present invention can be applied regardless of the step-down type, step-up type or step-up / down type switching regulator.
  • the switching control circuit 2 is composed of a semiconductor integrated circuit, and includes a switching element S1, a synchronous rectification semiconductor element S2, an error amplifier 6, an oscillation circuit 7, a slope signal generation circuit 8, a PWM comparator 9, and a drive circuit 10.
  • the switching element S1 is a switching element that causes a current to flow intermittently through the inductor L1, and the synchronous rectification semiconductor element S2 and the switching element S1 operate in a complementary manner. A current is supplied to the inductor L1 when the switching element S1 is off.
  • the switching element S1 and the synchronous rectification semiconductor element S2 are turned on / off in order to generate the output voltage Vout from the input voltage Vin.
  • the synchronous rectification semiconductor element S2 can be replaced with a diode instead of a transistor.
  • an input voltage Vin, an inductor L1, capacitors C1 to C2, voltage dividing resistors R1 to R3, a resistor R4, and a ground potential GND are connected to a plurality of external terminals prepared in the switching control circuit 2.
  • the input terminal IN to which the input voltage Vin is applied is connected to the source of the switching element S1 composed of a p-channel MOS transistor, for example.
  • the drain of the switching element S1 is connected to the switching terminal SW and the drain of the synchronous rectification semiconductor element S2.
  • the source of the synchronous rectification semiconductor element S2 composed of an n-channel MOS transistor is connected to the ground potential GND.
  • the inductor L1 is connected to the switching terminal SW.
  • the inductor current IL flows through the inductor L1 due to the intermittent switching voltage Vsw output from the switching terminal SW.
  • the other end of the inductor L1 is connected to the output terminal OUT and one end of the capacitor C1, and is connected to the output terminal OUT.
  • the other end of the capacitor C1 is grounded to the ground potential GND.
  • Capacitor C1 smoothes the electromagnetic energy accumulated in inductor L1.
  • the voltage dividing resistors R1 and R2 constituting part of the output circuit 3 are connected in series between the output terminal OUT and the ground potential GND to constitute a feedback voltage generation circuit.
  • the feedback voltage generation circuit generates a feedback voltage Vfb at the common connection node Nc of the voltage dividing resistor R1 and the voltage dividing resistor R2.
  • the feedback voltage Vfb is applied to the inverting input terminal ( ⁇ ) of the error amplifier 6 via the feedback terminal FB.
  • the error amplifier 6 compares the feedback voltage Vfb with the first reference voltage Vt1, and outputs an error signal Verr corresponding to the comparison result.
  • a phase compensation terminal COMP is prepared for the signal path of the output of the error amplifier 6 and the inverting input terminal ( ⁇ ) of the PWM comparator 9.
  • a capacitor C2 and a resistor R4 are connected in series between the phase compensation terminal COMP and the ground potential GND.
  • the voltage gain of the error amplifier 6 is set by the capacitor C2 and the resistor 4.
  • the error amplifier 6 is composed of a transconductance amplifier, for example.
  • the capacitor C2 and the resistor R4 connected in series between the phase compensation terminal COMP and the ground potential GND determine the voltage gain of the error amplifier 6 and also determine the phase characteristic of the switching regulator.
  • the frequency characteristic of the switching regulator composed of the switching regulator control circuit 2 and the output circuit 3 is appropriately corrected by the capacitor C2 and the resistor R4.
  • the oscillation circuit 7 is composed of, for example, a well-known CR oscillator, or a ring oscillator in which inverters or differential amplifiers are connected in a ring shape.
  • the oscillation circuit 7 generates a clock signal CLK.
  • the clock signal CLK is used as a set signal Sset in the drive circuit 10 at the subsequent stage.
  • the slope voltage generation circuit 8 is composed of, for example, a constant current source (not shown), a capacitor, a switching element, and the like, and generates a triangular or sawtooth slope voltage Vsl. Such a slope voltage Vsl is generated by the clock signal CLK applied from the oscillation circuit 7.
  • the PWM comparator 9 compares the error signal Verr and the slope signal Vsl, and outputs a reset signal Sreset corresponding to the comparison result to the drive circuit 10 at the subsequent stage.
  • the reset signal Sreset is output as a pulse width modulation (PWM) signal whose pulse width is modulated according to the error signal Verr.
  • PWM pulse width modulation
  • the driving circuit 10 receives the set signal Sset and the reset signal Sreset, and drives the switching element S1 and the synchronous rectification semiconductor element S2. These are driven by complementary gate signals P1 and P2, respectively.
  • An RS flip-flop (not shown), for example, is prepared inside the drive circuit 10, and a set signal Sset generated by the oscillation circuit 7 is output to the set terminal of the RS flip-flop, and output from the PWM comparator 9 to the reset terminal.
  • the reset signal Sreset is applied.
  • the LED drive circuit device 1 shown in FIG. 1 includes a plurality of LED strings 4_1 to 4_n in addition to the circuit configuration described above.
  • the LED strings 4_1 to 4_n are used as light sources and display devices for liquid crystal panels, lighting devices, traffic signals, and other various electronic devices.
  • the output voltage Vout generated by the switching regulator is supplied as a drive voltage source to the common anode side of the LED strings 4_1 to 4_n, that is, the output terminal OUT.
  • the LED forward total voltages up to the LED strings 4_1, 4_2, and 4_n are indicated by Vf1, Vf2, and Vfn, respectively.
  • the LED driver 5 supplies LED current to each LED string.
  • the LED driver 5 is composed of a semiconductor integrated circuit (IC) different from the switching control circuit 2 in order to provide versatility. Accordingly, versatility can be expanded by combining the LED string, the switching control circuit, and the output circuit in various ways.
  • the LED driver 5 is provided with LED connection terminals LED1 to LEDn for coupling to the cathode sides of the LED strings 4_1 to 4_n.
  • the LED terminal voltages generated at the LED connection terminals LED1, LED2, and LEDn viewed from the ground potential GND are indicated by VLED1, VLED2, and VLEDn, respectively.
  • the LED driver 5 has LED constant current sources Cs1 to Csn that supply LED currents ILED1 to ILEDn to the LED strings, respectively.
  • the LED constant current sources Cs1 to Csn are intermittently controlled by a pulse width modulation (PWM) signal applied from the PWM dimming means 11, for example. Such control is also called burst dimming or burst control.
  • PWM pulse width modulation
  • the constant current sources Cs1 to Csn do not need to be burst dimming or burst control, and may be configured by a general constant current source circuit.
  • the LED driver 5 further includes an operational amplifier 12.
  • the input of the operational amplifier 12 is provided with (n + 1) input terminals obtained by adding a terminal for applying a reference voltage VREF to the number output to each of the LED connection terminals LED1 to LEDn.
  • a reference voltage VREF is applied to the inverting input terminal ( ⁇ ) of the operational amplifier 12.
  • the LED terminal voltages VLED1 to VLEDn are applied to at least two non-inverting input terminals (+).
  • the operational amplifier 12 compares the lowest LED terminal voltage among the LED terminal voltages VLED1 to VLEDn with respect to the ground potential GND with the reference voltage VREF, and outputs the comparison result to the subsequent transistor Tr1.
  • the transistor Tr1 is connected to the output of the operational amplifier 12.
  • the transistor Tr1 is composed of, for example, a bipolar transistor, and its emitter is taken out to the ground potential GND, and its collector is taken out to the external terminal OPFB.
  • Such a circuit configuration of the transistor Tr1 can be called a generally well-known open collector.
  • the transistor Tr1 may be a MOS transistor and may have an open drain circuit configuration.
  • the transistor Tr1 is turned on when the output of the operational amplifier 12 becomes a high level H, and as a result, a sink current Isi flows.
  • the transistor Tr1 is turned on, the potential of the external terminal OPFB becomes a low level L that is substantially close to the ground potential GND.
  • the LED driver 5 also has an OR circuit 51.
  • the OR circuit 51 receives pulse width modulation signals PWM1 to PWMn.
  • the output of the OR circuit 51 is input to the operational amplifier 12.
  • the output of the OR circuit 51 is at a high level.
  • the output of the OR circuit 51 is at a low level.
  • the operational amplifier 12 turns off the transistor Tr1 when the output of the OR circuit 51 is at a low level, and turns off the transistor Tr1 when the output of the OR circuit 51 is at a high level, and the lowest LED terminal voltage and the reference voltage VREF among the LED terminal voltages VLED1 to VLEDn.
  • the comparison result is output to the transistor Tr1.
  • One end of the voltage dividing resistor R3 is connected to the external terminal OPFB, and the other end is connected to the feedback terminal FB.
  • the voltage dividing resistor R3 is connected in parallel with the voltage dividing resistor R2 when the transistor Tr1 is turned on, that is, when the external terminal OPFB is at the low level L.
  • the resistance value of the voltage dividing resistor R3 is selected to be sufficiently larger than the on-resistance of the transistor Tr1.
  • the feedback voltage Vfb at the feedback terminal FB is lower than when the transistor Tr1 is off, and at this time, the output voltage Vout is controlled to increase by the switching regulator composed of the switching control circuit 2 and the output circuit 3. .
  • the PWM dimming means 11 controls the output voltage Vout by increasing it intermittently.
  • heat generation in the LED strings 4_1 to 4_n can be suppressed.
  • the LED string may not light up due to a delay in the increase of the output voltage Vout.
  • the transistor Tr1 only controls the so-called sink current that draws current from the feedback terminal FB side toward the external terminal OPFB. Therefore, the output voltage Vout is controlled by the LED voltage. Only one of the VLED1 to VLEDn reaches the reference voltage VREF and can only be controlled to increase the output voltage Vout.
  • the LED forward total voltage Vf_max and the voltage at the LED connection terminal LED_i are LED terminal voltage VLED_min.
  • Vout Vf_max + VLED_min (1)
  • the LED forward total voltages Vf1 to Vfn of the LED strings 4_1 to 4_n vary for each channel.
  • the LED forward total voltage Vf_max in the LED string 4_i is the maximum LED forward total voltage.
  • the LED terminal voltage VLED_min becomes the minimum LED terminal voltage.
  • the maximum LED forward total voltage Vf_max, the minimum LED terminal voltage VLED_min, and the LED current ILEDi flow for the LED string 4_i among the LED strings 4_1 to 4_n.
  • FIG. 2A shows a timing chart when the LED drive circuit device 1 is driven at a relatively large on-duty ratio such that the on-duty ratio of the PWM signal is about 70%, for example.
  • 2A is a timing chart when the output voltage Vout is controlled only by the sink current as described with reference to FIG.
  • FIG. 2A (a) shows a pulse width modulation signal PWMi applied from the PWM dimming means 11 of the LED driver 5 to the LED constant current sources Cs1 to Csn.
  • the pulse width modulation signal PWMi is at a high level H at times t0 to t4 and at a low level L at times t4 to t6. This indicates that the high-level H section TH is longer than the low-level L section TL, and the so-called pulse duty ratio is a relatively large signal.
  • the LED current ILEDi follows the high level H and the low level L of the pulse width modulation signal PWMi. From time t0 to t4, current flows in the high level H section, and from time t4 to t6, current does not flow in the low level L section, so that current flows intermittently. In the period from time t0 to t1, the LED current ILEDi starts to flow slightly slowly.
  • FIG. 2A (c) shows the LED terminal voltage VLED_min, which is the voltage of the LED connection terminal LED_i.
  • VLED_min the voltage of the LED connection terminal LED_i.
  • the voltage suddenly becomes lower than the reference voltage VREF, and thereafter the voltage is gradually increased in the period up to the time t3. This is because the LED current ILEDi flows through the LED string 4_i at the time t0, and at the same time, the voltage decreases by the LED forward total voltage Vf_max.
  • feedback is applied by the operational amplifier 12 so that the LED terminal voltage VLED_min becomes the reference voltage VREF.
  • the operation is performed so that the reference voltage VREF is maintained.
  • the LED terminal voltage VLED_min is boosted so as to follow the output voltage Vout.
  • a symbol Vsi in the figure indicates a sink current adjustment voltage that is adjusted by a sink current Isi described later.
  • FIG. 2A (d) shows the sink current Isi flowing from the feedback terminal FB to the transistor Tr1 via the sink current output terminal OPFB provided on the LED driver 5 side.
  • the sink current Isi flows according to the LED terminal voltage VLED_min is determined.
  • the LED terminal voltage VLED_min starts to flow when it falls below the reference voltage VREF, and increases as the LED terminal voltage VLED_min approaches the reference voltage VREF.
  • the LED terminal voltage VLED_min reaches the reference voltage VREF at time t3
  • a constant sink current Isi flows until time t4. Since the output of the OR circuit 51 is at a low level from time t4 to t6, which is the section TL, the transistor Tr1 is turned off by the operational amplifier 12, and the sink current Isi stops flowing.
  • FIG. 2A (e) shows the transition state of the output voltage Vout.
  • the output voltage Vout responds to the behavior of the sink current Isi. From time t0 to t2, the sink current Isi acts to increase the output voltage Vout. The time from t0 to t2 is determined by the response of the previous stage regulator and the operational amplifier 12. From time t2 to t4, the control effect on the output voltage Vout by the sink current Isi reaches the maximum, and the output voltage Vout is controlled to have a magnitude of (VREF + Vf_max) obtained by adding the LED forward total voltage Vf_max to the reference voltage VREF. The The voltage drops steeply from time t4 to t5, and gradually drops from time t5 to t6.
  • the output voltage Vout varies according to the high level and low level of the pulse width modulation signal PWMi. This is because the LED driver 5 in FIG. 1 operates in the high level section of the pulse width modulation signal PWMi and stops in the low level section of the pulse width modulation signal PWMi. As a result, the output voltage Vout varies as the feedback voltage Vfb varies.
  • Vout (R1 + R2) ⁇ Vfb / R2 (3) That is, from the equations (2) and (3), when the pulse width modulation signal PWMi is at a high level, the output voltage Vout is boosted to a voltage of (VREF + Vf_max). For this reason, the output voltage Vout at times t4 to t5 drops sharply.
  • each waveform operation at time t0 to t6 similarly changes from time t6 to t12 and further after time t12.
  • the LED drive circuit device 1 shown in FIG. 1 can suppress heat generation in the LED string by boosting and controlling the output voltage Vout only when the pulse width modulation signal is at a high level.
  • FIG. 2B is a timing chart when the LED drive circuit device 1 is driven at a relatively small on-duty ratio such that the on-duty ratio of the PWM signal is about 2%, for example. Compared to the case where the on-duty ratio in FIG. 2A described above is relatively large, the driving conditions are not necessarily good.
  • 2B is a timing chart when the output voltage Vout is controlled only by the sink current Isi as in FIG. 2A.
  • FIG. 2B (a) shows a pulse width modulation signal PWMi applied from the PWM dimming means 11 of the LED driver 5 to the LED constant current sources Cs1 to Csn.
  • the pulse width modulation signal PWMi is at a high level H at times T0 to T2, and is at a low level L at times T2 to T4. This indicates that the so-called pulse duty ratio is a relatively small signal in which the high-level H section TH is shorter than the low-level L section TL.
  • the LED current ILEDi follows the high level H and the low level L of the pulse width modulation signal PWMi. From time T0 to T2, current flows in the high level H section, and in time T2 to T4, no current flows in the low level L section, so that current flows intermittently. In the section from time T0 to T1, the LED current ILEDi starts to flow slightly slowly.
  • FIG. 2B (c) shows the LED terminal voltage VLED_min, which is the voltage of the LED connection terminal LED_i.
  • VLED_min the voltage of the LED connection terminal LED_i.
  • the LED terminal voltage VLED_min becomes the reference voltage VREF.
  • the LED terminal voltage VLED_min does not reach the reference voltage VREF. This is because the pulse width of the pulse width modulation signal PWMi is narrow and the polarity of the pulse width modulation signal PWMi is inverted before the LED terminal voltage VLED_min reaches the reference voltage VREF.
  • the LED terminal voltage VLED_min is boosted so as to follow the output voltage Vout.
  • FIG. 2B (d) shows the sink current Isi flowing from the feedback terminal FB to the transistor Tr1 via the sink current output terminal OPFB provided on the LED driver 5 side.
  • the sink current Isi starts to flow when the LED terminal voltage VLED_min falls below the reference voltage VREF, and increases as the LED terminal voltage VLED_min approaches the reference voltage VREF. From time T2 to T4, the sink current Isi stops flowing and becomes zero.
  • FIG. 2B (e) shows the transition state of the output voltage Vout.
  • the output voltage Vout responds to the behavior of the sink current Isi.
  • the sink current Isi acts to increase the output voltage Vout from time T0 to T2.
  • the pulse width modulation signal PWMi becomes a low level, sharply decreases from time T2 to T3, and gradually decreases from time T3 to T4. This is because the response of the regulator in the previous stage cannot catch up because the width of the pulse width modulation signal PWMi is extremely narrow.
  • each waveform operation at times T0 to T4 similarly changes after time T4.
  • the LED drive circuit device 1 shown in FIG. 1 boosts and controls the output voltage Vout only when the pulse width modulation signal is at a high level.
  • the on-duty ratio of the pulse width modulation signal is low, the ability to adjust the output voltage Vout becomes insufficient. This causes a problem that the LED strings 4_1 to 4_n cannot maintain sufficient luminance.
  • FIG. 3 shows a second embodiment according to the present invention.
  • the LED drive circuit device 1A shown in FIG. 3 overcomes the above-described problems existing in the LED drive circuit device 1 shown in FIG.
  • the LED drive circuit device 1A is greatly different from the LED drive circuit device 1 in the circuit configuration of the LED driver 5A. More specifically, the LED driver 5A uses an operational amplifier 13.
  • the operational amplifier 13 is composed of a transconductance amplifier called OTA (Operator Transconductance Amp).
  • OTA has a high output impedance and outputs a current proportional to the difference between the two input voltages of OTA.
  • the output stage of the OTA employed in the present invention is configured by a push-pull method.
  • the push-pull method makes it possible to control the output voltage VOUT based on two currents: a source current that flows current from the operational amplifier 13 to the feedback terminal FB side and a sink current that draws current from the feedback terminal FB side to the operational amplifier 13 side.
  • the use of OTA in an LED drive circuit device is disclosed in Patent Document 2.
  • the sink current Isi that draws a constant current from the common connection node Nc side to the operational amplifier 13 side through the external terminal substantially reduces the voltage dividing resistor R2.
  • the LED driver 5A also has an OR circuit 51.
  • the OR circuit 51 receives pulse width modulation signals PWM1 to PWMn.
  • the output of the OR circuit 51 is input to the operational amplifier 13.
  • the operational amplifier 13 stops the current output when the output of the OR circuit 51 is low level, and outputs the current according to the comparison result between the LED terminal voltage VLED_min and the reference voltage VREF when the output of the OR circuit 51 is high level.
  • the switching control circuit 2 and the LED driver 5A are each constituted by different semiconductor integrated circuits (ICs), there are some combinations of these and the LED strings 4_1 to 4_n.
  • the output voltage Vout can be controlled based on the lowest voltage of the LED terminal voltages VLED1 to VLEDn without controlling the feedback voltage Vfb.
  • the current output terminal TCFB provided on the output side of the operational amplifier 13 may be connected to the phase compensation terminal COMP without being connected to the feedback terminal FB. In such a circuit configuration, the operational amplifier 13 replaces the error amplifier 6.
  • FIG. 4A is a timing chart when the LED drive circuit device 1A of FIG. 3 is driven with a relatively large on-duty ratio such that the on-duty ratio of the PWM signal is about 70%, for example. 4A is different from the timing charts of FIGS. 2A and 2B, the output voltage Vout is controlled by both the source current Iso and the sink current Isi.
  • FIG. 4A (a) shows the pulse width modulation signal PWMi applied to the LED constant current sources Cs1 to Csn from the PWM dimming means 11 of the LED driver 5A.
  • the pulse width modulation signal PWMi is at a high level H at times t0 to t2, and at a low level L at times t2 to t5.
  • the so-called pulse duty ratio is compared in which the high-level H section TH is longer than the low-level L section TL. Indicates a large signal.
  • the waveform of the pulse width modulation signal PWMi also changes in the same manner as in the times t0 to t5 after the times t5 to t9 and after the time t9.
  • the LED current ILEDi follows the high level H and the low level L of the pulse width modulation signal PWMi.
  • the LED current ILEDi flows so-called intermittently, in which the pulse width modulation signal PWMi from time t0 to t2 flows in the high level H section and does not flow in the low level L section from time t2 to t5. It should be noted that the waveform of the LED current ILEDi also changes in the same way as at times t0 to t5 after times t5 to t9 and after time t9.
  • FIG. 4A (c) shows the LED terminal voltage VLED_min which is the voltage of the LED connection terminal LED_i.
  • VLED_min sharply decreases by the LED forward total voltage Vf_max, but schematically shows that the voltage level is higher than the reference voltage VREF. Yes.
  • feedback is applied by the operational amplifier 13 so that the LED terminal voltage VLED_min becomes the same potential as the reference voltage VREF until time t1.
  • the reference voltage VREF is reached at time t1
  • the potential is manipulated so that the reference voltage VREF is maintained until time t2 when the LED current ILEDi becomes the low level L.
  • the LED terminal voltage VLED_min is boosted to the stable output voltage Vst so as to follow the output voltage Vout.
  • reference symbol Vf_max represents the LED forward total voltage
  • reference symbol Vso represents a source current adjustment voltage adjusted by the source current Iso.
  • the stable output voltage Vst is (VREF + Vso + Vf_max) obtained by adding the source current adjustment voltage Vso and the LED forward total voltage Vf_max to the reference voltage VREF.
  • the LED terminal voltage VLED_min shows a case where it is stepped down below the reference voltage VREF for some reason. Also at this time, feedback is applied by the operational amplifier 13 so that the LED terminal voltage VLED_min becomes the same potential as the reference voltage VREF. It should be noted that after time t9, the transition is made in the same manner as at times t0 to t5.
  • FIG. 4A (d) shows a sink current Isi that flows into the operational amplifier 13 via the current output terminal TCFB provided on the LED driver 5A side, and a source current Iso that flows from the operational amplifier 13 via the current output terminal TCFB, respectively.
  • the source current Iso begins to flow at time t0 when the LED terminal voltage VLED_min is higher than the reference voltage VREF, and increases as the reference voltage VREF approaches.
  • a constant source current Iso flows until time t2.
  • time t2 to t5 which is the section TL, the output of the OR circuit 51 becomes low level, and the operational amplifier 13 stops current output, so that the source current Iso does not flow and becomes zero.
  • FIG. 4A (e) shows the transition state of the output voltage Vout.
  • the output voltage Vout responds to the behavior of the sink current Isi or the source current Iso. From time t0 to t2, the output voltage Vout is operated so as to be maintained from the stable output voltage Vst to (VREF + Vf_max). When the pulse width modulation signal PWMi becomes low level at time t2, the output voltage Vout gradually increases from time t2 to time t4. From time t4 to t5, the stable output voltage Vst is maintained.
  • FIG. 4B is a timing chart when the LED drive circuit device 1A is driven at a relatively small on-duty ratio such that the on-duty ratio of the PWM signal is about 2%, for example.
  • the driving conditions are not necessarily in a good state as compared with the case where the on-duty ratio in FIG. 4A described above is relatively large, but the behavior differs from that in FIG.
  • FIG. 4B (a) shows a pulse width modulation signal PWMi applied to the LED constant current sources Cs1 to Csn from the PWM dimming means 11 of the LED driver 5A.
  • the pulse width modulation signal PWMi is at a high level H at times T0 to T1, and at a low level L at times T1 to T4. This indicates that the so-called pulse duty ratio is a relatively small signal in which the high-level H section TH is shorter than the low-level L section TL. Note that after time T4, the waveform of the pulse width modulation signal PWMi changes in the same manner as at times T0 to T4.
  • the LED current ILEDi follows the high level H and the low level L of the pulse width modulation signal PWMi.
  • the LED current ILEDi flows so-called intermittently, in which the pulse width modulation signal PWMi at times T0 to T1 flows in the high level H section and does not flow in the low level L sections from time T1 to T4. Note that after time T4, the waveform of the LED current ILEDi changes in the same manner as at times T0 to T4.
  • FIG. 4B (c) shows the LED terminal voltage VLED_min, which is the voltage of the LED connection terminal LED_i.
  • VLED_min the voltage of the LED connection terminal LED_i.
  • the voltage decreases steeply by the LED forward total voltage Vf_max, but since it is higher than the reference voltage VREF, it gradually decreases toward the reference voltage VREF during the time T0 to T1. This is because feedback is applied by the operational amplifier 13 so that the LED terminal voltage VLED_min becomes the reference voltage VREF.
  • the LED terminal voltage VLED_min does not reach the reference voltage VREF.
  • the pulse width of the pulse width modulation signal PWMi is narrow and the polarity of the pulse width modulation signal PWMi is inverted from the high level H to the low level L before the LED terminal voltage VLED_min reaches the reference voltage VREF. .
  • the stable output voltage Vst is maintained. Since the LED terminal voltage VLED_min is again higher than the reference voltage VREF in the period from time T4 to T5 in which the pulse width modulation signal PWMi is in the high level period, the source current Iso flows again.
  • Time T5 shows a state in which the LED terminal voltage VLED_min is sharply lower than the reference voltage VREF for some reason. Also at this time, feedback is applied by the operational amplifier 13 so that the LED terminal voltage VLED_min becomes the same potential as the reference voltage VREF. Therefore, the sink current Isi flows during the period from time T5 to T6. It should be noted that after time T8, transition is made in the same manner as times T0 to T4.
  • FIG. 4B (d) shows a sink current Isi that flows into the operational amplifier 13 via the current output terminal TCFB provided on the LED driver 5A side, and a source current Iso that flows from the operational amplifier 13 via the current output terminal TCFB, respectively.
  • the source current Iso starts to flow at time T0 when the LED terminal voltage VLED_min is higher than the reference voltage VREF, and increases as the reference voltage VREF approaches. From time T1 to T4, the source current Iso does not flow and becomes zero.
  • FIG. 4B (e) shows the transition state of the output voltage Vout.
  • the output voltage Vout responds to the behavior of the sink current Isi or the source current Iso. From time T0 to T1, the output voltage Vout is stepped down so that it becomes (VREF + Vf_max) from the stable output voltage Vst. However, since the width of the pulse width modulation signal PWMi is narrow, the step-down stops at time T1. When the pulse width modulation signal PWMi becomes low level at time T1, the output voltage Vout gradually increases from time T1 to T3. From time T3 to T4, the stable output voltage Vst is maintained.
  • the LED drive circuit device 1A in FIG. 3 is stepped down the output voltage Vout only when the pulse width modulation signal is at a high level, unlike the LED drive device circuit 1 in FIG. Control.
  • the output voltage Vout is always maintained at (VREF + Vf_max) or higher even when the on-duty ratio of the pulse width modulation signal is low. Therefore, heat generation in the LED strings 4_1 to 4_n can be suppressed, and the LED strings 4_1 to 4_n can always maintain sufficient luminance.
  • FIG. 5 shows an LED drive circuit device 1B according to a third embodiment of the present invention.
  • the LED drive circuit device 1B has an LED driver 5B as a difference from the first and second embodiments.
  • the LED driver 5 ⁇ / b> B particularly includes a selection comparator 14 and a source current supply unit 15.
  • the LED driver 5B has LED connection terminals LED1 to LEDn as external terminals and a feedback terminal FB1.
  • the feedback terminal FB1 is a terminal for connecting to the common connection node Nc.
  • the selection comparator 14 has a function as a selection unit that selects the lowest voltage among the input LED terminal voltages VLED1 to VLEDn, and a function as a comparator that compares the selected lowest voltage with the reference voltage VREF.
  • the selection comparator 14 outputs a high level or low level signal according to the comparison result.
  • the source current supply unit 15 is a circuit unit that supplies a source current Iso as a constant current to the common connection node Nc side, and includes a switch 15A composed of a p-channel MOS transistor, a constant current circuit 15B, and a current mirror circuit. 15C.
  • a power supply voltage Vcc is applied to the source of the switch 15A, and a constant current circuit 15B is disposed between the drain of the switch 15A and the ground.
  • An output signal from the selection comparator 14 is input to the gate of the switch 15A, and the switch 15A is switched on / off according to the output level from the selection comparator 14.
  • the current mirror circuit 15C is composed of two transistors composed of p-channel MOS transistors.
  • the source of one of the two transistors is connected to the source of the switch 15A, that is, the power supply voltage Vcc is applied.
  • the drain of one transistor is connected to the drain of the switch 15A.
  • the source of one transistor is connected to the source of the other transistor.
  • the gates of the other transistor and one transistor are connected to each other.
  • the connection node and the drain of one transistor are short-circuited.
  • the drain of the other transistor is connected to the feedback terminal FB1.
  • the LED driver 5B also has an OR circuit 51.
  • the OR circuit 51 receives pulse width modulation signals PWM1 to PWMn.
  • the output of the OR circuit 51 is input to the selection comparator 14.
  • the output of the OR circuit 51 is at a high level.
  • the output of the OR circuit 51 is at a low level.
  • the selection comparator 14 outputs a low level output signal to the switch 15A when the output of the OR circuit 51 is low level. As a result, the switch 15A is turned on, and the constant current from the constant current circuit 15B flows through the switch 15A and does not flow into one transistor of the current mirror circuit 15C. Therefore, the source current Iso does not flow from the feedback terminal FB1. Further, when the output of the OR circuit 51 is at a high level, the selection comparator 14 outputs an output signal having a level corresponding to the comparison result to the switch 15A. As a result, the switch 15A is turned on or off.
  • the constant current from the constant current circuit 15B does not flow through the switch 15A but flows into one transistor of the current mirror circuit 15C. Therefore, the source current Iso flows from the feedback terminal FB1.
  • FIG. 6 shows a timing chart when the LED drive circuit device 1B is driven.
  • FIG. 6A shows a pulse width modulation signal PWMi applied to the LED constant current sources Cs1 to Csn from the PWM dimming means 11 of the LED driver 5B.
  • the pulse width modulation signal PWMi becomes a high level H in the section TH from time t0 to t2, and becomes a low level L in the section TL from time t2 to t4.
  • FIG. 6B shows the LED current ILEDi.
  • FIG. 6C shows the LED terminal voltage VLED_min that is the voltage of the LED connection terminal LED_i.
  • FIG. 6D shows the source current Iso that flows from the feedback terminal FB1 to the common connection node Nc by the source current supply unit 15.
  • FIG. 6E shows a transition state of the output voltage Vout.
  • the LED current ILEDi does not flow. Further, the output of the OR circuit 51 becomes a low level, the switch 15A is turned on, and the source current Iso does not flow. As a result, the output voltage Vout is determined by the voltage dividing resistors R1 and R2, and is controlled to the stable output voltage Vst. At this time, the LED terminal voltage VLED_min becomes the same stable output voltage Vst as the output voltage Vout.
  • the pulse width modulation signal PWMi becomes a high level H at time t0
  • the LED current ILEDi flows, and the LED terminal voltage VLED_min rapidly decreases from the stable output voltage Vst by the LED forward total voltage Vf_max, but the magnitude of the voltage Is higher than the reference voltage VREF.
  • the output of the OR circuit 51 is at a high level
  • the output of the selection comparator 14 is at a high level
  • the switch 15A is off, so that the constant current flowing through the constant current circuit 15B by the current mirror circuit 15C is the source current Iso. Flowing.
  • the output voltage Vout is controlled to decrease, and accordingly, the LED terminal voltage VLED_min also decreases toward the reference voltage VREF. While the LED terminal voltage VLED_min is equal to or higher than the reference voltage VREF, the selection comparator 14 is at a high level, and the source current Iso continues to flow.
  • the output voltage Vout is determined by the voltage dividing resistors R1 and R2, and the output voltage Vout increases. In response to this, the LED terminal voltage VLED_min increases. When the LED terminal voltage VLED_min becomes equal to or higher than the reference voltage VREF, the output of the selection comparator 14 becomes a high level, the switch 15A is turned off, and the source current Iso flows. When the source current Iso flows, the output voltage Vout and the LED terminal voltage VLED_min decrease.
  • the selection comparator 14 repeatedly turns on and off the source current Iso by the source current supply unit 15, the LED terminal voltage VLED_min is controlled to the reference voltage VREF, and the output voltage Vout is controlled to VREF + Vf_max.
  • the output voltage Vout suitable for the LED forward voltage can be adjusted, and the luminance of the LED is maintained at a predetermined brightness.
  • the power consumption can be suppressed by suppressing the output voltage Vout.
  • FIG. 7 is a diagram illustrating a configuration of an LED driver 50B according to a modification of the above-described third embodiment. As will be described later, the LED driver 50B is effective when a plurality of sets of LED strings 4_1 to 4_n are used.
  • the LED driver 50B includes a first selection unit 141, a second selection unit 142, and a comparator 143.
  • the LED driver 50B includes a minimum voltage output terminal VMINOUT, other driver connection terminals VOM1 to VOM3, PWM It has an input terminal PWMIN and a PWM output terminal PWMOUT.
  • the first selection unit 141 selects and outputs the lowest voltage among the input LED terminal voltages VLED1 to VLEDn.
  • the second selection unit 142 receives the voltage applied to the other driver connection terminals VOM1 to VOM3, together with the lowest voltage selected by the first selection unit 141.
  • the other driver connection terminals VOM1 to VOM3 are terminals for connection to the lowest voltage output terminal VMINOUT in the other driver 50B, and when not connected to the other driver 50B, a predetermined internal voltage is applied.
  • the second selection unit 142 selects and outputs the lowest voltage selected from the minimum voltage selected by the first selection unit 141 and the voltages applied to the other driver connection terminals VOM1 to VOM3.
  • the lowest voltage output terminal VMINOUT is connected to the output terminal of the second selection unit 142. Therefore, the lowest voltage selected by the second selection unit 142 can be output from the lowest voltage output terminal VMINOUT.
  • the non-inverting input terminal (+) of the comparator 143 is connected to the output terminal of the second selection unit 142.
  • a reference voltage VREF is applied to the inverting input terminal ( ⁇ ) of the comparator 143.
  • the comparator 143 compares the lowest voltage selected by the second selection unit 142 with the reference voltage VREF, and outputs the comparison result as a high level or low level signal.
  • the output signal of the comparator 143 is applied to the gate of the switch 15A in the source current supply unit 15.
  • the LED driver 50B also has an OR circuit 51.
  • the voltage of the PWM input terminal PWMIN is input to the OR circuit 51 together with the pulse width modulation signals PWM1 to PWMn.
  • the output of the OR circuit 51 is input to the comparator 143 and can be output to the outside from the PWM output terminal PWMOUT.
  • the output of the OR circuit 51 is at a high level, and all the voltages at the pulse width modulation signals PWM1 to PWMn and the PWM input terminal PWMIN are at a high level.
  • the output of the OR circuit 51 is at a low level.
  • the comparator 143 outputs a low level output signal to the switch 15A when the output of the OR circuit 51 is low level. Thereby, the switch 15A is turned on, and the source current Iso does not flow from the feedback terminal FB1. Further, when the output of the OR circuit 51 is at a high level, the comparator 143 outputs an output signal having a level corresponding to the comparison result to the switch 15A.
  • FIG. 8 shows an example of a configuration that uses a plurality of LED drivers 50B having the above-described configuration to drive a plurality of LED groups, which are groups of LED strings 4_1 to 4_n.
  • a plurality of LED drivers 50B having the above-described configuration to drive a plurality of LED groups, which are groups of LED strings 4_1 to 4_n.
  • three LED groups G1 to G3 are driven is shown.
  • the anodes of the LED strings in the LED sets G1 to G3 are connected to a line where the output voltage Vout is generated.
  • an LED driver 50B1 as a master and LED drivers 50B2 and 50B3 as slaves are used.
  • the respective configurations of the LED drivers 50B1 to 50B3 are the same as the LED driver 50B of FIG. 7 described above, that is, the LED drivers 50B1 to 50B3 are the same.
  • the cathodes of the LED strings in each of the LED groups G1 to G3 are connected to the LED connection terminals LED1 to LEDn of the LED drivers 50B1 to 50B3, respectively.
  • the other driver connection terminal VOM1 of the LED driver 50B1 is connected to the lowest voltage output terminal VMINOUT of the LED driver 50B2.
  • the other driver connection terminal VOM2 of the LED driver 50B1 is connected to the lowest voltage output terminal VMINOUT of the LED driver 50B3.
  • the other driver connection terminal VOM3 of the LED driver 50B1 is short-circuited with an external terminal (hereinafter, VCC terminal) (not shown) to which the power supply voltage Vcc is applied because no other LED driver is connected.
  • VCC terminal hereinafter, VCC terminal
  • the feedback terminal FB1 of the LED driver 50B1 is connected to the common connection node Nc, but no connection is made to the feedback terminals FB1 of the LED drivers 50B2 and 50B3. Further, no connection is made to the lowest voltage output terminal VMINOUT of the LED driver 50B1.
  • the PWM input terminal PWMIN of the LED driver 50B1 is connected to the PWM output terminal PWMOUT of the LED driver 50B2.
  • the PWM input terminal PWMIN of the LED driver 50B2 is connected to the PWM output terminal PWMOUT of the LED driver 50B3.
  • a low level voltage is applied to the PWM input terminal PWMIN of the LED driver 50B3. Further, no connection is made to the PWM output terminal PWMOUT of the LED driver 50B1.
  • the lowest voltage among the LED terminal voltages VLED1 to VLEDn related to the LED set G2 is selected and output from the lowest voltage output terminal VMINOUT of the LED driver 50B2 as a slave.
  • the lowest voltage output terminal VMINOUT of the LED driver 50B3 as a slave selects and outputs the lowest voltage among the LED terminal voltages VLED1 to VLEDn related to the LED set G3.
  • the LED driver 50B1 as a master, the lowest voltage input from the LED driver 50B2 to the other driver connection terminal VOM1, the lowest voltage input from the LED driver 50B3 to the other driver connection terminal VOM2, and the LED terminal related to the LED set G1
  • the lowest voltage among the voltages VLED1 to VLEDn is selected and output from the second selection unit 142 to the comparator 143.
  • the comparator 143 compares the selected minimum voltage with the reference voltage VREF, and the source current supply unit 15 switches from the feedback terminal FB1 to the common connection node Nc according to the comparison result of the comparator 143.
  • the source current Iso to be turned on is switched on / off.
  • the output signal of the OR circuit 51 is output from the PWM output terminal PWMOUT and input to the PWM input terminal PWMIN of the LED driver 50B2.
  • the output signal of the OR circuit 51 is output from the PWM output terminal PWMOUT and input to the PWM input terminal PWMIN of the LED driver 50B1. Therefore, the output of the OR circuit 51 in the LED driver 50B1 becomes high level when at least one of the pulse width modulation signals PWM1 to PWMn of the LED drivers 50B1 to 50B3 is high level, and the pulse width modulation signal of the LED drivers 50B1 to 50B3. When all of PWM1 to PWMn are at a low level, the level is low.
  • the LED terminal voltage VLED_min related to the LED string having the maximum LED forward total voltage Vf_max among the LED sets G1 to G3 is controlled to be the reference voltage VREF.
  • the output voltage Vout is controlled to VREF + Vf_max.
  • the LED driver 50B is not limited to use for driving a plurality of LED sets, but may be used for driving only one LED set. In this case, only one LED driver 50B is used, all other driver connection terminals VOM1 to VOM3 in the LED driver 50B are short-circuited to the VCC terminal, and a low-level voltage is applied to the PWM input terminal PWMIN.
  • FIG. 9 is a plan view showing an example of pin arrangement in the LED driver 50B as a semiconductor integrated circuit device (package product).
  • 16 LED strings that is, LED strings 4_1 to 4_16
  • LED strings 4_1 to 4_16 can be connected.
  • a pin EXTCLK, a pin VSYNC, a non-connection pin, pins LED1 to LED4, a non-connection pin, a pin LGND, a non-connection pin, a pin LED5 and LED6 are arranged side by side in the horizontal direction.
  • the pin EXTCLK is a clock signal input pin.
  • the pin VSYNC is a pin for inputting a pulse width modulation signal.
  • the pins LED1 to LED6 are pins for cathode connection of the LED string.
  • the pin LGND is a ground pin for the constant current circuit.
  • a non-connecting pin is a pin that is not connected.
  • the second side 502 extending in the vertical direction from one end of the first side 501 is pin LED7, LED8, non-connection pin, pin LGND, pin SDO, pin PWMOUT, pin TEST, pin PWMIN, pin LGND, non-connection.
  • Pins, pin LEDs 9 and LED 10 are arranged side by side in the vertical direction.
  • the pin LED 7 is disposed so as to sandwich the intersection of the first side 501 and the second side 502 with the pin LED 6.
  • Pins LED7 to LED10 are pins for cathode connection of LED strings.
  • the pin SDO is a data output pin.
  • the pin PWMOUT is a PWM output terminal.
  • the pin PWMIN is a PWM input terminal.
  • the pin TEST is a test mode pin.
  • the third side 503 extends in the lateral direction from the end of the second side 502 that is not on the first side 501 side. That is, the third side 503 is opposed to the first side 501 in the vertical direction.
  • a pin LED11, LED12, a non-connecting pin, a pin LGND, a non-connecting pin, pins LED13 to LED16, a non-connecting pin, a pin FB1, and a pin VOM3 are arranged side by side in this order.
  • the pin LED 11 is arranged so as to sandwich the intersection of the second side 502 and the third side 503 with the pin LED 10.
  • the pins LED11 to LED16 are pins for cathode connection of the LED string.
  • the pin FB1 is a pin for a feedback terminal, and corresponds to the feedback terminal FB1 in FIG.
  • the pin VOM3 is a pin for connecting the pin VMINOUT of another LED driver, and corresponds to the other driver connection terminal VOM3 in FIG.
  • the fourth side 504 extends in the vertical direction from the end of the third side 503 that is not on the second side 502 side. That is, the fourth side 504 faces the second side 502 in the lateral direction.
  • a pin VOM2, a pin VOM1, a pin VMINOUT, a pin ISET, a pin VREG, a pin VCC, a pin EN, a pin GND, a pin FAIL, a pin SCS, a pin SDI, and a pin SCLK are arranged in the vertical direction. Be placed.
  • the pin VOM2 is arranged so as to sandwich the intersection of the third side 503 and the fourth side 504 with the pin VOM3.
  • Pin SCLK is arranged so as to sandwich the intersection of first side 501 and fourth side 504 with pin EXTCLK.
  • the pins VOM2 and VOM1 are pins for connecting the pin VMINOUT of other LED drivers and correspond to the other driver connection terminals VOM2 and VOM1 in FIG.
  • the pin VMINOUT is a pin for outputting the lowest LED terminal voltage among the 16 LED strings, and corresponds to the lowest voltage output terminal VMINOUT in FIG.
  • the pin ISET is a pin for connecting a resistor that sets the LED current.
  • the pin VREG is a pin for outputting an internal voltage.
  • the pin VCC is a VCC terminal.
  • the pin EN is a pin for setting a standby mode or an operation mode.
  • the pin GND is a pin for ground connection.
  • the pin FAIL is an abnormality detection output pin.
  • the pin SCS is a chip selection setting pin.
  • the pin SDI is a data input pin.
  • the pin SCLK is a clock input pin.
  • the output terminal of the second selection unit 142 may be connected to the input terminal of the operational amplifier instead of the comparator 143.
  • the operational amplifier those described in the first and second embodiments can be used.
  • the output voltage of the switching regulator used for driving the light emitting element can be controlled to a predetermined level by a relatively simple circuit, the power efficiency can be improved. Therefore, industrial applicability is extremely high.

Abstract

Un pilote de DEL comprend : une source de courant constant de DEL connectée à une pluralité de chaînes de DEL de façon individuelle avec une borne de connexion de DEL interposée entre celles-ci ; une unité de sélection pour sélectionner la borne de connexion de DEL de la chaîne de DEL, parmi la pluralité de chaînes de DEL, pour laquelle la tension totale directe de DEL est la plus élevée en tant que borne de connexion de DEL de détection ultérieure ; et un comparateur pour comparer la tension de la borne de connexion de DEL de détection et une première tension de référence ; une tension de rétroaction pour laquelle la tension de sortie a subi une transformation de tension subissant une transformation de tension sur la base de la sortie du comparateur.
PCT/JP2018/010704 2017-04-28 2018-03-19 Pilote de del, et dispositif de circuit d'attaque de del et équipement électronique utilisant ledit pilote de del WO2018198594A1 (fr)

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JP2017-090515 2017-04-28
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WO2020158859A1 (fr) * 2019-02-01 2020-08-06 オムロン株式会社 Convertisseur résonnant, et circuit de commande et procédé de commande pour celui-ci
CN114845436A (zh) * 2022-07-04 2022-08-02 深圳贝特莱电子科技股份有限公司 一种复用于触摸mcu通用io口的led驱动电路
EP3937161A4 (fr) * 2019-10-31 2022-10-05 Honor Device Co., Ltd. Circuit de commande de rétroéclairage et procédé de commande associé, et terminal d'affichage
RU2786087C1 (ru) * 2019-10-31 2022-12-16 Хонор Дивайс Ко., Лтд. Цепь управления задней подсветкой, способ управления ею и терминал с дисплеем

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