WO2018196683A1 - 编译码方法、装置和设备 - Google Patents

编译码方法、装置和设备 Download PDF

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Publication number
WO2018196683A1
WO2018196683A1 PCT/CN2018/083827 CN2018083827W WO2018196683A1 WO 2018196683 A1 WO2018196683 A1 WO 2018196683A1 CN 2018083827 W CN2018083827 W CN 2018083827W WO 2018196683 A1 WO2018196683 A1 WO 2018196683A1
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WIPO (PCT)
Prior art keywords
bit
bits
auxiliary
sequence
scrambled
Prior art date
Application number
PCT/CN2018/083827
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English (en)
French (fr)
Inventor
张华滋
乔云飞
李榕
Original Assignee
华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP18790149.1A priority Critical patent/EP3609079A4/en
Publication of WO2018196683A1 publication Critical patent/WO2018196683A1/zh
Priority to US16/664,135 priority patent/US11071116B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/04—Wireless resource allocation
    • H04W72/044—Wireless resource allocation based on the type of the allocated resource
    • H04W72/0466—Wireless resource allocation based on the type of the allocated resource the resource being a scrambling code
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0065—Serial concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W76/00—Connection management
    • H04W76/10—Connection setup
    • H04W76/11—Allocation or use of connection identifiers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

Definitions

  • the present application relates to communication technologies, and in particular, to an encoding method, a decoding method, an apparatus, and a device.
  • the rapid evolution of wireless communication indicates that the future 5G communication system will present some new features.
  • the most typical three communication scenarios include enhanced mobile broadband (eMBB) and massive machine type communication (mMTC). And Ultra-Reliable and Low Latency Communications (URLLC).
  • eMBB enhanced mobile broadband
  • mMTC massive machine type communication
  • URLLC Ultra-Reliable and Low Latency Communications
  • LTE Long Term Evolution
  • channel coding is one of the important research objects to meet the needs of 5G communication.
  • Polar Codes are from 2008 by E. A new type of channel coding is proposed.
  • the polarization code is designed based on Channel Polarization. It is the first constructive coding scheme that can prove the channel capacity through rigorous mathematical methods.
  • the Polar code is a linear block code.
  • the encoding method can improve the efficiency of encoding and decoding, and improve the channel detection delay. There is no clear solution in the prior art.
  • the present application provides an encoding method, a decoding method, an apparatus, and a device for improving encoding and decoding efficiency and improving channel detection delay.
  • a first aspect of the present application provides an encoding method, the method comprising:
  • the transmitting device acquires the position of the information bit, the position of the fixed bit, and the position of the auxiliary bit;
  • the transmitting device configures information bits, fixed bits, and auxiliary bits in the to-be-coded sequence according to the location of the information bits, the location of the fixed bits, and the location of the auxiliary bits;
  • the transmitting device acquires a scrambling sequence, and performs scrambling processing on the bits in the scrambling bit set according to the scrambling sequence to obtain a scrambled sequence; the to-be-scrambled bit set is according to the fixed bit and/or The auxiliary bit is determined;
  • the transmitting device transmits the encoded sequence.
  • the set of bits to be scrambled may be determined according to the fixed bit and/or the auxiliary bit.
  • the sending device may select a certain number of bits in a fixed bit to form a set of bits to be scrambled, or may be in the auxiliary bit.
  • a certain method selects a plurality of bits to form a set of bits to be scrambled, and may also select a number of bits in the fixed bit and the auxiliary bit to form the set of bits to be scrambled.
  • the selection manner of the transmitting device and the receiving device may be determined by negotiation, or may be Provided in the agreement.
  • the transmitting device configures a corresponding bit value in the to-be-coded sequence according to the determined position of the information bit, the position of the fixed bit, and the position of the auxiliary bit, that is, the information bit, the fixed bit, and the auxiliary bit are all configured in the sequence to be encoded.
  • the scrambling sequence is a Radio Network Temporary Identifier (RNTI) of the sending device or a part of the RNTI sequence or a repeated RNTI sequence.
  • RNTI Radio Network Temporary Identifier
  • the set of bits to be scrambled includes any one of the following sets:
  • a row in which the row weight of the corresponding polarization encoding matrix in the fixed bit is composed of at least one bit starting from highest to lowest;
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest.
  • the scrambled sequence is performed on the bits in the to-be-scrambled bit set according to the scrambling sequence to obtain a scrambled sequence, including:
  • the transmitting device performs an exclusive OR operation on the scrambling sequence and a corresponding bit in the to-be-scrambled bit set, and configures the obtained bit in a corresponding position to obtain the scrambled sequence.
  • the auxiliary bits include at least one of the following: a CRC bit, a PC bit, and a hash bit.
  • the method further includes:
  • the transmitting device acquires the same number of bits in the scrambling sequence as the number of bits in the to-be-scrambled bit set as a new scrambling sequence.
  • a second aspect of the present application provides a decoding method, including:
  • the receiving device decodes and verifies the sequence to be decoded in sequence; wherein, when decoding to the scrambling bit, the scrambling bit is verified, and if the verification fails, the decoding ends.
  • the scrambling bit is obtained by scrambling bits in the set of scrambling bits using a scrambling sequence, the set of scrambling bits being determined according to the fixed bits and/or the auxiliary bits.
  • the decoding device receives the detection and acquisition of the sequence to be decoded, and performs decoding and verification.
  • the decoding process when decoding to the scrambling bit scrambled by the transmitting device, if the scrambling bit fails, the verification fails. Then, the subsequent decoding is not performed, and the signals that do not belong to the transmitting device are excluded in advance, thereby reducing the decoding delay and achieving the purpose of accelerating channel detection.
  • the scrambling bit is a fixed bit
  • the verifying the scrambled bit includes:
  • the verification is performed according to the decoded scrambled bit value and the pre-acquired scrambled bit value. If the decoded scrambled bit value is different from the pre-acquired scrambled bit value, the verification fails.
  • a specific verification method is: when the scrambling bit is a fixed bit, the decoded scrambled bit value is compared with the pre-acquired scrambled bit value, and if different, the decoding is directly ended, and the subsequent decoding is not required.
  • the bit is decoded, that is, in the decoding process, if there is a decoded scrambled bit value different from that obtained in advance, the verification fails and the decoding is stopped.
  • the scrambling sequence is a part of the RNTI or RNTI sequence of the sending device or a repeated RNTI sequence.
  • the set of scrambling bits includes any one of the following sets:
  • a row in which the row weight of the corresponding polarization encoding matrix in the fixed bit is composed of at least one bit starting from highest to lowest;
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest.
  • the receiving device decodes and verifies the sequence to be decoded according to the sequence, including:
  • the receiving device determines a location of the information bit, a location of the fixed bit, and a location of the auxiliary bit;
  • the receiving device determines the set of scrambled bits according to a location of the fixed bit and/or a location of the auxiliary bit;
  • the receiving device performs polarization decoding on the sequence to be decoded in sequence, and performs verification on the scrambled bit when decoding to the scrambled bit, and ends decoding if the verification fails.
  • the auxiliary bit includes at least one of the following: a CRC bit, a PC bit, and a hash bit.
  • a third aspect of the present application provides an encoding method, including:
  • the transmitting device acquires the position of the information bit and the auxiliary bit and the position of the fixed bit
  • the transmitting device configures information bits, fixed bits, and auxiliary bits in the to-be-coded sequence according to the location of the to-be-scrambled bit, the position of the information bit and the auxiliary bit, and the position of the fixed bit;
  • the sending device acquires a scrambling sequence, and performs scrambling processing on the bit corresponding to the position of the to-be-scrambled bit according to the scrambling sequence to obtain a scrambled sequence;
  • the transmitting device sends the encoded sequence to the receiving device.
  • the location of the to-be-scrambled bit includes any one of the following locations:
  • the position of the information bit and the auxiliary bit corresponds to at least one bit position of the row of the polarization coding matrix from the highest to the highest.
  • a fourth aspect of the present application provides an encoding apparatus, where the apparatus includes:
  • a processing module configured to acquire a position of the information bit, a position of the fixed bit, and a position of the auxiliary bit;
  • the processing module is further configured to: configure information bits, fixed bits, and auxiliary bits in the to-be-coded sequence according to the location of the information bit, the location of the fixed bit, and the location of the auxiliary bit;
  • the processing module is further configured to acquire a scrambling sequence, and perform scrambling processing on the bits in the scrambling bit set according to the scrambling sequence to obtain a scrambled sequence; the to-be-scrambled bit set is according to the fixed bit And/or the auxiliary bits are determined;
  • the processing module is further configured to perform polarization coding on the scrambled sequence to obtain a coded sequence
  • a sending module configured to send the encoded sequence.
  • the scrambling sequence obtained by the processing module is a part of the RNTI or RNTI sequence of the encoding apparatus or a repeated RNTI sequence.
  • the set of to-be-scrambled bits determined by the processing module includes any one of the following sets:
  • a row in which the row weight of the corresponding polarization encoding matrix in the fixed bit is composed of at least one bit starting from highest to lowest;
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest.
  • processing module is specifically configured to:
  • the auxiliary bit includes at least one of the following bits:
  • the processing module is further configured to:
  • a fifth aspect of the present application provides a decoding apparatus, including:
  • An acquiring module configured to acquire a sequence to be decoded
  • a processing module configured to decode and verify the sequence to be decoded in sequence; wherein, when decoding to the scrambling bit, verifying the scrambled bit, if the verification fails, ending the translation
  • the scrambling bit is obtained by scrambling bits in the set of scrambling bits using a scrambling sequence, the scrambling bit set being determined according to the fixed bit and/or the auxiliary bit.
  • the scrambling bit is a fixed bit
  • the processing module is specifically configured to:
  • the verification is performed according to the decoded scrambled bit value and the pre-acquired scrambled bit value. If the decoded scrambled bit value is different from the pre-acquired scrambled bit value, the verification fails.
  • the scrambling sequence is a part of the RNTI or RNTI sequence of the sending device or a repeated RNTI sequence.
  • the set of scrambling bits includes any one of the following sets:
  • a row in which the row weight of the corresponding polarization encoding matrix in the fixed bit is composed of at least one bit starting from highest to lowest;
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest.
  • processing module is specifically configured to:
  • the sequence to be decoded is polarization-decoded in sequence, and the scrambled bit is verified when decoding to the scrambled bit, and if the check fails, the decoding is ended.
  • the auxiliary bit includes at least one of the following: a CRC bit, a PC bit, and a hash bit.
  • a sixth aspect of the present application provides an encoding apparatus, including:
  • a processing module for determining a position of the information bit and the auxiliary bit and a position of the fixed bit
  • the processing module is further configured to determine a location of the to-be-scrambled bit according to the information bit and the position of the auxiliary bit;
  • the processing module is further configured to configure information bits, fixed bits, and auxiliary bits in the to-be-coded sequence according to the location of the to-be-scrambled bit, the position of the information bit and the auxiliary bit, and the position of the fixed bit;
  • the processing module is further configured to obtain a scrambling sequence, and perform scrambling processing on the bit corresponding to the position of the to-be-scrambled bit according to the scrambling sequence to obtain a scrambled sequence;
  • the processing module is further configured to perform polarization coding on the scrambled sequence to obtain a coded sequence
  • a sending module configured to send the encoded sequence to the receiving device.
  • the location of the to-be-scrambled bit includes any one of the following locations:
  • the position of the information bit and the auxiliary bit corresponds to at least one bit position of the row of the polarization coding matrix from the highest to the highest.
  • a seventh aspect of the present application provides a sending device, including:
  • a memory a processor, a transmitter, and a computer program, the computer program being stored in the memory, the processor running the computer program to perform the encoding method provided by any one of the first aspect or the third aspect.
  • the number of processors is at least one, and is used to execute an execution instruction of the memory storage, that is, a computer program.
  • the encoding method provided by the foregoing first aspect, the third aspect, the first embodiment of the first aspect or the implementation manner of the third aspect is performed by the sending device to perform data interaction between the receiving device and the receiving device, optionally, the memory It can also be integrated inside the processor.
  • the eighth aspect of the present application provides a receiving device, including:
  • a memory a processor, and a computer program, the computer program being stored in the memory, the processor running the computer program to perform the decoding method provided by any one of the implementations of the second aspect.
  • the number of processors is at least one, and is used to execute an execution instruction of the memory storage, that is, a computer program.
  • the decoding method provided by the second embodiment or the second embodiment of the second aspect is performed by the receiving device by performing data interaction between the receiving device and the transmitting device.
  • the memory may be integrated inside the processor.
  • a ninth aspect of the present application provides a storage medium, comprising: a readable storage medium and a computer program, the computer program being used to implement the encoding method provided in any one of the first aspect or the third aspect.
  • a tenth aspect of the present application provides a storage medium comprising: a readable storage medium and a computer program, the computer program being used to implement the decoding method provided in any one of the second aspects.
  • An eleventh aspect of the present application provides a program product comprising a computer program (i.e., an execution instruction), the computer program being stored in a readable storage medium.
  • At least one processor of the transmitting device can read the computer program from a readable storage medium, the at least one processor executing the computer program causing the transmitting device to implement the first aspect, the third aspect, various embodiments of the first aspect, or the third An encoding method provided by various embodiments of the aspects.
  • a twelfth aspect of the present application provides a program product comprising a computer program (i.e., an execution instruction), the computer program being stored in a readable storage medium.
  • a computer program i.e., an execution instruction
  • At least one processor of the receiving device can read the computer program from a readable storage medium, and the at least one processor executes the computer program such that the receiving device implements the decoding method provided by the second aspect or the various embodiments of the second aspect.
  • the encoding method, the decoding method, the device and the device provided by the application, the transmitting device configures a corresponding bit value in the sequence to be encoded according to the determined position of the information bit, the position of the fixed bit and the position of the auxiliary bit, that is, the information bit and the fixed
  • the bit and the auxiliary bit are both arranged in the sequence to be encoded, and then at least one bit is acquired as a set of bits to be scrambled in the fixed bit and/or the auxiliary bit, and the scrambling sequence is determined to add the bit in the set of bits to be scrambled. After the scrambling process, the scrambled sequence is encoded and subsequently processed for transmission.
  • the decoding device After the decoding device receives the detection and acquisition of the sequence to be decoded, and performs decoding and verification.
  • the decoding process when decoding to the scrambling bit scrambled by the transmitting device, according to the bit value pair of the position in the scrambled sequence obtained in advance The decoded scrambled bit value of the position is verified, and if the verification fails, the subsequent bits need not be decoded, and the signal that does not belong to the transmitting device is excluded in advance, thereby reducing the decoding delay and achieving the accelerated channel. Detection purpose.
  • FIG. 1 is a schematic diagram of a basic flow of a commonly used wireless communication
  • FIG. 2 is a schematic diagram of an application system of an encoding method and a decoding method provided by the present application
  • FIG. 3 is a flowchart of Embodiment 1 of an encoding method provided by the present application.
  • FIG. 5 is a flowchart of Embodiment 2 of the encoding method provided by the present application.
  • FIG. 6 is a schematic diagram of a coding process of a polar code-based sender provided by the present application.
  • FIG. 7 is a schematic diagram of a decoding process of a receiver based on a polar code provided by the present application.
  • FIG. 8 is a schematic diagram of a location of a check/scramble bit provided by the present application.
  • FIG. 9 is a schematic diagram of another location of a check/scramble bit provided by the present application.
  • FIG. 10 is a schematic diagram of another location of a check/scramble bit provided by the present application.
  • FIG. 11 is a flowchart of determining a location of another check/scramble bit according to the present application.
  • FIG. 12 is a schematic diagram of a register provided by the present application.
  • FIG. 13 is a schematic structural diagram of an encoding apparatus provided by the present application.
  • FIG. 14 is a schematic structural diagram of a decoding apparatus provided by the present application.
  • the technical solution of the embodiment of the present application can be applied to a 5G communication system or a future communication system, and can also be used in other various wireless communication systems, such as a Global System of Mobile communication (GSM) system, and code division multiple access (CDMA, Code Division Multiple Access system, Wideband Code Division Multiple Access (WCDMA) system, General Packet Radio Service (GPRS), Long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD), Universal Mobile Telecommunication System (UMTS), and the like.
  • GSM Global System of Mobile communication
  • CDMA Code Division Multiple Access
  • WCDMA Wideband Code Division Multiple Access
  • GPRS General Packet Radio Service
  • LTE Long Term Evolution
  • FDD Frequency Division Duplex
  • TDD Time Division Duplex
  • UMTS Universal Mobile Telecommunication System
  • FIG. 1 is a schematic diagram of a basic flow of a commonly used wireless communication.
  • a source is sequentially transmitted after source coding, channel coding, and digital modulation.
  • digital demodulation, channel decoding, and source decoding are sequentially outputted to the sink.
  • the channel coding can use a Polar code, and in the case of channel decoding, SC decoding, SCL decoding, etc. can be used.
  • many techniques have been proposed based on the Polar code, such as CA-Polar code, PC-Polar code, CA+PC-Polar and so on.
  • the solution is applied in the process of information interaction between a network device and a terminal, and the encoding side, that is, the sending device, may be
  • the network device may also be a terminal; correspondingly, the decoding side, that is, the receiving device, may be either a terminal or a network device.
  • the method may also be applied to the information exchange process between the terminals, that is, the sending device and the receiving device are both terminals, and the solution is not limited.
  • FIG. 3 is a flowchart of Embodiment 1 of the encoding method provided by the present application. As shown in FIG. 3, the solution is applied to a sending side, that is, a sending device, and the sending device may be a network device or a terminal device, which is provided by this embodiment.
  • the specific implementation steps of the coding method include:
  • the sending device acquires a position of the information bit, a position of the fixed bit, and a position of the auxiliary bit.
  • the transmitting device configures information bits, fixed bits and auxiliary bits in the to-be-coded sequence according to the position of the information bits, the position of the fixed bits, and the position of the auxiliary bits.
  • the transmitting device determines an initial sequence, for example, constructs a sequence; determines the position of the information bits, the position of the fixed bits, and the position of the auxiliary bits in the initial sequence to configure the corresponding bits at the corresponding positions.
  • the auxiliary bit includes at least one of the following: a Cyclic Redundancy Check (CRC) bit, a Parity Check (PC) bit, and a hash bit.
  • CRC Cyclic Redundancy Check
  • PC Parity Check
  • the auxiliary bits include a total of J bits of CRC and J' auxiliary bits, and the J' auxiliary bits may be PC bits or CRC bits.
  • the transmitting device acquires a scrambling sequence, and performs scrambling processing on the bits in the scrambling bit set according to the scrambling sequence to obtain a scrambled sequence; the to-be-scrambled bit set is determined according to the fixed bit and/or the auxiliary bit.
  • the sending device may first determine the set of bits to be scrambled, or may first determine the scrambling sequence.
  • This solution is not limited.
  • the scrambling sequence is used to scramble the corresponding bit in the selected set of bits to be scrambled.
  • the set of to-be-scrambled bits includes at least one bit, and the at least one bit may be all fixed bits, or may be all auxiliary bits, or may be partial fixed bits and partial auxiliary bits.
  • the set of bits to be scrambled may be any one of the following sets:
  • the row weight of the corresponding polarization coding matrix is composed of at least one bit starting from highest to lowest in the fixed bit; (or the Hamming weight corresponding to the polarization coding matrix in the fixed bit is from the highest starting from the highest To a low set of at least one bit).
  • the row weight of the corresponding polarization encoding matrix in the auxiliary bit is composed of at least one bit starting from highest to lowest; (or the Hamming weight corresponding to the polarization encoding matrix in the auxiliary bit is from the highest starting from the highest To a low set of at least one bit).
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest. (Alternatively, it may be a fixed bit and a set of at least one bit of the Hamming weight of the corresponding polarization coding matrix in the auxiliary bit from the highest starting from the highest to the low).
  • the transmitting device may determine a specific set of to-be-scrambled bits according to a scheme or protocol negotiated with the receiving device, and then perform scrambling according to the bits in the selected set of bits to be scrambled, and configure the scrambled bits in the The corresponding position is scrambled.
  • S104 The transmitting device performs polarization coding on the scrambled sequence to obtain a coded sequence.
  • S105 The sending device sends the encoded sequence.
  • the transmitting device performs a polar encoding process on the scrambled sequence to obtain a coded sequence for transmission, so that the receiving device performs the receiving detection.
  • the obtained coded sequence may be rate-matched after the polar coding, and then modulated, and the mapping is performed on the corresponding resource.
  • the transmitting device configures corresponding bits in the to-be-coded sequence according to the determined position of the information bits, the position of the fixed bit, and the position of the auxiliary bit, that is, the information bits, the fixed bits, and the auxiliary bits are all configured.
  • the coding sequence at least one bit is then obtained as a set of to-be-scrambled bits in the fixed bit and/or the auxiliary bit, and the scrambling sequence is determined to scramble the bits in the set of bits to be scrambled to obtain a scrambled sequence.
  • FIG. 4 is a flowchart of Embodiment 1 of the decoding method provided by the present application. As shown in FIG. 4, the solution is applied to the receiving side, that is, the receiving device, and the receiving device may be a network device or a terminal device.
  • the specific implementation steps of the decoding method include:
  • S201 The receiving device acquires a sequence to be decoded.
  • the receiving device performs receiving, de-mapping, demodulating, and the like to obtain a signal sent by the transmitting end, and then performing detection to obtain a sequence to be decoded, where the sequence includes information bits to be decoded, fixed bits, and auxiliary bits, where At least one of the auxiliary bits and/or fixed bits is scrambled by the transmitting device, and the scrambled bits constitute a set of scrambling bits.
  • the auxiliary bits include at least one of the following bits: a CRC bit, a PC bit, and a hash bit.
  • the auxiliary bits include a total of J bits of CRC and J' auxiliary bits, and the J' auxiliary bits may be PC bits or CRC bits.
  • the receiving device determines the position of the information bits in the sequence to be decoded, the position of the fixed bit, and the position of the auxiliary bit, and the determination manner is similar to that of the transmitting device side.
  • the receiving device can determine the set of scrambled bits according to the location of the auxiliary bits in the sequence to be decoded and/or the position of the fixed bits.
  • the bits in the set of scrambling bits may all be at fixed bit positions, or may be all at the position of the auxiliary bits, or some of the auxiliary bits may be in fixed bits.
  • This solution is not limited, and the transmitting end is The receiving end negotiates to determine or specify the location of the set of scrambling bits.
  • the set of scrambling bits includes any one of the following sets:
  • the row weight of the corresponding polarization coding matrix is composed of at least one bit starting from highest to lowest in the fixed bit; (or the Hamming weight corresponding to the polarization coding matrix in the fixed bit is from the highest starting from the highest To a low set of at least one bit).
  • the row weight of the corresponding polarization encoding matrix in the auxiliary bit is composed of at least one bit starting from highest to lowest; (or the Hamming weight corresponding to the polarization encoding matrix in the auxiliary bit is from the highest starting from the highest To a low set of at least one bit).
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest. (Alternatively, it may be a fixed bit and a set of at least one bit of the Hamming weight of the corresponding polarization coding matrix in the auxiliary bit from the highest starting from the highest to the low).
  • the fixed bit and the auxiliary bit are only used to indicate the position in the sequence to be decoded, and the set of scrambled bits refers to a set of bits in any of the above positions in the sequence to be decoded. .
  • S202 The receiving device decodes and verifies the sequence to be decoded according to the sequence; wherein, when decoding to the scrambling bit, the scrambling bit is verified, and if the verification fails, the decoding is ended; the scrambling bit is The scrambling sequence is used to scramble the bits in the set of scrambling bits, and the set of scrambling bits is determined according to the fixed bits and/or the auxiliary bits.
  • verifying the scrambled bit includes:
  • the verification is performed according to the decoded scrambled bit value and the pre-acquired scrambled bit value. If the decoded scrambled bit value is different from the pre-acquired scrambled bit value, the verification fails.
  • the meaning is that if the scrambling bit is a fixed bit, when decoding to the scrambling bit position, the scrambling bit value obtained by decoding and the scrambled bit value obtained in advance are checked, and if the scrambled bit is decoded, The value is different from the pre-acquired scrambling bit value, and the decoding process is ended.
  • the pre-acquired scrambling bit value in the scheme is the value of the scrambling bit in the scrambling sequence.
  • the receiving device Since the value of the auxiliary bit is determined according to at least one information bit (sometimes plus other auxiliary bits) during the encoding process, when the scrambling bit is the auxiliary bit, the receiving device needs to perform descrambling after decoding. The verification can be performed after descrambling, and if the verification fails, the decoding is ended.
  • the receiving device decodes the sequence to be decoded, and in the decoding process, the scrambled fixed bits and/or auxiliary bits are regarded as information bits for decoding, and the scrambling determined according to any of the foregoing methods is performed.
  • a set of bits when decoding to the scrambled bit, verifying the decoded scrambled bit value, and if the check fails, ending the decoding, that is, the bit after the scrambled bit in the sequence to be decoded is not performed.
  • Decode exit the decoding process, and perform the next test.
  • the pre-acquired scrambling bit value is the same as the decoded scrambled bit value of the location, the next bit in the sequence to be decoded continues to be decoded, and each time it is decoded to a scrambled bit, The above method is verified.
  • the decoding device After the decoding device receives the detection and acquisition of the sequence to be decoded, the decoding device performs decoding and verification.
  • the decoding process when decoding to the scrambling bit scrambled by the transmitting device, according to the pre-acquisition The bit value of the position in the scrambling sequence is used to check the scrambled bit value of the decoded position, and if the verification fails, the decoding is directly ended, and the subsequent bits need not be decoded, that is, in the decoding process.
  • the subsequent decoding is not performed, and the signal that does not belong to the transmitting device is excluded in advance, thereby reducing the decoding delay and achieving the purpose of accelerating channel detection.
  • FIG. 5 is a flowchart of Embodiment 2 of the encoding method provided by the present application. As shown in FIG. 5, the embodiment further provides an encoding method, which is applied to the sending end, and the specific steps thereof include:
  • the transmitting device determines the position of the information bit and the auxiliary bit and the position of the fixed bit.
  • the difference from the foregoing embodiment shown in FIG. 3 is that after the transmitting device determines the initial sequence (ie, the initial configuration sequence) in the solution, the fixed bit is determined according to parameters such as the number of information bits, the length of the code, and the like.
  • the position and the position of the auxiliary bit and the information bit that is, the overall position of all the auxiliary bits and all information bits are determined, and the specific position of the information bits need not be determined in detail, and the information bits can be determined after the subsequent scrambling is completed.
  • the transmitting device determines the location of the bit to be scrambled according to the information bit and the position of the auxiliary bit.
  • the transmitting device first selects the location of the to-be-scrambled bit according to a certain rule in the position of the information bit and the auxiliary bit.
  • the location of the to-be-scrambled bit includes the following A location:
  • the position of the information bit and the auxiliary bit corresponds to at least one bit position of the row of the polarization coding matrix from the highest to the highest. (Or the Hamming weight of the corresponding polarization coding matrix in the position of the information bits and the auxiliary bits is at least one bit position starting from the highest to the lowest).
  • the position of the scrambling bits is also confirmed in the same manner as the transmitting device, so that it is possible to determine which are scrambling bits in the subsequent decoding process.
  • the transmitting device configures information bits, fixed bits, and auxiliary bits in the to-be-coded sequence according to the position of the to-be-scrambled bit, the position of the information bit and the auxiliary bit, and the position of the fixed bit.
  • the sending device determines the position of the auxiliary bit and the position of the information bit according to the determined position of the bit to be scrambled.
  • the position of the auxiliary bit includes all bits to be scrambled. The location, that is, only one or more of the auxiliary bits are scrambled, and the information bits are not scrambled.
  • the position of the bit to be scrambled has both the position of the auxiliary bit and the position of the information bit, that is, some (or all) information bits and some (or all) auxiliary bits are scrambled.
  • the location of the information bits includes all locations of the bits to be scrambled, ie, the information bits are subsequently scrambled.
  • the information bits, the fixed bits, and the auxiliary bits are configured to the corresponding positions.
  • the transmitting device acquires a scrambling sequence, and performs scrambling processing on the bit corresponding to the position of the scrambling bit according to the scrambling sequence to obtain a scrambled sequence.
  • the transmitting device selects a suitable scrambling sequence, and then scrambles the bits at the position of the selected selected to-be-scrambled bit according to the scrambling sequence to obtain a scrambled sequence.
  • S305 The transmitting device performs polarization coding on the scrambled sequence to obtain a coded sequence.
  • S306 The transmitting device sends the encoded sequence.
  • the transmitting device performs polar encoding on the scrambled sequence, and if subsequent processing such as rate matching is required, the correlation processing is performed, and then modulation and mapping are performed on the corresponding resources for transmission.
  • the transmitting device performs scrambling processing on at least one of the auxiliary bit and the information bit according to the selected scrambling sequence, and then performs encoding and transmission, and the receiving device determines to wait in the same manner as the transmitting device.
  • the position of the scrambling bit in the decoding sequence is verified in the process of decoding, when decoding to the scrambling bit, confirming whether the information is the information of the transmitting device in advance, or confirming whether the transmission error is in advance, effective Reduce decoding delay and speed up channel detection.
  • FIG. 6 is a schematic diagram of a coding process of a transmitter based on a polar code provided by the present application
  • FIG. 7 is a schematic diagram of a decoding process of a receiver based on a polar code provided by the present application.
  • the transmitting device determines a configuration sequence, determines the position of the information bit, the position of the fixed bit, and the position of other auxiliary bits according to the configuration sequence, and then configures the corresponding information bits, and positions and assists the fixed bits.
  • the position of the bit loads the corresponding bit (where the auxiliary bit and or the fixed bit include the bit to be scrambled). Determining the scrambling sequence and the set of bits to be scrambled, and scrambling the bits in the set of scrambled bits according to the determined scrambling sequence to obtain scrambled bits. Then, the obtained scrambling bits are arranged at corresponding positions, and then Polar coding, rate matching, modulation, and then mapping are performed on the corresponding resources for transmission.
  • the receiving end determines the position of the information bit, the position of the auxiliary bit, and the position of the fixed bit according to the configuration sequence; then, in the same manner as the transmitting device, determines the position of the scrambled bit in the sequence to be decoded, and determines Scrambling sequence.
  • the receiving device decodes the determined scrambled bit as information bit in the process of performing the Polar decoding of the sequence to be decoded, and when decoding to the position of the scrambling bit, according to the decoding result and the scrambling sequence
  • the bit is checked, that is, each decoding of a scrambling bit needs to be compared with the bit of the corresponding position in the previously obtained scrambling sequence. If the check passes, the decoding is continued, otherwise the decoding is exited. Carry out the next test until all tests are completed.
  • the position of the bit to be scrambled is a number of fixed bits with the highest reliability
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the initial construction sequence with a code length of 64 is
  • the 16-bit fixed bit set (ie, the set of bits to be scrambled) whose reliability starts from the highest to the highest is
  • the 16-bit Radio Network Temporary Identifier (RNTI) of the user may be selected as a scrambling sequence and scrambled to the location to be scrambled.
  • the location to be scrambled is The determined 16 fixed bit positions may be an exclusive-OR operation of the scrambling bit set corresponding to the to-be-scrambled position, and the obtained value is filled in the corresponding position in the sequence to obtain the added Post-disturbance sequence.
  • the RNTI sequence itself is used as the scrambling sequence, but a part of the RNTI sequence or the repeated RNTI sequence may be used as the scrambling sequence without loss of generality.
  • the present application also describes the RNTI sequence itself as a scrambling sequence.
  • the transmitting device performs polar encoding on the scrambled sequence and transmits the encoded sequence, that is, the encoded bit.
  • the process of receiving decoding verification by the receiving device is as follows:
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the receiving device decodes the scrambled bit each time it is decoded to the position of the scrambled fixed bit according to the determined set of scrambled bits.
  • the value is compared with the value of the corresponding position in the scrambling sequence (which may be the RNTI of the UE) to determine whether the value is consistent. If the two are consistent, the information is determined to belong to the sending device (ie, the UE), and the decoding continues. Otherwise, the decoding is exited and the next detection is performed.
  • the position of the bit to be scrambled is several fixed bits before the first information bit
  • the transmitting device determines the initial structure sequence of Polar (length is N)
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation. For example, the initial construction sequence with a code length of 64 is
  • the RNTI may be selected as a scrambling sequence, scrambled to the location to be scrambled, and the location to be scrambled is
  • the determined 16 fixed bit positions may be an exclusive-OR operation of the scrambling bit set corresponding to the to-be-scrambled position, and the obtained value is filled in the corresponding position in the sequence to obtain the added Post-disturbance sequence.
  • the transmitting device performs polar encoding on the scrambled sequence and transmits the encoded sequence, that is, the encoded bit.
  • the process of receiving decoding verification by the receiving device is as follows:
  • the receiving device determines the initial structure sequence of Polar (length is N)
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the receiving device decodes the scrambled bit each time it is decoded to the position of the scrambled fixed bit according to the determined set of scrambled bits.
  • the value is compared with the value of the corresponding position in the scrambling sequence (which may be the RNTI of the UE) to determine whether the value is consistent. If the two are consistent, the information is determined to belong to the sending device (ie, the UE), and the decoding continues. Otherwise, the decoding is exited and the next detection is performed.
  • a third implementation manner the position of the bit to be scrambled is a fixed number of fixed bits among the fixed bits
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the fixed bits are used as a set of fixed bits to be scrambled, that is, the position of the to-be-scrambled bits is at least one bit with the lowest reliability among the fixed bits.
  • the determined 16 fixed bit positions may be an exclusive-OR operation of the scrambling bit set corresponding to the to-be-scrambled position, and the obtained value is filled in the corresponding position in the sequence to obtain the added Post-disturbance sequence.
  • the transmitting device performs polar encoding on the scrambled sequence and transmits the encoded sequence, that is, the encoded bit.
  • the process of receiving decoding verification by the receiving device is as follows:
  • the receiving device determines the initial structure sequence of Polar (length is N) in the same manner as the transmitting device.
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the receiving device determines the set of scrambling bits, that is, the position of the scrambling bits (several fixed bits with the lowest reliability) in the same manner as the transmitting device.
  • the scrambled fixed bits are treated as information bits for decoding, that is, newly generated information bit sets to be decoded (ie, sequences to be decoded).
  • the receiving device decodes the scrambled bit each time it is decoded to the position of the scrambled fixed bit according to the determined set of scrambled bits.
  • the value is compared with the value of the corresponding position in the scrambling sequence (which may be the RNTI of the UE) to determine whether the value is consistent. If the two are consistent, the information is determined to belong to the sending device (ie, the UE), and the decoding continues. Otherwise, the decoding is exited and the next detection is performed.
  • the position of the bit to be scrambled is a fixed number of fixed bits in the fixed bit
  • the specific implementation process of the method is similar to the foregoing manners.
  • the sending device determines the set of bits to be scrambled or the receiving device determines that the set of scrambled bits are the fixed bits in the sequence from the fixed bit set.
  • the specific scrambling, coding, and decoding check processes are consistent with the foregoing scheme.
  • the position of the bit to be scrambled is the row weight of the corresponding polarization coding matrix in the fixed bit or the number of bits of the Hamming weight from the highest starting from the highest to the low
  • the specific implementation process of the mode is similar to the foregoing manners.
  • the sending device determines the set of bits to be scrambled or the receiving device determines that the set of scrambling bits is the row weight of the corresponding polarization coding matrix in the sequence or the Hamming from the fixed bit set.
  • the process of scrambling, encoding, and decoding verification is consistent with the foregoing scheme.
  • the position of the bit to be scrambled is a number of auxiliary bits in the auxiliary bit
  • the transmitting device determines the initial structure sequence of Polar (length is N)
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the transmitting device determines a number of bits in the auxiliary bit that are higher in position as the set of bits to be scrambled, that is, the position of the bit to be scrambled is the most advanced position among the auxiliary bit positions.
  • the specific scrambling method may be performing an exclusive OR operation on the set of to-be-scrambled bits corresponding to the scrambling sequence to be scrambled, and The value is filled in the corresponding position in the sequence to obtain the scrambled sequence.
  • the transmitting device performs polar encoding on the scrambled sequence and transmits the encoded sequence, that is, the encoded bit.
  • the process of receiving decoding verification by the receiving device is as follows:
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the set of scrambling bits is determined in the auxiliary bits in the same manner as the transmitting device.
  • the scrambled auxiliary bit is regarded as an information bit for decoding, that is, a new information bit set to be decoded (ie, a sequence to be decoded) is generated.
  • the receiving device In the process of decoding the sequence to be decoded, the receiving device, according to the determined set of scrambling bits, needs to perform descrambling after decoding each time to decode the scrambled auxiliary bits. After the interference, the verification can be performed. According to the verification result, the information belongs to the transmitting device (ie, the UE). If the verification succeeds to continue decoding, the decoding is exited and the next detection is performed.
  • the position of the bit to be scrambled is a plurality of auxiliary bits with the highest reliability among the auxiliary bits
  • the transmitting device determines the initial structure sequence of Polar (length is N)
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the transmitting device determines a number of bits in the auxiliary bit from which the reliability starts from the highest to the lowest, as the set of bits to be scrambled, that is, the position of the bit to be scrambled is the most reliable position among the auxiliary bit positions.
  • the specific scrambling method may be performing an exclusive OR operation on the set of to-be-scrambled bits corresponding to the scrambling sequence to be scrambled, and The value is filled in the corresponding position in the sequence to obtain the scrambled sequence.
  • the transmitting device performs polar encoding on the scrambled sequence and transmits the encoded sequence, that is, the encoded bit.
  • the process of receiving decoding verification by the receiving device is as follows:
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the set of scrambling bits is determined in the auxiliary bits in the same manner as the transmitting device.
  • the scrambled auxiliary bit is regarded as an information bit for decoding, that is, a new information bit set to be decoded (ie, a sequence to be decoded) is generated.
  • the receiving device In the process of decoding the sequence to be decoded, the receiving device, according to the determined set of scrambling bits, needs to perform descrambling after decoding each time to decode the scrambled auxiliary bits. After the interference, the verification can be performed. According to the verification result, the information belongs to the transmitting device (ie, the UE), and if the verification is successful, the decoding is continued, otherwise the decoding is exited, and the next detection is performed.
  • the transmitting device ie, the UE
  • the position of the bit to be scrambled is a number of auxiliary bits with the lowest reliability among the auxiliary bits
  • the specific implementation process of the mode is similar to the foregoing manner.
  • the sending device determines the set of bits to be scrambled or the receiving device determines that the set of scrambling bits is selected from the set of auxiliary bits, and the auxiliary bits with the lowest reliability are selected, and the specific scrambling, coding, and coding are performed.
  • the process of decoding verification is consistent with the foregoing scheme.
  • the position of the bit to be scrambled is the row weight of the corresponding polarization coding matrix in the auxiliary bit or the number of bits of the Hamming weight from the highest starting from high to low
  • the specific implementation process of the mode is similar to the foregoing manner.
  • the sending device determines the set of bits to be scrambled or the receiving device determines that the set of scrambling bits is selected from the set of auxiliary bits to select the row weight of the corresponding polarization coding matrix or the Hamming weight starts from the highest.
  • the high to low number of auxiliary bits, the specific scrambling, encoding and decoding check processes are consistent with the foregoing scheme.
  • the sending device and the receiving device may further determine a set of to-be-scrambled bits or a set of scrambled bits from a union of fixed bits and auxiliary bits, specifically to be scrambled.
  • the set of bits or the set of scrambled bits can be any of the following:
  • the fixed bit and the auxiliary bit are composed of at least one bit starting from a lowest to a low a set of at least one bit of the fixed bit and the auxiliary bit whose reliability is highest from highest to lowest; the fixed bit and the row weight of the corresponding polarization coding matrix in the auxiliary bit start from the highest A collection of at least one bit from high to low.
  • the scrambling and encoding process is performed, and then the mapping is performed on the corresponding resource in a similar manner to the foregoing solution, and details are not described herein again.
  • the decoding and verification performed by the receiving device after the scrambling bit set is similar to the foregoing solution, and details are not described herein again.
  • the transmitting device and the receiving device may further determine the position of the bit to be scrambled from the position of the information bit and the auxiliary bit or add
  • the location of the scrambled bit is taken as an example on the transmitting device side.
  • the specific location of the bit to be scrambled includes the following methods:
  • the position of the bit to be scrambled is a number of bit positions from the front to the beginning of the position of the information bit and the auxiliary bit; the position of the bit to be scrambled is the reliability of the position of the information bit and the auxiliary bit from the highest to the highest a number of bit positions; the position of the bit to be scrambled is a number of bit positions in which the reliability of the information bit and the position of the auxiliary bit starts from the lowest to the low; the position of the bit to be scrambled is in the position of the information bit and the auxiliary bit Corresponding to the row weight of the polarization coding matrix or the number of bit positions of the Hamming weight from the highest to the highest.
  • the position of the bit to be scrambled is a number of bit positions from the front to the back of the position of the information bits and the auxiliary bits as an example:
  • the transmitting device determines the initial structure sequence of Polar (length is N)
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the specific scrambling method may be performing an exclusive OR operation on the set of to-be-scrambled bits corresponding to the scrambling sequence to be scrambled, and The value is filled in the corresponding position in the sequence to obtain the scrambled sequence.
  • the transmitting device performs polar encoding on the scrambled sequence and transmits the encoded sequence, that is, the encoded bit.
  • the specific implementation manner of the decoding method on the receiving device side is:
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the mode determines a set of scrambling bits, that is, a bit corresponding to the first of the plurality of bit positions including the information bits and the auxiliary bits is determined as a set of scrambling bits.
  • the scrambled auxiliary bit is regarded as an information bit for decoding, that is, a new information bit set to be decoded (ie, a sequence to be decoded) is generated.
  • the receiving device needs to perform descrambling after decoding each time according to the determined set of scrambling bits, each time decoding to the position of the scrambled auxiliary bit After the descrambling, the verification can be performed.
  • the information belongs to the transmitting device (ie, the UE), and if the verification is successful, the decoding is continued, otherwise the decoding is exited, and the next detection is performed.
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • P 1 * K) the first integer (P 2 * K), ..., the first integer (P J '* K) position; this embodiment is the information bits and all bit positions of the auxiliary bits in accordance with a certain algorithm selected
  • a number of bits are used as the location of the bits to be scrambled, and are not limited to one way of the Integer (X) algorithm.
  • Integer (X) is a rounding of X, which can be rounded down, rounded off, and rounded up.
  • the transmitting device performs polar encoding on the scrambled sequence and transmits the encoded sequence, that is, the encoded bit.
  • the specific implementation manner of the decoding method on the receiving device side is:
  • the constructed sequence is a relative reliability order of polar code polarized channels under the length of the mother code.
  • the sequence can be obtained by means of a look-up table or an online calculation method or a half-check table semi-calculation.
  • the method determines the set of scrambling bits in the auxiliary bits, that is, determines the bits corresponding to the positions of the information bits and the plurality of bit positions of the auxiliary bits as the scrambling bit set according to the rounding algorithm Integer(X).
  • the scrambled auxiliary bit is regarded as an information bit for decoding, that is, a new information bit set to be decoded (ie, a sequence to be decoded) is generated.
  • the receiving device descrambles the decoding result each time it is decoded to the position of the scrambling bit, and then performs decoding
  • the verification determines that the information belongs to the transmitting device (ie, the UE) according to the verification result, and continues decoding if the verification succeeds, otherwise exits decoding and performs the next detection.
  • the auxiliary bits comprise at least one of the following: a CRC bit, a PC bit, and a Hash check bit.
  • the encoding method and the decoding algorithm provided in any one of the foregoing implementation manners use a fixed bit in the polar encoding and or some auxiliary bits to perform scrambling in the encoding process, and then perform the polar encoding transmission in the decoding.
  • the pre-acquired scrambling bit is used for verification, and the to-be-detected signal that does not belong to the target UE is excluded in advance, thereby achieving the purpose of reducing the decoding delay and accelerating channel detection.
  • the method for scrambling or the specific implementation manner of determining the location of the scrambling bits further includes the following implementation manners:
  • the binary value of the check equation and the binary value of the +RNTI at the check bit position binary 0.
  • the encoding end operates to add the binary value of the check digit that satisfies the check equation directly to the binary value of the RNTI at the check bit position to obtain the check bit transmission value.
  • the encoding end operates to add the binary value of the check digit that satisfies the check equation directly to the binary value of the RNTI at the check bit position, and inverts to obtain the check bit transmission value.
  • the scrambling (checking) bits are arranged in the last several non-freezing bit positions.
  • the scrambling (checking) bit position is advanced as much as possible after satisfying the false alarm probability. To get the benefit of early stop (early stop, when decoding is not possible, end decoding as early as possible to get power savings).
  • Preliminary steps Determine the rate matching scheme and obtain a reliability sequence.
  • Step 1 Select a non-frozen bit position set by reliability
  • the non-freeze bits include information bits, RNTI scrambled bits, check bits (such as parity, CRC check, hash check, etc.).
  • Step 2 Segment the non-frozen bit positions in a specific proportion according to the sub-channel index order.
  • the specific segmentation method is as follows:
  • Segment 1 (including J 1 scrambling/check bits)
  • Segment 2 (including J 2 scrambling/check bits)
  • segment 1 has J1 check bits
  • segment 2 has J2 check bits. (The value of J1, J2 is to be determined)
  • Step 3 Calculate the False Alarm Rate (FAR) under the segment according to the following formula (1).
  • BLER 1 is the block error rate of a segmentation at a given SNR input, ie the probability that at least 1 bit is translated wrong.
  • BLER 2 is the block error rate for a given SNR input for segment 2.
  • the block error rate can be calculated by Gaussian approximation/density evolution (GA/DE) or by other methods such as Monte Carlo simulation.
  • Step 4 Calculate the J1 and J2 allocations under the probability of meeting the false alarm probability
  • the first to kth non-frozen bits are taken as segment one, and the k+1th to Kthth non-frozen bits are taken as segment two.
  • Another way to determine the scrambling bits is to actually determine the location of each of the check (scrambled) bits using the following simplified procedure.
  • Step 1 Obtain the percentage of the first few check/scramble bit positions (P 1 %, P 2 %, P 3 %, ...) and convert them to the K 1 , K 2 , K 3 positions.
  • P 1 % ⁇ K' ⁇ K 1 / K ' Such as: P 1 % ⁇ K' ⁇ K 1 / K '.
  • P 1 %, P 2 %, P 3 % may be 40%, 50%, 60% or 30%, 40%, 50%, or 3/8, 4/8, 5/8 and the like.
  • FIG. 8 is a schematic diagram of the position of a check/scramble bit provided by the present application. As shown in FIG. 8, the check/scramble bit is configured at a given position.
  • Yet another method of determining the position of the scrambling (checking) bit finding the scrambling (checking) bit position by w min and ratio
  • Step 1 Select a non-frozen bit position set by reliability
  • the non-freeze bits include information bits, RNTI scrambled bits, check bits (such as parity, CRC check, hash check, etc.).
  • FIG. 9 is a schematic diagram of another location of the check/scramble bit provided by the present application. As shown in FIG. 9, the non-freeze bit positions are sequentially arranged in a sub-channel index, and are pressed.
  • the "New Protection Point 2 (Simplified B)" method selects the area of the scramble/check bit position.
  • Step 3 In the selected area, select the location of the specific row weight as the scrambling/check bit position.
  • the first step determining the rate matching method and the reliability sequence
  • Step 2 Construct a (M, K') polarization code with a code length of M and a non-freeze length of K':
  • K’ K+J+J’
  • Step 3 Determine the auxiliary bit position:
  • J' J EC +J ET PC bit (by row weight and region selection);
  • J EC are used for error correction/screening
  • J ET are used for early stop.
  • Step 4 Determine the value of the check bit
  • J CRC bit takes the value from the final state of the register
  • J'PC bit takes the value from the intermediate state of the register
  • the J CRC bit uses a set of shift registers (from the final state of the register)
  • the J’PC bit uses another set of shift registers (valued from the intermediate state of the register)
  • FIG. 10 is a schematic diagram of another location of a check/scramble bit provided by the present application
  • FIG. 11 is a flowchart of another location of a check/scrambling bit provided by the present application, and the specific implementation of step 3 of the solution is shown in FIG. The method is shown in Figures 10 and 11.
  • K J ' , K 3 , K 2 , K 1 can be obtained using a simplified method, such as:
  • the specific position of the PC bit is the position within the corresponding selected area that meets the specific line weight, such as:
  • FIG. 12 is a schematic diagram of a register provided in the present application, wherein the specific method of the value of the register in the fourth step is as follows: when translating to a certain scrambled/verified bit, it needs to be taken from a certain position of the register.
  • the value, register structure is shown in Figure 12, where the information bits are input from the right.
  • the register length may be J+J', that is, the number of all scrambling/checking bits, l means that the first scrambling/checking bit is currently encountered, and k is that k pure information bits have been translated.
  • Mod is a modulo operation, and the result is a non-negative integer from 0 to (register length -1).
  • C is an offset and can be any constant.
  • the register length may be J+J', that is, the number of all scrambling/checking bits, l means that the first scrambling/checking bit is currently encountered, and n means the position of the current bit in the mother code ( Contains pure information bits, frozen bits, and various auxiliary bits).
  • Mod is a modulo operation, and the result is a non-negative integer from 0 to (register length -1).
  • C is an offset and can be any constant.
  • FIG. 13 is a schematic structural diagram of an encoding apparatus provided by the present application. As shown in FIG. 13, the encoding apparatus 10 includes:
  • the processing module 11 is configured to acquire a position of the information bit, a position of the fixed bit, and a position of the auxiliary bit;
  • the processing module 11 is further configured to: configure information bits, fixed bits, and auxiliary bits in the to-be-coded sequence according to the location of the information bit, the location of the fixed bit, and the location of the auxiliary bit;
  • the processing module 11 is further configured to acquire a scrambling sequence, and perform scrambling processing on the bits in the scrambling bit set according to the scrambling sequence to obtain a scrambled sequence; the to-be-scrambled bit set is according to the fixed Bits and/or the auxiliary bits are determined;
  • the processing module 11 is further configured to perform polarization coding on the scrambled sequence to obtain a coded sequence.
  • the sending module 12 is configured to send the encoded sequence.
  • the coding device provided in this embodiment is used to implement the technical solution on the sending device side provided by any of the foregoing method embodiments, and the implementation principle and technical effects are similar, and details are not described herein again.
  • the scrambling sequence acquired by the processing module is a radio network temporary identifier RNTI of the encoding device.
  • the set of to-be-scrambled bits determined by the processing module 11 includes any one of the following sets:
  • a row in which the row weight of the corresponding polarization encoding matrix in the fixed bit is composed of at least one bit starting from highest to lowest;
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest.
  • processing module 11 is specifically configured to:
  • the auxiliary bit includes at least one of the following bits:
  • the processing module 11 is further configured to:
  • the coding device provided by any one of the foregoing solutions is used to implement the technical solution on the transmitting device side provided by any of the foregoing method embodiments.
  • the implementation principle and technical effects are similar, and details are not described herein again.
  • the processing module 11 is configured to determine the position of the information bits and the auxiliary bits and the position of the fixed bits;
  • the processing module 11 is further configured to determine a location of the to-be-scrambled bit according to the information bit and the position of the auxiliary bit;
  • the processing module 11 is further configured to: configure information bits, fixed bits, and auxiliary bits in the to-be-coded sequence according to the location of the to-be-scrambled bit, the location of the information bit and the auxiliary bit, and the position of the fixed bit;
  • the processing module 11 is further configured to obtain a scrambling sequence, and perform scrambling processing on the bit corresponding to the position of the to-be-scrambled bit according to the scrambling sequence to obtain a scrambled sequence;
  • the processing module 11 is further configured to perform polarization coding on the scrambled sequence to obtain a coded sequence.
  • the sending module 12 is configured to send the encoded sequence to the receiving device.
  • the location of the to-be-scrambled bit determined by the processing module 11 includes any one of the following locations:
  • the position of the information bit and the auxiliary bit corresponds to at least one bit position of the row of the polarization coding matrix from the highest to the highest.
  • the coding device provided in this embodiment is used to implement the technical solution on the sending device side provided by any of the foregoing method embodiments, and the implementation principle and technical effects are similar, and details are not described herein again.
  • FIG. 14 is a schematic structural diagram of a decoding apparatus provided by the present application; as shown in FIG. 14, the decoding apparatus 20 includes:
  • An obtaining module 21 configured to acquire a sequence to be decoded
  • the processing module 22 is configured to perform decoding and verification on the sequence to be decoded in sequence; wherein, when decoding to the scrambling bit, the scrambling bit is verified, and if the verification fails, the processing ends.
  • Decoding the scrambling bit is obtained by scrambling bits in the set of scrambling bits using a scrambling sequence, the set of scrambling bits being determined according to the fixed bits and/or the auxiliary bits.
  • the scrambling bit is a fixed bit
  • the processing module is specifically configured to:
  • the verification is performed according to the decoded scrambled bit value and the pre-acquired scrambled bit value. If the decoded scrambled bit value is different from the pre-acquired scrambled bit value, the verification fails.
  • the decoding device provided in this embodiment is used to implement the technical solution on the receiving device side provided by any of the foregoing method embodiments, and the implementation principle and technical effects are similar, and details are not described herein again.
  • the scrambling sequence is an RNTI of the sending device.
  • the set of scrambling bits determined by the obtaining module 21 includes any one of the following sets:
  • a row in which the row weight of the corresponding polarization encoding matrix in the fixed bit is composed of at least one bit starting from highest to lowest;
  • the fixed bit and the row weight of the corresponding polarization coding matrix of the auxiliary bits are composed of at least one bit starting from highest to lowest.
  • processing module 22 is specifically configured to:
  • the sequence to be decoded is polarization-decoded in sequence, and the scrambled bit is verified when decoding to the scrambled bit, and if the check fails, the decoding is ended.
  • the auxiliary bit includes at least one of the following bits:
  • the decoding device provided by any of the foregoing implementations is used to implement the technical solution of the receiving device side provided by any of the foregoing method embodiments, and the implementation principle and technical effects thereof are similar, and details are not described herein again.
  • the processing module may be embodied as a processor, and the transmitting module may be implemented as a transmitter.
  • the present application also provides a transmitting device comprising: a memory, a processor, a transmitter, and a computer program, the computer program being stored in the memory, the processor running the computer program to perform the method provided by any of the foregoing embodiments Coding method.
  • the number of processors is at least one, and is used to execute an execution instruction of the memory storage, that is, a computer program.
  • the encoding device is provided by the sending device to perform data interaction between the receiving device and the receiving device.
  • the memory may be integrated in the processor.
  • the present application also provides a receiving device comprising: a memory, a processor and a computer program, wherein the computer program is stored in the memory, the processor running the computer program to execute the decoding method provided by any of the foregoing embodiments .
  • the number of processors is at least one, and is used to execute an execution instruction of the memory storage, that is, a computer program.
  • the decoding method provided by the above various embodiments is performed by the receiving device performing data interaction with the transmitting device through the communication interface.
  • the memory may be integrated inside the processor.
  • the present application also provides a storage medium comprising: a readable storage medium and a computer program for implementing the encoding method provided by any of the foregoing embodiments.
  • the present application also provides a storage medium comprising: a readable storage medium and a computer program for implementing the decoding method provided by any of the foregoing embodiments.
  • the application also provides a program product comprising a computer program (ie, an execution instruction) stored in a readable storage medium.
  • a computer program ie, an execution instruction
  • At least one processor of the transmitting device can read the computer program from a readable storage medium, and the at least one processor executes the computer program such that the transmitting device implements the encoding method provided by the various embodiments described above.
  • the application also provides a program product comprising a computer program (ie, an execution instruction) stored in a readable storage medium.
  • a computer program ie, an execution instruction
  • At least one processor of the receiving device can read the computer program from a readable storage medium, and the at least one processor executes the computer program such that the receiving device implements the decoding method provided by the various embodiments described above.
  • the processor may be a central processing unit (English: Central Processing Unit, CPU for short), or other general-purpose processor, digital signal processor (English: Digital Signal) Processor, referred to as DSP, and Application Specific Integrated Circuit (ASIC).
  • the general purpose processor may be a microprocessor or the processor or any conventional processor or the like. The steps of the method disclosed in connection with the present application may be directly embodied by hardware processor execution or by a combination of hardware and software modules in a processor.
  • All or part of the steps of implementing the above method embodiments may be performed by hardware associated with the program instructions.
  • the aforementioned program can be stored in a readable memory.
  • the steps including the foregoing method embodiments are performed; and the foregoing memory (storage medium) includes: read-only memory (English: read-only memory, abbreviation: ROM), RAM, flash memory, hard disk, Solid state drive, magnetic tape (English: magnetic tape), floppy disk (English: floppy disk), optical disc (English: optical disc) and any combination thereof.

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Abstract

本申请提供一种编码方法、译码方法、装置和设备，该方法包括：发送设备确定信息比特的位置、固定比特的位置和辅助比特的位置，并根据确定出的位置在待编码序列中配置信息比特、固定比特和辅助比特；然后获取加扰序列，在固定比特和/或辅助比特中确定待加扰比特集合，根据加扰序列对待加扰比特集合中的比特进行加扰得到加扰后序列，然后进行极化编码得到编码后序列进行发送。接收设备接收到待译码序列之后进行译码校验，当译码至加扰比特位置时进行校验，若校验失败，则结束译码过程。提前排除不属于该发送设备的信号，降低译码延时，加速检测。

Description

编译码方法、装置和设备 技术领域
本申请涉及通信技术，尤其涉及一种编码方法、译码方法、装置和设备。
背景技术
无线通信的快速演进预示着未来5G通信系统将呈现出一些新的特点，最典型的三个通信场景包括增强移动带宽(enhanced Mobile Broadband，eMBB)、海量机器类通信(massive Machine Type Communications，mMTC)以及低时延高可靠通信(Ultra-Reliable and Low Latency Communications，URLLC)。这些通信场景的需求将对长期演进(Long Term Evolution，LTE)技术提出新的挑战。信道编码作为最基本的无线接入技术，是满足5G通信需求的重要研究对象之一。
极化码(Polar Codes)是2008年由E.
Figure PCTCN2018083827-appb-000001
提出的一种新型信道编码。极化码基于信道极化(Channel Polarization)进行设计，是第一种能够通过严格的数学方法证明达到信道容量的构造性编码方案，Polar码是一种线性块码。
但是采用何种编码方式能够提高编码和解码的效率，并改善信道检测时延，现有技术中还没有明确的方案。
发明内容
本申请提供一种编码方法、译码方法、装置和设备，用于提高编码和解码的效率，并改善信道检测时延。
本申请第一方面提供一种编码方法，所述方法包括：
发送设备获取信息比特的位置、固定比特的位置和辅助比特的位置；
所述发送设备根据所述信息比特的位置、所述固定比特的位置和所述辅助比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
所述发送设备获取加扰序列，并根据所述加扰序列对待加扰比特集合中的比特进行加扰处理得到加扰后序列；所述待加扰比特集合是根据所述固定比特和/或所述辅助比特确定的；
所述发送设备对所述加扰后序列进行极化编码得到编码后序列；
所述发送设备发送所述编码后序列。
本方案中，可根据固定比特和/或辅助比特确定待加扰比特集合，具体的，发送设备可以在固定比特中按照一定方式选取若干比特组成待加扰比特集合，也可以在辅助比特中按照一定方式选取若干比特组成待加扰比特集合，也可以是在固定比特以及辅助比特中各自选取若干比特组成该待加扰比特集合，发送设备和接收设备的选取方式可以协商确定， 也可以是在协议中规定。
本方案中，发送设备根据确定的信息比特的位置、固定比特的位置以及辅助比特的位置在待编码序列中配置对应的比特值，即将信息比特、固定比特以及辅助比特都配置在待编码序列中，然后在固定比特和/或辅助比特中获取出至少一个比特作为待加扰比特集合，确定加扰序列对该待加扰比特集合中的比特进行加扰处理，得到加扰后序列进行编码和后续处理进行发送，以使接收设备在译码过程中，能够根据加扰的比特提前排除不属于该发送设备的信号，降低编码延时，加速信道检测。
可选的，所述加扰序列为所述发送设备的无线网络临时标识(Radio Network Temporary Identifier，RNTI)或者RNTI序列的一部分或者重复的RNTI序列。
可选的，所述待加扰比特集合包括以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
在一种具体实现中，根据所述加扰序列对所述待加扰比特集合中的比特进行加扰处理得到加扰后序列，包括：
所述发送设备将所述加扰序列与所述待加扰比特集合中对应的比特进行异或操作，将得到的比特配置在对应位置，得到所述加扰后序列。
在一种具体实现中，所述辅助比特包括以下至少一种比特：CRC比特、PC比特以及哈希比特。
在一种具体实现中，当所述加扰序列的长度大于所述待加扰比特集合中的比特数量，则根据所述加扰序列对所述待加扰比特集合中的比特进行加扰处理得到加扰后序列之前，所述方法还包括：
所述发送设备获取所述加扰序列中与所述待加扰比特集合中的比特数量相同的比特 作为新的加扰序列。
本申请第二方面提供一种译码方法，包括：
接收设备获取待译码序列；
所述接收设备对所述待译码序列按照顺序进行译码和校验；其中，当译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码；所述加扰比特是采用加扰序列对加扰比特集合中的比特加扰后得到的，所述加扰比特集合是根据所述固定比特和/或所述辅助比特确定的。
本方案中，译码设备接收检测获取待译码序列之后进行译码校验，译码过程中，译码至发送设备加扰过的加扰比特时，对该加扰比特，若校验失败，则不再进行后续译码，提前排除不属于该发送设备的信号，从而可降低译码时延，达到加速信道检测目的。
可选的，所述加扰比特为固定比特，所述对所述加扰比特进行校验包括：
根据译码得到的加扰比特值与预先获取的加扰比特值进行校验，如果译码得到的加扰比特值与预先获取的加扰比特值不同，则校验失败。
一种具体的校验方式为，加扰比特为固定比特时，将译码得到的加扰比特值与预先获取的加扰比特值进行比较，若不同则直接结束译码，不需要对后续的比特进行译码，即在译码过程中，存在一个译码得到的加扰比特值与预先得到的不同，则确认校验失败，停止译码。
可选的，所述加扰序列为所述发送设备的RNTI或者RNTI序列的一部分或者重复的RNTI序列。
可选的，所述加扰比特集合包括以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
一种具体的实现方式中，所述接收设备对所述待译码序列按照顺序进行译码和校验，包括：
所述接收设备确定信息比特的位置、固定比特的位置和辅助比特的位置；
所述接收设备根据所述固定比特的位置和/或所述辅助比特的位置确定所述加扰比特集合；
所述接收设备按照顺序对所述待译码序列进行极化译码，在译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码。
可选的，所述辅助比特包括以下至少一种比特：CRC比特、PC比特以及哈希比特。
本申请第三方面提供一种编码方法，包括：
发送设备获取信息比特和辅助比特的位置以及固定比特的位置；
所述发送设备根据所述信息比特和辅助比特的位置，确定待加扰比特的位置；
所述发送设备根据所述待加扰比特的位置、所述信息比特和辅助比特的位置、所述固定比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
所述发送设备获取加扰序列，并根据所述加扰序列对所述待加扰比特的位置对应的比特进行加扰处理得到加扰后序列；
所述发送设备对所述加扰后序列进行极化编码得到编码后序列；
所述发送设备将所述编码后序列发送给接收设备。
可选的，所述待加扰比特的位置包括以下任一一种位置：
所述信息比特和辅助比特的位置中从最前开始从前至后的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最高起高到低的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最低起从低到高的至少一个比特位置；
所述信息比特和辅助比特的位置中对应极化编码矩阵的行重从最高开始从高到低的至少一个比特位置。
本申请第四方面提供一种编码装置，所述装置包括：
处理模块，用于获取信息比特的位置、固定比特的位置和辅助比特的位置；
所述处理模块还用于根据所述信息比特的位置、所述固定比特的位置和所述辅助比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
所述处理模块还用于获取加扰序列，并根据所述加扰序列对待加扰比特集合中的比特进行加扰处理得到加扰后序列；所述待加扰比特集合是根据所述固定比特和/或所述辅助比特确定的；
所述处理模块还用于对所述加扰后序列进行极化编码得到编码后序列；
发送模块，用于发送所述编码后序列。
可选的，所述处理模块获取的所述加扰序列为所述编码装置的RNTI或者RNTI序列的一部分或者重复的RNTI序列。
可选的，所述处理模块确定的所述待加扰比特集合包括以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
可选的，所述处理模块具体用于：
将所述加扰序列与所述待加扰比特集合中对应的比特进行异或操作，将得到的比特配置在对应位置，得到所述加扰后序列。
可选的，所述辅助比特包括以下至少一种比特：
CRC比特、PC比特以及哈希比特。
可选的，当所述加扰序列的长度大于所述待加扰比特集合中的比特数量，则所述处理模块还用于：
获取所述加扰序列中与所述待加扰比特集合中的比特数量相同的比特作为新的加扰序列。
本申请第五方面提供一种译码装置，包括：
获取模块，用于获取待译码序列；
处理模块，用于对所述待译码序列按照顺序进行译码和校验；其中，当译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码；所述加扰比特是采用加扰序列对加扰比特集合中的比特加扰后得到的，所述加扰比特集合是根据所述固定比特和/或所述辅助比特确定的。
可选的，所述加扰比特为固定比特，所述处理模块具体用于：
根据译码得到的加扰比特值与预先获取的加扰比特值进行校验，如果译码得到的加扰比特值与预先获取的加扰比特值不同，则校验失败。
可选的，所述加扰序列为所述发送设备的RNTI或者RNTI序列的一部分或者重复的RNTI序列。
可选的，所述加扰比特集合包括以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
可选的，所述处理模块具体用于：
确定信息比特的位置、固定比特的位置和辅助比特的位置；
根据所述固定比特的位置和/或所述辅助比特的位置确定所述加扰比特集合；
按照顺序对所述待译码序列进行极化译码，在译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码。
可选的，所述辅助比特包括以下至少一种比特：CRC比特、PC比特以及哈希比特。
本申请第六方面提供一种编码装置，包括：
处理模块，用于确定信息比特和辅助比特的位置和固定比特的位置；
所述处理模块还用于根据所述信息比特和辅助比特的位置，确定待加扰比特的位置；
所述处理模块还用于根据所述待加扰比特的位置、所述信息比特和辅助比特的位置、所述固定比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
所述处理模块还用于获取加扰序列，并根据所述加扰序列对所述待加扰比特的位置对应的比特进行加扰处理得到加扰后序列；
所述处理模块还用于对所述加扰后序列进行极化编码得到编码后序列；
发送模块，用于将所述编码后序列发送给接收设备。
可选的，所述待加扰比特的位置包括以下任一种位置：
所述信息比特和辅助比特的位置中从最前开始从前至后的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最高起高到低的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最低起从低到高的至少一个比特位置；
所述信息比特和辅助比特的位置中对应极化编码矩阵的行重从最高开始从高到低的至少一个比特位置。
本申请第七方面提供一种发送设备，包括：
存储器、处理器、发送器以及计算机程序，所述计算机程序存储在所述存储器中，所述处理器运行所述计算机程序执行第一方面或者第三方面的任一实现方式提供的编码方法。
在上述发送设备的具体实现中，处理器的数量为至少一个，用来执行存储器存储的执行指令，即计算机程序。使得发送设备通过通信接口与接收设备之间进行数据交互来执行上述第一方面、第三方面、第一方面的各种实施方式或者第三方面的实现方式提供的编码方法，可选的，存储器还可以集成在处理器内部。
本申请第八方面提供一种接收设备，包括：
存储器、处理器以及计算机程序，所述计算机程序存储在所述存储器中，所述处理器运行所述计算机程序执行第二方面任一项实现方式提供的译码方法。
在上述接收设备的具体实现中，处理器的数量为至少一个，用来执行存储器存储的执行指令，即计算机程序。使得接收设备通过通信接口与发送设备之间进行数据交互，来执行上述第二方面或者第二方面的各种实施方式提供的译码方法，可选的，存储器还可以集成在处理器内部。
本申请第九方面提供一种存储介质，包括：可读存储介质和计算机程序，所述计算机程序用于实现第一方面或者第三方面任一项提供的编码方法。
本申请第十方面提供一种存储介质，包括：可读存储介质和计算机程序，所述计算机程序用于实现第二方面任一项提供的译码方法。
本申请第十一方面提供一种程序产品，该程序产品包括计算机程序(即执行指令)，该计算机程序存储在可读存储介质中。发送设备的至少一个处理器可以从可读存储介质读取该计算机程序，至少一个处理器执行该计算机程序使得发送设备实施第一方面、第三方面、第一方面的各种实施方式或者第三方面的各种实施方式提供的编码方法。
本申请第十二方面提供一种程序产品，该程序产品包括计算机程序(即执行指令)，该计算机程序存储在可读存储介质中。接收设备的至少一个处理器可以从可读存储介质读取该计算机程序，至少一个处理器执行该计算机程序使得接收设备实施上述第二方面或者第二方面的各种实施方式提供的译码方法。
本申请提供的编码方法、译码方法、装置和设备，发送设备根据确定的信息比特的位置、固定比特的位置以及辅助比特的位置在待编码序列中配置对应的比特值，即将信息比特、固定比特以及辅助比特都配置在待编码序列中，然后在固定比特和/或辅助比特中获取出至少一个比特作为待加扰比特集合，确定加扰序列对该待加扰比特集合中的比特进行加扰处理，得到加扰后序列进行编码和后续处理进行发送。译码设备接收检测获取待译码序列之后进行译码校验，译码过程中，译码至发送设备加扰过的加扰比特时，根据预先获取的加扰序列中该位置的比特值对译码得到的该位置的加扰比特值进行校验，若校验失败，不需要对后续的比特进行译码，提前排除不属于该发送设备的信号，从而可降低译码延，达到加速信道检测目的。
附图说明
图1为常用的无线通信的基本流程示意图；
图2本申请提供的编码方法和译码方法的一种应用系统示意图；
图3为本申请提供的编码方法的实施例一的流程图；
图4为本申请提供的译码方法的实施例一的流程图；
图5为本申请提供的编码方法的实施例二的流程图；
图6为本申请提供的基于polar码的发送端的编码流程示意图；
图7为本申请提供的基于polar码的接收端的译码流程示意图；
图8为本申请提供的一种校验/加扰比特的位置示意图；
图9为本申请提供的又一种校验/加扰比特的位置示意图；
图10为本申请提供的另一种校验/加扰比特的位置示意图；
图11为本申请提供的另一种校验/加扰比特的位置确定流程图；
图12为本申请提供的一种寄存器的示意图；
图13为本申请提供的编码装置的结构示意图；
图14为本申请提供的译码装置的结构示意图。
具体实施方式
本申请实施例的技术方案可以应用5G通信系统或未来的通信系统，也可以用于其他各种无线通信系统，例如：全球移动通讯(Global System of Mobile communication，GSM)系统、码分多址(CDMA，Code Division Multiple Access)系统、宽带码分多址(Wideband Code Division Multiple Access，WCDMA)系统、通用分组无线业务(General Packet Radio Service，GPRS)、长期演进(Long Term Evolution，LTE)系统、LTE频分双工(Frequency Division Duplex，FDD)系统、LTE时分双工(Time Division Duplex，TDD)、通用移动通信系统(Universal Mobile Telecommunication System，UMTS)等。
图1为常用的无线通信的基本流程示意图，如图1所示，在发送端，信源依次经过信源编码、信道编码、数字调制后发出。在接收端，依次经过数字解调、信道译码、信源解码输出信宿。信道编码可以采用Polar码，而在信道译码的时候，可以采用SC译码、SCL译码等。为了提高Polar码的性能，现在又提出了很多在Polar码的基础上进行改进的技术，例如，CA-Polar码，PC-Polar码，CA+PC-Polar等等。
图2为本申请提供的编码方法和译码方法的一种应用系统示意图，如图3所示，该方案应用在网络设备与终端之间的信息交互过程中，编码侧即发送设备既可以是网络设备也可以是终端；与之相应的，译码侧即接收设备既可以是终端也可以是网络设备。可选的，也可以应用在终端之间的信息交互过程中，即发送设备和接收设备均为终端，对此本方案不做限制。
图3为本申请提供的编码方法的实施例一的流程图，如图3所示，该方案应用在发送侧，即发送设备，该发送设备可以是网络设备或者终端设备，本实施例提供的编码方法的具体实现步骤包括：
S101：发送设备获取信息比特的位置、固定比特的位置和辅助比特的位置。
S102：发送设备根据信息比特的位置、固定比特的位置和辅助比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特。
在上述步骤中，发送设备确定初始序列，例如：构造序列；在初始序列中确定信息比特的位置、固定比特的位置以及辅助比特的位置，以便将对应的比特配置在对应的位置。
其中，辅助比特包括以下至少一种比特：循环冗余校验(Cyclic Redundancy Check，CRC)比特、奇偶校验(Parity Check，PC)比特以及哈希比特。例如：辅助比特共包括J比特的CRC和J’辅助比特，J’辅助比特可以是PC比特，也可以是CRC比特。
S103：发送设备获取加扰序列，并根据加扰序列对待加扰比特集合中的比特进行加扰处理得到加扰后序列；待加扰比特集合是根据固定比特和/或辅助比特确定的。
在本步骤中，发送设备可以先确定待加扰比特集合，也可以先确定加扰序列，对此本方案不做限制。该加扰序列用于对选择出的待加扰比特集合中对应的比特进行加扰。
该待加扰比特集合中包括至少一个比特，该至少一个比特可以全部是固定比特，也可以全部是辅助比特，还可以是部分固定比特以及部分辅助比特，对此本方案不做限制。在待加扰比特集合的具体实现中，该待加扰比特集合可以是以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；(或者也可以是固定比特中对应极化编码矩阵的汉明重由最高开始从高到低的至少一个比特组成的集合)。
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；(或者也可以是辅助比特中对应极化编码矩阵的汉明重由最高开始从高到低的至少一个比特组成的集合)。
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。(或者也可以是固定比特以及辅助比特中对应极化编码矩阵的汉明重由最高开始从高到低的至少一个比特组成的集合)。
发送设备可根据与接收设备协商的方案或者协议规定的方式确定具体的待加扰比特集合，然后根据选定的待加扰比特集合中的比特分别进行加扰，将加扰后的比特配置在对应的位置得到加扰后序列。
S104：发送设备对加扰后序列进行极化编码得到编码后序列。
S105：发送设备发送编码后序列。
在上述两个步骤中，发送设备对加扰后的序列进行polar编码处理得到编码后序列进行发送，以便接收设备进行接收检测。
在实际实现中，根据需要还可以在polar编码后对得到的编码后序列进行速率匹配，然后再进行调制，映射在相应的资源上进行发送。
本实施例提供的编码方法，发送设备根据确定的信息比特的位置、固定比特的位置以及辅助比特的位置在待编码序列中配置对应的比特，即将信息比特、固定比特以及辅助比特都配置在待编码序列中，然后在固定比特和/或辅助比特中获取出至少一个比特作为待加扰比特集合，确定加扰序列对该待加扰比特集合中的比特进行加扰处理，得到加扰后序列进行编码和后续处理进行发送，以使接收设备在译码过程中，能够提前根据加扰比特进行校验，排除不属于该发送设备的信号或者传输出错的信号，降低编码延时，加速信道检测。
图4为本申请提供的译码方法的实施例一的流程图，如图4所示，该方案应用在接收侧，即接收设备，该接收设备可以是网络设备或者终端设备，本实施例提供的译码方法的具体实现步骤包括：
S201：接收设备获取待译码序列。
需要注意的是，由于接收端的解扰操作本质上和发送端的加扰操作是同样的操作，都是将加扰序列与原序列进行异或操作，因此本申请中不作另行区分，均以加扰说明。
在本步骤中，接收设备进行接收、解映射解调等操作得到发送端发送的信号，再进行检测获取待译码序列，该序列中包括待译码的信息比特、固定比特和辅助比特，其中该些辅助比特和/或固定比特中包括至少一个比特被发送设备加扰过，该些被加扰过的比特组成了加扰比特集合。在本方案中，辅助比特包括包括以下至少一种比特：CRC比特、PC比特以及哈希比特。例如：辅助比特共包括J比特的CRC和J’辅助比特，J’辅助比特可以是PC比特，也可以是CRC比特。
接收设备确定待译码序列中信息比特的位置、固定比特的位置、辅助比特的位置，确定方式与发送设备侧类似。
该接收设备可以根据待译码序列中辅助比特的位置和/或固定比特的位置确定该加扰比特集合。该加扰比特集合中的比特可以全部在固定比特的位置，也可以全部在辅助比特的位置，也可以一部分在辅助比特中另一部分在固定比特中，对此本方案不做限制，发送端和接收端协商确定或者协议规定该些加扰比特集合的位置。具体的实现方式中，所述加扰比特集合包括以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；(或者也可以是固定比特中对应极化编码矩阵的汉明重由最高开始从高到低的至少一个比特组成的集合)。
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；(或者也可以是辅助比特中对应极化编码矩阵的汉明重由最高开始从高到低的至少一个比特组成的集合)。
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。(或者也可以是固定比特以及辅助比特中对应极化编码矩阵的汉明重由最高开始从高到低的至少一个比特组成的集合)。
上述的实现方式中，固定比特以及辅助比特只用于表示在该待译码序列中的位置，该加扰比特集合指的是待译码序列中在上述的任一位置中的比特组成的集合。
S202：接收设备对待译码序列按照顺序进行译码和校验；其中，当译码至加扰比特时，对加扰比特进行校验，若校验失败，则结束译码；加扰比特是采用加扰序列对加扰比特集合中的比特加扰后得到的，加扰比特集合是根据所述固定比特和/或所述辅助比特确定的。
一种可选的实现方式中，若加扰比特为固定比特，则对所述加扰比特进行校验包括：
根据译码得到的加扰比特值与预先获取的加扰比特值进行校验，如果译码得到的加扰比特值与预先获取的加扰比特值不同，则校验失败。
其含义是，若加扰比特为固定比特，译码至加扰比特位置时，根据译码得到的加扰比特值和预先获取的加扰比特值进行校验，若译码得到的加扰比特值与预先获取的加扰比特值不同，则结束译码过程。该方案中所述预先获取的加扰比特值即为加扰序列中的加扰比特的值。
由于在编码过程中辅助比特的值是根据至少一个信息比特(有时还要再加上其他辅助比特)确定的，因此对于加扰比特为辅助比特时，接收设备进行译码后需要进行解扰，解扰之后才可以进行校验，若校验失败则结束译码。
在本步骤中，接收设备对待译码序列进行译码，在译码过程中，将加扰后的固定比特和/或辅助比特视为信息比特进行译码，根据前述任一方式确定的加扰比特集合，在译码至加扰比特时，对译码得到的加扰比特值进行校验，若校验失败则结束译码，即不再待译码序列中该加扰比特之后的比特进行译码，退出译码过程，执行下次检测。
若预先获取的加扰比特值与译码得到的该位置的加扰比特值相同，则对待译码序列中的下一个比特继续进行译码，在每次译码至一个加扰比特时均按照上述方式进行校验。
本实施例提供的译码方法，译码设备接收检测获取待译码序列之后进行译码校验，译码过程中，译码至发送设备加扰过的加扰比特时，根据预先获取的加扰序列中该位置的比 特值对译码得到的该位置的加扰比特值进行校验，若校验失败则直接结束译码，不需要对后续的比特进行译码，即在译码过程中，存在一个译码得到的加扰比特值与预先得到的不同，则不再进行后续译码，提前排除不属于该发送设备的信号，从而可降低译码时延，达到加速信道检测目的。
图5为本申请提供的编码方法的实施例二的流程图，如图5所示，本实施例还提供一种编码方法，应用在发送端，其具体步骤包括：
S301：发送设备确定信息比特和辅助比特的位置和固定比特的位置。
在本步骤中，与前述图3所示实施例的不同之处在于，本方案中发送设备确定初始序列(即初始构造序列)之后，根据信息比特的数目、编码长度等参数，确定固定比特的位置以及辅助比特和信息比特的位置，即确定出所有辅助比特和所有信息比特的总体位置即可，不需要详细确定出信息比特的具体位置，在后续完成加扰之后即可确定信息比特。
S302：发送设备根据信息比特和辅助比特的位置，确定待加扰比特的位置。
在本步骤中，发送设备在所述信息比特和辅助比特的位置中，根据一定的规律首先选择出待加扰比特的位置，具体的实现方式中，所述待加扰比特的位置包括以下任一种位置：
所述信息比特和辅助比特的位置中从最前开始从前至后的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最高起高到低的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最低起从低到高的至少一个比特位置；
所述信息比特和辅助比特的位置中对应极化编码矩阵的行重从最高开始从高到低的至少一个比特位置。(或者信息比特和辅助比特的位置中对应极化编码矩阵的汉明重由最高开始从高到低的至少一个比特位置)。
在该方案的具体实现中，在接收设备侧，也是按照与发送设备同样的方式确认加扰比特的位置，以便在后续译码过程中可以确定哪些是加扰比特。
S303：发送设备根据待加扰比特的位置、信息比特和辅助比特的位置、固定比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特。
在本步骤中，发送设备根据确定出的待加扰比特的位置，再去确定辅助比特的位置以及信息比特的位置，在一种实现方式中，该辅助比特的位置包括了所有待加扰比特的位置，即只对辅助比特中的一个或者多个比特进行加扰，对信息比特不做加扰。在另一种实现方式中，待加扰比特的位置中既有辅助比特的位置，也有信息比特的位置，即对部分(或全部)信息比特和部分(或全部)辅助比特都进行了加扰。在又一种实现方式中，信息比特的位置包括所有的待加扰比特的位置，即后续对信息比特进行加扰。
在确定了其他的比特的位置之后，将信息比特、固定比特和辅助比特配置至对应的位置。
S304：发送设备获取加扰序列，并根据加扰序列对待加扰比特的位置对应的比特进行加扰处理得到加扰后序列。
在本步骤中，发送设备选取合适的加扰序列，然后对前述选定的待加扰比特的位置上的比特根据加扰序列进行加扰得到加扰后序列。
S305：发送设备对加扰后序列进行极化编码得到编码后序列。
S306：发送设备发送编码后序列。
在上述步骤中，发送设备对加扰后序列进行polar编码，如果后续还需要进行速率匹配等处理，则进行相关处理之后进行调制、映射在对应的资源上进行发送。
本实施例提供的编码方法，发送设备对辅助比特和信息比特中的至少一个比特根据选定的加扰序列进行加扰处理，然后再进行编码发送，接收设备按照与发送设备同样的方式确定待译码序列中加扰比特的位置，在进行译码的过程中，译码至加扰比特时进行校验，提前确认该信息的是否是该发送设备的信息，或者提前确认是否传输出错，有效降低译码时延，加速信道检测。
在上述几个实施例的基础上，下面通过一些具体的实现方式对本申请提出的编码方法、译码方法进行详细说明。
图6为本申请提供的基于polar码的发送端的编码流程示意图，图7为本申请提供的基于polar码的接收端的译码流程示意图。
如图6所示，发送设备确定构造序列，根据构造序列确定信息比特的位置、固定比特的位置以及其他的辅助比特的位置，然后将对应的信息比特进行配置，并在固定比特的位置和辅助比特的位置载入对应的比特(其中，该辅助比特和或固定比特包括待加扰比特)。确定加扰序列以及待加扰比特集合，并根据确定的加扰序列对待加扰比特集合中的比特进行加扰处理，得到加扰比特。然后将得到的加扰比特配置在对应的位置上，再进行Polar编码、速率匹配、调制、然后映射在对应的资源上进行发送。
如图7所示，接收端根据构造序列确定信息比特的位置、辅助比特的位置及固定比特的位置；然后按照与发送设备相同的方式，确定待译码序列中加扰比特的位置，并确定加扰序列。接收设备在对待译码序列进行Polar译码的过程中，将确定的被加扰的比特当做信息比特译码，并在译码至加扰比特的位置时，根据译码结果与加扰序列中的比特进行校验，即每次译码出一个加扰比特都需要与预先得到的加扰序列中对应位置的比特进行对比校验，若校验通过，则继续译码，否则退出译码，进行下一次检测，直至完成所有检测。
基于上述图6和图7所示的编码和译码流程，下面以发送设备为UE为例，通过一些具体实现方式对本申请的编码方法和译码方法进行说明。
第一种实现方式：待加扰比特的位置为可靠度最高的若干个固定比特
发送设备实现编码发送的过程具体如下：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000002
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。例如，码长为64的初始构造序列为
Figure PCTCN2018083827-appb-000003
Figure PCTCN2018083827-appb-000004
Figure PCTCN2018083827-appb-000005
Figure PCTCN2018083827-appb-000006
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合，例如，当K＝32，码率 为1/2时，选取可靠度最高的若干个固定比特(示例的，这里选取16个固定比特)作为待加扰固定比特集合，即该待加扰比特的位置为固定比特中可靠度最高的至少一个比特，当：
信息比特集合为
Figure PCTCN2018083827-appb-000007
固定比特集合为
Figure PCTCN2018083827-appb-000008
则可靠度从最高开始从高到低的16位固定比特集合(即待加扰比特集合)为
Figure PCTCN2018083827-appb-000009
打孔/缩短比特集合为[]；
(3)、发送设备为用户设备(User Equipment，UE)时，可选取用户的16位无线网络临时标识(Radio Network Temporary Identifier，RNTI)作为加扰序列，加扰至待加扰比的位置，待加扰位置是
Figure PCTCN2018083827-appb-000010
确定的16个固定比特位置，具体的加扰方式可以是将加扰序列与待加扰位置对应的待加扰比特集合进行异或运算，将得到的值填入序列中对应的位置，得到加扰后序列。一般地，采用RNTI序列本身作为加扰序列，但也可以采用RNTI序列的一部分或者重复的RNTI序列作为加扰序列，不失一般性，本申请还是以RNTI序列本身作为加扰序列来进行描述。
(4)、最后，发送设备对加扰后序列进行polar编码，并发送编码后序列，即编码比特。
接收设备实现译码校验的过程具体如下：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000011
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合；
(3)、将加扰的固定比特视为信息比特进行译码，即新生成的待译码的信息比特集合(即待译码序列)为：
Figure PCTCN2018083827-appb-000012
(4)、接收设备在对上述待译码序列进行译码过程中，根据确定的加扰比特集合，在每次译码至加扰的固定比特的位置时，将译码得到的加扰比特值与加扰序列(可以是UE的RNTI)中对应的位置的值进行对比校验，确定是否一致，若二者一致，则判断该信息属于该发送设备(即该UE)，继续译码，否则退出译码，执行下一次检测。
第二种实现方式：待加扰比特的位置为第一个信息比特之前的若干个固定比特
发送设备实现编码发送的过程具体如下：
(1)、发送设备确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000013
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。例如，码长为64的初始构造序列为
Figure PCTCN2018083827-appb-000014
Figure PCTCN2018083827-appb-000015
Figure PCTCN2018083827-appb-000016
Figure PCTCN2018083827-appb-000017
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合；例如，当K＝32，码率为1/2时，选取位于第一个信息比特之前的若干个固定比特(示例的，这里选取16个固定比特)作为待加扰固定比特集合，所述的固定比特可以是连续的或者分布的(示例的，这里选取第一个信息比特之前、自然序最大的16个固定比特)，则：
信息比特集合为
Figure PCTCN2018083827-appb-000018
固定比特集合为
Figure PCTCN2018083827-appb-000019
首个信息比特之前的16个固定比特集合为
Figure PCTCN2018083827-appb-000020
打孔/缩短比特集合为[]；
(3)、发送设备为UE时，可选取RNTI作为加扰序列，加扰至待加扰比的位置，待加扰位置是
Figure PCTCN2018083827-appb-000021
确定的16个固定比特位置，具体的加扰方式可以是将加扰序列与待加扰位置对应的待加扰比特集合进行异或运算，将得到的值填入序列中对应的位置，得到加扰后序列。
(4)、最后，发送设备对加扰后序列进行polar编码，并发送编码后序列，即编码比特。
接收设备实现译码校验的过程具体如下：
(1)、接收设备确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000022
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合。
(3)、将加扰的固定比特视为信息比特进行译码，即新生成的待译码的信息比特集合(即待译码序列)为：
Figure PCTCN2018083827-appb-000023
(4)、接收设备在对上述待译码序列进行译码过程中，根据确定的加扰比特集合，在每次译码至加扰的固定比特的位置时，将译码得到的加扰比特值与加扰序列(可以是UE的RNTI)中对应的位置的值进行对比校验，确定是否一致，若二者一致，则判断该信息属于该发送设备(即该UE)，继续译码，否则退出译码，执行下一次检测。
第三种实现方式：待加扰比特的位置为固定比特中可靠度最低的若干个固定比特
发送设备实现编码发送的过程具体如下：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000024
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合；选取可靠度低的若干个固定比特作为待加扰固定比特集合，即该待加扰比特的位置为固定比特中可靠度最低的至少一个比特。
(3)、选取用户的RNTI作为加扰序列，加扰至待加扰比的位置，待加扰位置是
Figure PCTCN2018083827-appb-000025
确定的16个固定比特位置，具体的加扰方式可以是将加扰序列与待加扰位置对应的待加扰比特集合进行异或运算，将得到的值填入序列中对应的位置，得到加扰后序列。
(4)、最后，发送设备对加扰后序列进行polar编码，并发送编码后序列，即编码比特。
接收设备实现译码校验的过程具体如下：
(1)、接收设备按照与发送设备同样的方式，确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000026
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合。该方案中接收设备按照与发送设备同样的方式确定加扰比特集合，即加扰比特的位置(可靠度最低的若干个固定比特)。
(3)、将加扰的固定比特视为信息比特进行译码，即新生成的待译码的信息比特集合(即待译码序列)。
(4)、接收设备在对上述待译码序列进行译码过程中，根据确定的加扰比特集合，在每次译码至加扰的固定比特的位置时，将译码得到的加扰比特值与加扰序列(可以是UE的RNTI)中对应的位置的值进行对比校验，确定是否一致，若二者一致，则判断该信息属于该发送设备(即该UE)，继续译码，否则退出译码，执行下一次检测。
第四种实现方式：待加扰比特的位置为固定比特中位置最靠前的若干个固定比特
该方式的具体实现过程与前述几种方式类似，发送设备确定待加扰比特集合或者接收 设备确定加扰比特集合均是从固定比特集合选取在序列中的位置最靠前的若干个固定比特，具体的加扰、编码和译码校验的过程与前述方案一致。
第五种实现方式：待加扰比特的位置为固定比特中对应极化编码矩阵的行重或者汉明重由最高开始从高到低的若干个比特
该方式的具体实现过程与前述几种方式类似，发送设备确定待加扰比特集合或者接收设备确定加扰比特集合均是从固定比特集合选取在序列中对应极化编码矩阵的行重或者汉明重最高的若干个固定比特，具体的加扰、编码和译码校验的过程与前述方案一致。
第六种实现方式：待加扰比特的位置为辅助比特中位置最靠前的若干个辅助比特
发送设备实现编码发送的过程具体如下：
(1)、发送设备确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000027
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合。发送设备确定辅助比特中位置较靠前的若干比特作为待加扰比特集合，即待加扰比特的位置为辅助比特位置中最靠前的若干位置。
(3)、选取用户RNTI作为加扰序列，加扰至待加扰位置，具体的加扰方式可以是将加扰序列与待加扰位置对应的待加扰比特集合进行异或运算，将得到的值填入序列中对应的位置，得到加扰后序列。
(4)、最后，发送设备对加扰后序列进行polar编码，并发送编码后序列，即编码比特。
接收设备实现译码校验的过程具体如下：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000028
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合。通过与发送设备同样的方式在辅助比特中确定出加扰比特集合。
(3)、将加扰的辅助比特视为信息比特进行译码，即生成新的待译码的信息比特集合(即待译码序列)。
(4)、接收设备在对上述待译码序列进行译码过程中，根据确定的加扰比特集合，在每次译码至加扰的辅助比特时，进行译码后需要进行解扰，解扰之后才可以进行校验，根据校验结果判断该信息属于该发送设备(即该UE)，若校验成功继续译码，否则退出译码，执行下一次检测。
第七种实现方式：待加扰比特的位置为辅助比特中可靠度最高的若干个辅助比特
发送设备实现编码发送的过程具体如下：
(1)、发送设备确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000029
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合。发送设备确定辅助比特中可靠度从最高开始从高到低的若干比特作为待加扰比特集合，即待加扰比特的位置为辅助比特位置中可靠度最高的若干位置。
(3)、选取用户RNTI作为加扰序列，加扰至待加扰位置，具体的加扰方式可以是将加扰序列与待加扰位置对应的待加扰比特集合进行异或运算，将得到的值填入序列中对应的位置，得到加扰后序列。
(4)、最后，发送设备对加扰后序列进行polar编码，并发送编码后序列，即编码比特。
接收设备实现译码校验的过程具体如下：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000030
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合。通过与发送设备同样的方式在辅助比特中确定出加扰比特集合。
(3)、将加扰的辅助比特视为信息比特进行译码，即生成新的待译码的信息比特集合(即待译码序列)。
(4)、接收设备在对上述待译码序列进行译码过程中，根据确定的加扰比特集合，在每次译码至加扰的辅助比特时，进行译码后需要进行解扰，解扰之后才可以进行校验，根据校验结果判断该信息属于该发送设备(即该UE)，若校验成功则继续译码，否则退出译码，执行下一次检测。
第八种实现方式：待加扰比特的位置为辅助比特中可靠度最低的若干个辅助比特
该方式的具体实现过程与前述方式类似，发送设备确定待加扰比特集合或者接收设备确定加扰比特集合均是从辅助比特集合选取可靠度最低的若干个辅助比特，具体的加扰、编码和译码校验的过程与前述方案一致。
第九种实现方式：待加扰比特的位置为辅助比特中对应极化编码矩阵的行重或者汉明重由最高开始从高到低的若干个比特
该方式的具体实现过程与前述方式类似，发送设备确定待加扰比特集合或者接收设备确定加扰比特集合均是从辅助比特集合选取对应极化编码矩阵的行重或者汉明重由最高开始从高到低的若干个辅助比特，具体的加扰、编码和译码校验的过程与前述方案一致。
除了上述的九种实现方式，在该方案的具体应用中，发送设备和接收设备还可以从固定比特和辅助比特的并集中确定待加扰比特集合或者加扰比特集合，具体的该待加扰比特集合或者加扰比特集合可以是以下任一种：
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
发送设备确定完待加扰比特集合之后，进行加扰编码处理，然后映射在对应的资源上发送的方式与前述的方案类似，在此不再赘述。同样的，接收设备在加扰比特集合之后进行的译码和校验与前述的方案类似，在此不再赘述。
第十种实现方式：除了前述的从辅助比特和/或固定比特中确定加扰比特的位置，发送设备和接收设备还可以从信息比特和辅助比特的位置中确定待加扰比特的位置或者加扰比特的位置，以发送设备侧为例，确定待加扰比特的位置的具体的包括以下几种方式：
待加扰比特的位置为信息比特和辅助比特的位置中最前开始从前至后的若干个比特位置；待加扰比特的位置为信息比特和辅助比特的位置中可靠度从最高起从高到低若干个比特位置；待加扰比特的位置为信息比特和辅助比特的位置中可靠度从最低开始从低到高的若干个比特位置；待加扰比特的位置为信息比特和辅助比特的位置中对应极化编码矩阵的行重或者汉明重从最高开始从高到低的若干比特位置。
以待加扰比特的位置为信息比特和辅助比特的位置中最前开始从前至后的若干个比特位置为例：
发送设备侧的编码方法的具体实现方式为：
(1)、发送设备确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000031
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特以及辅助比特的位置，然后从所有的信息比特以及辅助比特的位置中将最前开始从前至后的若干个比特位置作为加扰比特的位置，然后再在所有的信息比特以及辅助比特的位置中除了加扰比特的位置之外的位置中确定信息比特的位置，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合将对应的比特进行配置。
(3)、选取用户RNTI作为加扰序列，加扰至待加扰位置，具体的加扰方式可以是将加扰序列与待加扰位置对应的待加扰比特集合进行异或运算，将得到的值填入序列中对应的位置，得到加扰后序列。
(4)、最后，发送设备对加扰后序列进行polar编码，并发送编码后序列，即编码比特。
接收设备侧的译码方法的具体实现方式为：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000032
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合；通过与发送设备同样的方式确定出加扰比特集合，即将包括信息比特和辅助比特所有比特位置中的最前面的若干个位置对应的比特确定为加扰比特集合。
(3)、将加扰的辅助比特视为信息比特进行译码，即生成新的待译码的信息比特集合(即待译码序列)。
(4)、接收设备在对上述待译码序列进行译码过程中，根据确定的加扰比特集合，在每次译码至加扰的辅助比特的位置时，进行译码后需要进行解扰，解扰之后才可以进行校验，根据校验结果判断该信息属于该发送设备(即该UE)，若校验成功则继续译码，否则退出译码，执行下一次检测。
其他的几种在信息比特和辅助比特的位置中确定加扰比特的位置的编码方式和译码方式与该方案类似，在此不再赘述。
第十一种实现方式
发送设备设备侧的编码方法的具体实现方式为：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000033
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合(K)，打孔/缩短比特集合，辅助比特集合。
(3)、选取用户RNTI作为加扰序列，加扰至待加扰位置，待加扰比特的位置是信息比特与辅助比特的并集(K’＝K+J+J’)中第integer(P 1*K)，第integer(P 2*K)，…，第integer(P J’*K)位置；该方案中还是在信息比特和辅助比特的所有比特位置中，按照一定的算法选择出若干个比特作为待加扰比特的位置，并不限于该Integer(X)算法一种方式。
a)其中P 1，P 2，…，P J’为J’个加扰比特在“信息比特与辅助比特的并集”中的位置的比例。例如，J’＝3，P 1＝40％,P 2＝50％,P 3＝60％，或P 1＝3/8,P 2＝1/2,P 3＝5/8。
b)Integer(X)为对X取整，可以为下取整，四舍五入，上取整。
(4)、最后，发送设备对加扰后序列进行polar编码，并发送编码后序列，即编码比特。
接收设备侧的译码方法的具体实现方式为：
(1)、确定Polar的初始构造序列(长度为N)
Figure PCTCN2018083827-appb-000034
所述构造序列为母码长度下polar码极化信道的相对可靠度排序。该序列可以通过查表的方式或者在线计算的方式或者半查表半计算的方式获得。
(2)、根据信息比特数目K，编码码长M，速率匹配方式，和初始构造序列，确定信息比特集合，固定比特集合，打孔/缩短比特集合，辅助比特集合；通过与发 送设备同样的方式在辅助比特中确定出加扰比特集合，即按照取整算法Integer(X)将包括信息比特和辅助比特所有比特位置中的若干个位置对应的比特确定为加扰比特集合。
(3)、将加扰的辅助比特视为信息比特进行译码，即生成新的待译码的信息比特集合(即待译码序列)。
(4)、接收设备在对上述待译码序列进行译码过程中，根据确定的加扰比特集合，在每次译码至加扰比特的位置时，对译码结果进行解扰，然后进行校验，根据校验结果判断该信息属于该发送设备(即该UE)，若校验成功则继续译码，否则退出译码，执行下一次检测。
在前述任一实现方式中，辅助比特包括以下至少一种比特：CRC比特、PC比特以及Hash校验比特。
上述任一种实现方式中提供的编码方法和译码算法，在编码的过程中利用polar编码中的固定比特和或辅助比特中选择一些比特进行加扰，然后在进行polar编码发送，在译码过程中可以在译码至加扰比特时根据预先获取的加扰比特进行校验，提前排除不属于目标UE的待检测信号，从而达到降低译码时延，加速信道检测的目的。
在上述方案的具体实现中，加扰的方法或者确定加扰比特的位置的具体实现方式还包括以下实现方式：
第一：加扰方法
奇校验或偶校验加扰的用法
偶校验：校验方程的二进制和+RNTI在校验比特位置的二进制值＝二进制0。编码端操作，将校验位上满足校验方程的二进制值直接与RNTI在校验比特位置的二进制值相加，获得校验位发送值。
奇校验：校验方程的二进制和+RNTI在校验比特位置的二进制值＝二进制1。编码端操作，将校验位上满足校验方程的二进制值直接与RNTI在校验比特位置的二进制值相加，并取反，获得校验位发送值。
第二：按比例寻找加扰(校验)比特位置的方法
目标：有别于现有技术将加扰(校验)比特配置在最后的若干个非冻结比特位置，本申请在满足虚警概率的要求下，尽量将加扰(校验)比特位置提前，以获得早停的好处(早停即在译码不可能成功时，尽早地结束译码，以获得功耗节省)。
预备步骤：确定速率匹配方案，并获取可靠度序列。
第一步：按可靠度选出非冻结比特位置集合
其中非冻结比特包含信息比特、RNTI加扰比特、校验比特(如奇偶校验、CRC校验、Hash校验等)。
第二步：将非冻结比特位置按子信道序号(sub-channel index)顺序按特定比例分段，具体分段方式如下表所示：
分段一(包含J 1个加扰/校验比特) 分段二(包含J 2个加扰/校验比特)
其中，分段一有J1个校验比特，分段二有J2个校验比特。(J1，J2的值待定)
第三步：根据如下公式(1)计算该分段下的虚警概率(False Alarm Rate，FAR)。
Figure PCTCN2018083827-appb-000035
其中，BLER 1为分段一在给定SNR输入下的误块率，即其中至少1个比特译错的概率。BLER 2为分段二给定SNR输入下的误块率。其误块率既可以通过高斯近似/密度进化(GA/DE)计算得到，又可以通过蒙特卡洛仿真等其它方法得到。
根据简单的换算，可得到FAR的范围为：
Figure PCTCN2018083827-appb-000036
第四步：计算满足虚警概率需求下的J1和J2分配
由于目标是在虚警概率满足要求是最大地获得早停的好处，因此要将尽量多的加扰(校验)比特配置在分段一。
由于系统的约束条件为①FAR＜FAR requirement、②J 1+J 2＝J total，FAR requirement为系统最大可容忍的虚警概率，J total为该Polar码含有的总校验(加扰)比特数量。其中在该限定条件下，计算得到最大的J1值即为对于对于早停来说最靠前的校验(加扰)比分配结果。
实际中，可以用如下简化流程来确定每一个校验(加扰)比特的位置。
将非冻结比特编号为1到K’
For k＝1 to K’
将第1到第k个非冻结比特作为分段一，将第k+1到第K’个非冻结比特作为分段二。
给定SNR下，计算BLER 2(显然，BLER 2随k增加而降低)
If BLER 2＜2 -1,则标记当前k为第1个校验(加扰)比特位置；
If BLER 2＜2 -2,则标记当前k为第2个校验(加扰)比特位置；
If BLER 2＜2 -3,则标记当前k为第3个校验(加扰)比特位置；
…
If分段一中的校验(加扰)比特数目达到设定值，则跳出循环。
Endfor
输出所有校验(加扰)比特的位置。
另一种确定加扰比特的方式，实际中，可以用如下简化流程来确定每一个校验(加扰)比特的位置。
由于通过对各种码长码率下的校验(加扰)比特的位置进行计算，发现其前3个校验 (加扰)比特的位置大致在前40％,50％,60％的非冻结比特位置处。因此本申请提出如下更简便的方法：
第一步：获取前若干个校验/加扰比特位置的百分比(P 1％,P 2％,P 3％,…)，并将其换算为第K 1,K 2,K 3个位置。如：P 1％×K'≈K 1/K'。其中P 1％,P 2％,P 3％可为40％,50％,60％或30％，40％，50％，或3/8，4/8，5/8等预设值。
第二步：图8为本申请提供的一种校验/加扰比特的位置示意图，如图8所示，将校验/加扰比特配置在给定位置。
又一种确定加扰(校验)比特位置的方法：按w min和比例寻找加扰(校验)比特位置
第一步：按可靠度选出非冻结比特位置集合
其中非冻结比特包含信息比特、RNTI加扰比特、校验比特(如奇偶校验、CRC校验、Hash校验等)。
第二步：图9为本申请提供的又一种校验/加扰比特的位置示意图，如图9所示，将非冻结比特位置按子信道序号(sub-channel index)顺序配置，并按“新保护点二(简化B)”方法选定加扰/校验比特位置的区域。
第三步：在选定区域内，选择特定行重的位置为加扰/校验比特位置。
另一种确定加扰(校验)比特位置的方法：
第一步：确定速率匹配方式、可靠度序列；
第二步：构造一个(M,K’)极化码，码长为M，非冻结长为K’：
K’＝K+J+J’；
第三步：确定辅助比特位置：
J CRC比特；
K’个非冻结比特位置中最靠后的J个位置；
J’＝J EC+J ET PC比特(按行重和区域选择)；
其中，J EC个用于纠错/筛选路径，J ET个用于早停。
第四步：确定校验比特的值
(选项一)所有辅助比特使用同一套移位寄存器生成
J CRC比特从寄存器最终状态取值
J’PC比特从寄存器中间状态取值
(选项二)使用两套移位寄存器
J CRC比特使用一套移位寄存器(从寄存器最终状态取值)
J’PC比特使用另一套移位寄存器(从寄存器中间状态取值)
图10为本申请提供的另一种校验/加扰比特的位置示意图，图11为本申请提供的另一种校验/加扰比特的位置确定流程图，该方案的步骤3的具体实现方法如图10和11所 示。
其中，K J’,K 3,K 2,K 1的值可以使用简化方法获得，如：
·K J’＝50％×K’-J
·K 3＝K 2＝K 1＝10％×K’
PC比特的具体位置为相应选定区域内，满足特定行重的位置，如：
初始化：
预设选定区域内PC比特数量，并准备相应长度的先进先出缓存(FIFO Buffer)来存储PC位置
将最小行重w min初始化为一最大值
检查行重并确定PC比特位置：
按子信道序号(j)从后往前检查每个位置对应的行重
Figure PCTCN2018083827-appb-000037
图12为本申请提供的一种寄存器的示意图，其中，第四步中的寄存器取值的具体方法如下：当译至某个加扰/校验的比特时，需要从寄存器的某个位置取值，寄存器结构如图12所示，其中信息比特从右侧输入。
两种可能的寄存器操作方法如下：
寄存器模式一：只在纯信息比特时移位(不包含冻结比特和各种辅助比特)，当遇到加扰/校验位置时，从寄存器的第i个位置取值，i＝mod((1-k+C),寄存器长度)；
其中，寄存器长度可以为J+J’，即所有加扰/校验比特的数目，l意为当前遇到第l个加扰/校验比特，k为当前已经译完k个纯信息比特。Mod为取模操作，其结果为0到(寄存器长度-1)的非负整数。C为偏移量，可为任意常数。
寄存器模式二：在所有比特时移位(包含纯信息比特、冻结比特和各种辅助比特)，当遇到加扰/校验位置时，从寄存器的第i个位置取值，i＝mod((1-n+C),寄存器长度)；
其中，寄存器长度可以为J+J’，即所有加扰/校验比特的数目，l意为当前遇到第l个加扰/校验比特，n意为当前比特在母码中的位置(包含纯信息比特、冻结比特和各种辅助比特)。Mod为取模操作，其结果为0到(寄存器长度-1)的非负整数。C为偏移量，可为任意常数。
图13为本申请提供的编码装置的结构示意图，如图13所示，该编码装置10包括：
处理模块11，用于获取信息比特的位置、固定比特的位置和辅助比特的位置；
所述处理模块11还用于根据所述信息比特的位置、所述固定比特的位置和所述辅助 比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
所述处理模块11还用于获取加扰序列，并根据所述加扰序列对待加扰比特集合中的比特进行加扰处理得到加扰后序列；所述待加扰比特集合是根据所述固定比特和/或所述辅助比特确定的；
所述处理模块11还用于对所述加扰后序列进行极化编码得到编码后序列；
发送模块12，用于发送所述编码后序列。
本实施例提供的编码装置，用于实现前述任一方法实施例提供的发送设备侧的技术方案，其实现原理和技术效果类似，在此不再赘述。
所述处理模块获取的所述加扰序列为所述编码装置的无线网络临时标识RNTI。
可选的，所述处理模块11确定的所述待加扰比特集合包括以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
可选的，所述处理模块11具体用于：
将所述加扰序列与所述待加扰比特集合中对应的比特进行异或操作，将得到的比特配置在对应位置，得到所述加扰后序列。
可选的，所述辅助比特包括以下至少一种比特：
CRC比特、PC比特以及哈希比特。
可选的，当所述加扰序列的长度大于所述待加扰比特集合中的比特数量，则所述处理模块11还用于：
获取所述加扰序列中与所述待加扰比特集合中的比特数量相同的比特作为新的加扰序列。
上述任一方案提供的编码装置，用于实现前述任一方法实施例提供的发送设备侧的技 术方案，其实现原理和技术效果类似，在此不再赘述。
在本申请提供的编码装置的另一实施例中，该处理模块11用于确定信息比特和辅助比特的位置和固定比特的位置；
所述处理模块11还用于根据所述信息比特和辅助比特的位置，确定待加扰比特的位置；
所述处理模块11还用于根据所述待加扰比特的位置、所述信息比特和辅助比特的位置、所述固定比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
所述处理模块11还用于获取加扰序列，并根据所述加扰序列对所述待加扰比特的位置对应的比特进行加扰处理得到加扰后序列；
所述处理模块11还用于对所述加扰后序列进行极化编码得到编码后序列；
发送模块12，用于将所述编码后序列发送给接收设备。
可选的，所述处理模块11确定的所述待加扰比特的位置包括以下任一一种位置：
所述信息比特和辅助比特的位置中从最前开始从前至后的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最高起高到低的至少一个比特位置；
所述信息比特和辅助比特的位置中可靠度从最低起从低到高的至少一个比特位置；
所述信息比特和辅助比特的位置中对应极化编码矩阵的行重从最高开始从高到低的至少一个比特位置。
本实施例提供的编码装置，用于实现前述任一方法实施例提供的发送设备侧的技术方案，其实现原理和技术效果类似，在此不再赘述。
图14为本申请提供的译码装置的结构示意图；如图14所示，该译码装置20包括：
获取模块21，用于获取待译码序列；
处理模块22，用于对所述待译码序列按照顺序进行译码和校验；其中，当译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码；所述加扰比特是采用加扰序列对加扰比特集合中的比特加扰后得到的，所述加扰比特集合是根据所述固定比特和/或所述辅助比特确定的。
可选的，所述加扰比特为固定比特，所述处理模块具体用于：
根据译码得到的加扰比特值与预先获取的加扰比特值进行校验，如果译码得到的加扰比特值与预先获取的加扰比特值不同，则校验失败。
本实施例提供的译码装置，用于实现前述任一方法实施例提供的接收设备侧的技术方案，其实现原理和技术效果类似，在此不再赘述。
可选的，所述加扰序列为所述发送设备的RNTI。
可选的，所述获取模块21确定的加扰比特集合包括以下任一种集合：
所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特中在信息比特之前的至少一个比特组成的集合；
所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
可选的，所述处理模块22具体用于：
确定信息比特的位置、固定比特的位置和辅助比特的位置；
根据所述固定比特的位置和/或所述辅助比特的位置确定所述加扰比特集合；
按照顺序对所述待译码序列进行极化译码，在译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码。
可选的，所述辅助比特包括以下至少一种比特：
CRC比特、PC比特以及哈希比特。
上述任一实现方式提供的译码装置，用于实现前述任一方法实施例提供的接收设备侧的技术方案，其实现原理和技术效果类似，在此不再赘述。
应理解，在上述编码装置或者译码装置的实现中，处理模块可以被具体实现为处理器，发送模块可以被实现为发送器。
本申请还提供一种发送设备，包括：存储器、处理器、发送器以及计算机程序，所述计算机程序存储在所述存储器中，所述处理器运行所述计算机程序执行前述任一实施例提供的编码方法。
在上述发送设备的具体实现中，处理器的数量为至少一个，用来执行存储器存储的执行指令，即计算机程序。使得发送设备通过通信接口与接收设备之间进行数据交互来执行上述任一实现方式提供的编码方法，可选的，存储器还可以集成在处理器内部。
本申请还提供一种接收设备，包括：存储器、处理器以及计算机程序，所述计算机程序存储在所述存储器中，所述处理器运行所述计算机程序执行前述任一实施例提供的译码方法。
在上述接收设备的具体实现中，处理器的数量为至少一个，用来执行存储器存储的执行指令，即计算机程序。使得接收设备通过通信接口与发送设备之间进行数据交互，来执行上述各种实施方式提供的译码方法，可选的，存储器还可以集成在处理器内部。
本申请还提供一种存储介质，包括：可读存储介质和计算机程序，所述计算机程序用于实现前述任一实施例提供的编码方法。
本申请还提供一种存储介质，包括：可读存储介质和计算机程序，所述计算机程序用 于实现前述任一实施例提供的译码方法。
本申请还提供一种程序产品，该程序产品包括计算机程序(即执行指令)，该计算机程序存储在可读存储介质中。发送设备的至少一个处理器可以从可读存储介质读取该计算机程序，至少一个处理器执行该计算机程序使得发送设备实施前述各种实施方式提供的编码方法。
本申请还提供一种程序产品，该程序产品包括计算机程序(即执行指令)，该计算机程序存储在可读存储介质中。接收设备的至少一个处理器可以从可读存储介质读取该计算机程序，至少一个处理器执行该计算机程序使得接收设备实施上述各种实施方式提供的译码方法。
在发送设备或者接收设备的具体实现中，应理解，处理器可以是中央处理单元(英文：Central Processing Unit，简称：CPU)，还可以是其他通用处理器、数字信号处理器(英文：Digital Signal Processor，简称：DSP)、专用集成电路(英文：Application Specific Integrated Circuit，简称：ASIC)等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件模块组合执行完成。
实现上述各方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一可读取存储器中。该程序在执行时，执行包括上述各方法实施例的步骤；而前述的存储器(存储介质)包括：只读存储器(英文：read-only memory，缩写：ROM)、RAM、快闪存储器、硬盘、固态硬盘、磁带(英文：magnetic tape)、软盘(英文：floppy disk)、光盘(英文：optical disc)及其任意组合。

Claims (52)

  1. 一种编码方法，其特征在于，所述方法包括：
    发送设备获取信息比特的位置、固定比特的位置和辅助比特的位置；
    所述发送设备根据所述信息比特的位置、所述固定比特的位置和所述辅助比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
    所述发送设备获取加扰序列，并根据所述加扰序列对待加扰比特集合中的比特进行加扰处理得到加扰后序列；所述待加扰比特集合是根据所述固定比特和/或所述辅助比特确定的；
    所述发送设备对所述加扰后序列进行极化编码得到编码后序列；
    所述发送设备发送所述编码后序列。
  2. 根据权利要求1所述的方法，其特征在于，所述加扰序列为所述发送设备的无线网络临时标识RNTI序列。
  3. 根据权利要求1或2所述的方法，其特征在于，所述待加扰比特集合为部分辅助比特。
  4. 根据权利要求1-3中任一项所述的方法，其特征在于，所述发送所述编码后序列包括：所述发送设备对所述编码后序列进行速率匹配和调制后，映射在相应的资源上进行发送。
  5. 根据权利要求1-4中任一项所述的方法，其特征在于，所述待加扰比特集合包括以下任一种集合：
    所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特中在信息比特之前的至少一个比特组成的集合；
    所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
  6. 根据权利要求1至5任一项所述的方法，其特征在于，根据所述加扰序列对所述待加扰比特集合中的比特进行加扰处理得到加扰后序列，包括：
    所述发送设备将所述加扰序列与所述待加扰比特集合中对应的比特进行异或操作，将得到的比特配置在对应位置，得到所述加扰后序列。
  7. 根据权利要求1至6任一项所述的方法，其特征在于，所述辅助比特包括以下至少一种比特：
    循环冗余校验CRC比特、奇偶校验PC比特以及哈希比特。
  8. 根据权利要求1至7任一项所述的方法，其特征在于，当所述加扰序列的长度大于所述待加扰比特集合中的比特数量，则根据所述加扰序列对所述待加扰比特集合中的比特进行加扰处理得到加扰后序列之前，所述方法还包括：
    所述发送设备获取所述加扰序列中与所述待加扰比特集合中的比特数量相同的比特作为新的加扰序列。
  9. 一种译码方法，其特征在于，包括：
    接收设备获取待译码序列；
    所述接收设备对所述待译码序列按照顺序进行译码和校验；其中，当译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码；所述加扰比特是采用加扰序列对加扰比特集合中的比特加扰后得到的，所述加扰比特集合是根据所述固定比特和/或所述辅助比特确定的。
  10. 根据权利要求9所述的方法，其特征在于，所述加扰比特为固定比特，所述对所述加扰比特进行校验包括：
    根据译码得到的加扰比特值与预先获取的加扰比特值进行校验，如果译码得到的加扰比特值与预先获取的加扰比特值不同，则校验失败。
  11. 根据权利要求9或10所述的方法，其特征在于，所述加扰序列为所述发送设备的无线网络临时标识RNTI。
  12. 根据权利要求9-11中任一项所述的方法，其特征在于，所述加扰比特集合为部分辅助比特。
  13. 根据权利要求9-12中任一项所述的方法，其特征在于，所述加扰比特集合包括以下任一种集合：
    所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特中在信息比特之前的至少一个比特组成的集合；
    所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
  14. 根据权利要求9至13任一项所述的方法，其特征在于，所述接收设备对所述待译码序列按照顺序进行译码和校验，包括：
    所述接收设备确定信息比特的位置、固定比特的位置和辅助比特的位置；
    所述接收设备根据所述固定比特的位置和/或所述辅助比特的位置确定所述加扰比特集合；
    所述接收设备按照顺序对所述待译码序列进行极化译码，在译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码。
  15. 根据权利要求9至14任一项所述的方法，其特征在于，所述辅助比特包括以下至少一种比特：
    循环冗余校验CRC比特、奇偶校验PC比特以及哈希比特。
  16. 一种编码装置，其特征在于，所述装置包括：
    处理模块，用于获取信息比特的位置、固定比特的位置和辅助比特的位置；
    所述处理模块还用于根据所述信息比特的位置、所述固定比特的位置和所述辅助比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
    所述处理模块还用于获取加扰序列，并根据所述加扰序列对待加扰比特集合中的比特进行加扰处理得到加扰后序列；所述待加扰比特集合是根据所述固定比特和/或所述辅助比特确定的；
    所述处理模块还用于对所述加扰后序列进行极化编码得到编码后序列；
    发送模块，用于发送所述编码后序列。
  17. 根据权利要求16所述的装置，其特征在于，所述处理模块获取的所述加扰序列为所述编码装置的无线网络临时标识RNTI。
  18. 根据权利要求16或17所述的装置，其特征在于，所述待加扰比特集合为部分辅助比特。
  19. 根据权利要求16-18中任一项所述的装置，其特征在于，所述发送模块发送所述编码后序列前，所述处理模块还用于：对所述编码后序列进行速率匹配和调制后，映射在相应的资源上。
  20. 根据权利要求16-19中任一项所述的装置，其特征在于，所述处理模块确定的所述待加扰比特集合包括以下任一种集合：
    所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特中在信息比特之前的至少一个比特组成的集合；
    所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
  21. 根据权利要求16至20任一项所述的装置，其特征在于，所述处理模块具体用于：
    将所述加扰序列与所述待加扰比特集合中对应的比特进行异或操作，将得到的比特配置在对应位置，得到所述加扰后序列。
  22. 根据权利要求16至21任一项所述的装置，其特征在于，所述辅助比特包括以下至少一种比特：
    循环冗余校验CRC比特、奇偶校验PC比特以及哈希比特。
  23. 根据权利要求16至22任一项所述的装置，其特征在于，当所述加扰序列的长度大于所述待加扰比特集合中的比特数量，则所述处理模块还用于：
    获取所述加扰序列中与所述待加扰比特集合中的比特数量相同的比特作为新的加扰序列。
  24. 一种译码装置，其特征在于，包括：
    获取模块，用于获取待译码序列；
    处理模块，用于对所述待译码序列按照顺序进行译码和校验；其中，当译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码；所述加扰比特是采用加扰序列对加扰比特集合中的比特加扰后得到的，所述加扰比特集合是根据所述固定比特和/或所述辅助比特确定的。
  25. 根据权利要求24所述的装置，其特征在于，所述加扰比特为固定比特，所述处理模块具体用于：
    根据译码得到的加扰比特值与预先获取的加扰比特值进行校验，如果译码得到的加扰比特值与预先获取的加扰比特值不同，则校验失败。
  26. 根据权利要求24或25所述的装置，其特征在于，所述加扰序列为所述发送设备的无线网络临时标识RNTI。
  27. 根据权利要求24-26中任一项所述的装置，其特征在于，所述加扰比特集合为部分辅助比特。
  28. 根据权利要求24-27中任一项所述的装置，其特征在于，所述加扰比特集合包括以下任一种集合：
    所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特中在信息比特之前的至少一个比特组成的集合；
    所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
  29. 根据权利要求24至28任一项所述的装置，其特征在于，所述处理模块具体用于：
    确定信息比特的位置、固定比特的位置和辅助比特的位置；
    根据所述固定比特的位置和/或所述辅助比特的位置确定所述加扰比特集合；
    按照顺序对所述待译码序列进行极化译码，在译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码。
  30. 根据权利要求24至29任一项所述的装置，其特征在于，所述辅助比特包括以下至少一种比特：
    循环冗余校验CRC比特、奇偶校验PC比特以及哈希比特。
  31. 一种编码设备，其特征在于，所述装置包括：
    处理器，所述处理器用于获取信息比特的位置、固定比特的位置和辅助比特的位置；
    所述处理器还用于根据所述信息比特的位置、所述固定比特的位置和所述辅助比特的位置，在待编码序列中配置信息比特、固定比特和辅助比特；
    所述处理器还用于获取加扰序列，并根据所述加扰序列对待加扰比特集合中的比特进行加扰处理得到加扰后序列；所述待加扰比特集合是根据所述固定比特和/或所述辅助比特确定的；
    所述处理器还用于对所述加扰后序列进行极化编码得到编码后序列。
  32. 根据权利要求31所述的设备，其特征在于，所述设备还包括：
    存储器，所述存储器用于存储由所述处理器执行的程序。
  33. 根据权利要求31或32所述的设备，其特征在于，所述处理器获取的所述加扰序列为所述编码装置的无线网络临时标识RNTI。
  34. 根据权利要求31-33中任一项所述的设备，其特征在于，所述待加扰比特集合为部分辅助比特。
  35. 根据权利要求31-34中任一项所述的设备，其特征在于，所述处理器确定的所述待加扰比特集合包括以下任一种集合：
    所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特中在信息比特之前的至少一个比特组成的集合；
    所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
  36. 根据权利要求31至35任一项所述的设备，其特征在于，所述处理器还用于：
    将所述加扰序列与所述待加扰比特集合中对应的比特进行异或操作，将得到的比特配置在对应位置，得到所述加扰后序列。
  37. 根据权利要求31至36任一项所述的设备，其特征在于，所述辅助比特包括以下至少一种比特：
    循环冗余校验CRC比特、奇偶校验PC比特以及哈希比特。
  38. 根据权利要求31至37任一项所述的设备，其特征在于，当所述加扰序列的长度大于所述待加扰比特集合中的比特数量，则所述处理模块还用于：
    获取所述加扰序列中与所述待加扰比特集合中的比特数量相同的比特作为新的加扰序列。
  39. 根据权利要求31至38任一项所述的设备，其特征在于，所述设备还包括发送器，用于发送所述编码后序列。
  40. 根据权利要求39所述的设备，其特征在于，所述发送器发送所述编码后序列前，所述处理器还用于：对所述编码后序列进行速率匹配和调制后，映射在相应的资源上。
  41. 一种译码设备，其特征在于，包括：
    处理器，用于获取待译码序列，对所述待译码序列按照顺序进行译码和校验；其中，当译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码；所述加扰比特是采用加扰序列对加扰比特集合中的比特加扰后得到的，所述加扰比特集合是根据所述固定比特和/或所述辅助比特确定的。
  42. 根据权利要求41所述的设备，其特征在于，所述设备还包括：
    存储器，所述存储器用于存储由所述处理器执行的程序。
  43. 根据权利要求41或42所述的设备，其特征在于，所述加扰比特为固定比特，所述处理模块具体用于：
    根据译码得到的加扰比特值与预先获取的加扰比特值进行校验，如果译码得到的加扰比特值与预先获取的加扰比特值不同，则校验失败。
  44. 根据权利要求41-43中任一项所述的设备，其特征在于，所述加扰序列为所述发送设备的无线网络临时标识RNTI。
  45. 根据权利要求41-44中任一项所述的设备，其特征在于，所述加扰比特集合为部分辅助比特。
  46. 根据权利要求41-45中任一项所述的设备，其特征在于，所述加扰比特集合包括以下任一种集合：
    所述固定比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特中在信息比特之前的至少一个比特组成的集合；
    所述固定比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中位置由最前开始从前到后的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最低开始从低到高的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中可靠度由最高开始从高到低的至少一个比特组成的集合；
    所述固定比特以及所述辅助比特中对应极化编码矩阵的行重由最高开始从高到低的至少一个比特组成的集合。
  47. 根据权利要求41至46任一项所述的设备，其特征在于，所述处理器还用于：
    确定信息比特的位置、固定比特的位置和辅助比特的位置；
    根据所述固定比特的位置和/或所述辅助比特的位置确定所述加扰比特集合；
    按照顺序对所述待译码序列进行极化译码，在译码至加扰比特时，对所述加扰比特进行校验，若校验失败，则结束译码。
  48. 根据权利要求41至47任一项所述的设备，其特征在于，所述辅助比特包括以下至少一种比特：
    循环冗余校验CRC比特、奇偶校验PC比特以及哈希比特。
  49. 一种存储介质，其特征在于，所述可读存储介质存储有计算机程序，所述计算机程序用于编码设备实现根据权利要求1-8中任一项所述的编码方法。
  50. 一种存储介质，其特征在于，所述可读存储介质存储有计算机程序，所述计算机程序用于译码设备实现根据权利要求9-15中任一项所述的译码方法。
  51. 一种程序产品，其特征在于，所述程序存储在可读存储介质中，所述计算机程序用于编码设备实现根据权利要求1-8中任一项所述的编码方法。
  52. 一种程序产品，其特征在于，所述程序存储在可读存储介质中，所述计算机程序用于译码设备实现根据权利要求9-15中任一项所述的译码方法。
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