WO2018192189A1 - 一种阵列基板和显示装置 - Google Patents

一种阵列基板和显示装置 Download PDF

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Publication number
WO2018192189A1
WO2018192189A1 PCT/CN2017/104758 CN2017104758W WO2018192189A1 WO 2018192189 A1 WO2018192189 A1 WO 2018192189A1 CN 2017104758 W CN2017104758 W CN 2017104758W WO 2018192189 A1 WO2018192189 A1 WO 2018192189A1
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Prior art keywords
signal line
layer signal
substrate
layer
array substrate
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PCT/CN2017/104758
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English (en)
French (fr)
Inventor
冀新友
王彦强
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/767,794 priority Critical patent/US10578938B2/en
Publication of WO2018192189A1 publication Critical patent/WO2018192189A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0445—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to an array substrate and a display device.
  • FIG. 1 is a bottom view of a fanout area of an array substrate in the related art.
  • 2 is a cross-sectional view of the array substrate of FIG. 1 in the AA direction, the non-display area of the array substrate is provided with: a substrate substrate 101, a gate metal line 102, a gate insulating layer 103, a data signal line 104, and a passivation layer (PVX). ) 105 and touch signal trace 106.
  • PVX passivation layer
  • the touch signal trace 106 has an angle with the extending direction of the gate metal line 102 and the data signal line 104, and the touch signal trace 106 intersects the gate metal line 102 and the data signal line 104.
  • the step difference is large, and the touch signal trace 106 is prone to break at the above position (as shown in FIG. 3), which affects the touch.
  • the present disclosure provides an array substrate and a display device for solving the problem that the signal line in the non-display area of the array substrate has a large step difference at the intersection of the signal lines disposed under the array substrate and is prone to breakage.
  • an array substrate including: a substrate substrate, wherein the substrate substrate includes a display area and a non-display area; and at least three layers of mutually insulated signal lines disposed on the non-display In the region, the at least three layers of mutually insulated signal lines include a first layer signal line and a second layer signal line extending in the same direction, and the first layer signal line and the second layer signal a third layer signal line disposed in a cross-insulating manner, wherein a distance between the third layer signal line and the base substrate is greater than a distance between the first layer signal line and the second layer signal line and the base substrate a distance between the orthographic projection of the first layer signal line on the substrate substrate and the orthographic projection of the third layer signal line on the substrate substrate, the second layer of signal lines being lined An orthographic projection on the base substrate and an orthographic projection of the third layer signal line on the substrate substrate have a second overlapping region, the first overlapping region and the second overlapping region not at least partially overlapping
  • the second layer signal line includes alternating straight portions and protrusions, and the extending direction of the straight portion is perpendicular or substantially perpendicular to an extending direction of the third layer signal line, and the protruding portion
  • the protruding direction has an angle with the extending direction of the straight portion, and the first overlapping region and the orthographic projection of the protruding portion on the base substrate at least partially do not overlap.
  • the protrusion protrudes toward an extending direction of the signal line of the third layer.
  • the protrusions are disposed in one-to-one correspondence with the third layer signal lines.
  • an orthographic projection of the protrusion on the base substrate is located in an orthographic projection of the third layer signal line on the base substrate.
  • the width of the protrusion in the extending direction of the second layer signal line is equal to or smaller than the width of the third layer signal line in the extending direction of the second layer signal line.
  • the first layer signal line is a straight line.
  • the protrusion has a right-angle U-shape.
  • a depth of the U-shaped groove of the protruding portion is the same as a width of the first layer signal line in a direction in which the third layer signal line extends.
  • the orthographic projection of the first layer signal line on the base substrate does not overlap with the orthographic projection of the bottom of the U-shaped groove of the protrusion on the substrate.
  • the first overlapping area and the second overlapping area do not overlap at all.
  • the third layer signal line is a signal line of the at least three layers of signal lines that is farthest from the substrate.
  • a gate metal line, a first insulating layer, a data signal line, a second insulating layer, and a touch signal trace are sequentially disposed in the non-display area of the array substrate, wherein the gate metal line or the data signal line is One is a first layer signal line, the other is a second layer signal line, and the touch signal trace is the third layer signal line.
  • the present disclosure also provides a display device including the above array substrate.
  • the third layer signal line has at least a partial region at the intersection with the first signal line and the second signal line, and only has a first layer signal line or a second layer signal line below, so that Appropriately reduce the step difference of the third layer signal line at the intersection position, reduce the fracture problem caused by the large difference of the third layer signal line due to the step difference at the intersection position, and improve the reliability of the array substrate.
  • FIG. 1 is a bottom view of a fanout area of a TDDI array substrate in the related art
  • Figure 2 is a cross-sectional view of the array substrate of Figure 1 taken along the line A-A;
  • FIG. 3 is a schematic diagram of a break of a touch signal trace in the array substrate of FIG. 2;
  • FIG. 4 is a schematic diagram showing the shape of a second layer of signal lines on an array substrate, in accordance with some embodiments of the present disclosure
  • FIG. 5 is a top plan view of a first layer signal line and a second layer signal line on an array substrate according to some embodiments of the present disclosure
  • FIG. 6 is a bottom view of a first layer signal line, a second layer signal line, and a third layer signal line on an array substrate, in accordance with some embodiments of the present disclosure
  • FIG. 7 is a bottom view of a second layer signal line and a third layer signal line on an array substrate, in accordance with some embodiments of the present disclosure.
  • Figure 8 is a cross-sectional view of the array substrate of Figure 6 taken along line B-B;
  • FIG. 9 is a bottom view of a first layer signal line, a second layer signal line, and a third layer signal line on an array substrate, in accordance with some embodiments of the present disclosure.
  • FIG. 10 is a bottom view of a second layer signal line and a third layer signal line on an array substrate, in accordance with some embodiments of the present disclosure.
  • an embodiment of the present disclosure provides an array substrate, including a substrate substrate 201, the substrate substrate 201 includes a display area and a non-display area, and the non-display area is provided with at least three layers.
  • Inter-insulated signal lines including a first layer of signal lines 202 and a second layer of signal lines 204 extending in the same direction, and insulated from the first layer of signal lines 202 and the second layer of signal lines 204 a third layer signal line 206 is disposed, a distance between the third layer signal line 206 and the base substrate 201 is greater than a distance between the first layer signal line 202 and the base substrate 201 and is greater than The distance between the second layer signal line 204 and the base substrate 201, the orthographic projection of the first layer signal line 202 on the base substrate 201 and the positive of the third layer signal line 206 on the base substrate 201 The projection has a first overlapping area, and the orthographic projection of the second layer signal line 204 on the substrate substrate 201 and the orthographic projection of the
  • the distance between the first layer signal line 202 and the base substrate 201 is smaller than the distance between the second layer signal line 204 and the base substrate 201; or the first layer signal line 202 is The distance between the base substrates 201 may also be smaller than the distance between the second layer signal lines 204 and the base substrate 201.
  • different layers in at least three layers may represent different distances from the substrate 201, or different layers may represent different layers in the process of manufacturing the substrate.
  • one or more signal lines 202 may be disposed in the first layer
  • one or more signal lines 204 may be disposed in the second layer
  • one or more signal lines 206 may be disposed in the third layer.
  • the first layer signal line 202 and the second layer signal line 204 are both located below the third layer signal line 206, and the first layer signal line 202 and the second layer signal line 204 are The extension direction of the third layer of signal lines 206 is different from that of the third layer of signal lines 206.
  • the first layer of signal lines is An orthographic projection of 202 on the substrate substrate 201 and a first overlap region of the orthographic projection of the third layer signal line 206 on the substrate substrate 201, and an orthographic projection of the second layer signal line 204 on the substrate substrate 201
  • the second overlapping region of the orthographic projection of the third layer signal line 206 on the substrate substrate 201 is disposed to be at least partially non-overlapping, that is, the third layer signal line 206 has at least a partial region at a crossing position, and only has a portion below One layer of signal line 202 or second layer of signal line 204, so that the third layer signal line 206 can be appropriately lowered
  • the step difference at the intersection position reduces the fracture problem of the third layer signal line 206 due to the large step difference at the intersection position, thereby improving the reliability of the array substrate.
  • the signal lines of the non-display area of the array substrate may be three layers or more than three layers.
  • the third layer signal line 206 is a signal line located at the top layer, that is, a layer of signal lines having the largest distance from the base substrate 201.
  • the third layer signal line 206 is not excluded as the signal line of the intermediate layer.
  • the extending direction of the first layer signal line 202 and the second layer signal line 204 (the horizontal direction in the embodiment of the present disclosure), and the extending direction of the third layer signal line 206 (implementation of the present disclosure)
  • portrait vertical or substantially vertical.
  • the extending direction of the third layer signal line 206 and the extending direction of the first layer signal line 202 and the second layer signal line 204 are not limited to being perpendicular.
  • the second layer signal line may include a protruding portion and a straight portion, and the extending direction of the straight portion and the third layer
  • the extending direction of the signal line is perpendicular or substantially perpendicular, and the convex direction of the convex portion and the extending direction of the straight portion have an angle other than zero.
  • the second layer signal line may include a plurality of protrusions, and the adjacent two protrusions are connected by a straight line portion. Further, a plurality of projections are provided at equal intervals.
  • the second layer signal line 204 includes a plurality of connected straight portions 2041 and protrusions 2042 (in FIG. 4, the straight portion 2041 and the protruding portion 2042 are separated by a broken line), The straight portion 2041 and the protruding portion 2042 are alternately disposed, and the protruding portion 2042 is convex toward the extending direction of the third layer signal line 206 (longitudinal in the embodiment of the present disclosure), and the third layer The signal lines 206 are arranged one by one.
  • a protrusion 2042 that protrudes toward the extending direction of the third layer signal line 206 may be disposed at an intersection of the second layer signal line 204 and the at least one third layer signal line 206.
  • the orthographic projection of the first layer signal line 202 on the substrate substrate 201 and the orthographic projection of the third layer signal line 206 on the substrate substrate 201 may be disposed at an intersection of the second layer signal line 204 and the at least one third layer signal line 206.
  • An overlapping area, at least partially overlapping with the orthographic projection of the protruding portion 2042 on the base substrate 201, that is, the third layer signal line 206 is at an intersection position, at least a partial area, and only the first portion below Layer signal line 202 or second layer signal line 204, so that the third layer signal line 206 can be appropriately reduced at the intersection
  • the step difference is set to reduce the fracture problem caused by the large difference of the third layer signal line 206 due to the step difference at the intersection position, thereby improving the reliability of the array substrate.
  • the second layer signal line 204 has a Great Wall shape
  • the protruding portion 2042 has a right-angle U-shape.
  • the shape of the second layer signal line 204 is not limited thereto.
  • the protrusions 2042 may also have other shapes, such as U-shaped, curved, or semi-circular, and the like.
  • the number of the protruding portions 2042 of each of the second layer signal lines 204 is the same as the number of the third layer signal lines 206, and is correspondingly set with the third layer signal line 206, that is, All third layer signal lines 206 are subjected to a hill climbing buffer design.
  • the number of the protrusions 2042 of a certain second layer signal line 204 may be less than the number of the third layer signal lines 206, that is, only a part of the third layer.
  • Signal line 206 performs a hill climbing buffer design.
  • UV ultraviolet
  • the area occupied by the orthographic projection of the signal line on the substrate substrate affects the aperture ratio of the UV light irradiation. The smaller the area occupied, the larger the aperture ratio, and the better the curing effect on the encapsulant.
  • the orthographic projection of the protrusion 2042 of the second layer signal line 204 on the substrate substrate 201 is located.
  • the third layer signal line 206 is in the orthographic projection on the base substrate 201, that is, the signal line in the non-display area is on the substrate as compared with the array substrate in the related art (please refer to FIG. 1).
  • the area of the orthographic projection on the substrate does not change, and in the case where the problem of large step difference of the third layer signal line 206 is reduced, the aperture ratio of the UV light irradiation is not affected.
  • the protrusion 2042 of the second layer signal line 204 is The orthographic projection on the substrate substrate 201 may also not overlap with the orthographic projection of the first layer signal line 202 on the substrate substrate 201, that is, the first layer signal line 202 is on the substrate substrate 201.
  • the second overlapping regions of the orthographic projections of the layer signal lines 206 on the substrate substrate 201 do not overlap at all.
  • the entire area of the third layer signal line 206 at the intersection position has only the first layer signal line 202 or the second layer signal line 204 below, so that the third layer signal line 206 can be greatly reduced in crossover.
  • the difference in position The problem of the fracture of the third layer signal line 206 due to the large step difference at the intersection position is reduced, and the reliability of the array substrate is improved.
  • the protruding portion 2042 of the second layer signal line 204 is in the extending direction of the second layer signal line 204 (the horizontal direction in the embodiment of the present disclosure).
  • the width is equal to the width of the third layer signal line 206 in the extending direction of the second layer signal line.
  • the first layer signal line 202 is a straight line. Of course, in other embodiments of the present disclosure, the first layer signal line 202 is not excluded from other shapes.
  • the protruding portion 2042 of the second layer signal line 204 has a right-angle U-shape.
  • the depth of the U-shaped groove of the protruding portion 2041 is the first
  • the layer signal lines 202 have the same width in the extending direction of the third layer signal line 206 (the longitudinal direction of the embodiment of the present disclosure), so that the material of the second layer signal line 204 is minimized.
  • the shape of the second layer signal line 204 is changed to reduce the step difference of the third layer signal line 206.
  • the first layer signal line 202 may also be used.
  • the shape changes.
  • the shapes of the first layer signal line 202 and the second layer signal line 204 are simultaneously changed to reduce the overlapping area of the first overlapping area and the second overlapping area, and the step difference of the third layer signal line 206 is reduced.
  • the non-display area of the array substrate is sequentially provided with a gate metal line, a first insulating layer, a data signal line, a second insulating layer, and a touch signal trace, and the gate metal line
  • one of the data signal lines is a first layer signal line
  • the other is a second layer signal line
  • the touch signal trace is the third layer signal line, thereby reducing the touch signal trace across the display signal line
  • the high step difference reduces the occurrence of touch problems.
  • An embodiment of the present disclosure further provides a display device including the above array substrate.

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Abstract

提供一种阵列基板和显示装置，该阵列基板包括衬底基板（201）；以及设置在衬底基板（201）的非显示区域中的至少三层相互绝缘的信号线；其中信号线中包括沿相同方向延伸的第一层信号线（202）和第二层信号线（204），以及与第一层信号线（202）和第二层信号线（204）交叉绝缘设置的第三层信号线（206），第三层信号线（206）与衬底基板（201）之间的距离大于第一层信号线（202）和第二层信号线（204）与衬底基板（201）之间的距离，第一层信号线（202）在衬底基板（201）上的正投影与第三层信号线（206）在衬底基板（201）上的正投影具有第一重叠区域，第二层信号线（204）在衬底基板（201）上的正投影与第三层信号线（206）在衬底基板（201）上的正投影具有第二重叠区域，第一重叠区域和第二重叠区域至少部分不重叠。

Description

一种阵列基板和显示装置
相关申请的交叉引用
本申请要求于2017年4月19日提交中国专利局、申请号为201710256719.5的优先权，其全部内容据此通过引用并入本申请。
技术领域
本公开涉及显示技术领域，尤其涉及一种阵列基板和显示装置。
背景技术
TFT-LCD(薄膜晶体管液晶显示器，Thin Film Transistor-Liquid Crystal Display)产品不断进步更新，使得TFT-LCD阵列基板上的布线更加密集，尤其是非显示区域的fanout(扇出)区的布线尤为密集，请参考图1和图2，图1为相关技术中的阵列基板的fanout区的仰视图。图2为图1中的阵列基板的A-A方向的剖视图，该阵列基板的非显示区域设置有：衬底基板101，栅金属线102，栅绝缘层103，数据信号线104，钝化层(PVX)105和触控信号走线106。从图2中可以看出，触控信号走线106与栅金属线102和数据信号线104的延伸方向存在夹角，在触控信号走线106与栅金属线102和数据信号线104交叉位置处的段差较大，触控信号走线106在上述位置容易发生断裂(如图3所示)，影响触控。
发明内容
有鉴于此，本公开提供一种阵列基板和显示装置，用以解决阵列基板的非显示区域中的信号线在与其下方设置的信号线的交叉位置处段差较大，容易产生断裂的问题。
为解决上述技术问题，本公开提供一种阵列基板，包括：衬底基板，其中所述衬底基板包括显示区域和非显示区域；以及至少三层相互绝缘的信号线，设置在所述非显示区域中，其中所述至少三层相互绝缘的信号线包括沿相同方向延伸的第一层信号线和第二层信号线，以及与所述第一层信号线和第二层信 号线交叉绝缘设置的第三层信号线，所述第三层信号线与所述衬底基板之间的距离大于所述第一层信号线和第二层信号线与所述衬底基板之间的距离，所述第一层信号线在衬底基板上的正投影与所述第三层信号线在衬底基板上的正投影具有第一重叠区域，所述第二层信号线在衬底基板上的正投影与所述第三层信号线在衬底基板上的正投影具有第二重叠区域，所述第一重叠区域和所述第二重叠区域至少部分不重叠。
可选地，所述第二层信号线包括交替设置的直线部和凸出部，所述直线部的延伸方向与所述第三层信号线的延伸方向垂直或大致垂直，所述凸出部的凸出方向与所述直线部的延伸方向具有夹角，所述第一重叠区域与所述凸出部在所述衬底基板上的正投影至少部分不重叠。
可选地，所述凸出部朝所述第三层信号线的延伸方向凸出。
可选地，所述凸出部与所述第三层信号线一一对应设置。
可选地，所述凸出部在所述衬底基板上的正投影位于所述第三层信号线在所述衬底基板上的正投影内。
可选地，所述凸出部在所述第二层信号线的延伸方向上的宽度等于或者小于所述第三层信号线在所述第二层信号线的延伸方向上的宽度。
可选地，所述第一层信号线为直线。
可选地，所述凸出部呈直角U型状。进一步地，所述凸出部的U型槽的深度与所述第一层信号线在所述第三层信号线的延伸方向上的宽度相同。
可选地，所述第一层信号线在所述衬底基板上的正投影与所述凸出部的U型槽的底部在所述衬底基板上的正投影不重叠。
可选地，所述第一重叠区域和所述第二重叠区域完全不重叠。
可选地，所述第三层信号线为所述至少三层的信号线中距离所述衬底基板最远的一层信号线。
可选地，所述阵列基板的非显示区域中依次设置有栅金属线、第一绝缘层、数据信号线、第二绝缘层和触控信号走线，所述栅金属线或数据信号线其中之一为第一层信号线，另一为第二层信号线，所述触控信号走线为所述第三层信号线。
本公开还提供一种显示装置，包括上述阵列基板。
本公开的上述技术方案的有益效果如下：
本公开实施例中，第三层信号线在与第一信号线和第二信号线的交叉位置处，至少存在部分区域，其下方仅具有第一层信号线或第二层信号线，从而可以适当降低第三层信号线在交叉位置处的段差，减少第三层信号线因在交叉位置处段差大而引起的断裂问题，提高阵列基板的可靠性。
附图说明
图1为相关技术中的TDDI阵列基板的fanout区的仰视图；
图2为图1中的阵列基板的A-A方向的剖视图；
图3为图2中的阵列基板中的触控信号走线断裂的示意图；
图4为根据本公开一些实施例的阵列基板上的第二层信号线的形状示意图；
图5为本公开一些实施例的阵列基板上的第一层信号线和第二层信号线的俯视图；
图6为根据本公开一些实施例的阵列基板上的第一层信号线、第二层信号线和第三层信号线的仰视图；
图7为根据本公开一些实施例的阵列基板上的第二层信号线和第三层信号线的仰视图；
图8为图6中的阵列基板的B-B方向的剖视图；
图9为根据本公开一些实施例的阵列基板上的第一层信号线、第二层信号线和第三层信号线的仰视图；
图10为根据本公开一些实施例的阵列基板上的第二层信号线和第三层信号线的仰视图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公 开保护的范围。
请参考图4-图8，本公开的实施例提供一种阵列基板，包括衬底基板201，所述衬底基板201包括显示区域和非显示区域，所述非显示区域中设置有至少三层相互绝缘的信号线，所述信号线中包括沿相同方向延伸的第一层信号线202和第二层信号线204，以及与所述第一层信号线202和第二层信号线204交叉绝缘设置的第三层信号线206，所述第三层信号线206与所述衬底基板201之间的距离大于所述第一层信号线202与所述衬底基板201之间的距离且大于第二层信号线204与衬底基板201之间的距离，所述第一层信号线202在衬底基板201上的正投影与所述第三层信号线206在衬底基板201上的正投影具有第一重叠区域，所述第二层信号线204在衬底基板201上的正投影与所述第三层信号线206在衬底基板201上的正投影具有第二重叠区域，所述第一重叠区域和所述第二重叠区域至少部分不重叠。
在一些实例中，第一层信号线202与所述衬底基板201之间的距离小于第二层信号线204与衬底基板201之间的距离；或者，第一层信号线202与所述衬底基板201之间的距离也可以小于第二层信号线204与衬底基板201之间的距离。
需要说明的是，此处至少三层中不同的层可以表示与衬底基板201之间的距离不同，或者不同的层可以表示在制造衬底基板的工艺中的不同的膜层。另外，在第一层可以设置有一条或多条信号线202，在第二层可以设置有一条或多条信号线204，在第三层可以设置有一条或多条信号线206。
本公开实施例中，请参考图8，第一层信号线202和第二层信号线204均位于第三层信号线206的下方，且第一层信号线202、第二层信号线204与第三层信号线206的延伸方向不同，均与第三层信号线206交叉绝缘设置，为了降低第三层信号线206在交叉位置处的段差，本公开实施例中，将第一层信号线202在衬底基板201上的正投影与第三层信号线206在衬底基板201上的正投影的第一重叠区域，与第二层信号线204在衬底基板201上的正投影与所述第三层信号线206在衬底基板201上的正投影的第二重叠区域设置为至少部分不重叠，即第三层信号线206在跨越位置处，至少存在部分区域，其下方仅具有第一层信号线202或第二层信号线204，从而可以适当降低第三层信号线206 在交叉位置处的段差，减少第三层信号线206因在交叉位置处段差大而引起的断裂问题，提高阵列基板的可靠性。
本公开实施例中，阵列基板非显示区域的信号线可以为三层，也可以多于三层。
优选地，上述第三层信号线206为位于顶层的信号线，即与所述衬底基板201之间的距离最大的一层信号线。当然，当信号线的层数多于三层时，也不排除第三层信号线206为中间层的信号线。
本公开实施例中，请参考图6，第一层信号线202和第二层信号线204的延伸方向(本公开实施例为横向)，与第三层信号线206的延伸方向(本公开实施例为纵向)垂直或大致垂直。当然，在本公开的其他一些实施例中，第三层信号线206的延伸方向，与第一层信号线202和第二层信号线204的延伸方向，并不限于垂直。
本公开实施例中，为了实现上述第一重叠区域和第二重叠区域至少部分不重叠，第二层信号线可以包括凸出部和直线部，所述直线部的延伸方向与所述第三层信号线的延伸方向垂直或大致垂直，所述凸出部的凸出方向与所述直线部的延伸方向具有不为0的夹角。可选地，第二层信号线可以包括多个凸出部，相邻两个凸出部之间通过一个直线部相连接。进一步地，多个凸出部等间隔设置。
在一些实施例中，请参考图4，所述第二层信号线204包括多个相连的直线部2041和凸出部2042(图4中，直线部2041和凸出部2042采用虚线分割)，所述直线部2041和凸出部2042交替地设置，所述凸出部2042朝所述第三层信号线206的延伸方向(本公开实施例为纵向)凸出，并与所述第三层信号线206一一对应设置。例如，在第二层信号线204与至少一条第三层信号线206的交叉位置处可以设置朝着第三层信号线206的延伸方向凸出的凸出部2042。在一些实施例中，请同时参考图6和图8，所述第一层信号线202在衬底基板201上的正投影与第三层信号线206在衬底基板201上的正投影的第一重叠区域，与所述凸出部2042在所述衬底基板201上的正投影至少部分不重叠，即第三层信号线206在交叉位置处，至少存在部分区域，其下方仅具有第一层信号线202或第二层信号线204，从而可以适当降低第三层信号线206在交叉位 置处的段差，减少第三层信号线206因在交叉位置处段差大而引起的断裂问题，提高阵列基板的可靠性。
本公开实施例中，请参考图4，所述第二层信号线204呈长城状，其凸出部2042呈直角U型状，当然，所述第二层信号线204的形状并不限于此，其凸出部2042也可以呈其他形状，例如U型，弧形，或半圆形等。
本公开实施例中，每条所述第二层信号线204的凸出部2042的个数与第三层信号线206的个数相同，与第三层信号线206一一对应设置，即对全部第三层信号线206进行爬坡缓冲设计。当然，也不排除在有些实施例中，某条第二层信号线204的所述凸出部2042的个数也可以少于第三层信号线206的个数，即只对部分第三层信号线206进行爬坡缓冲设计。
在阵列基板和对向基板对盒过程中，通常需要在阵列基板一侧对用于封装阵列基板和对向基板的封装胶(seal)进行紫外光(UV)照射，阵列基板的非显示区域中的信号线在衬底基板上的正投影所占面积的大小会影响UV光照射的开口率，所占面积越小，开口率越大，对封装胶的固化效果越好。
本公开实施例中，为了不影响UV光照射的开口率，请参考图7，优选地，所述第二层信号线204的凸出部2042在所述衬底基板201上的正投影位于所述第三层信号线206在所述衬底基板201上的正投影内，也就是说，与相关技术中的阵列基板(请参考图1)相比，非显示区域内的信号线在衬底基板上的正投影的面积并没有发生改变，在保证了减小了第三层信号线206的段差大的问题的情况下，也不会对UV光照射的开口率造成影响。
当然，在本公开的其他一些实施例中，请参考图9和图10，如果对UV光照射的开口率的要求不是那么高，所述第二层信号线204的凸出部2042在所述衬底基板201上的正投影，也可以与所述第一层信号线202在所述衬底基板201上的正投影完全不重叠，即所述第一层信号线202在衬底基板201上的正投影与所述第三层信号线206在衬底基板201上的正投影的第一重叠区域，与所述第二层信号线204在衬底基板201上的正投影与所述第三层信号线206在衬底基板201上的正投影的第二重叠区域，完全不重叠。该种结构下，第三层信号线206在交叉位置处的全部区域，其下方仅具有第一层信号线202或第二层信号线204，从而可以极大地降低第三层信号线206在交叉位置处的段差， 减少第三层信号线206因在交叉位置处段差大而引起的断裂问题，提高阵列基板的可靠性。
请参考图7，进一步优选地，本公开实施例中，所述第二层信号线204的凸出部2042在所述第二层信号线204的延伸方向(本公开实施例为横向)上的宽度等于所述第三层信号线206在所述第二层信号线的延伸方向上的宽度。
本公开实施例中，所述第一层信号线202为直线。当然，在本公开的其他一些实施例中，也不排除第一层信号线202为其他形状。
本公开实施例中，所述第二层信号线204的凸出部2042呈直角U型状，请参考图5，优选地，所述凸出部2041的U型槽的深度与所述第一层信号线202在所述第三层信号线206的延伸方向(本公开实施例为纵向)上的宽度相同，从而使得第二层信号线204的用料尽量最少。
上述实施例中，是对第二层信号线204的形状进行改变，以降低第三层信号线206的段差，当然，在本公开的其他一些实施例中，也可以对第一层信号线202的形状进行改变。或者，同时改变第一层信号线202和第二层信号线204的形状，以减少上述第一重叠区域和第二重叠区域的重叠面积，降低第三层信号线206的段差。
在本公开的具体实施例中，所述阵列基板的非显示区域中依次设置有栅金属线、第一绝缘层、数据信号线、第二绝缘层和触控信号走线，所述栅金属线或数据信号线其中之一为第一层信号线，另一为第二层信号线，所述触控信号走线为所述第三层信号线，从而减少触控信号走线跨越显示信号线的高段差，减少触控问题的发生。
本公开实施例还提供一种显示装置，包括上述阵列基板。
除非另作定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后， 则该相对位置关系也相应地改变。
以上所述是本公开的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (14)

  1. 一种阵列基板，包括：
    衬底基板，其中所述衬底基板包括显示区域和非显示区域；以及
    至少三层相互绝缘的信号线，设置在所述非显示区域中，其中所述至少三层相互绝缘的信号线包括沿相同方向延伸的第一层信号线和第二层信号线，以及与所述第一层信号线和第二层信号线交叉绝缘设置的第三层信号线，所述第三层信号线与所述衬底基板之间的距离大于所述第一层信号线和第二层信号线与所述衬底基板之间的距离，所述第一层信号线在衬底基板上的正投影与所述第三层信号线在衬底基板上的正投影具有第一重叠区域，所述第二层信号线在衬底基板上的正投影与所述第三层信号线在衬底基板上的正投影具有第二重叠区域，所述第一重叠区域和所述第二重叠区域至少部分不重叠。
  2. 根据权利要求1所述的阵列基板，其中，所述第二层信号线包括交替设置的直线部和凸出部，所述直线部的延伸方向与所述第三层信号线的延伸方向垂直或大致垂直，所述凸出部的凸出方向与所述直线部的延伸方向具有夹角，所述第一重叠区域与所述凸出部在所述衬底基板上的正投影至少部分不重叠。
  3. 根据权利要求2所述的阵列基板，其中，所述凸出部朝所述第三层信号线的延伸方向凸出。
  4. 根据权利要求2或3所述的阵列基板，其中，所述凸出部与所述第三层信号线一一对应设置。
  5. 根据权利要求2-3任一项所述的阵列基板，其中，所述凸出部在所述衬底基板上的正投影位于所述第三层信号线在所述衬底基板上的正投影内。
  6. 根据权利要求2-5任一项所述的阵列基板，其中，所述凸出部在所述第二层信号线的延伸方向上的宽度等于或者小于所述第三层信号线在所述第二层信号线的延伸方向上的宽度。
  7. 根据权利要求2-6任一项所述的阵列基板，其中，所述第一层信号线为直线。
  8. 根据权利要求7所述的阵列基板，其中，所述凸出部呈直角U型状。
  9. 根据权利要求8所述的阵列基板，所述凸出部的U型槽的深度与所述 第一层信号线在所述第三层信号线的延伸方向上的宽度相同。
  10. 根据权利要求8所述的阵列基板，其中，所述第一层信号线在所述衬底基板上的正投影与所述凸出部的U型槽的底部在所述衬底基板上的正投影不重叠。
  11. 根据权利要求1-10任一项所述的阵列基板，其中，所述第一重叠区域和所述第二重叠区域完全不重叠。
  12. 根据权利要求1-11任一项所述的阵列基板，其中，所述第三层信号线为所述至少三层的信号线中距离所述衬底基板最远的一层信号线。
  13. 根据权利要求1-12任一项所述的阵列基板，其中，所述阵列基板的非显示区域中依次设置有栅金属线、第一绝缘层、数据信号线、第二绝缘层和触控信号走线，所述栅金属线或数据信号线其中之一为第一层信号线，另一为第二层信号线，所述触控信号走线为所述第三层信号线。
  14. 一种显示装置，包括如权利要求1-13任一项所述的阵列基板。
PCT/CN2017/104758 2017-04-19 2017-09-30 一种阵列基板和显示装置 WO2018192189A1 (zh)

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