WO2018184275A1 - 一种显示面板及其制程和显示装置 - Google Patents

一种显示面板及其制程和显示装置 Download PDF

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Publication number
WO2018184275A1
WO2018184275A1 PCT/CN2017/084130 CN2017084130W WO2018184275A1 WO 2018184275 A1 WO2018184275 A1 WO 2018184275A1 CN 2017084130 W CN2017084130 W CN 2017084130W WO 2018184275 A1 WO2018184275 A1 WO 2018184275A1
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Prior art keywords
layer
side portion
light shielding
shielding layer
disposed
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Ceased
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PCT/CN2017/084130
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English (en)
French (fr)
Inventor
卓恩宗
樊堃
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Priority to US16/499,722 priority Critical patent/US11366364B2/en
Publication of WO2018184275A1 publication Critical patent/WO2018184275A1/zh
Anticipated expiration legal-status Critical
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136209Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0316Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral bottom-gate TFTs comprising only a single gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6723Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having light shields
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6732Bottom-gate only TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743Silicon
    • H10D30/6746Amorphous silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136222Colour filters incorporated in the active matrix substrate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/10Materials and properties semiconductor
    • G02F2202/103Materials and properties semiconductor a-Si

Definitions

  • the present application relates to the field of display technologies, and more particularly to a display panel and a process and display device therefor.
  • the liquid crystal display has many advantages such as thin body, power saving, no radiation, and has been widely used.
  • Most of the liquid crystal displays on the market are backlight type liquid crystal displays, which include a liquid crystal panel and a backlight module.
  • the working principle of the liquid crystal panel is to place liquid crystal molecules in two parallel glass substrates, and apply a driving voltage on the two glass substrates to control the rotation direction of the liquid crystal molecules to refract the light of the backlight module to generate a picture.
  • a thin film transistor liquid crystal display includes a liquid crystal panel including a color filter substrate (CF Substrate, also referred to as a color filter substrate), and a thin film transistor array substrate (Thin Film Transistor Substrate, TFT Substrate). And a mask, a transparent electrode is present on the opposite inner side of the substrate. A layer of liquid crystal molecules (Liquid Crystal, LC) is sandwiched between the two substrates.
  • the TFT structure is often an inverted staggered structure, that is, the bottom gate electrode and the source/drain are respectively located in the a-Si layer.
  • a portion which is easily affected by the backlight also has a leakage current, which is neither safe nor energy-saving, and is not conducive to the normal operation of the device.
  • the technical problem to be solved by the present application is to provide a display panel with reduced leakage current and higher use efficiency.
  • the present application also provides a process for displaying a display panel.
  • the present application also provides a display device.
  • a display panel including
  • the active switch is disposed on the substrate, the active switch includes a gate layer disposed at a bottom portion, an insulating dielectric layer is disposed on the gate layer, and the insulating dielectric layer is disposed on the substrate a light shielding layer on the side of the gate layer.
  • the side portion includes a first side portion and a second side portion; the first side portion or the second side portion is provided with the light shielding layer.
  • the side portion includes a first side portion and a second side portion; the first side portion and the second side portion are each provided with the light shielding layer.
  • a light shielding layer is provided on both the left and right sides to better block the leakage current generated by the backlight.
  • the light shielding layer is made of a non-metal material, and the light shielding layer is in contact with the gate layer.
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second light shielding layer disposed on the second side portion, the first light shielding layer being on the first side portion
  • the length of the second light shielding layer is smaller than the length of the second side portion
  • the height of the first light shielding layer is smaller than the first side portion
  • the height of the second light shielding layer is smaller than the second side portion .
  • the specific length comparison of the first light shielding layer and the second light shielding layer and their height forms facilitate the better shielding of leakage current generated by the backlight and improve utilization.
  • the insulating dielectric layer is provided with an amorphous silicon layer corresponding to the insulating dielectric layer, and the amorphous silicon layer is provided with an ohmic contact layer corresponding to the amorphous silicon layer, and the two ends of the ohmic contact layer are disposed a source layer and a drain layer of the active switch are separated, a channel is disposed between the source layer and the drain layer, and the channel passes through an ohmic contact layer, and the bottom of the channel is Amorphous silicon layer.
  • the gate layer and the source and drain layers are provided with an amorphous silicon layer corresponding to the insulating dielectric layer
  • the amorphous silicon layer is provided with an ohmic contact layer corresponding to the amorphous silicon layer, and the two ends of the ohmic contact layer are disposed a source layer and a drain layer of the active switch are separated, a channel is disposed between the source layer and the drain layer, and the channel passes through an ohmic contact layer, and the bottom of the
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second light shielding disposed on the second side portion Layer, the gate layer
  • the boundary of the side insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer and the source layer is flush with the first boundary, the length of the first light shielding layer is at or beyond the first boundary;
  • the boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the drain layer on one side is flush with the second boundary, and the length of the second light shielding layer is at or beyond the second boundary.
  • the specific length values of the first light shielding layer and the second light shielding layer are clarified with reference to other layers.
  • the substrate includes a first substrate and a second substrate, and the first substrate is provided with an active switch and a color filter layer. The specific settings of the display panel under the COA process.
  • the present application further discloses a process for displaying a display panel, the display panel comprising a substrate and an active switch, the process comprising the steps of:
  • a light shielding layer is disposed on the insulating dielectric layers on both sides of the gate layer of the active switch.
  • the present application also discloses a display device including a backlight module and a display panel as described above.
  • the leakage current generated by the backlight is blocked by the light shielding layer, the quality of the Thin Film Transistor (TFT) device is improved, and the effective normal life of the display panel is prolonged. .
  • FIG. 1 is a schematic structural view of a display panel according to an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 5 is a schematic flow chart of a process of a display panel according to an embodiment of the present application.
  • first and second are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, features defining “first” and “second” may include one or more of the features either explicitly or implicitly.
  • a plurality means two or more unless otherwise stated.
  • the term “comprises” and its variations are intended to cover a non-exclusive inclusion.
  • connection In the description of the present application, it should be noted that the terms “installation”, “connected”, and “connected” are to be understood broadly, and may be fixed or detachable, for example, unless otherwise specifically defined and defined. Connected, or integrally connected; can be mechanical or electrical; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of the two components.
  • Connected, or integrally connected can be mechanical or electrical; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of the two components.
  • the specific meanings of the above terms in the present application can be understood in the specific circumstances for those skilled in the art.
  • the display panel includes a substrate
  • the active switch is disposed on the substrate, the active switch includes a gate layer disposed at a bottom portion, an insulating dielectric layer is disposed on the gate layer, and the insulating dielectric layer is disposed on the substrate a light shielding layer on the side of the gate layer. Since the light shielding layer is disposed on the insulating medium layer on the side of the gate layer, the leakage current generated by the backlight is blocked by the light shielding layer, the quality of the active switching device is improved, and the effective normal life of the display panel is prolonged.
  • the active switch can be, for example, a Thin Film Transistor (TFT).
  • TFT Thin Film Transistor
  • the display panel includes a substrate
  • An active switch the active switch is disposed on the substrate, the active switch includes a gate layer disposed at a bottom portion, an insulating dielectric layer is disposed on the gate layer, and the insulating dielectric layer includes a gate disposed on the gate a light-shielding layer on the side of the layer.
  • the side portion includes a first side portion and a second side portion; the first side portion or the second side portion is provided with the light shielding layer. Since the light shielding layer is disposed on the insulating medium layer on the side of the gate layer, the leakage current generated by the backlight is blocked by the light shielding layer, the quality of the active switching device is improved, and the effective normal life of the display panel is prolonged.
  • the light shielding layer is made of a non-metal material, and the light shielding layer is in contact with the gate layer.
  • the light shielding layer may be made of a resin material. Resin craft generally refers to raw materials such as polyethylene resin, polypropylene resin, polyester resin and the like.
  • the light-shielding layer can use a non-metal black matrix (BM) to prevent background light leakage, improve display contrast, prevent color mixing, and increase color purity.
  • BM non-metal black matrix
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer
  • the first cover The length of the light layer on the first side portion is smaller than the length of the second light shielding layer on the second side portion
  • the height of the first light shielding layer is smaller than the first side portion
  • the second light shielding layer The height is smaller than the second side.
  • the specific length comparison of the first light shielding layer and the second light shielding layer and their height forms facilitate the better shielding of leakage current generated by the backlight and improve utilization.
  • the insulating dielectric layer is provided with an amorphous silicon layer corresponding to the insulating dielectric layer, and the amorphous silicon layer is provided with an ohmic contact layer corresponding to the amorphous silicon layer, and the two ends of the ohmic contact layer a source layer and a drain layer of the active switch are disposed, a channel is disposed between the source layer and the drain layer, and the channel passes through an ohmic contact layer, the channel bottom It is an amorphous silicon layer.
  • the gate layer and the source and drain layers are the specific arrangement between the gate layer and the source and drain layers.
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer, a boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the source layer on one side of the gate layer is flush with a first boundary, and a length of the first light shielding layer is at or beyond a boundary; a boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the drain layer on the other side of the gate layer is flush with a second boundary, and a length of the second light shielding layer is at or beyond Second boundary.
  • the specific length values of the first light shielding layer and the second light shielding layer are clarified with reference to other layers.
  • a protective layer is disposed on the source layer and the drain layer, and a transparent conductive layer is disposed on the protective layer, and the protective layer is provided with a via hole corresponding to the drain layer, and the transparent conductive layer A layer is connected to the drain layer through the via.
  • the gate layer (Gate) is plated with aluminum (Al) and molybdenum (Mo).
  • the amorphous silicon layer uses amorphous silicon as the channel layer, and of course other semiconductor layer materials can also be used.
  • the ohmic contact layer uses silicon with a high concentration of phosphorus to reduce the interface potential difference.
  • the source layer and the drain layer (Drain) are molybdenum (Mo) and aluminum (Al). Aluminium is light in weight and corrosion resistant, and is rich in resources. It is widely used for its light weight, good electrical and thermal conductivity, high reflectivity and oxidation resistance.
  • Molybdenum or molybdenum alloy can achieve better adhesion, and can be adhered to the metal of the intermediate conductive layer such as copper, aluminum, silver, gold, chromium, and the like, and the other layer can be combined with other layers of the display panel such as the substrate. , photoresist layer, insulating layer, etc., good adhesion, easy material selection, The production technology is mature.
  • the insulating dielectric layer is a nitrogen cerium compound (SiNx), that is, a nitrogen silicon compound.
  • the display panel includes a substrate, an active switch, the active switch is disposed on the substrate, and the active switch includes a gate layer disposed at a bottom, An insulating dielectric layer is disposed on the gate layer, and the insulating dielectric layer includes a light shielding layer disposed on a side portion of the gate layer.
  • the side portion includes a first side portion and a second side portion; the first side portion and the second side portion are each provided with the light shielding layer.
  • a light shielding layer is provided on both the left and right sides to better block the leakage current generated by the backlight.
  • the light shielding layer is disposed on the insulating medium layer on the side of the gate layer, the leakage current generated by the backlight is blocked by the light shielding layer, the quality of the active switching device is improved, and the effective normal life of the display panel is prolonged.
  • the light shielding layer is made of a non-metal material, and the light shielding layer is in contact with the gate layer.
  • the light shielding layer may be made of a resin material. Resin craft generally refers to raw materials such as polyethylene resin, polypropylene resin, polyester resin and the like.
  • the light-shielding layer can use a non-metal black matrix (BM) to prevent background light leakage, improve display contrast, prevent color mixing, and increase color purity.
  • BM non-metal black matrix
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer
  • a length of the first light shielding layer at the first side portion is smaller than a length of the second light shielding layer at the second side portion
  • a height of the first light shielding layer is smaller than the first side portion
  • the height of the second light shielding layer is smaller than the second side portion.
  • the insulating dielectric layer is provided with an amorphous silicon layer corresponding to the insulating dielectric layer, and the amorphous silicon layer is provided with an ohmic contact layer corresponding to the amorphous silicon layer, and the two ends of the ohmic contact layer a source layer and a drain layer of the active switch are disposed, a channel is disposed between the source layer and the drain layer, and the channel passes through an ohmic contact layer, the channel bottom It is an amorphous silicon layer.
  • the gate layer and the source and drain layers are the specific arrangement between the gate layer and the source and drain layers.
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer, wherein a boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the source layer on one side of the gate layer is flush with a first boundary, The length of the first light shielding layer is at or beyond the first boundary; the boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer and the drain layer on the other side of the gate layer is flush with the second boundary The length of the second light shielding layer is at or beyond the second boundary.
  • the specific length values of the first light shielding layer and the second light shielding layer are clarified with reference to other layers.
  • a protective layer is disposed on the source layer and the drain layer, and a transparent conductive layer is disposed on the protective layer, and the protective layer is provided with a via hole corresponding to the drain layer, and the transparent conductive layer A layer is connected to the drain layer through the via.
  • the gate layer (Gate) is plated with aluminum (Al) and molybdenum (Mo).
  • the amorphous silicon layer uses amorphous silicon as the channel layer, and of course other semiconductor layer materials can also be used.
  • the ohmic contact layer uses silicon with a high concentration of phosphorus to reduce the interface potential difference.
  • the source layer and the drain layer (Drain) are molybdenum (Mo) and aluminum (Al). Aluminium is light in weight and corrosion resistant, and is rich in resources. It is widely used for its light weight, good electrical and thermal conductivity, high reflectivity and oxidation resistance.
  • Molybdenum or molybdenum alloy can achieve better adhesion, and can be adhered to the metal of the intermediate conductive layer such as copper, aluminum, silver, gold, chromium, and the like, and the other layer can be combined with other layers of the display panel such as the substrate.
  • the photoresist layer, the insulating layer and the like are better adhered, the material selection is convenient, and the production technology is mature.
  • the insulating dielectric layer is a nitrogen cerium compound (SiNx), that is, a nitrogen silicon compound.
  • the display panel includes a substrate, an active switch, the active switch is disposed on the substrate, and the active switch includes a gate layer disposed at a bottom, An insulating dielectric layer is disposed on the gate layer, and the insulating dielectric layer includes a light shielding layer disposed on a side portion of the gate layer.
  • the side portion includes a first side portion and a second side portion; the first side portion and the second side portion are each provided with the light shielding layer.
  • a light shielding layer is provided on both the left and right sides to better block the leakage current generated by the backlight.
  • the substrate includes a first substrate and a second substrate, and the first substrate is provided with an active switch and a color filter layer.
  • the specific settings of the display panel under the COA process Since the light shielding layer is disposed on the insulating medium layer on the side of the gate layer, the leakage current generated by the backlight is blocked by the light shielding layer, the quality of the active switching device is improved, and the effective normal life of the display panel is prolonged.
  • the light shielding layer is made of a non-metal material, and the light shielding layer is in contact with the gate layer.
  • the light shielding layer may be made of a resin material. Resin craft generally refers to raw materials, such as polyethylene resin, Polypropylene resin, polyester resin, and the like.
  • the light-shielding layer can use a non-metal black matrix (BM) to prevent background light leakage, improve display contrast, prevent color mixing, and increase color purity.
  • BM non-metal black matrix
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer
  • a length of the first light shielding layer at the first side portion is smaller than a length of the second light shielding layer at the second side portion
  • a height of the first light shielding layer is smaller than the first side portion
  • the height of the second light shielding layer is smaller than the second side portion.
  • the insulating dielectric layer is provided with an amorphous silicon layer corresponding to the insulating dielectric layer, and the amorphous silicon layer is provided with an ohmic contact layer corresponding to the amorphous silicon layer, and the two ends of the ohmic contact layer a source layer and a drain layer of the active switch are disposed, a channel is disposed between the source layer and the drain layer, and the channel passes through an ohmic contact layer, the channel bottom It is an amorphous silicon layer.
  • the gate layer and the source and drain layers are the specific arrangement between the gate layer and the source and drain layers.
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer, a boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the source layer on one side of the gate layer is flush with a first boundary, and a length of the first light shielding layer is at or beyond a boundary; a boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the drain layer on the other side of the gate layer is flush with a second boundary, and a length of the second light shielding layer is at or beyond Second boundary.
  • the specific length values of the first light shielding layer and the second light shielding layer are clarified with reference to other layers.
  • a protective layer is disposed on the source layer and the drain layer, and a transparent conductive layer is disposed on the protective layer, and the protective layer is provided with a via hole corresponding to the drain layer, and the transparent conductive layer A layer is connected to the drain layer through the via.
  • the gate layer (Gate) is plated with aluminum (Al) and molybdenum (Mo).
  • the amorphous silicon layer uses amorphous silicon as the channel layer, and of course other semiconductor layer materials can also be used.
  • the ohmic contact layer uses silicon with a high concentration of phosphorus to reduce the interface potential difference.
  • Molybdenum or molybdenum alloy can achieve better adhesion, and can be adhered to the metal of the intermediate conductive layer such as copper, aluminum, silver, gold, chromium, and the like, and the other layer can be combined with other layers of the display panel such as the substrate.
  • the photoresist layer, the insulating layer and the like are better adhered, the material selection is convenient, and the production technology is mature.
  • the insulating dielectric layer is a nitrogen cerium compound (SiNx), that is, a nitrogen silicon compound.
  • the display panel includes a substrate and an active switch, and the process of the display panel includes the following steps:
  • a light shielding layer is disposed on the insulating dielectric layers on both sides of the gate layer of the active switch.
  • the side portion includes a first side portion and a second side portion; the first side portion and or the second side portion are provided with the light shielding layer.
  • the light shielding layer is made of a non-metal material, and the light shielding layer is in contact with the gate layer.
  • the light shielding layer may be made of a resin material. Resin craft generally refers to raw materials such as polyethylene resin, polypropylene resin, polyester resin and the like.
  • the light-shielding layer can use a non-metal black matrix (BM) to prevent background light leakage, improve display contrast, prevent color mixing, and increase color purity.
  • BM non-metal black matrix
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer
  • a length of the first light shielding layer at the first side portion is smaller than a length of the second light shielding layer at the second side portion
  • a height of the first light shielding layer is smaller than the first side portion
  • the height of the second light shielding layer is smaller than the second side portion.
  • the insulating dielectric layer is provided with an amorphous silicon layer corresponding to the insulating dielectric layer, and the amorphous silicon layer is provided with an ohmic contact layer corresponding to the amorphous silicon layer, and the two ends of the ohmic contact layer a source layer and a drain layer of the active switch are disposed, a channel is disposed between the source layer and the drain layer, and the channel passes through an ohmic contact layer, the channel bottom It is an amorphous silicon layer.
  • the gate layer and the source and drain layers are the specific arrangement between the gate layer and the source and drain layers.
  • the side portion includes a first side portion and a second side portion
  • the light shielding layer includes a first light shielding layer disposed on the first side portion and a second portion disposed on the second side portion a light shielding layer, a boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the source layer on one side of the gate layer is flush with a first boundary, and a length of the first light shielding layer is at or beyond a boundary; a boundary of the insulating dielectric layer, the amorphous silicon layer, the ohmic contact layer, and the drain layer on the other side of the gate layer is flush with a second boundary, and a length of the second light shielding layer is at or beyond Second boundary.
  • the specific length values of the first light shielding layer and the second light shielding layer are clarified with reference to other layers.
  • a protective layer is disposed on the source layer and the drain layer, and a transparent conductive layer is disposed on the protective layer, and the protective layer is provided with a via hole corresponding to the drain layer, and the transparent conductive layer A layer is connected to the drain layer through the via.
  • the substrate includes a first substrate and a second substrate, and the first substrate is provided with an active switch and a color filter layer.
  • the specific settings of the display panel under the COA process are described below.
  • the display device includes a backlight module and a display panel as described above.
  • the material of the substrate may be glass, plastic or the like.
  • the display panel includes a liquid crystal panel, an OLED (Organic Light-Emitting Diode) panel, a curved panel, a plasma panel, etc.
  • the liquid crystal panel includes an array substrate (Thin Film Transistor Substrate, TFT Substrate) and a color filter substrate (CF Substrate), the array substrate is disposed opposite to the color filter substrate, and a liquid crystal and a spacer (PS) are disposed between the array substrate and the color filter substrate, and the array substrate An active switch is arranged on the active switch, and a thin film transistor (TFT) is used.
  • the color filter substrate is provided with a color filter layer.
  • the color filter substrate may include a TFT array
  • the color film and the TFT array may be formed on the same substrate
  • the array substrate may include a color filter layer
  • the display panel of the present application may be a curved type panel.

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Abstract

一种显示面板及其制程和显示装置,显示面板包括基板(1);多个主动开关,主动开关设置在基板(1)上,主动开关包括设置在底部的栅极层(2),栅极层(2)上绕设有绝缘介质层(5),绝缘介质层(5)包括设置在栅极层(2)的侧部的遮光层(53)。

Description

一种显示面板及其制程和显示装置 【技术领域】
本申请涉及显示技术领域,更具体的说,涉及一种显示面板及其制程和显示装置。
【背景技术】
液晶显示器具有机身薄、省电、无辐射等众多优点,得到了广泛的应用。现有市场上的液晶显示器大部分为背光型液晶显示器,其包括液晶面板及背光模组(backlightmodule)。液晶面板的工作原理是在两片平行的玻璃基板当中放置液晶分子,并在两片玻璃基板上施加驱动电压来控制液晶分子的旋转方向,以将背光模组的光线折射出来产生画面。
其中,薄膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display,TFT-LCD)由于具有低的功耗、优异的画面品质以及较高的生产良率等性能,目前已经逐渐占据了显示领域的主导地位。同样,薄膜晶体管液晶显示器包含液晶面板和背光模组,液晶面板包括彩膜基板(Color Filter Substrate,CF Substrate,也称彩色滤光片基板)、薄膜晶体管阵列基板(Thin Film Transistor Substrate,TFT Substrate)和光罩(Mask),上述基板的相对内侧存在透明电极。两片基板之间夹一层液晶分子(LiquidCrystal,LC)。
随着薄膜晶体管液晶显示器逐渐往超大尺寸、高驱动频率、高分辨率等方面发展,然而TFT结构常为倒置错排结构,即为底栅电极且与源/漏极分别位于a-Si层两侧,这样该结构器件中便会出现容易受背光影响的部分也因而产生漏电流,既不安全也不节能,同时不利于设备的正常工作。
【发明内容】
本申请所要解决的技术问题是提供一种降低漏电流、使用效率更高的显示面板。
此外,本申请还提供一种显示面板的制程。
另外,本申请还提供一种显示装置。
本申请的目的是通过以下技术方案来实现的:
一种显示面板,所述显示面板包括
基板;
多个主动开关,所述主动开关设置在所述基板上,所述主动开关包括设置在底部的栅极层,所述栅极层上绕设有绝缘介质层,所述绝缘介质层包括设置在栅极层的侧部的遮光层。
其中,所述侧部包括第一侧部和第二侧部;所述第一侧部或第二侧部设置有所述遮光层。
其中,所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层。左右两侧都设置遮光层,能更好的遮挡背光产生的漏电流。
其中,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。
其中,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部。这里是第一遮光层和第二遮光层的具体长度比较和以及它们的高度形式,便于更好的遮挡背光产生的漏电流,提高利用率。
其中,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。这里是栅极层和源极层、漏极层之间的具体设置。
其中,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一 侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。以其他层为参照明确第一遮光层和第二遮光层的具体长度值。
其中,所述基板包括第一基板和第二基板,所述第一基板上设置有主动开关和彩色滤光层。COA工艺下显示面板的具体设置。
根据本申请的又一个方面,本申请还公开了一种显示面板的制程,所述显示面板包括基板和主动开关,所述制程包括步骤:
在所述基板上设置主动开关;
在所述主动开关的栅极层的两侧的绝缘介质层上设置遮光层。
根据本申请的又一个方面,本申请还公开了一种显示装置,所述显示装置包括背光模组和如上所述的显示面板。
本申请由于在栅极层侧边的绝缘介质层上设置遮光层,通过遮光层遮挡背光产生的漏电流,提高主动开关(Thin Film Transistor,TFT)器件的品质,延长显示面板的有效正常使用寿命。
【附图说明】
所包括的附图用来提供对本申请实施例的进一步的理解,其构成了说明书的一部分,用于例示本申请的实施方式,并与文字描述一起来阐释本申请的原理。显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。在附图中:
图1是本申请实施例一种显示面板的结构示意图;
图2是本申请实施例一种显示面板的结构示意图;
图3是本申请实施例一种显示面板的结构示意图;
图4是本申请实施例一种显示面板的结构示意图;
图5是本申请实施例一种显示面板的制程的流程示意图。
其中,1、基板;11、第一基板;12、第二基板;13、彩色滤光片;2、栅极层;3、源极层;4、漏极层;5、绝缘介质层;51、第一遮光层;52、第二遮光层;53、遮光层;6、非晶硅层;7、欧姆接触层;8、保护层;9、透明导电层。
【具体实施方式】
这里所公开的具体结构和功能细节仅仅是代表性的,并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现,并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中,需要理解的是,术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中,除非另有说明,“多个”的含义是两个或两个以上。另外,术语“包括”及其任何变形,意图在于覆盖不排他的包含。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施 例。除非上下文明确地另有所指,否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是,这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在,而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
下面结合附图和较佳的实施例对本申请作进一步详细说明。
作为本申请的一个实施例,如图1-4所示,所述显示面板包括基板;
多个主动开关,所述主动开关设置在所述基板上,所述主动开关包括设置在底部的栅极层,所述栅极层上绕设有绝缘介质层,所述绝缘介质层包括设置在栅极层的侧部的遮光层。由于在栅极层侧边的绝缘介质层上设置遮光层,通过遮光层遮挡背光产生的漏电流,提高主动开关器件的品质,延长显示面板的有效正常使用寿命。
在不同实施例中,主动开关可以為例如薄膜晶体管(Thin Film Transistor,TFT)。
作为本申请的一个实施例,如图1-2所示,所述显示面板包括基板;
主动开关,所述主动开关设置在所述基板上,所述主动开关包括设置在底部的栅极层,所述栅极层上绕设有绝缘介质层,所述绝缘介质层包括设置在栅极层的侧部的遮光层。所述侧部包括第一侧部和第二侧部;所述第一侧部或第二侧部设置有所述遮光层。由于在栅极层侧边的绝缘介质层上设置遮光层,通过遮光层遮挡背光产生的漏电流,提高主动开关器件的品质,延长显示面板的有效正常使用寿命。
具体的,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。所述遮光层可采用树脂材质。树脂(resin craft)一般是指原料,如聚乙烯树脂、聚丙烯树脂、聚酯树脂等。遮光层可使用非金属黑矩阵(black matrix,BM)用作防止背景光泄漏,提高显示对比度,防止混色和增加颜色的纯度。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮 光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部。这里是第一遮光层和第二遮光层的具体长度比较和以及它们的高度形式,便于更好的遮挡背光产生的漏电流,提高利用率。
具体的,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。这里是栅极层和源极层、漏极层之间的具体设置。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。以其他层为参照明确第一遮光层和第二遮光层的具体长度值。
具体的,所述源极层和所述漏极层上设置有保护层,所述保护层上设有透明导电层,所述保护层对应所述漏极层设置有过孔,所述透明导电层通过所述过孔与所述漏极层连接。
其中,栅极层(Gate)采用镀上铝(Al),钼(Mo)的形式。非晶硅层作为通道层采用非结晶硅,当然也可以采用其他半导体层材料。欧姆接触层采用高浓度磷的硅用以降低界面电位差。源极层(Source)和漏极层(Drain)采用钼(Mo),铝(Al)。铝的重量轻和耐腐蚀,资源十分丰富,以其轻、良好的导电和导热性能、高反射性和耐氧化而被广泛使用。钼或钼合金能实现较好的附着性,一边能与中间导电层的金属如铜、铝、银、金、铬、钥等较好的粘粘,另一边能与显示面板的其他层如基板、光阻层、绝缘层等较好的粘粘,选材方便, 制作技术成熟。绝缘介质层采用氮矽化合物(SiNx),也就是氮硅化合物。
作为本申请的一个实施例,如图3所示,所述显示面板包括基板;主动开关,所述主动开关设置在所述基板上,所述主动开关包括设置在底部的栅极层,所述栅极层上绕设有绝缘介质层,所述绝缘介质层包括设置在栅极层的侧部的遮光层。所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层。左右两侧都设置遮光层,能更好的遮挡背光产生的漏电流。由于在栅极层侧边的绝缘介质层上设置遮光层,通过遮光层遮挡背光产生的漏电流,提高主动开关器件的品质,延长显示面板的有效正常使用寿命。
具体的,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。所述遮光层可采用树脂材质。树脂(resin craft)一般是指原料,如聚乙烯树脂、聚丙烯树脂、聚酯树脂等。遮光层可使用非金属黑矩阵(black matrix,BM)用作防止背景光泄漏,提高显示对比度,防止混色和增加颜色的纯度。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部。这里是第一遮光层和第二遮光层的具体长度比较和以及它们的高度形式,便于更好的遮挡背光产生的漏电流,提高利用率。
具体的,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。这里是栅极层和源极层、漏极层之间的具体设置。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界, 所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。以其他层为参照明确第一遮光层和第二遮光层的具体长度值。
具体的,所述源极层和所述漏极层上设置有保护层,所述保护层上设有透明导电层,所述保护层对应所述漏极层设置有过孔,所述透明导电层通过所述过孔与所述漏极层连接。
其中,栅极层(Gate)采用镀上铝(Al),钼(Mo)的形式。非晶硅层作为通道层采用非结晶硅,当然也可以采用其他半导体层材料。欧姆接触层采用高浓度磷的硅用以降低界面电位差。源极层(Source)和漏极层(Drain)采用钼(Mo),铝(Al)。铝的重量轻和耐腐蚀,资源十分丰富,以其轻、良好的导电和导热性能、高反射性和耐氧化而被广泛使用。钼或钼合金能实现较好的附着性,一边能与中间导电层的金属如铜、铝、银、金、铬、钥等较好的粘粘,另一边能与显示面板的其他层如基板、光阻层、绝缘层等较好的粘粘,选材方便,制作技术成熟。绝缘介质层采用氮矽化合物(SiNx),也就是氮硅化合物。
作为本申请的一个实施例,如图4所示,所述显示面板包括基板;主动开关,所述主动开关设置在所述基板上,所述主动开关包括设置在底部的栅极层,所述栅极层上绕设有绝缘介质层,所述绝缘介质层包括设置在栅极层的侧部的遮光层。所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层。左右两侧都设置遮光层,能更好的遮挡背光产生的漏电流。所述基板包括第一基板和第二基板,所述第一基板上设置有主动开关和彩色滤光层。COA工艺下显示面板的具体设置。由于在栅极层侧边的绝缘介质层上设置遮光层,通过遮光层遮挡背光产生的漏电流,提高主动开关器件的品质,延长显示面板的有效正常使用寿命。
具体的,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。所述遮光层可采用树脂材质。树脂(resin craft)一般是指原料,如聚乙烯树脂、 聚丙烯树脂、聚酯树脂等。遮光层可使用非金属黑矩阵(black matrix,BM)用作防止背景光泄漏,提高显示对比度,防止混色和增加颜色的纯度。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部。这里是第一遮光层和第二遮光层的具体长度比较和以及它们的高度形式,便于更好的遮挡背光产生的漏电流,提高利用率。
具体的,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。这里是栅极层和源极层、漏极层之间的具体设置。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。以其他层为参照明确第一遮光层和第二遮光层的具体长度值。
具体的,所述源极层和所述漏极层上设置有保护层,所述保护层上设有透明导电层,所述保护层对应所述漏极层设置有过孔,所述透明导电层通过所述过孔与所述漏极层连接。
其中,栅极层(Gate)采用镀上铝(Al),钼(Mo)的形式。非晶硅层作为通道层采用非结晶硅,当然也可以采用其他半导体层材料。欧姆接触层采用高浓度磷的硅用以降低界面电位差。源极层(Source)和漏极层(Drain)采用钼 (Mo),铝(Al)。铝的重量轻和耐腐蚀,资源十分丰富,以其轻、良好的导电和导热性能、高反射性和耐氧化而被广泛使用。钼或钼合金能实现较好的附着性,一边能与中间导电层的金属如铜、铝、银、金、铬、钥等较好的粘粘,另一边能与显示面板的其他层如基板、光阻层、绝缘层等较好的粘粘,选材方便,制作技术成熟。绝缘介质层采用氮矽化合物(SiNx),也就是氮硅化合物。
作为本申请的又一个实施例,如图5所示,所述显示面板包括基板和主动开关,所述显示面板的制程包括步骤:
在所述基板上设置主动开关;
在所述主动开关的栅极层的两侧的绝缘介质层上设置遮光层。
具体的,所述侧部包括第一侧部和第二侧部;所述第一侧部和或第二侧部设置有所述遮光层。
具体的,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。所述遮光层可采用树脂材质。树脂(resin craft)一般是指原料,如聚乙烯树脂、聚丙烯树脂、聚酯树脂等。遮光层可使用非金属黑矩阵(black matrix,BM)用作防止背景光泄漏,提高显示对比度,防止混色和增加颜色的纯度。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部。这里是第一遮光层和第二遮光层的具体长度比较和以及它们的高度形式,便于更好的遮挡背光产生的漏电流,提高利用率。
具体的,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。这里是栅极层和源极层、漏极层之间的具体设置。
具体的,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。以其他层为参照明确第一遮光层和第二遮光层的具体长度值。
具体的,所述源极层和所述漏极层上设置有保护层,所述保护层上设有透明导电层,所述保护层对应所述漏极层设置有过孔,所述透明导电层通过所述过孔与所述漏极层连接。
具体的,所述基板包括第一基板和第二基板,所述第一基板上设置有主动开关和彩色滤光层。COA工艺下显示面板的具体设置。
作为本申请的又一个实施例,所述显示装置包括背光模组和如上所述的显示面板。
需要说明的是,在上述实施例中,所述基板的材料可以选用玻璃、塑料等。
在上述实施例中,显示面板包括液晶面板、OLED(Organic Light-Emitting Diode)面板、曲面面板、等离子面板等,以液晶面板为例,液晶面板包括阵列基板(Thin Film Transistor Substrate,TFT Substrate)和彩膜基板(Color Filter Substrate,CF Substrate),所述阵列基板与彩膜基板相对设置,所述阵列基板与彩膜基板之间设有液晶和间隔单元(PS,photo spacer),所述阵列基板上设有主动开关,主动开关可采用薄膜晶体管(TFT,Thin Film Transistor),彩膜基板上设有彩色滤光层。
在上述实施例中,彩膜基板可包括TFT阵列,彩膜及TFT阵列可形成于同一基板上,阵列基板可包括彩色滤光层。
在上述实施例中,本申请的显示面板可为曲面型面板。
以上内容是结合具体的优选实施方式对本申请所作的进一步详细说明,不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说,在不脱离本申请构思的前提下,还可以做出若干简单推演或替换,都应当视为属于本申请的保护范围。

Claims (20)

  1. 一种显示面板,包括:
    基板;
    多个主动开关,所述主动开关设置在所述基板上,所述主动开关包括设置在底部的栅极层,所述栅极层上绕设有绝缘介质层,所述绝缘介质层包括设置在栅极层的侧部的遮光层;所述侧部包括第一侧部和第二侧部,所述第一侧部和第二侧部均设置有所述遮光层;所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接;所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部;所述基板包括第一基板和第二基板,所述第一基板上设置有所述主动开关和彩色滤光层。
  2. 一种显示面板,包括:
    基板;
    多个主动开关,所述主动开关设置在所述基板上,所述主动开关包括设置在底部的栅极层,所述栅极层上绕设有绝缘介质层,所述绝缘介质层包括设置在栅极层的侧部的遮光层。
  3. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部或第二侧部设置有所述遮光层。
  4. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层。
  5. 如权利要求2所述的显示面板,其中,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。
  6. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部或第二侧部设置有所述遮光层,所述遮光层采用非金属材质, 所述遮光层与所述栅极层接触连接。
  7. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。
  8. 如权利要求4所述的显示面板,其中,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部。
  9. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部。
  10. 如权利要求2所述的显示面板,其中,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。
  11. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部或第二侧部设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。
  12. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层。
  13. 如权利要求10所述的显示面板,其中,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。
  14. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部或第二侧部设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质 层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。
  15. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界。
  16. 如权利要求2所述的显示面板,其中,所述基板包括第一基板和第二基板,所述第一基板上设置有所述主动开关和彩色滤光层。
  17. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部或第二侧部设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第 一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界,所述基板包括第一基板和第二基板,所述第一基板上设置有所述主动开关和彩色滤光层。
  18. 如权利要求2所述的显示面板,其中,所述侧部包括第一侧部和第二侧部;所述第一侧部和第二侧部均设置有所述遮光层,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述第一遮光层在所述第一侧部的长度小于所述第二遮光层在所述第二侧部的长度,所述第一遮光层的高度小于所述第一侧部,所述第二遮光层的高度小于所述第二侧部,所述绝缘介质层上设置有与绝缘介质层对应的非晶硅层,所述非晶硅层上设置有与非晶硅层对应的欧姆接触层,所述欧姆接触层上两端设置有分隔的所述主动开关的源极层和漏极层,所述源极层和所述漏极层之间设置有沟道,所述沟道穿过欧姆接触层,所述沟道底部为非晶硅层,所述侧部包括第一侧部和第二侧部,所述遮光层包括设置在所述第一侧部上的第一遮光层和设置在所述第二侧部上的第二遮光层,所述栅极层一侧的绝缘介质层、非晶硅层、欧姆接触层和源极层的边界平齐为第一边界,所述第一遮光层的长度处于或超出所述第一边界;所述栅极层另一侧的绝缘介质层、非晶硅层、欧姆接触层和漏极层的边界平齐为第二边界,所述第二遮光层的长度处于或超出所述第二边界,所述基板包括第一基板和第二基板,所述第一基板上设置有所述主动开关和彩色滤光层。
  19. 一种显示面板的制程,其中,所述显示面板包括基板和主动开关,所述制程包括步骤:
    在所述基板上设置主动开关;
    在所述主动开关的栅极层的两侧的绝缘介质层上设置遮光层。
  20. 如权利要求19所述的显示面板的制程,其中,所述遮光层采用非金属材质,所述遮光层与所述栅极层接触连接。
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