WO2018170986A1 - 多路输出选择电路及显示装置 - Google Patents

多路输出选择电路及显示装置 Download PDF

Info

Publication number
WO2018170986A1
WO2018170986A1 PCT/CN2017/081246 CN2017081246W WO2018170986A1 WO 2018170986 A1 WO2018170986 A1 WO 2018170986A1 CN 2017081246 W CN2017081246 W CN 2017081246W WO 2018170986 A1 WO2018170986 A1 WO 2018170986A1
Authority
WO
WIPO (PCT)
Prior art keywords
controllable switch
control
switches
group
controllable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/081246
Other languages
English (en)
French (fr)
Inventor
洪光辉
龚强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to US15/525,581 priority Critical patent/US10223973B2/en
Publication of WO2018170986A1 publication Critical patent/WO2018170986A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a multi-output selection circuit and a display device.
  • the multi-output selection circuit is a circuit for reducing the number of output pins of a driver chip in a thin film transistor liquid crystal display process.
  • the first one is a multi-output selection circuit controlled by an N-type thin film transistor, which requires three control signals (CKR, CKG, KB) to realize multi-channel driving chip signals.
  • the second type is a multi-output selection circuit controlled by a transmission gate, which requires six control signals (CKR, CKG, CKB, XCKR, XCKG, XCKB) to realize multi-output of the driving chip signal, thereby realizing
  • the number of output pins of the driver chip is greatly reduced.
  • the power consumption of the display device is an important indicator, and the display device with low power consumption is more competitive in the market. Therefore, reducing the power consumption of the display device is an urgent problem to be solved.
  • the technical problem to be solved by the present invention is to provide a multi-output selection circuit and a display device to reduce the power consumption of the display device.
  • a technical solution adopted by the present invention is to provide a multi-output selection circuit applied to a display panel, the multi-output selection circuit is connected to a scan driving circuit, and the scan driving circuit includes a plurality of sequential connections.
  • Scan drive unit, the multiple output selection circuit includes:
  • control signal unit configured to output a first group of control signals and a second group of control signals
  • the switch unit connected to the data signal end and the control signal unit, the switch unit includes a first group of switches and a second group of switches;
  • a pixel unit connecting the first group of switches and the second group of switches
  • the first group of control signals control the first group of switches to be turned on, and the second group of control signals control the second group of switches Turning off, so that the data signal output by the data signal end is charged by the first group of switches for the pixel unit connected by the odd-line scan driving unit of the scan driving circuit;
  • the even-numbered line scan of the scan driving circuit When the driving unit outputs the scan signal, the second group of control signals control the second group of switches to be turned on, and the first group of control signals controls the first group of switches to be turned off, so that the data output by the data signal end
  • the signal is charged by the second group of switches for the pixel unit connected to the even line scan driving unit of the scan driving circuit, thereby causing the first group of control signals of the control signal unit and the second group
  • the refresh rate of the control signal is reduced.
  • another technical solution adopted by the present invention is to provide a display device, the display device including a multi-output selection circuit, the multi-output selection circuit applied to a display panel, and the multi-channel
  • the output selection circuit is connected to the scan driving circuit, and the scan driving circuit comprises a plurality of scan driving units connected in sequence, and the multiple output selecting circuit comprises:
  • control signal unit configured to output a first group of control signals and a second group of control signals
  • the switch unit connected to the data signal end and the control signal unit, the switch unit includes a first group of switches and a second group of switches;
  • a pixel unit connecting the first group of switches and the second group of switches
  • the first group of control signals control the first group of switches to be turned on, and the second group of control signals control the second group of switches Turning off, so that the data signal output by the data signal end is charged by the first group of switches for the pixel unit connected by the odd-line scan driving unit of the scan driving circuit;
  • the even-numbered line scan of the scan driving circuit When the driving unit outputs the scan signal, the second group of control signals control the second group of switches to be turned on, and the first group of control signals controls the first group of switches to be turned off, so that the data output by the data signal end
  • the signal is charged by the second group of switches for the pixel unit connected to the even line scan driving unit of the scan driving circuit, thereby causing the first group of control signals of the control signal unit and the second group
  • the refresh rate of the control signal is reduced.
  • the multi-output selection circuit and the display device of the present invention output a first group of control signals and a second group of control signals through the control signal unit to control corresponding
  • the first group of switches and the second group of switches are alternately turned on to charge the pixel unit corresponding to the odd row scan driving unit connected to the scan driving circuit or the pixel unit corresponding to the even line scan driving unit connected to the scan driving circuit
  • the refresh frequency of the first group of control signals and the second group of control signals of the control signal unit is reduced, thereby reducing power consumption of the multiple output selection circuit.
  • FIG. 1 is a circuit diagram of a first embodiment of a prior art multiple output selection circuit
  • Figure 2 is a timing diagram of Figure 1;
  • FIG. 3 is a circuit diagram of a second embodiment of a prior art multiple output selection circuit
  • Figure 4 is a timing diagram of Figure 3;
  • Figure 5 is a circuit diagram showing a first embodiment of the multiple output selection circuit of the present invention.
  • Figure 6 is a timing diagram of Figure 5;
  • Figure 7 is a circuit diagram showing a second embodiment of the multiple output selection circuit of the present invention.
  • Figure 8 is a timing diagram of Figure 7;
  • Fig. 9 is a schematic structural view of a display device of the present invention.
  • FIG. 1 and FIG. 2 are circuit diagrams and timing diagrams of a first embodiment of a prior art multiple output selection circuit.
  • the multiple output selection circuit uses three N-type thin film transistors as control units, and uses three control signals CKR, CKG and CKB to control the on or off of the three N-type thin film transistors to realize signal 1 minute 3 function, wherein when each scanning drive unit of the scan driving circuit outputs a scan signal, all three N-type thin film transistors are turned on, so that the data signal output by the data signal terminal IN passes through the three N-types
  • the thin film transistor charges the pixel unit connected to each row of the scan driving unit of the scan driving circuit, and the circuit is disadvantageous for the reduction of the refresh frequency of the control signal, so that the power consumption of the circuit is large.
  • FIG. 3 and FIG. 4 are circuit diagrams and timing diagrams of a second embodiment of a prior art multiple output selection circuit.
  • the multiple output selection circuit uses three transmission gate circuits as control units, and uses six control signals CKR, CKG, CKB, XCKR, XCKG, and XCKB to control the conduction or the turn-off of the three transmission gate circuits.
  • the transmission gate circuit charges the pixel unit connected to each row of the scan driving unit of the scan driving circuit, and the circuit is disadvantageous for the reduction of the refresh frequency of the control signal, so that the power consumption of the circuit is large.
  • FIG. 5 is a circuit diagram of a first embodiment of the multiple output selection circuit of the present invention.
  • the multi-output selection circuit 1 is applied to a display panel, and the multi-output selection circuit 1 is connected to a scan driving circuit 40.
  • the scan driving circuit 40 includes a plurality of scan driving units connected in sequence, and the multi-output selection circuit 1 includes:
  • a data signal terminal IN for outputting a data signal
  • the control signal unit 10 is configured to output a first group of control signals 11 and a second group of control signals 12;
  • the switch unit 20 is connected to the data signal terminal IN and the control signal unit 10, the switch unit 20 includes a first group of switches 21 and a second group of switches 22;
  • a pixel unit 30 connected to the first group of switches 21 and the second group of switches 22;
  • the odd-line scan driving unit of the scan driving circuit 40 (such as the first row scan driving unit, the third row scanning driving unit or the fifth row scanning driving unit) outputs a scan signal
  • the first group of control signals 11 Controlling the first group of switches 21 to be turned on
  • the second group of control signals 12 controlling the second group of switches 22 to be turned off, so that the data signal output by the data signal terminal IN passes through the first group of switches 21
  • the pixel unit 30 connected to the odd line scan driving unit of the scan driving circuit is charged; when the even line scan driving unit of the scan driving circuit 40 (such as the second line scan driving unit, the fourth line scanning driving unit) outputs
  • the second group of control signals 12 controls the second group of switches 22 to be turned on, and the first group of control signals 11 controls the first group of switches 21 to be turned off, so that the data signal terminal IN is output.
  • the data signal is charged by the second group of switches 22 for the pixel unit 30 connected to the even line scan driving unit of the scan driving circuit, thereby making the control signal unit
  • the first group of control signals 11 includes first to third control signals CKR1, CKG1, and CKB1
  • the second group of control signals 12 includes fourth to sixth control signals CKR2, CKG2, and CKB2
  • One set of switches 21 includes at least three controllable switches
  • the second set of switches 22 includes at least three controllable switches
  • the pixel unit 30 includes at least three sub-pixels.
  • the at least three controllable switches of the first group of switches 21 are first to third controllable switches T1-T3, and the at least three controllable switches of the second group of switches are fourth to sixth
  • the control switch T4-T6 the at least three sub-pixels of the pixel unit are the first to third sub-pixels R, G, and B, and the control end of the first controllable switch T1 receives the first control signal CKR1,
  • the first end of the first controllable switch T1 is connected to the first end of the fourth controllable switch T4 and the first sub-pixel R, and the second end of the first controllable switch T1 is connected to the fourth end.
  • the second end is connected to the second end of the fifth controllable switch T5 and the data signal end IN, and the control end of the fifth controllable switch T5 receives the fifth control signal CKG2, the control end of the third controllable switch T3 receives the third control signal CKB1, the first end of the third controllable switch T3 is connected to the first end of the sixth controllable switch T6 and the a third sub-pixel B, the second end of the third controllable switch T3 is connected to the second end of the sixth controllable switch T6 and the data signal end IN, and the control end of the
  • the first to sixth controllable switches T1-T6 are N-type thin film transistors, and the control ends, the first end and the second end of the first to sixth controllable switches T1-T6 Corresponding to the gate, source and drain of the N-type thin film transistor, respectively.
  • the first to sixth controllable switches may also be other types of switches as long as the object of the present invention can be achieved.
  • the first to third sub-pixels R, G, and B are respectively a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
  • FIG. 6 is a timing diagram of a first embodiment of the multiple output selection circuit of the present invention. It can be seen from FIG. 6 that the operation principle of the multiple output selection circuit 1 is as follows, wherein the control signal unit 10 includes six control signals, and the switch unit 20 includes six controllable switches and The pixel unit 30 includes three sub-pixels as an example for description.
  • the first group of control signals 11 controls the first group of switches 21 to be turned on, and the second group of control signals 12 controls the second The group switch 22 is turned off to cause the data signal output by the data signal terminal IN to be charged by the first group of switches 11 for the pixel unit 30 connected to the odd line scan driving unit of the scan driving circuit;
  • the second group of control signals 12 controls the second group of switches 22 to be turned on, and the first group of control signals 11 controls the first group of switches 21 to be turned off.
  • FIG. 7 is a circuit diagram of a second embodiment of the multiple output selection circuit of the present invention.
  • the second embodiment of the multiple output selection circuit is different from the above-described first embodiment in that the first group of control signals 11 includes first to sixth control signals CKR1, XCKR1, CKG1, XCKG1, CKB1.
  • XCKB1 the second group of control signals 12 includes seventh to twelfth control signals CKR2, XCKR2, CKG2, XCKG2, CKB2, XCKB2, the first group of switches 21 comprising at least six controllable switches, the second The group switch 22 includes at least six controllable switches, and the pixel unit 30 includes at least three sub-pixels.
  • At least six controllable switches of the first group of switches 21 are first to sixth controllable switches T1-T6, and at least six controllable switches of the second group of switches 22 are seventh to tenth Two controllable switches T7-T12
  • at least three sub-pixels of the pixel unit 30 are first to third sub-pixels R, G, B
  • the control end of the first controllable switch T1 receives the first control signal CKR1
  • the first end of the first controllable switch T1 is connected to the first end of the second controllable switch T2 and the first sub-pixel R
  • the second end of the first controllable switch T1 is connected
  • the control end of the second controllable switch T2 receives the second control signal XCKR1
  • the control end of the third controllable switch T3 Receiving the third control signal CKG1, the first end of the third controllable switch T3 is connected to the first end of the fourth controllable switch
  • the control terminal of the seventh controllable switch T7 receives the seventh control signal CKR2, and the first end of the seventh controllable switch T7 is connected to the first end of the eighth controllable switch T8 and the first The second end of the seventh controllable switch T7 is connected to the second end of the eighth controllable switch T8 and the data signal end IN, and the control end of the eighth controllable switch T8 receives the sub-pixel R
  • the eighth control signal XCKR2 the control end of the ninth controllable switch T9 receives the ninth control signal CKG2, and the first end of the ninth controllable switch T9 is connected to the tenth controllable switch T10
  • the second end of the ninth controllable switch T9 is connected to the second end of the tenth controllable switch T10 and the data signal end IN, and the tenth controllable
  • the control terminal of the switch T10 receives the tenth control signal XCKG2, the control end of the eleventh controllable switch T11 receives the twelf
  • a control terminal of the twelfth controllable switch T12 is the twelfth control signal receiving XCKB2.
  • the eleventh controllable switch T11 is an N-type thin film transistor, the first controllable switch T1, the three controllable switch T3, the fifth controllable switch T5, and the seventh controllable switch T7
  • the control terminal, the first end and the second end of the ninth controllable switch T9 and the eleventh controllable switch T11 respectively correspond to a gate, a source and a drain of the N-type thin film transistor;
  • a second controllable switch T2, the four controllable switch T4, the sixth controllable switch T6, the eighth controllable switch T8, the tenth controllable switch T10, and the twelfth controllable switch T12 is a P-type thin film transistor, the second controllable switch T2, the four controllable switch T4, the sixth controllable switch T6, the eighth controllable switch T8, the ten
  • the first control signal CKR1 is opposite in phase to the second control signal XCKR1
  • the third control signal CKG1 is opposite in phase to the fourth control signal XCKG1
  • the fifth control signal CKB1 is opposite in phase to the sixth control signal XCKB1.
  • the seventh control signal CKR2 is opposite in phase to the eighth control signal XCKR2
  • the ninth control signal CKG2 is opposite in phase to the tenth control signal XCKG2
  • the eleventh control signal CKB2 is opposite in phase to the twelfth control signal XCKB2.
  • FIG. 8 is a timing diagram of a first embodiment of the multiple output selection circuit of the present invention. It can be seen from FIG. 8 that the operation principle of the multiple output selection circuit 1 is as follows, wherein the control signal unit 10 includes twelve control signals, and the switch unit 20 includes twelve controllable switches. And the pixel unit 30 includes three sub-pixels as an example for description.
  • the first group of control signals 11 controls the first group of switches 21 to be turned on
  • the second group of control signals 12 controls the second The group switch 22 is turned off to cause the data signal output by the data signal terminal IN to be charged by the first group of switches 21 for the pixel unit 30 connected to the odd line scan driving unit of the scan driving circuit;
  • the second group of control signals 12 controls the second group of switches 22 to be turned on
  • the first group of control signals 11 controls the first group of switches 21 to be turned off.
  • FIG. 9 is a schematic structural diagram of a display device according to the present invention.
  • the display device 2 includes the foregoing multi-output selection circuit 1.
  • the other devices and functions in the display device 2 are the same as those of the existing display device, and are not described herein again.
  • the display device is an LCD or an OLED, which can be applied to a mobile phone, a display or a television.
  • the multi-output selection circuit and the display device output a first group of control signals and a second group of control signals through the control signal unit to control the corresponding first group of switches and the second group of switches to be alternately turned on, thereby correspondingly connecting
  • the pixel unit of the odd row scan driving unit of the scan driving circuit is charged or the pixel unit of the even line scan driving unit connected to the scan driving circuit is charged, thereby implementing the first group of control signals of the control signal unit and
  • the refresh rate of the second set of control signals is reduced, thereby reducing the power consumption of the multiple output selection circuit.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种多路输出选择电路（1）及显示装置（2）。多路输出选择电路（1）与包括若干依次连接的扫描驱动单元的扫描驱动电路（40）连接；多路输出选择电路（1）包括控制信号单元（10）和开关单元（20）；控制信号单元（10）输出第一组控制信号（11）及第二组控制信号（12）；开关单元（20）包括第一组开关（21）及第二组开关（22）；当奇数行扫描驱动单元输出扫描信号时，第一组控制信号（11）控制第一组开关（21）导通，为像素单元（30）充电，当偶数行扫描驱动单元输出扫描信号时，第二组控制信号（12）控制第二组开关（22）导通，为像素单元（30）充电，以降低第一组控制信号（11）及第二组控制信号（12）的刷新频率。

Description

多路输出选择电路及显示装置
【技术领域】
本发明涉及显示技术领域，特别是涉及一种多路输出选择电路及显示装置。
【背景技术】
多路输出选择电路是一种用于薄膜晶体管液晶显示器制程中减少驱动芯片输出引脚数量的电路。目前常用的多路输出选择电路有两种，第一种是通过N型薄膜晶体管控制的多路输出选择电路，其需要三个控制信号（CKR、CKG、KB）来实现驱动芯片信号的多路输出；第二种是通过传输门控制的多路输出选择电路，其需要六个控制信号（CKR、CKG、CKB、XCKR、XCKG、XCKB）来实现驱动芯片信号的多路输出，以此实现较大程度地减少驱动芯片的输出引脚的数量。另外，显示装置的功耗是一个重要的指标，低功耗的显示装置在市场中具有更大的竞争力，因此降低显示装置的功耗是目前亟待解决的问题。
【发明内容】
本发明主要解决的技术问题是提供一种多路输出选择电路及显示装置，以降低有效降低显示装置的功耗。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种多路输出选择电路，应用于显示面板，所述多路输出选择电路连接扫描驱动电路，所述扫描驱动电路包括若干依次连接的扫描驱动单元，所述多路输出选择电路包括：
数据信号端，用于输出数据信号；
控制信号单元，用于输出第一组控制信号及第二组控制信号；
开关单元，连接所述数据信号端及所述控制信号单元，所述开关单元包括第一组开关及第二组开关；
像素单元，连接所述第一组开关及所述第二组开关；
其中，当所述扫描驱动电路的奇数行扫描驱动单元输出扫描信号时，所述第一组控制信号控制所述第一组开关导通，所述第二组控制信号控制所述第二组开关截止，以使所述数据信号端输出的数据信号通过所述第一组开关为所述扫描驱动电路的奇数行扫描驱动单元连接的所述像素单元充电；当所述扫描驱动电路的偶数行扫描驱动单元输出扫描信号时，所述第二组控制信号控制所述第二组开关导通，所述第一组控制信号控制所述第一组开关截止，以使所述数据信号端输出的数据信号通过所述第二组开关为所述扫描驱动电路的偶数行扫描驱动单元连接的所述像素单元充电，以此使得所述控制信号单元的所述第一组控制信号及所述第二组控制信号的刷新频率降低。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种显示装置，所述显示装置包括多路输出选择电路，所述多路输出选择电路，应用于显示面板，所述多路输出选择电路连接扫描驱动电路，所述扫描驱动电路包括若干依次连接的扫描驱动单元，所述多路输出选择电路包括：
数据信号端，用于输出数据信号；
控制信号单元，用于输出第一组控制信号及第二组控制信号；
开关单元，连接所述数据信号端及所述控制信号单元，所述开关单元包括第一组开关及第二组开关；
像素单元，连接所述第一组开关及所述第二组开关；
其中，当所述扫描驱动电路的奇数行扫描驱动单元输出扫描信号时，所述第一组控制信号控制所述第一组开关导通，所述第二组控制信号控制所述第二组开关截止，以使所述数据信号端输出的数据信号通过所述第一组开关为所述扫描驱动电路的奇数行扫描驱动单元连接的所述像素单元充电；当所述扫描驱动电路的偶数行扫描驱动单元输出扫描信号时，所述第二组控制信号控制所述第二组开关导通，所述第一组控制信号控制所述第一组开关截止，以使所述数据信号端输出的数据信号通过所述第二组开关为所述扫描驱动电路的偶数行扫描驱动单元连接的所述像素单元充电，以此使得所述控制信号单元的所述第一组控制信号及所述第二组控制信号的刷新频率降低。
本发明的有益效果是：区别于现有技术的情况，本发明的所述多路输出选择电路及显示装置通过所述控制信号单元输出第一组控制信号及第二组控制信号以控制对应的第一组开关及第二组开关交替导通，从而为对应连接所述扫描驱动电路的奇数行扫描驱动单元的像素单元充电或者对应连接所述扫描驱动电路的偶数行扫描驱动单元的像素单元充电，以此实现所述控制信号单元的所述第一组控制信号及所述第二组控制信号的刷新频率降低，进而降低所述多路输出选择电路的功耗。
【附图说明】
图1是现有技术的多路输出选择电路的第一实施例的电路示意图；
图2是图1的时序示意图；
图3是现有技术的多路输出选择电路的第二实施例的电路示意图；
图4是图3的时序示意图；
图5是本发明的多路输出选择电路的第一实施例的电路示意图；
图6是图5的时序示意图；
图7是本发明的多路输出选择电路的第二实施例的电路示意图；
图8是图7的时序示意图；
图9是本发明的显示装置的结构示意图。
【具体实施方式】
请参阅图1及图2，是现有技术的多路输出选择电路的第一实施例的电路示意图及时序图。其中，所述多路输出选择电路使用三个N型薄膜晶体管作为控制单元，使用三个控制信号CKR、CKG及CKB来控制所述三个N型薄膜晶体管的导通或截止，以实现信号的1分3功能，其中当扫描驱动电路的每一行扫描驱动单元输出扫描信号时，三个N型薄膜晶体管全部导通，以使所述数据信号端IN输出的数据信号通过所述三个N型薄膜晶体管为所述扫描驱动电路的每一行扫描驱动单元连接的像素单元充电，此电路不利于控制信号的刷新频率的降低，使得电路功耗较大。
请参考图3及图4，是现有技术的多路输出选择电路的第二实施例的电路示意图及时序图。其中，所述多路输出选择电路使用三个传输门电路作为控制单元，使用六个控制信号CKR、CKG、CKB、XCKR、XCKG及XCKB来控制所述三个传输门电路的导通或截止，以实现信号的1分3功能，其中当扫描驱动电路的每一行扫描驱动单元输出扫描信号时，三个传输门电路全部导通，以使所述数据信号端IN输出的数据信号通过所述三个传输门电路为所述扫描驱动电路的每一行扫描驱动单元连接的像素单元充电，此电路不利于控制信号的刷新频率的降低，使得电路功耗较大。
请参考图5，是本发明的多路输出选择电路的第一实施例的电路示意图。其中所述多路输出选择电路1应用于显示面板，所述多路输出选择电路1连接扫描驱动电路40，所述扫描驱动电路40包括若干依次连接的扫描驱动单元，所述多路输出选择电路1包括：
数据信号端IN，用于输出数据信号；
控制信号单元10，用于输出第一组控制信号11及第二组控制信号12；
开关单元20，连接所述数据信号端IN及所述控制信号单元10，所述开关单元20包括第一组开关21及第二组开关22；
像素单元30，连接所述第一组开关21及所述第二组开关22；
其中，当所述扫描驱动电路40的奇数行扫描驱动单元（如第一行扫描驱动单元、第三行扫描驱动单元或第五行扫描驱动单元）输出扫描信号时，所述第一组控制信号11控制所述第一组开关21导通，所述第二组控制信号12控制所述第二组开关22截止，以使所述数据信号端IN输出的数据信号通过所述第一组开关21为所述扫描驱动电路的奇数行扫描驱动单元连接的所述像素单元30充电；当所述扫描驱动电路40的偶数行扫描驱动单元（如第二行扫描驱动单元、第四行扫描驱动单元）输出扫描信号时，所述第二组控制信号12控制所述第二组开关22导通，所述第一组控制信号11控制所述第一组开关21截止，以使所述数据信号端IN输出的数据信号通过所述第二组开关22为所述扫描驱动电路的偶数行扫描驱动单元连接的所述像素单元30充电，以此使得所述控制信号单元的所述第一组控制信号11及所述第二组控制信号12的刷新频率降低。
具体地，所述第一组控制信号11包括第一至第三控制信号CKR1、CKG1及CKB1，所述第二组控制信号12包括第四至第六控制信号CKR2、CKG2及CKB2，所述第一组开关21包括至少三个可控开关，所述第二组开关22包括至少三个可控开关，所述像素单元30包括至少三个子像素。
具体地，所述第一组开关21的至少三个可控开关为第一至第三可控开关T1-T3，所述第二组开关的至少三个可控开关为第四至第六可控开关T4-T6，所述像素单元的至少三个子像素为第一至第三子像素R、G及B，所述第一可控开关T1的控制端接收所述第一控制信号CKR1，所述第一可控开关T1的第一端连接所述第四可控开关T4的第一端及所述第一子像素R，所述第一可控开关T1的第二端连接所述第四可控开关T4的第二端及所述数据信号端IN，所述第四可控开关T4的控制端接收所述第四控制信号CKR2，所述第二可控开关T2的控制端接收所述第二控制信号CKG1，所述第二可控开关T2的第一端连接所述第五可控开关T5的第一端及所述第二子像素G，所述第二可控开关T2的第二端连接所述第五可控开关T5的第二端及所述数据信号端IN，所述第五可控开关T5的控制端接收所述第五控制信号CKG2，所述第三可控开关T3的控制端接收所述第三控制信号CKB1，所述第三可控开关T3的第一端连接所述第六可控开关T6的第一端及所述第三子像素B，所述第三可控开关T3的第二端连接所述第六可控开关T6的第二端及所述数据信号端IN，所述第六可控开关T6的控制端接收所述第六控制信号CKB2。
在本实施例中，所述第一至第六可控开关T1-T6均为N型薄膜晶体管，所述第一至第六可控开关T1-T6的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极。在其他实施例中，所述第一至第六可控开关也可为其他类型的开关，只要能实现本发明的目的即可。
其中，所述第一至第三子像素R、G、B分别为红色子像素、绿色子像素及蓝色子像素。
请参考图6，是本发明的多路输出选择电路的第一实施例的时序示意图。从图6中可以看出所述多路输出选择电路1的工作原理如下所示，其中，以所述控制信号单元10包括六个控制信号、所述开关单元20包括六个可控开关及所述像素单元30包括三个子像素为例进行说明。当所述扫描驱动电路40的奇数行扫描驱动单元输出扫描信号时，所述第一组控制信号11控制所述第一组开关21导通，所述第二组控制信号12控制所述第二组开关22截止，以使所述数据信号端IN输出的数据信号通过所述第一组开关11为所述扫描驱动电路的奇数行扫描驱动单元连接的所述像素单元30充电；当所述扫描驱动电路40的偶数行扫描驱动单元输出扫描信号时，所述第二组控制信号12控制所述第二组开关22导通，所述第一组控制信号11控制所述第一组开关21截止，以使所述数据信号端IN输出的数据信号通过所述第二组开关22为所述扫描驱动电路的偶数行扫描驱动单元连接的所述像素单元30充电，以此使得所述控制信号单元10的所述第一组控制信号11及所述第二组控制信号12的刷新频率降低，进而降低所述多路输出选择电路的功耗。
请参阅图7，是本发明的多路输出选择电路的第二实施例的电路示意图。所述多路输出选择电路的第二实施例与上述第一实施例的区别之处在于：所述第一组控制信号11包括第一至第六控制信号CKR1、XCKR1、CKG1、XCKG1、CKB1、XCKB1，所述第二组控制信号12包括第七至第十二控制信号CKR2、XCKR2、CKG2、XCKG2、CKB2、XCKB2，所述第一组开关21包括至少六个可控开关，所述第二组开关22包括至少六个可控开关，所述像素单元30包括至少三个子像素。
具体地，所述第一组开关21的至少六个可控开关为第一至第六可控开关T1-T6，所述第二组开关22的至少六个可控开关为第七至第十二可控开关T7-T12，所述像素单元30的至少三个子像素为第一至第三子像素R、G、B，所述第一可控开关T1的控制端接收所述第一控制信号CKR1，所述第一可控开关T1的第一端连接所述第二可控开关T2的第一端及所述第一子像素R，所述第一可控开关T1的第二端连接所述第二可控开关T2的第二端及所述数据信号端IN，所述第二可控开关T2的控制端接收所述第二控制信号XCKR1，所述第三可控开关T3的控制端接收所述第三控制信号CKG1，所述第三可控开关T3的第一端连接所述第四可控开关T4的第一端及所述第二子像素G，所述第三可控开关T3的第二端连接所述第四可控开关T4的第二端及所述数据信号端IN，所述第四可控开关T4的控制端接收所述第四控制信号XCKG1，所述第五可控开关T5的控制端接收所述第五控制信号CKB1，所述第五可控开关T5的第一端连接所述第六可控开关T6的第一端及所述第三子像素B，所述第五可控开关T5的第二端连接所述第六可控开关T6的第二端及所述数据信号端IN，所述第六可控开关T6的控制端接收所述第六控制信号XCKB1；
所述第七可控开关T7的控制端接收所述第七控制信号CKR2，所述第七可控开关T7的第一端连接所述第八可控开关T8的第一端及所述第一子像素R，所述第七可控开关T7的第二端连接所述第八可控开关T8的第二端及所述数据信号端IN，所述第八可控开关T8的控制端接收所述第八控制信号XCKR2，所述第九可控开关T9的控制端接收所述第九控制信号CKG2，所述第九可控开关T9的第一端连接所述第十可控开关T10的第一端及所述第二子像素G，所述第九可控开关T9的第二端连接所述第十可控开关T10的第二端及所述数据信号端IN，所述第十可控开关T10的控制端接收所述第十控制信号XCKG2，所述第十一可控开关T11的控制端接收所述第十二控制信号CKB2，所述第十一可控开关T11的第一端连接所述第十二可控开关T12的第一端及所述第三子像素B，所述第十一可控开关T11的第二端连接所述第十二可控开关T12的第二端及所述数据信号端IN，所述第十二可控开关T12的控制端接收所述第十二控制信号XCKB2。
在本实施例中，所述第一可控开关T1、所述三可控开关T3、所述第五可控开关T5、所述第七可控开关T7、所述第九可控开关T9及所述第十一可控开关T11均为N型薄膜晶体管，所述第一可控开关T1、所述三可控开关T3、所述第五可控开关T5、所述第七可控开关T7、所述第九可控开关T9及所述第十一可控开关T11的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极；所述第二可控开关T2、所述四可控开关T4、所述第六可控开关T6、所述第八可控开关T8、所述第十可控开关T10及所述第十二可控开关T12均为P型薄膜晶体管，所述第二可控开关T2、所述四可控开关T4、所述第六可控开关T6、所述第八可控开关T8、所述第十可控开关T10及所述第十二可控开关T12的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极。在其他实施例中，所述第一至第十二可控开关也可为其他类型的开关，只要能实现本发明的目的即可。
其中，所述第一控制信号CKR1与第二控制信号XCKR1相位相反，所述第三控制信号CKG1与第四控制信号XCKG1相位相反，所述第五控制信号CKB1与第六控制信号XCKB1相位相反，所述第七控制信号CKR2与第八控制信号XCKR2相位相反，所述第九控制信号CKG2与第十控制信号XCKG2相位相反，所述第十一控制信号CKB2与第十二控制信号XCKB2相位相反。
请参考图8，是本发明的多路输出选择电路的第一实施例的时序示意图。从图8中可以看出所述多路输出选择电路1的工作原理如下所示，其中，以所述控制信号单元10包括十二个控制信号、所述开关单元20包括十二个可控开关及所述像素单元30包括三个子像素为例进行说明。当所述扫描驱动电路40的奇数行扫描驱动单元输出扫描信号时，所述第一组控制信号11控制所述第一组开关21导通，所述第二组控制信号12控制所述第二组开关22截止，以使所述数据信号端IN输出的数据信号通过所述第一组开关21为所述扫描驱动电路的奇数行扫描驱动单元连接的所述像素单元30充电；当所述扫描驱动电路40的偶数行扫描驱动单元输出扫描信号时，所述第二组控制信号12控制所述第二组开关22导通，所述第一组控制信号11控制所述第一组开关21截止，以使所述数据信号端IN输出的数据信号通过所述第二组开关22为所述扫描驱动电路40的偶数行扫描驱动单元连接的所述像素单元30充电，以此使得所述控制信号单元10的所述第一组控制信号11及所述第二组控制信号12的刷新频率降低，进而降低所述多路输出选择电路的功耗。
请参阅图9，为本发明一种显示装置的结构示意图。所述显示装置2包括前述的具多路输出选择电路1，所述显示装置2中的其他器件及功能与现有显示装置的器件及功能相同，在此不再赘述。其中，所述显示装置为LCD或OLED，其能应用于手机、显示器或电视。
所述多路输出选择电路及显示装置通过所述控制信号单元输出第一组控制信号及第二组控制信号以控制对应的第一组开关及第二组开关交替导通，从而为对应连接所述扫描驱动电路的奇数行扫描驱动单元的像素单元充电或者对应连接所述扫描驱动电路的偶数行扫描驱动单元的像素单元充电，以此实现所述控制信号单元的所述第一组控制信号及所述第二组控制信号的刷新频率降低，进而降低所述多路输出选择电路的功耗。
以上仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种多路输出选择电路，应用于显示面板，所述多路输出选择电路连接扫描驱动电路，所述扫描驱动电路包括若干依次连接的扫描驱动单元，其中，所述多路输出选择电路包括：
    数据信号端，用于输出数据信号；
    控制信号单元，用于输出第一组控制信号及第二组控制信号；
    开关单元，连接所述数据信号端及所述控制信号单元，所述开关单元包括第一组开关及第二组开关；
    像素单元，连接所述第一组开关及所述第二组开关；
    其中，当所述扫描驱动电路的奇数行扫描驱动单元输出扫描信号时，所述第一组控制信号控制所述第一组开关导通，所述第二组控制信号控制所述第二组开关截止，以使所述数据信号端输出的数据信号通过所述第一组开关为所述扫描驱动电路的奇数行扫描驱动单元连接的所述像素单元充电；当所述扫描驱动电路的偶数行扫描驱动单元输出扫描信号时，所述第二组控制信号控制所述第二组开关导通，所述第一组控制信号控制所述第一组开关截止，以使所述数据信号端输出的数据信号通过所述第二组开关为所述扫描驱动电路的偶数行扫描驱动单元连接的所述像素单元充电，以此使得所述控制信号单元的所述第一组控制信号及所述第二组控制信号的刷新频率降低。
  2. 根据权利要求1所述的多路输出选择电路，其中，所述第一组控制信号包括第一至第三控制信号，所述第二组控制信号包括第四至第六控制信号，所述第一组开关包括至少三个可控开关，所述第二组开关包括至少三个可控开关，所述像素单元包括至少三个子像素。
  3. 根据权利要求2所述的多路输出选择电路，其中，所述第一组开关的至少三个可控开关为第一至第三可控开关，所述第二组开关的至少三个可控开关为第四至第六可控开关，所述像素单元的至少三个子像素为第一至第三子像素，所述第一可控开关的控制端接收所述第一控制信号，所述第一可控开关的第一端连接所述第四可控开关的第一端及所述第一子像素，所述第一可控开关的第二端连接所述第四可控开关的第二端及所述数据信号端，所述第四可控开关的控制端接收所述第四控制信号，所述第二可控开关的控制端接收所述第二控制信号，所述第二可控开关的第一端连接所述第五可控开关的第一端及所述第二子像素，所述第二可控开关的第二端连接所述第五可控开关的第二端及所述数据信号端，所述第五可控开关的控制端接收所述第五控制信号，所述第三可控开关的控制端接收所述第三控制信号，所述第三可控开关的第一端连接所述第六可控开关的第一端及所述第三子像素，所述第三可控开关的第二端连接所述第六可控开关的第二端及所述数据信号端，所述第六可控开关的控制端接收所述第六控制信号。
  4. 根据权利要求3所述的多路输出选择电路，其中，所述第一至第六可控开关均为N型薄膜晶体管，所述第一至第六可控开关的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极。
  5. 根据权利要求1所述的多路输出选择电路，其中，所述第一组控制信号包括第一至第六控制信号，所述第二组控制信号包括第七至第十二控制信号，所述第一组开关包括至少六个可控开关，所述第二组开关包括至少六个可控开关，所述像素单元包括至少三个子像素。
  6. 根据权利要求5所述的多路输出选择电路，其中，所述第一组开关的至少六个可控开关为第一至第六可控开关，所述第二组开关的至少六个可控开关为第七至第十二可控开关，所述像素单元的至少三个子像素为第一至第三子像素，所述第一可控开关的控制端接收所述第一控制信号，所述第一可控开关的第一端连接所述第二可控开关的第一端及所述第一子像素，所述第一可控开关的第二端连接所述第二可控开关的第二端及所述数据信号端，所述第二可控开关的控制端接收所述第二控制信号，所述第三可控开关的控制端接收所述第三控制信号，所述第三可控开关的第一端连接所述第四可控开关的第一端及所述第二子像素，所述第三可控开关的第二端连接所述第四可控开关的第二端及所述数据信号端，所述第四可控开关的控制端接收所述第四控制信号，所述第五可控开关的控制端接收所述第五控制信号，所述第五可控开关的第一端连接所述第六可控开关的第一端及所述第三子像素，所述第五可控开关的第二端连接所述第六可控开关的第二端及所述数据信号端，所述第六可控开关的控制端接收所述第六控制信号；
    所述第七可控开关的控制端接收所述第七控制信号，所述第七可控开关的第一端连接所述第八可控开关的第一端及所述第一子像素，所述第七可控开关的第二端连接所述第八可控开关的第二端及所述数据信号端，所述第八可控开关的控制端接收所述第八控制信号，所述第九可控开关的控制端接收所述第九控制信号，所述第九可控开关的第一端连接所述第十可控开关的第一端及所述第二子像素，所述第九可控开关的第二端连接所述第十可控开关的第二端及所述数据信号端，所述第十可控开关的控制端接收所述第十控制信号，所述第十一可控开关的控制端接收所述第十二控制信号，所述第十一可控开关的第一端连接所述第十二可控开关的第一端及所述第三子像素，所述第十一可控开关的第二端连接所述第十二可控开关的第二端及所述数据信号端，所述第十二可控开关的控制端接收所述第十二控制信号。
  7. 根据权利要求6所述的多路输出选择电路，其中，所述第一可控开关、所述三可控开关、所述第五可控开关、所述第七可控开关、所述第九可控开关及所述第十一可控开关均为N型薄膜晶体管，所述第一可控开关、所述三可控开关、所述第五可控开关、所述第七可控开关、所述第九可控开关及所述第十一可控开关的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极；所述第二可控开关、所述四可控开关、所述第六可控开关、所述第八可控开关、所述第十可控开关及所述第十二可控开关均为P型薄膜晶体管，所述第二可控开关、所述四可控开关、所述第六可控开关、所述第八可控开关、所述第十可控开关及所述第十二可控开关的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极。
  8. 根据权利要求5所述的多路输出选择电路，其中，所述第一与第二控制信号相位相反，所述第三与第四控制信号相位相反，所述第五与第六控制信号相位相反，所述第七与第八控制信号相位相反，所述第九与第十控制信号相位相反，所述第十一与第十二控制信号相位相反。
  9. 根据权利要求3所述的多路输出选择电路，其中，所述第一至第三子像素分别为红色子像素、绿色子像素及蓝色子像素。
  10. 根据权利要求6所述的多路输出选择电路，其中，所述第一至第三子像素分别为红色子像素、绿色子像素及蓝色子像素。
  11. 一种显示装置，其中，所述显示装置包括多路输出选择电路，所述多路输出选择电路，应用于显示面板，所述多路输出选择电路连接扫描驱动电路，所述扫描驱动电路包括若干依次连接的扫描驱动单元，所述多路输出选择电路包括：
    数据信号端，用于输出数据信号；
    控制信号单元，用于输出第一组控制信号及第二组控制信号；
    开关单元，连接所述数据信号端及所述控制信号单元，所述开关单元包括第一组开关及第二组开关；
    像素单元，连接所述第一组开关及所述第二组开关；
    其中，当所述扫描驱动电路的奇数行扫描驱动单元输出扫描信号时，所述第一组控制信号控制所述第一组开关导通，所述第二组控制信号控制所述第二组开关截止，以使所述数据信号端输出的数据信号通过所述第一组开关为所述扫描驱动电路的奇数行扫描驱动单元连接的所述像素单元充电；当所述扫描驱动电路的偶数行扫描驱动单元输出扫描信号时，所述第二组控制信号控制所述第二组开关导通，所述第一组控制信号控制所述第一组开关截止，以使所述数据信号端输出的数据信号通过所述第二组开关为所述扫描驱动电路的偶数行扫描驱动单元连接的所述像素单元充电，以此使得所述控制信号单元的所述第一组控制信号及所述第二组控制信号的刷新频率降低。
  12. 根据权利要求11所述的显示装置，其中，所述第一组控制信号包括第一至第三控制信号，所述第二组控制信号包括第四至第六控制信号，所述第一组开关包括至少三个可控开关，所述第二组开关包括至少三个可控开关，所述像素单元包括至少三个子像素。
  13. 根据权利要求12所述的显示装置，其中，所述第一组开关的至少三个可控开关为第一至第三可控开关，所述第二组开关的至少三个可控开关为第四至第六可控开关，所述像素单元的至少三个子像素为第一至第三子像素，所述第一可控开关的控制端接收所述第一控制信号，所述第一可控开关的第一端连接所述第四可控开关的第一端及所述第一子像素，所述第一可控开关的第二端连接所述第四可控开关的第二端及所述数据信号端，所述第四可控开关的控制端接收所述第四控制信号，所述第二可控开关的控制端接收所述第二控制信号，所述第二可控开关的第一端连接所述第五可控开关的第一端及所述第二子像素，所述第二可控开关的第二端连接所述第五可控开关的第二端及所述数据信号端，所述第五可控开关的控制端接收所述第五控制信号，所述第三可控开关的控制端接收所述第三控制信号，所述第三可控开关的第一端连接所述第六可控开关的第一端及所述第三子像素，所述第三可控开关的第二端连接所述第六可控开关的第二端及所述数据信号端，所述第六可控开关的控制端接收所述第六控制信号。
  14. 根据权利要求13所述的显示装置，其中，所述第一至第六可控开关均为N型薄膜晶体管，所述第一至第六可控开关的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极。
  15. 根据权利要求11所述的显示装置，其中，所述第一组控制信号包括第一至第六控制信号，所述第二组控制信号包括第七至第十二控制信号，所述第一组开关包括至少六个可控开关，所述第二组开关包括至少六个可控开关，所述像素单元包括至少三个子像素。
  16. 根据权利要求15所述的显示装置，其中，所述第一组开关的至少六个可控开关为第一至第六可控开关，所述第二组开关的至少六个可控开关为第七至第十二可控开关，所述像素单元的至少三个子像素为第一至第三子像素，所述第一可控开关的控制端接收所述第一控制信号，所述第一可控开关的第一端连接所述第二可控开关的第一端及所述第一子像素，所述第一可控开关的第二端连接所述第二可控开关的第二端及所述数据信号端，所述第二可控开关的控制端接收所述第二控制信号，所述第三可控开关的控制端接收所述第三控制信号，所述第三可控开关的第一端连接所述第四可控开关的第一端及所述第二子像素，所述第三可控开关的第二端连接所述第四可控开关的第二端及所述数据信号端，所述第四可控开关的控制端接收所述第四控制信号，所述第五可控开关的控制端接收所述第五控制信号，所述第五可控开关的第一端连接所述第六可控开关的第一端及所述第三子像素，所述第五可控开关的第二端连接所述第六可控开关的第二端及所述数据信号端，所述第六可控开关的控制端接收所述第六控制信号；
    所述第七可控开关的控制端接收所述第七控制信号，所述第七可控开关的第一端连接所述第八可控开关的第一端及所述第一子像素，所述第七可控开关的第二端连接所述第八可控开关的第二端及所述数据信号端，所述第八可控开关的控制端接收所述第八控制信号，所述第九可控开关的控制端接收所述第九控制信号，所述第九可控开关的第一端连接所述第十可控开关的第一端及所述第二子像素，所述第九可控开关的第二端连接所述第十可控开关的第二端及所述数据信号端，所述第十可控开关的控制端接收所述第十控制信号，所述第十一可控开关的控制端接收所述第十二控制信号，所述第十一可控开关的第一端连接所述第十二可控开关的第一端及所述第三子像素，所述第十一可控开关的第二端连接所述第十二可控开关的第二端及所述数据信号端，所述第十二可控开关的控制端接收所述第十二控制信号。
  17. 根据权利要求16所述的显示装置，其中，所述第一可控开关、所述三可控开关、所述第五可控开关、所述第七可控开关、所述第九可控开关及所述第十一可控开关均为N型薄膜晶体管，所述第一可控开关、所述三可控开关、所述第五可控开关、所述第七可控开关、所述第九可控开关及所述第十一可控开关的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极；所述第二可控开关、所述四可控开关、所述第六可控开关、所述第八可控开关、所述第十可控开关及所述第十二可控开关均为P型薄膜晶体管，所述第二可控开关、所述四可控开关、所述第六可控开关、所述第八可控开关、所述第十可控开关及所述第十二可控开关的控制端、第一端及第二端分别对应所述N型薄膜晶体管的栅极、源极及漏极。
  18. 根据权利要求15所述的显示装置，其中，所述第一与第二控制信号相位相反，所述第三与第四控制信号相位相反，所述第五与第六控制信号相位相反，所述第七与第八控制信号相位相反，所述第九与第十控制信号相位相反，所述第十一与第十二控制信号相位相反。
  19. 根据权利要求13所述的显示装置，其中，所述第一至第三子像素分别为红色子像素、绿色子像素及蓝色子像素。
  20. 根据权利要求16所述的显示装置，其中，所述第一至第三子像素分别为红色子像素、绿色子像素及蓝色子像素。
PCT/CN2017/081246 2017-03-23 2017-04-20 多路输出选择电路及显示装置 Ceased WO2018170986A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/525,581 US10223973B2 (en) 2017-03-23 2017-04-20 Demultiplexer and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710178204.8A CN106935217B (zh) 2017-03-23 2017-03-23 多路输出选择电路及显示装置
CN201710178204.8 2017-03-23

Publications (1)

Publication Number Publication Date
WO2018170986A1 true WO2018170986A1 (zh) 2018-09-27

Family

ID=59425070

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/081246 Ceased WO2018170986A1 (zh) 2017-03-23 2017-04-20 多路输出选择电路及显示装置

Country Status (3)

Country Link
US (1) US10223973B2 (zh)
CN (1) CN106935217B (zh)
WO (1) WO2018170986A1 (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108447435A (zh) * 2018-03-29 2018-08-24 京东方科技集团股份有限公司 数据选择模块、数据选择方法、数据选择单元和显示装置
CN108877623B (zh) * 2018-07-02 2021-07-09 上海中航光电子有限公司 一种阵列基板、电泳显示面板及其驱动方法、显示装置
KR102684683B1 (ko) * 2018-12-13 2024-07-15 엘지디스플레이 주식회사 평판 표시 장치
CN109509429A (zh) * 2019-01-21 2019-03-22 Oppo广东移动通信有限公司 多路选择电路、显示设备及电子设备
CN110335561B (zh) * 2019-04-03 2021-03-16 武汉华星光电技术有限公司 多路复用电路
CN114299840B (zh) * 2020-09-23 2024-12-24 群创光电股份有限公司 显示装置
CN114464120B (zh) * 2020-11-10 2024-12-24 群创光电股份有限公司 电子装置及扫描驱动电路
CN113140177A (zh) * 2021-04-26 2021-07-20 武汉华星光电技术有限公司 一种多路复用电路、显示面板以及显示面板的驱动方法
CN117392945B (zh) * 2022-07-04 2024-10-25 荣耀终端有限公司 驱动信号输出电路、屏幕驱动电路、显示屏及电子设备
CN115083338A (zh) * 2022-07-20 2022-09-20 京东方科技集团股份有限公司 多路选择器、显示面板及其驱动方法、显示装置
CN118098107A (zh) * 2022-11-28 2024-05-28 Oppo广东移动通信有限公司 扫描控制电路、显示模组和显示设备
CN121237006A (zh) * 2024-06-25 2025-12-30 京东方科技集团股份有限公司 显示基板及其驱动方法、显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040104880A1 (en) * 2002-12-03 2004-06-03 Lg.Philips Lcd Co., Ltd. Apparatus and method data-driving for liquid crystal display device
CN1622180A (zh) * 2003-11-27 2005-06-01 三星Sdi株式会社 多路分离器和使用该多路分离器的显示器
CN1697006A (zh) * 2004-05-15 2005-11-16 三星Sdi株式会社 显示器和多路分解器
CN1702724A (zh) * 2004-05-25 2005-11-30 三星Sdi株式会社 显示设备和多路分解器
CN1932939A (zh) * 2005-09-15 2007-03-21 三星Sdi株式会社 有机发光显示装置及其操作方法
CN103366701A (zh) * 2012-08-06 2013-10-23 友达光电股份有限公司 具多路复用器馈通效应补偿架构的显示装置与其驱动方法
CN106383624A (zh) * 2016-10-26 2017-02-08 厦门天马微电子有限公司 一种阵列基板、显示面板及其驱动方法和显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102204674B1 (ko) * 2014-04-03 2021-01-20 삼성디스플레이 주식회사 표시 장치
US20160093260A1 (en) * 2014-09-29 2016-03-31 Innolux Corporation Display device and associated method
KR102528296B1 (ko) * 2015-11-18 2023-05-04 삼성디스플레이 주식회사 표시 장치

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040104880A1 (en) * 2002-12-03 2004-06-03 Lg.Philips Lcd Co., Ltd. Apparatus and method data-driving for liquid crystal display device
CN1622180A (zh) * 2003-11-27 2005-06-01 三星Sdi株式会社 多路分离器和使用该多路分离器的显示器
CN1697006A (zh) * 2004-05-15 2005-11-16 三星Sdi株式会社 显示器和多路分解器
CN1702724A (zh) * 2004-05-25 2005-11-30 三星Sdi株式会社 显示设备和多路分解器
CN1932939A (zh) * 2005-09-15 2007-03-21 三星Sdi株式会社 有机发光显示装置及其操作方法
CN103366701A (zh) * 2012-08-06 2013-10-23 友达光电股份有限公司 具多路复用器馈通效应补偿架构的显示装置与其驱动方法
CN106383624A (zh) * 2016-10-26 2017-02-08 厦门天马微电子有限公司 一种阵列基板、显示面板及其驱动方法和显示装置

Also Published As

Publication number Publication date
US20180293943A1 (en) 2018-10-11
CN106935217B (zh) 2019-03-15
CN106935217A (zh) 2017-07-07
US10223973B2 (en) 2019-03-05

Similar Documents

Publication Publication Date Title
WO2018170986A1 (zh) 多路输出选择电路及显示装置
WO2017024644A1 (zh) 一种液晶显示面板及其驱动电路
WO2017049688A1 (zh) 一种goa电路及其驱动方法、液晶显示器
US10971091B2 (en) Array substrate, display panel and driving method thereof, and display device
WO2017028332A1 (zh) 扫描驱动电路及具有该电路的液晶显示装置
US12230196B2 (en) Display substrate and display apparatus
WO2016183922A1 (zh) 一种液晶显示面板及装置
WO2016176914A1 (zh) 基板及其液晶显示装置
WO2018120286A1 (zh) 一种驱动电路及显示面板
WO2017088265A1 (zh) 一种栅极驱动电路及其显示器
WO2017028350A1 (zh) 液晶显示装置及其goa扫描电路
WO2017201773A1 (zh) 阵列基板测试电路、显示面板及平面显示装置
WO2014153768A1 (zh) 一种液晶显示装置及其驱动方法
WO2018035995A1 (zh) 扫描驱动电路
WO2018000490A1 (zh) 一种基于液晶面板的驱动电路及液晶面板
WO2018176588A1 (zh) 液晶显示面板的驱动电路及液晶显示器
WO2019041585A1 (zh) 一种goa电路及显示装置
WO2017049660A1 (zh) 扫描驱动电路及具有该电路的液晶显示装置
WO2018176561A1 (zh) 一种液晶面板驱动电路及液晶显示装置
WO2022041370A1 (zh) 栅极驱动电路及显示装置
WO2018209755A1 (zh) 显示面板及显示装置
WO2017024621A1 (zh) 一种液晶显示器及其控制方法
CN105869599A (zh) 一种阵列基板及其驱动方法、以及显示面板
WO2018223519A1 (zh) Goa驱动电路及液晶显示器
WO2017049662A1 (zh) 扫描驱动电路及具有该电路的液晶显示装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15525581

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17901513

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17901513

Country of ref document: EP

Kind code of ref document: A1