WO2018157610A1 - 发光二极管显示基板及其制作方法、显示器 - Google Patents

发光二极管显示基板及其制作方法、显示器 Download PDF

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WO2018157610A1
WO2018157610A1 PCT/CN2017/107058 CN2017107058W WO2018157610A1 WO 2018157610 A1 WO2018157610 A1 WO 2018157610A1 CN 2017107058 W CN2017107058 W CN 2017107058W WO 2018157610 A1 WO2018157610 A1 WO 2018157610A1
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emitting diode
layer
light emitting
self
substrate
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PCT/CN2017/107058
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English (en)
French (fr)
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冯翔
刘莎
杨瑞智
孙晓
邱云
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京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to US16/062,665 priority Critical patent/US11233038B2/en
Publication of WO2018157610A1 publication Critical patent/WO2018157610A1/zh

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    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2224/241—Disposition
    • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
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    • H01L2224/29193—Material with a principal constituent of the material being a solid not provided for in groups H01L2224/291 - H01L2224/29191, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
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    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • At least one embodiment of the present disclosure is directed to an LED display substrate, a method of fabricating the same, and a display.
  • LED Light Emitting Diode
  • LED is a kind of semiconductor electronic component that can emit light. It has the characteristics of small size, high brightness and low energy consumption. It is widely used in display fields such as display screens, backlights and illumination. Micro LEDs have the characteristics of low driving voltage, power saving, high brightness, etc., so the potential in display technology is enormous.
  • At least one embodiment of the present disclosure provides a light emitting diode display substrate, a method of fabricating the same, and a display.
  • the LED display substrate utilizes the lattice matching of graphene and gallium nitride on the one hand to help the gallium nitride grow on the transfer substrate, and the graphene is a conductive material, and the hardness and flexibility are better.
  • As a substrate it can also be used as an electrode, and can also be used as a medium for the roll-to-roll carrier transfer process; on the other hand, a self-assembly monolayer is used to connect the graphene layer with a chemical bond, thereby increasing the light-emitting diode and The connection strength of the base substrate.
  • At least one embodiment of the present disclosure provides a light emitting diode display substrate including a substrate substrate, a light emitting diode on the substrate substrate, and a self-assembled monolayer located between the light emitting diode and the substrate.
  • the light emitting diode comprises a graphene layer, and the graphene layer is located on a side of the light emitting diode near the substrate; the self-assembled monolayer is located between the graphene layer and the base substrate and is connected to the graphene layer.
  • the self-assembled monolayer includes at least one organic molecule, the two ends of the organic molecule respectively including an azide functional group and an amino functional group, and the azide functional group and the graphene molecule in the graphene layer Connected in the form of chemical bonds.
  • the organic molecule comprises 4-diazo-2,3,5,6-tetrafluorobenzene Ethyl formate.
  • the LED display substrate further includes: an organic film layer between the self-assembled monolayer and the substrate, and hydrogen bonding with the amino functional group in the self-assembled monolayer connection.
  • the light emitting diode further includes a semiconductor layer on a side of the graphene layer away from the self-assembled monolayer and a conductive layer on a side of the semiconductor layer away from the graphene layer.
  • the semiconductor layer is a gallium nitride based semiconductor layer.
  • the LED display substrate further includes: a protective layer on a portion of the upper surface of the conductive layer away from the side of the semiconductor layer.
  • the graphene layer includes a protruding portion extending beyond the semiconductor layer in a first direction parallel to the substrate, and the protective layer is located on a side of the semiconductor layer and connected to the graphene layer The prominent part.
  • the LED display substrate further includes: a thin film transistor including a drain electrically connected to the graphene layer.
  • the size of the light emitting diode is from 1 micron to 100 microns.
  • At least one embodiment of the present disclosure provides a method for fabricating a light emitting diode display substrate, comprising: forming a graphene layer on a transfer substrate; forming a graphene layer on a side away from the transfer substrate a semiconductor layer and a conductive layer to form a light emitting diode; forming a self-assembled monolayer on the substrate; transferring the light emitting diode from the transfer substrate to the self-assembled monolayer, and connecting the graphene layer to the self-assembled monolayer .
  • the self-assembled monolayer includes at least one organic molecule, and both ends of the organic molecule include an azide functional group and an amino functional group, respectively.
  • the protective layer is formed on a portion of the upper surface of the conductive layer away from the semiconductor layer.
  • the graphene layer includes a protruding portion extending beyond the semiconductor layer in a first direction parallel to the transfer substrate, and further comprising: the semiconductor layer before transferring the light emitting diode from the transfer substrate
  • the side surface and the protruding portion of the graphene layer form a protective layer.
  • transferring the light emitting diode from the transfer substrate to the self-assembled monolayer includes: adsorbing the protective layer by using a transfer device, removing the light emitting diode from the transfer substrate, and transferring to the self-assembly On the monolayer, the self-assembled monolayer is heated to link the azide functional group to the graphene molecule of the graphene layer in a chemical bond.
  • forming a self-assembled monolayer on a substrate includes: Forming an organic film layer on the base substrate, treating the surface of the organic film layer, and forming a self-assembled monolayer on the organic film layer to connect the amino functional group in the self-assembled monolayer to the organic film layer through hydrogen bonding .
  • a light-emitting diode is transferred to a self-assembled monolayer using a roll-to-roll process.
  • At least one embodiment of the present disclosure provides a display including any of the above-described light emitting diode display substrates.
  • FIG. 1 is a schematic diagram of a display substrate of an LED according to an embodiment of the present disclosure
  • 2a is a schematic diagram of a molecular formula of a self-assembled monolayer provided by an embodiment of the present disclosure
  • FIG. 2b is a schematic view showing the bonding mechanism of the molecular formula of the self-assembled monolayer shown in FIG. 2a;
  • FIG. 3 is a schematic diagram of specific steps of a method for fabricating an LED display substrate according to an embodiment of the present disclosure
  • FIGS. 4a-4d are schematic flowcharts of forming a light emitting diode according to an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of a thin film transistor backplane (TFT BP) according to an embodiment of the present disclosure
  • 6a-6b are schematic diagrams showing a process of transferring a formed light emitting diode according to an embodiment of the present disclosure
  • FIG. 7 is a schematic diagram of transferring a light emitting diode to a substrate according to an embodiment of the present disclosure
  • FIG. 8 is a schematic diagram of transferring a light emitting diode to a self-assembled monolayer by a roll-to-roll process according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a light emitting diode display substrate, a method of fabricating the same, and a display.
  • the LED display substrate comprises a substrate substrate, a light emitting diode on the substrate substrate, and a self-assembled monolayer between the light emitting diode and the substrate.
  • the light emitting diode comprises a graphene layer, and the graphene layer is located on a side of the light emitting diode near the substrate; the self-assembled monolayer is located between the graphene layer and the base substrate and is connected to the graphene layer.
  • the LED display substrate utilizes the lattice matching of graphene and gallium nitride on the one hand to help the gallium nitride grow on the transfer substrate, and the graphene is a conductive material, and the hardness and flexibility are better.
  • a substrate it can also be used as an electrode, and can also be used as a medium for the roll-to-roll carrier transfer process; on the other hand, a self-assembly monolayer is used to connect the graphene layer with a chemical bond, thereby increasing the light-emitting diode and The connection strength of the base substrate.
  • the light emitting diode display substrate includes a base substrate 100 , a light emitting diode 110 on the base substrate 100 , and the light emitting diode 110 and the base substrate 100 .
  • the light emitting diode 110 includes a graphene layer 111, and the graphene layer 111 is located on a side of the light emitting diode 110 close to the base substrate 100.
  • the self-assembled monolayer 101 disposed between the graphene layer 111 and the base substrate 100 is connected to the graphene layer 111 in the form of a chemical bond.
  • the LED display substrate provided in this embodiment adopts a novel connection method in which a light emitting diode and a base substrate are chemically connected, and the connection strength between the LED and the substrate can be increased, that is, by using a self-assembled monolayer and graphene.
  • the layer is connected by a chemical bond to increase the connection strength between the LED and the substrate; on the other hand, the lattice matching of graphene and gallium nitride is used to help the gallium nitride grow on the transfer substrate, and the graphite Alkene is a conductive material with good hardness and flexibility. It can be used as a substrate or as an electrode.
  • the arrangement of one light emitting diode 110 on the base substrate 100 in FIG. 1 is merely illustrative.
  • a plurality of light emitting diodes 110 may be disposed on the base substrate 100.
  • the plurality of light emitting diodes 110 may be disposed on the base substrate 100 in an array. .
  • the plurality of light emitting diodes 110 can emit light of different colors or The light of the same color is not particularly limited in this embodiment of the present disclosure.
  • the present embodiment is described by taking an orthographic projection of the graphene layer 111 on the substrate substrate 100 completely within the orthographic projection of the self-assembled monolayer 101 on the substrate substrate 100 as an example.
  • This embodiment includes but is not limited thereto.
  • the orthographic projection of the self-assembled monolayer on the substrate substrate completely falls within the orthographic projection of the graphene layer on the substrate.
  • the base substrate 100 may be made of sapphire, silicon, gallium arsenide, silicon carbide, aluminum nitride, gallium nitride, polyimide, polycarbonate, polyacrylate, polyetherimide, polyethersulfone, It is made of one or more materials of polyethylene terephthalate and polyethylene naphthalate, which is not limited in this embodiment.
  • the LED display substrate provided in this embodiment further includes an organic film layer 102 between the self-assembled monolayer 101 and the substrate 100, and the organic film layer 102 and The assembled monolayer 101 is connected in the form of a chemical bond.
  • the material of the organic film layer 102 may include polyimide, polycarbonate or polyacrylate, etc., which is not limited in this embodiment.
  • the self-assembled monolayer 101 includes at least one organic molecule, and both ends of the organic molecule include an azide functional group (-N 3 ) and an amino functional group (-NH 2 ), respectively.
  • Figure 2a is a schematic diagram of the molecular formula of a self-assembled monolayer, as shown in Figure 2a, the self-assembled monolayer includes 4-diazo-2,3,5,6-tetrafluorobenzoate (TFPA-NH 2 ) This embodiment includes but is not limited to.
  • the azide functional group (-N 3 ) and the amino functional group (-NH 2 ) are respectively included in the two ends of each molecule in the self-assembled monolayer, and this embodiment includes However, it is not limited thereto, and for example, other molecules may be included in the self-assembled monolayer.
  • FIG. 2b is a schematic diagram showing the bonding mechanism of the molecular formula of the self-assembled monolayer shown in FIG. 2a, as shown in FIG. 2b, the azide in the self-assembled monolayer (described in this example with TFPA-NH 2 as an example)
  • the functional group is connected to the six-membered ring of the graphene molecule in the graphene layer 111 in a chemical bond form.
  • the azide functional group can be activated by heating to form a covalent bond with the carbon six-membered ring in the graphene molecule.
  • This embodiment includes but is not limited thereto.
  • the organic film layer 102 is bonded to the amino functional group in the self-assembled monolayer in the form of a chemical bond.
  • the surface of the organic film layer 102 is subjected to an oxygen plasma treatment to produce some reactive groups (e.g., -H) which will be hydrogen bonded to the self-assembled monolayer (as indicated by the dashed line in Figure 2b).
  • -H reactive groups
  • the functions are connected to each other, and the embodiment includes but is not limited thereto.
  • the self-assembled monolayer between the graphene layer and the organic film layer in this embodiment is a functional layer, and the functional layer is charged in the form of a self-assembled monolayer
  • the connection medium between the light emitting diode and the substrate is connected, the two ends of the self-assembled monolayer are respectively bonded to the graphene layer and the organic film layer to form a covalent bond, thereby increasing the light emitting diode and the substrate.
  • Connection strength with good mechanical reliability.
  • the light emitting diode 110 further includes a semiconductor layer 112 on the graphene layer 111 and a conductive layer 113 on the semiconductor layer 112.
  • the semiconductor layer 112 is a gallium nitride based semiconductor layer.
  • the present embodiment is described by taking an example in which the semiconductor layer 112 includes an N-type semiconductor layer and a P-type semiconductor layer, that is, the semiconductor layer close to the graphene layer 111 is an N-type semiconductor layer, for example, an N-type semiconductor.
  • the material of the layer may include N-type gallium nitride, and the embodiment is not limited thereto; in this embodiment, the semiconductor layer close to the conductive layer 113 is a P-type semiconductor layer, for example, the material of the P-type semiconductor layer may include P-type nitrogen.
  • Gallium this embodiment is not limited thereto.
  • the semiconductor layer close to the graphene layer 111 may be a P-type semiconductor layer
  • the semiconductor layer close to the conductive layer 113 may be an N-type semiconductor layer.
  • the material of the conductive layer 113 is a transparent conductive material, and may include, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ZnO zinc oxide
  • IGO indium gallium oxide
  • the combination or at least one of the embodiments is not limited in this embodiment.
  • the orthographic projection of the conductive layer on the substrate substrate and the orthographic projection of the semiconductor layer on the substrate substrate are completely overlapped as an example, that is, taking the conductive layer as the whole surface electrode as an example, the present embodiment Examples include but are not limited to this.
  • the conductive layer may also be a bulk electrode, and the conductive layer may be a transparent conductive material or an opaque conductive material.
  • the material of the opaque conductive layer may be titanium (Ti), platinum (Pt), or gold ( One or several kinds of materials such as Au) and chromium (Cr) are not limited in this embodiment.
  • the light emitting diode may further include a light emitting layer (not shown in FIG. 1), the light emitting layer is located between the two semiconductor layers, and holes and electrons are respectively injected from the two semiconductor layers to the light emitting layer, and are combined in the light emitting layer, and Release energy in the form of photons.
  • a light emitting layer not shown in FIG. 1
  • the light-emitting layer may be a single-layer quantum well (SQW) or a multilayer quantum well (MQW) light-emitting layer, that is, a quantum well whose structure is a confinement carrier.
  • SQW single-layer quantum well
  • MQW multilayer quantum well
  • the light emitting layer may also be a quantum dot light emitting layer.
  • the luminescent layer may emit different colors according to different materials.
  • the luminescent layer of the red LED may be one or more materials such as aluminum gallium arsenide, gallium arsenide, gallium phosphide or the like;
  • the material of the green light emitting diode light emitting layer may be one or more selected from the group consisting of indium gallium nitride/gallium nitride, gallium phosphide, aluminum gallium phosphide, etc.;
  • One or more of materials such as gallium nitride, indium gallium nitride, and zinc selenide may be selected, which is not limited in this embodiment.
  • the structure of the light emitting diode in this embodiment is not limited thereto, and may further include a current dispersion layer, a current blocking layer, an intermediate barrier layer, a buffer layer, and the like.
  • a protective layer 1034 is disposed on a portion of the upper surface of the conductive layer 113.
  • the protective layer 1034 in this embodiment includes a first protective layer 103 and a second protective layer 104.
  • the first protective layer 103 is The light-emitting diode 110 is protected during the transfer of the light-emitting diode 110, that is, in the process of transferring the light-emitting diode 110 from the transfer substrate to the base substrate 100, the transfer device is used to adsorb onto the first protective layer 103, and The light emitting diode 110 is removed from the transfer substrate.
  • the second protective layer 104 is used to protect the graphene layer 111 to prevent the graphene layer 111 from being electrically connected to the subsequently formed common electrode 107.
  • the thickness of the protective layer 1034 and the light emitting diode 110 as a whole in the Y direction is 3-4 micrometers, and the embodiment includes but is not limited thereto.
  • the graphene layer 111 in the present embodiment includes a protruding portion 1111 that extends beyond the semiconductor layer 112 in a first direction (the X direction as shown in FIG. 1) parallel to the base substrate 100.
  • the first protective layer 103 includes, in addition to the portion including the upper surface of the portion of the conductive layer 113, another portion of the protruding portion 1111 of the graphene layer 111 which is located on the side surface 1121 of the semiconductor layer 112 and is connected as an example.
  • the first protective layer may also be located only on a portion of the upper surface of the conductive layer or the first protective layer may also be located on a portion of the upper surface of the conductive layer and the side of the semiconductor layer.
  • the second protective layer 104 is located at the other side opposite to the side surface 1121 of the semiconductor layer 112 in the X direction to prevent the graphene layer 111 from being electrically connected to the subsequently formed common electrode 107.
  • the present embodiment is described by taking the position of the second protective layer on the upper surface of the conductive layer and the side of the semiconductor layer and the graphene layer as an example. The embodiment is not limited thereto.
  • the second protective layer may also be located at a portion of the upper surface of the semiconductor layer and at the side of the semiconductor layer or the graphene layer.
  • the material of the protective layer 1034 may be a transparent organic material such as a photoresist, and the embodiment includes but is not limited thereto.
  • the LED display substrate further includes a thin film transistor 120 including a drain 121, a source 122, an active layer 123, a gate 124, and a gate insulating layer 125, wherein the drain 121 Electrically connected to the graphene layer 111, that is, the graphene layer 111 serves as an electrode of the light emitting diode 110, and the graphene layer 111 serves as an electrode of the light emitting diode 110, and the protruding portion 1111 thereof is in contact
  • the electrode 105 is electrically connected to the drain 121.
  • the current of the source 122 is transmitted to the graphene layer 111 of the light emitting diode 110 through the drain 121.
  • the embodiment includes, but is not limited to, for example, an electrode may be further disposed on the graphene layer and electrically connected to the drain of the thin film transistor, and the graphene layer is only used as a substrate for forming the light emitting diode and is transferred together with the light emitting diode. Onto the substrate.
  • the LED display substrate further includes a common electrode 107 , and the common electrode 107 is electrically connected to the conductive layer 113 of the LED 110 .
  • the material of the common electrode 107 is a transparent conductive material, and may include, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ZnO zinc oxide
  • IGO indium gallium oxide
  • the combination or at least one of the embodiments is not limited in this embodiment.
  • the LED display substrate further includes an encapsulation layer 108.
  • the material of the encapsulation layer 108 may include silicon dioxide, and the embodiment is not limited thereto, and may include, for example, a transparent organic material or the like.
  • the thickness of the encapsulation layer 108 in the Y direction is not less than the overall thickness of the LED 110 and the protection layer 1034 in the Y direction, that is, the thickness of the encapsulation layer 108 in the Y direction is not less than 3-4 micrometers, and the embodiment is not limited thereto.
  • the size of the plurality of light emitting diodes 120 is several micrometers to several tens of micrometers.
  • the size of the light emitting diodes 120 is from 1 micrometer to 100 micrometers, that is, the light emitting diodes 120 are micro light emitting diodes, and the embodiment is not limited thereto.
  • An embodiment of the present disclosure provides a method for fabricating an LED display substrate.
  • the specific steps of the method for fabricating the LED display substrate are as shown in FIG. 3, including:
  • FIG. 4a-4d are schematic flow diagrams of forming a light emitting diode according to the embodiment. As shown in FIG. 4a, for example, a graphene layer 111 is formed on the transfer substrate 130.
  • a graphene film can be grown by chemical vapor deposition on a substrate such as a copper sheet, and the graphene film can be peeled off from a substrate such as a copper sheet by pyrolysis tape-etching, ultraviolet curing-etching, electrolytic bubble stripping or dry etching. And transferred to the transfer substrate 130, this embodiment includes but is not limited thereto.
  • the material of the transfer substrate 130 may be sapphire.
  • the embodiment is not limited thereto, and may be another connection that does not generate a chemical bond with the graphene layer, but a transfer substrate connected by a weak van der Waals force, and this
  • the lattice form of the material of the transfer substrate is similar to the lattice structure of graphene and gallium nitride. This embodiment does not limit this.
  • a semiconductor layer 112 and a conductive layer 113 are formed on the graphene layer 111, that is, a light-emitting diode crystal is grown on a composite substrate of sapphire and graphene.
  • the semiconductor layer 112 includes an N-type semiconductor layer and a P-type semiconductor layer, that is, the semiconductor layer close to the graphene layer 111 is an N-type semiconductor layer, for example, an N-type semiconductor layer.
  • the material may include N-type gallium nitride, and the embodiment is not limited thereto; in this embodiment, the semiconductor layer close to the conductive layer 113 is a P-type semiconductor layer, for example, the material of the P-type semiconductor layer may include P-type gallium nitride.
  • the semiconductor layer close to the conductive layer 113 is a P-type semiconductor layer, for example, the material of the P-type semiconductor layer may include P-type gallium nitride.
  • Holes and electrons are injected from the conductive layer 113 and the graphene layer 111 into the P-type semiconductor layer and the N-type semiconductor layer, respectively, and recombine at the contact faces between the two semiconductor layers, and release energy in the form of photons, and the emission wavelength depends on The forbidden band width of the luminescent material.
  • This embodiment includes but is not limited thereto.
  • the semiconductor layer close to the graphene layer 111 may be a P-type semiconductor layer
  • the semiconductor layer close to the conductive layer 113 may
  • a gallium nitride crystal is grown on the graphene layer, and the gallium nitride crystal can be grown by using a six-membered ring of graphene molecules as a “template”, and thus the shape of the grown gallium nitride crystal lattice is relatively standardized.
  • the material of the conductive layer 113 is a transparent conductive material, and may include, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ZnO zinc oxide
  • IGO indium gallium oxide
  • the combination or at least one of the embodiments is not limited in this embodiment.
  • a light-emitting layer (not shown in FIG. 4b) may be formed between the two semiconductor layers, and holes and electrons are respectively injected from the two semiconductor layers to the light-emitting layer, and are combined in the light-emitting layer and released in the form of photons. energy.
  • the light-emitting layer may be a single-layer quantum well (SQW) or a multilayer quantum well (MQW) light-emitting layer, that is, a quantum well whose structure is a confinement carrier.
  • SQW single-layer quantum well
  • MQW multilayer quantum well
  • the light emitting layer may also be a quantum dot light emitting layer.
  • the semiconductor layer 112, the conductive layer 113, and the graphene layer 111 are patterned.
  • the semiconductor layer 112 and the conductive layer 113 are first patterned to have the semiconductor layer 112 and the conductive layer 113 have the same shape and size.
  • the embodiment includes but is not limited thereto. It should be noted that, in this embodiment, the orthographic projection of the conductive layer on the transfer substrate and the orthographic projection of the semiconductor layer on the transfer substrate are completely overlapped as an example, that is, the conductive layer is a full-surface electrode as an example, and the embodiment includes Not limited to this.
  • the conductive layer may be patterned to form a bulk electrode, and the conductive layer may be a transparent conductive material or an opaque conductive material, which is not limited in this embodiment.
  • the graphene layer 111 is patterned, for example, by laser cutting, the patterned graphite between the two semiconductor layers 112 in the X direction is adjacent.
  • the olefin layer 111 is diced, and the graphene layer 111 is formed in a protruding portion 1111 extending in the X direction parallel to the transfer substrate 130 beyond the semiconductor layer 112.
  • the semiconductor layer 112, the conductive layer 113, and the graphene layer 111 may be simultaneously patterned to save process steps.
  • a portion of the upper surface of the conductive layer 113, a side surface 1121 of the semiconductor layer 112, and a protruding portion 1111 of the graphene layer 111 form a first protective layer 103, and the first protective layer 103 is transferred to the light emitting diode 110.
  • the LED 110 is protected during the process.
  • the first protective layer may also be located only on a portion of the upper surface of the conductive layer or the first protective layer may also be located on a portion of the upper surface of the conductive layer and the side of the semiconductor layer.
  • FIG. 5 is a schematic diagram of a thin film transistor backplane (TFT BP) according to the embodiment.
  • TFT BP thin film transistor backplane
  • a thin film transistor 120 including a drain electrode 121, a source electrode 122, an active layer 123, a gate electrode 124, and a gate insulating layer 125 is formed on a base substrate 100.
  • the material of the drain 121, the source 122, and the gate 124 in the thin film transistor 120 may include a combination of one or more of molybdenum, titanium, aluminum, copper, and the like, but is not limited thereto.
  • the material of the gate insulating layer 125 may include silicon nitride, silicon oxide, or a combination of both, but is not limited thereto.
  • the material of the active layer 123 may include amorphous silicon, an oxide semiconductor, or the like, but is not limited thereto.
  • a passivation layer 106 is formed on the thin film transistor 120.
  • the material of the passivation layer 106 may include silicon nitride, silicon oxide, a transparent organic insulating layer, or a combination of the three, but is not limited thereto. this.
  • an organic film layer 102 is formed on the passivation layer 106.
  • the material of the organic film layer 102 may include polyimide, polycarbonate or polyacrylate, etc., which is not limited in this embodiment.
  • vias 109 are etched on the organic film layer 102 to form a thin film transistor backplane (TFT BP) as shown in FIG.
  • TFT BP thin film transistor backplane
  • TFPA-NH 2 4-diazo-2,3,5,6-tetrafluorobenzoate
  • the side away from the substrate 100 is subjected to oxygen plasma treatment for 1 minute, and then immersed in a methanol solution for no more than 2.5 hours, and the organic film layer 102 is subjected to oxygen plasma treatment to generate some active groups (such as -H). These groups are linked to each other by the hydrogen bonding of the amino functional groups in TFPA-NH 2 to complete self-assembly to form the self-assembled monolayer 101.
  • the composite film is taken out of the solution and placed in a methanol solvent for 10 minutes to dissolve the excess monolayer formed on the composite film, and then the film is blown dry with nitrogen, and before the next step of the process. Store in a dark place.
  • the concentration of TFPA-NH 2 in methanol solution should not be too high, otherwise it is not a monolayer, but a multi-molecular layer; the immersion time should not be too long, otherwise the monolayer and the subsequent graphene layer The connection will no longer be a chemical bond connection, so the concentration of the solution and the time of preparation should be strictly controlled.
  • the self-assembled monolayer structure formed in this embodiment includes at least one organic molecule, and the selected organic molecules are required to include an azide functional group and an amino functional group at both ends, respectively, and are not limited to TFPA-NH 2 (as shown in the figure). 2a)), for example, other molecules including an azide functional group and an amino functional group may be included in the self-assembled monolayer structure, and the embodiment is not limited thereto.
  • S204 Transfer the light emitting diode from the transfer substrate to the self-assembled monolayer and connect the graphene layer to the self-assembled monolayer.
  • FIGS. 6a-6b are schematic diagrams showing a process of transferring a formed light emitting diode according to an embodiment of the present invention. As shown in FIGS. 6a and 6b, the first protective layer 103 is adsorbed by the transfer device 140, and the light emitting diode 110 is removed from the transfer substrate 130.
  • the transfer device 140 may include a suction portion (not shown) for adsorbing the first protective layer 103 formed on the light emitting diode 110.
  • the embodiment is not limited thereto, and for example, a transfer device clip may also be used.
  • a light emitting diode is taken to transfer the light emitting diode to the substrate. Since there is no chemical bond between the graphene layer 111 and the transfer substrate 130, and the weak van der Waals force is connected between the two, the graphene layer 111 and the transfer substrate can be transferred by the transfer device 140 adsorbing the first protective layer 103. 130 separated, separated state as shown by the arrow in Figure 6b.
  • FIG. 7 is a schematic diagram of transferring a light emitting diode to a substrate according to the embodiment. As shown in FIG. 7, the light emitting diode 110 is transferred onto the self-assembled monolayer 101, and the self-assembled monolayer 101 is heated. The azide functional group is bonded to the six-membered ring of the graphene molecule in the graphene layer 111 in the form of a chemical bond.
  • the azide functional group in the self-assembled monolayer 101 can be activated by heating or illumination to form a covalent bond with the carbon six-membered ring in the graphene molecule, and this embodiment includes but is not limited thereto.
  • the self-assembled monolayer in the embodiment serves as a connection medium between the light emitting diode and the substrate, that is, the graphene layer is connected with the organic film layer by a chemical bond through the self-assembled monolayer, thereby increasing the light emission.
  • the connection strength between the diode and the substrate is very good.
  • the self-assembled monolayer 101 can be heated using a nanoimprinter, for example, by controlling the nanoimprinter to have a pressure of 500 psi, a temperature of about 100 ° C, and embossing for 30 minutes to activate the self-assembled monolayer.
  • the azide group in 101 the embodiment is not limited thereto, and for example, an azide functional group may be activated by ultraviolet light to cause it to react with graphene.
  • the contact electrode 105 is patterned in the via 109.
  • the graphene layer 111 serves as an electrode of the light emitting diode 110, and a protruding portion 1111 thereof is electrically connected to the drain electrode 121 through the contact electrode 105.
  • the current of the source 122 is transmitted to the graphene layer 111 of the light emitting diode 110 through the drain 121.
  • the embodiment includes, but is not limited to, for example, an electrode may be further formed on the graphene layer and electrically connected to the drain of the thin film transistor, and the graphene layer is only used as a substrate for forming the light emitting diode and is transferred together with the light emitting diode. Onto the substrate.
  • the second protective layer 104 is formed at a position on the other side opposite to the X direction of the side surface 1121 of the semiconductor layer 112, and the second protective layer 104 and the first protective layer 103 integrally constitute the protective layer 1034.
  • a transparent conductive material such as indium tin oxide is deposited on the protective layer 1034 and the organic film layer 102, and patterned to form a common electrode 107, and the common electrode 107 is electrically connected to the conductive layer 113 of the light emitting diode 110.
  • the second protective layer 104 in this embodiment is for preventing the graphene layer 111 from being electrically connected to the common electrode 107. It should be noted that the position of the second protective layer formed on the upper surface of the conductive layer and the side of the semiconductor layer and the graphene layer is described as an example, and the embodiment is not limited thereto.
  • the second protective layer may be formed on a portion of the upper surface of the semiconductor layer and a side surface of the semiconductor layer or the graphene layer.
  • an encapsulation layer 108 is formed on the light emitting diode (not shown in FIG. 7, as shown in FIG. 1).
  • the material forming the encapsulation layer 108 may include silicon dioxide, and the embodiment is not limited thereto, and may include, for example, a transparent organic material or the like.
  • the thickness of the encapsulation layer 108 formed in the Y direction is not less than the thickness of the entire surface of the LED 110 and the protection layer 1034 in the Y direction, that is, the thickness of the encapsulation layer 108 in the Y direction is not less than 3-4 micrometers, and the embodiment is not limited thereto. .
  • FIG. 8 is a schematic diagram of transferring a light emitting diode to a self-assembled monolayer by a roll-to-roll process according to the embodiment.
  • the transfer device 140 may be designed in the shape of a roller, or a "stamp" for adsorbing the light emitting diode 110 may be placed on the roller as shown in FIG. 8, and the thin film transistor back
  • the board 1000 is located on the other roller, it should be noted that
  • the base substrate needs to be made of a flexible material.
  • the roller-shaped transfer device 140 in the roll-to-roll device includes a suction portion (not shown) for adsorbing the plurality of light-emitting diodes 110.
  • the embodiment is not limited thereto, and for example, the transfer device 140 may have a gripping portion for gripping a plurality of light emitting diodes.
  • the roller-shaped transfer device 140 in the roll-to-roll apparatus further includes a heating portion (not shown) for heating the self-assembled monolayer on the thin film transistor backplate 1000 to activate the azide functional group thereon. And forming a chemical bond with the carbon six-membered ring in the graphene molecule in the graphene layer.
  • the self-assembled monolayer here serves as a connection medium between the light-emitting diode and the substrate, thereby increasing the connection strength between the light-emitting diode and the substrate, and has good mechanical reliability.
  • the embodiment of the present disclosure adopts graphene as a medium for the roll-to-roll carrier transfer process, and completes the chemical bond connection between the self-assembled monolayer and the graphene layer in the process of transferring the light-emitting diode, the working efficiency of the processing process can be improved.
  • This embodiment is not limited to the roll-to-roll process, and other processes for transferring light-emitting diodes may be employed.
  • An embodiment of the present disclosure provides a display, which includes any of the LED display substrates provided by the above embodiments, and the LEDs in the display are connected to the substrate by chemical bonds, and have good mechanical reliability.
  • the display may be a display device such as a light-emitting diode display, an OLED (Organic Light-Emitting Diode) display, and any television including the display, such as a television, a digital camera, a mobile phone, a watch, a tablet, a notebook, a navigator, and the like.
  • a display device such as a light-emitting diode display, an OLED (Organic Light-Emitting Diode) display, and any television including the display, such as a television, a digital camera, a mobile phone, a watch, a tablet, a notebook, a navigator, and the like.
  • OLED Organic Light-Emitting Diode

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Abstract

一种发光二极管显示基板及其制作方法、显示器。该发光二极管显示基板包括衬底基板（100）、位于衬底基板（100）上的发光二极管（110）以及自组装单分子层（101）。该发光二极管（110）包括石墨烯层（111），且石墨烯层（111）位于发光二极管（110）靠近衬底基板（100）的一侧；自组装单分子层（101）位于石墨烯层（111）与衬底基板（100）之间且与石墨烯层（111）连接。该发光二极管显示基板一方面利用了石墨烯与氮化镓晶格匹配的特点有助于氮化镓在转移基板上长晶，而且石墨烯是导电材料，硬度和柔韧性都比较好，既可以做基底，又可以做电极，还可以作为媒介进行卷对卷载体转移工艺；另一方面采用自组装单分子层与石墨烯层以化学键形式连接，从而增加了发光二极管与衬底基板的连接强度。

Description

发光二极管显示基板及其制作方法、显示器
本申请要求于2017年3月3日递交的中国专利申请第201710124799.9号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开至少一个实施例涉及一种发光二极管显示基板及其制作方法、显示器。
背景技术
发光二极管(Light Emitting Diode，LED)是一种能发光的半导体电子元件，具有体积小、亮度高、能耗小的特点，被广泛的应用于显示屏，背光源、照明等显示领域。微型发光二极管(Micro LED)具有驱动电压低、省电、亮度高等特点，因此在显示技术中的潜力非常巨大。
发明内容
本公开的至少一实施例提供一种发光二极管显示基板及其制作方法、显示器。该发光二极管显示基板一方面利用了石墨烯与氮化镓晶格匹配的特点有助于氮化镓在转移基板上长晶，而且石墨烯是导电材料，硬度和柔韧性都比较好，既可以做基底，又可以做电极，还可以作为媒介进行卷对卷载体转移工艺；另一方面采用自组装单分子层(self-assembly monolayer)与石墨烯层以化学键形式连接，从而增加了发光二极管与衬底基板的连接强度。
本公开的至少一实施例提供一种发光二极管显示基板，该发光二极管显示基板包括衬底基板、位于衬底基板上的发光二极管以及位于发光二极管与衬底基板之间的自组装单分子层。该发光二极管包括石墨烯层，且石墨烯层位于发光二极管靠近衬底基板的一侧；自组装单分子层位于石墨烯层与衬底基板之间且与石墨烯层连接。
例如，在本公开的一个实施例中，自组装单分子层包括至少一种有机分子，有机分子的两端分别包括叠氮官能团与氨基官能团，且叠氮官能团与石墨烯层中的石墨烯分子以化学键形式相连。
例如，在本公开的一个实施例中，有机分子包括4-重氮基-2,3,5,6-四氟苯 甲酸乙胺。
例如，在本公开的一个实施例中，该发光二极管显示基板还包括：有机膜层，位于自组装单分子层与衬底基板之间，且与自组装单分子层中的氨基官能团通过氢键连接。
例如，在本公开的一个实施例中，发光二极管还包括位于石墨烯层远离自组装单分子层一侧的半导体层以及位于半导体层远离石墨烯层一侧的导电层。
例如，在本公开的一个实施例中，半导体层为氮化镓基半导体层。
例如，在本公开的一个实施例中，该发光二极管显示基板还包括：保护层，位于导电层远离半导体层一侧的部分上表面。
例如，在本公开的一个实施例中，石墨烯层包括在沿平行于衬底基板的第一方向上延伸的超过半导体层的突出部分，且保护层位于半导体层的侧面并连接到石墨烯层的突出部分。
例如，在本公开的一个实施例中，该发光二极管显示基板还包括：薄膜晶体管，该薄膜晶体管包括漏极，该漏极与石墨烯层电连接。
例如，在本公开的一个实施例中，发光二极管的尺寸为1微米-100微米。
本公开的至少一实施例提供一种发光二极管显示基板的制作方法，该发光二极管显示基板的制作方法，包括：在转移基板上形成石墨烯层；在石墨烯层远离转移基板的一侧依次形成半导体层和导电层以形成发光二极管；在衬底基板上形成自组装单分子层；将发光二极管从转移基板上转移到自组装单分子层上，并使石墨烯层连接到自组装单分子层。
例如，在本公开的一个实施例中，自组装单分子层包括至少一种有机分子，有机分子的两端分别包括叠氮官能团与氨基官能团。
例如，在本公开的一个实施例中，将发光二极管从转移基板上转移之前包括：在导电层远离半导体层的部分上表面形成保护层。
例如，在本公开的一个实施例中，石墨烯层包括在沿平行于转移基板的第一方向上延伸的超过半导体层的突出部分，将发光二极管从转移基板上转移之前还包括：在半导体层的侧面以及石墨烯层的突出部分形成保护层。
例如，在本公开的一个实施例中，将发光二极管从转移基板上转移到自组装单分子层上包括：采用转印装置吸附保护层，将发光二极管从转移基板上取走并转移到自组装单分子层上，并对自组装单分子层加热以使叠氮官能团与石墨烯层的石墨烯分子以化学键形式相连。
例如，在本公开的一个实施例中，在衬底基板上形成自组装单分子层包括： 在衬底基板上形成有机膜层，对有机膜层的表面进行处理，并在有机膜层上形成自组装单分子层以使自组装单分子层中的氨基官能团通过氢键与有机膜层连接。
例如，在本公开的一个实施例中，采用卷对卷工艺将发光二极管转移到自组装单分子层上。
本公开的至少一实施例提供一种显示器，该显示器包括上述任一种发光二极管显示基板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为本公开一实施例提供的发光二极管显示基板示意图；
图2a为本公开一实施例提供的自组装单分子层的分子式示意图；
图2b为图2a示出的自组装单分子层的分子式的成键机理示意图；
图3为本公开一实施例提供的发光二极管显示基板的制作方法的具体步骤示意图；
图4a-图4d为本公开一实施例提供的形成发光二极管的流程示意图；
图5为本公开一实施例提供的薄膜晶体管背板(TFT BP)示意图；
图6a-图6b为本公开一实施例提供的对形成的发光二极管进行转移的过程示意图；
图7为本公开一实施例提供的将发光二极管转移至衬底基板上的示意图；
图8为本公开一实施例提供的采用卷对卷(roll-to-roll)工艺将发光二极管转移到自组装单分子层上的示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领 域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
本公开的实施例提供一种发光二极管显示基板及其制作方法、显示器。该发光二极管显示基板包括衬底基板、位于衬底基板上的发光二极管以及位于发光二极管与衬底基板之间的自组装单分子层。该发光二极管包括石墨烯层，且石墨烯层位于发光二极管靠近衬底基板的一侧；自组装单分子层位于石墨烯层与衬底基板之间且与石墨烯层连接。该发光二极管显示基板一方面利用了石墨烯与氮化镓晶格匹配的特点有助于氮化镓在转移基板上长晶，而且石墨烯是导电材料，硬度和柔韧性都比较好，既可以做基底，又可以做电极，还可以作为媒介进行卷对卷载体转移工艺；另一方面采用自组装单分子层(self-assembly monolayer)与石墨烯层以化学键形式连接，从而增加了发光二极管与衬底基板的连接强度。
下面结合附图对本公开实施例提供的发光二极管显示基板及其制作方法、显示器进行说明。
本公开一实施例提供一种发光二极管显示基板，如图1所示，该发光二极管显示基板包括衬底基板100、位于衬底基板100上的发光二极管110以及位于发光二极管110与衬底基板100之间的自组装单分子层101。发光二极管110包括石墨烯层111，石墨烯层111位于发光二极管110靠近衬底基板100的一侧。在石墨烯层111与衬底基板100之间设置的自组装单分子层101与石墨烯层111以化学键的形式连接。本实施例提供的发光二极管显示基板采用了将发光二极管与衬底基板以化学键形式连接的新型连接方式，可以增加发光二极管与衬底基板的连接强度，即通过采用自组装单分子层与石墨烯层以化学键形式连接的方式增加了发光二极管与衬底基板的连接强度；另一方面利用了石墨烯与氮化镓晶格匹配的特点有助于氮化镓在转移基板上长晶，而且石墨烯是导电材料，硬度和柔韧性都比较好，既可以做基底，又可以做电极。
图1中在衬底基板100上设置一个发光二极管110仅仅是示意性的，衬底基板100上可以设置多个发光二极管110，多个发光二极管110可以以阵列的方式设置在衬底基板100上。多个发光二极管110可以发射不同颜色的光或者 相同颜色的光，本公开的实施例对此没有特别限制。
例如，如图1所示，本实施例以石墨烯层111在衬底基板100上的正投影完全落入自组装单分子层101在衬底基板100上的正投影内为例进行描述。本实施例包括但不限于此，例如，还可以是自组装单分子层在衬底基板上的正投影完全落入石墨烯层在衬底基板上的正投影内。
例如，衬底基板100可以由蓝宝石、硅、砷化镓、碳化硅、氮化铝、氮化镓、聚酰亚胺、聚碳酸酯、聚丙烯酸酯、聚醚酰亚胺、聚醚砜、聚对苯二甲酸乙二醇酯和聚萘二甲酸乙二醇酯中的一种或多种材料制成，本实施例对此不作限制。
例如，如图1所示，本实施例提供的发光二极管显示基板还包括有机膜层102，有机膜层102位于自组装单分子层101与衬底基板100之间，且有机膜层102与自组装单分子层101以化学键形式连接。
例如，有机膜层102的材料可以包括聚酰亚胺、聚碳酸酯或聚丙烯酸酯等，本实施例对此不作限制。
例如，自组装单分子层101包括至少一种有机分子，有机分子的两端分别包括叠氮官能团(-N3)与氨基官能团(-NH2)。图2a为自组装单分子层的分子式示意图，如图2a所示，自组装单分子层包括4-重氮基-2,3,5,6-四氟苯甲酸乙胺(TFPA-NH2)，本实施例包括但不限于此。需要说明的是，本实施例中以自组装单分子层中的每个分子的两端分别包括叠氮官能团(-N3)与氨基官能团(-NH2)为例进行描述，本实施例包括但不限于此，例如，自组装单分子层中还可以包括其他分子。
图2b为图2a示出的自组装单分子层的分子式的成键机理示意图，如图2b所示，自组装单分子层(本实施例以TFPA-NH2为例进行描述)中的叠氮官能团与石墨烯层111中的石墨烯分子的六元环以化学键形式相连。
例如，可通过加热的方式，激活叠氮官能团，使其与石墨烯分子中的碳六元环形成共价键。本实施例包括但不限于此。
如图2b所示，例如，有机膜层102与自组装单分子层中的氨基官能团以化学键形式连接。
例如，对有机膜层102的表面进行氧等离子体处理以产生一些活性基团(例如-H)，这些基团会与自组装单分子层以氢键(如图2b中的虚线所示)的作用相互连接，本实施例包括但不限于此。本实施例中的介于石墨烯层与有机膜层之间的自组装单分子层是一个功能层，此功能层是以自组装单分子层的形式充 当了发光二极管与衬底基板之间的连接媒介，即自组装单分子层的两端分别与石墨烯层以及有机膜层键合，形成共价键，从而增加了发光二极管与衬底基板的连接强度，具有很好的力学可靠性。
例如，如图1所示，发光二极管110还包括位于石墨烯层111上的半导体层112以及位于半导体层112上的导电层113。
例如，半导体层112为氮化镓基半导体层。
例如，本实施例以半导体层112包括N型半导体层与P型半导体层为例进行描述，即本实施例以靠近石墨烯层111的半导体层为N型半导体层为例，例如，N型半导体层的材料可以包括N型氮化镓，本实施例不限于此；本实施例以靠近导电层113的半导体层为P型半导体层为例，例如，P型半导体层的材料可以包括P型氮化镓，本实施例不限于此。空穴和电子分别从导电层113和石墨烯层111注入P型半导体层和N型半导体层，并在两层半导体层之间的接触面复合，并且以光子的形式释放能量，发光波长取决于发光材料的禁带宽度。本实施例包括但不限于此，例如，还可以是靠近石墨烯层111的半导体层为P型半导体层，靠近导电层113的半导体层为N型半导体层。
例如，导电层113的材料为透明导电材料，例如可以包括氧化铟锡(ITO)、氧化铟锌(IZO)、氧化锌(ZnO)、氧化铟(In2O3)、氧化铟镓(IGO)中的组合或至少一种，本实施例对此不作限制。需要说明的是，本实施例以导电层在衬底基板上的正投影与半导体层在衬底基板上的正投影完全重合为例进行描述，即以导电层为整面电极为例，本实施例包括但不限于此。
例如，导电层也可以为块状电极，且该导电层既可以为透明导电材料，也可以为不透明导电材料，例如，不透明导电层的材料可以选用钛(Ti)、铂(Pt)、金(Au)、铬(Cr)等材料中的一种或几种，本实施例对此不作限制。
例如，发光二极管还可以包括发光层(图1中未示出)，发光层位于两层半导体层之间，空穴和电子分别从两层半导体层注入到发光层，并在发光层复合，并且以光子的形式释放能量。
例如，发光层可以为单层量子阱(SQW)或多层量子阱(MQW)发光层，即，其结构为可局限载流子的量子阱。本实施例包括但不限于此，例如，发光层还可以为量子点发光层。发光层可根据选用材料的不同而发出不同颜色的光，例如，红光发光二极管发光层的材料可选用铝砷化镓、磷砷化镓、磷化镓等材料中的一种或多种；绿光发光二极管发光层的材料可选用铟氮化镓/氮化镓、磷化镓、铝磷化镓等材料中的一种或多种；蓝光发光二极管发光层的材料 可选氮化镓、铟氮化镓、硒化锌等材料中的一种或多种，本实施例对此不作限制。
例如，本实施例中的发光二极管的结构不限于此，还可以包括电流分散层、电流阻挡层、中间阻挡层、缓冲层等结构。
例如，如图1所示，在导电层113的部分上表面设置保护层1034，本实施例中的保护层1034包括第一保护层103与第二保护层104两部分，第一保护层103在转移发光二极管110的过程中对发光二极管110起到保护作用，即在将发光二极管110从转移基板转移到衬底基板100的过程中，采用转印装置吸附到第一保护层103上，并将发光二极管110从转移基板上取走。而第二保护层104用于保护石墨烯层111，以防止石墨烯层111与后续形成的公共电极107电连接。
例如，保护层1034与发光二极管110整体沿Y方向的厚度为3-4微米，本实施例包括但不限于此。
例如，如图1所示，本实施例中的石墨烯层111包括在沿平行于衬底基板100的第一方向(如图1所示的X方向)延伸超过半导体层112的突出部分1111。
例如，本实施例以第一保护层103除了包括位于导电层113的部分上表面的部分，还包括位于半导体层112的侧面1121并连接到石墨烯层111的突出部分1111的另一部分为例进行描述，但不限于此，例如，第一保护层还可以仅位于导电层的部分上表面或者第一保护层还可以位于导电层的部分上表面以及半导体层的侧面。
例如，如图1所示，第二保护层104位于与半导体层112的侧面1121沿X方向相对的另一侧面的位置，用以防止石墨烯层111与后续形成的公共电极107电连接。需要说明的是，本实施例以第二保护层位于导电层的部分上表面以及半导体层、石墨烯层的侧面的位置为例进行描述，本实施例不限于此。
例如，导电层为块状电极时，第二保护层还可以位于半导体层的部分上表面以及半导体层、石墨烯层的侧面等位置。
例如，保护层1034的材料可以为光刻胶等透明有机材料，本实施例包括但不限于此。
例如，如图1所示，发光二极管显示基板还包括薄膜晶体管120，薄膜晶体管120包括漏极121、源极122、有源层123、栅极124以及栅极绝缘层125，其中的漏极121与石墨烯层111电连接，即石墨烯层111作为发光二极管110的电极，石墨烯层111作为发光二极管110的电极，其突出部分1111通过接触 电极105与漏极121电性相连。在薄膜晶体管120开启的情况下，源极122的电流会通过漏极121传到发光二极管110的石墨烯层111。本实施例包括但不限于此，例如，还可以在石墨烯层上另设置一电极与薄膜晶体管的漏极电性连接，而石墨烯层仅作为形成发光二极管的基底并随发光二极管一并转移到衬底基板上。
例如，如图1所示，发光二极管显示基板还包括公共电极107，公共电极107与发光二极管110的导电层113电性连接。
例如，公共电极107的材料为透明导电材料，例如可以包括氧化铟锡(ITO)、氧化铟锌(IZO)、氧化锌(ZnO)、氧化铟(In2O3)、氧化铟镓(IGO)中的组合或至少一种，本实施例对此不作限制。
例如，如图1所示，发光二极管显示基板还包括封装层108。
例如，封装层108的材料可以包括二氧化硅，本实施例不限于此，例如还可以包括透明有机材料等。
例如，封装层108沿Y方向的厚度不小于发光二极管110与保护层1034沿Y方向的整体厚度，即封装层108沿Y方向的厚度不小于3-4微米，本实施例不限于此。
例如，多个发光二极管120的尺寸为几微米-几十微米，例如，发光二极管120的尺寸为1微米-100微米，即发光二极管120为微发光二极管，本实施例不限于此。
本公开一实施例提供一种发光二极管显示基板的制作方法，该发光二极管显示基板的制作方法的具体步骤如图3所示，包括：
S201：在转移基板上形成石墨烯层。
图4a-图4d为本实施例提供的形成发光二极管的流程示意图。如图4a所示，例如，在转移基板130上形成石墨烯层111。
例如，可以在铜片等基底上采用化学气相沉积法生长石墨烯薄膜，通过热释胶带-蚀刻、紫外固化-蚀刻、电解鼓泡剥离或干刻法将石墨烯薄膜从铜片等基底剥离下来并转移到转移基板130上，本实施例包括但不限于此。
例如，转移基板130的材料可以为蓝宝石(sapphire)，本实施例不限于此，还可以是其他与石墨烯层不产生化学键的连接，而是通过很微弱的范德华力连接的转移基板，并且此转移基板的材料的晶格形式与石墨烯和氮化镓的晶格结构相似。本实施例对此不作限制。
S202：在石墨烯层远离转移基板的一侧依次形成半导体层和导电层以形成 发光二极管。
如图4b所示，例如，在石墨烯层111上形成半导体层112以及导电层113，即在蓝宝石与石墨烯的复合基底生长发光二极管晶体。本实施例以半导体层112包括N型半导体层与P型半导体层为例进行描述，即本实施例以靠近石墨烯层111的半导体层为N型半导体层为例，例如，N型半导体层的材料可以包括N型氮化镓，本实施例不限于此；本实施例以靠近导电层113的半导体层为P型半导体层为例，例如，P型半导体层的材料可以包括P型氮化镓，本实施例不限于此。空穴和电子分别从导电层113和石墨烯层111注入P型半导体层和N型半导体层，并在两层半导体层之间的接触面复合，并且以光子的形式释放能量，发光波长取决于发光材料的禁带宽度。本实施例包括但不限于此，例如，还可以是靠近石墨烯层111的半导体层为P型半导体层，靠近导电层113的半导体层为N型半导体层。
本实施例在石墨烯层上生长氮化镓晶体，氮化镓晶体可以石墨烯分子的六元环为“模板”进行生长，因此生长的氮化镓晶格的形状会比较规范。
例如，导电层113的材料为透明导电材料，例如可以包括氧化铟锡(ITO)、氧化铟锌(IZO)、氧化锌(ZnO)、氧化铟(In2O3)、氧化铟镓(IGO)中的组合或至少一种，本实施例对此不作限制。
例如，还可以在两层半导体层之间形成发光层(图4b中未示出)，空穴和电子分别从两层半导体层注入到发光层，并在发光层复合，并且以光子的形式释放能量。
例如，发光层可以为单层量子阱(SQW)或多层量子阱(MQW)发光层，即，其结构为可局限载流子的量子阱。本实施例包括但不限于此，例如，发光层还可以为量子点发光层。
如图4c所示，例如，对半导体层112、导电层113以及石墨烯层111进行图案化。
例如，先对半导体层112以及导电层113进行图案化以使半导体层112与导电层113具有形状及尺寸均相同的图案，本实施例包括但不限于此。需要说明的是，本实施例以导电层在转移基板上的正投影与半导体层在转移基板上的正投影完全重合为例进行描述，即导电层为整面电极为例，本实施例包括但不限于此。
例如，导电层也可以图案化形成块状电极，且该导电层既可以采用透明导电材料，也可以采用不透明导电材料，本实施例对此不作限制。
例如，对半导体层112以及导电层113完成图案化后再对石墨烯层111进行图案化，例如，采用激光切割的方式对图案化后的沿X方向相邻两个半导体层112之间的石墨烯层111进行切割，并使石墨烯层111形成了在沿平行于转移基板130的沿X方向延伸超过半导体层112的突出部分1111。本实施例不限于此，例如，还可以对半导体层112、导电层113以及石墨烯层111同时进行图案化以节省工艺步骤。
如图4d所示，例如，在导电层113的部分上表面、半导体层112的侧面1121以及石墨烯层111的突出部分1111形成第一保护层103，第一保护层103在转移发光二极管110的过程中对发光二极管110起到保护作用。本实施例包括但不限于此，例如，第一保护层还可以仅位于导电层的部分上表面或者第一保护层还可以位于导电层的部分上表面以及半导体层的侧面。
S203：在衬底基板上形成自组装单分子层。
图5为本实施例提供的薄膜晶体管背板(TFT BP)示意图。如图5所示，在衬底基板100上形成薄膜晶体管120，薄膜晶体管120包括漏极121、源极122、有源层123、栅极124以及栅极绝缘层125。
例如，薄膜晶体管120中的漏极121、源极122以及栅极124的材料可以包括钼、钛、铝、铜等中的一种或多种的组合，但并不限于此。
例如，栅极绝缘层125的材料可以包括氮化硅、氧化硅或两者的组合，但不限于此。
例如，有源层123的材料可以包括非晶硅、氧化物半导体等，但不限于此。
例如，如图5所示，在薄膜晶体管120上形成钝化层106，例如，钝化层106的材料可以包括氮化硅、氧化硅、透明有机类绝缘层或三者的组合，但不限于此。
例如，如图5所示，在钝化层106上形成有机膜层102。
例如，有机膜层102的材料可以包括聚酰亚胺、聚碳酸酯或聚丙烯酸酯等，本实施例对此不作限制。
例如，在有机膜层102上刻蚀形成过孔109以形成如图5所示的薄膜晶体管背板(TFT BP)。
例如，制备3mg/mL-5mg/mL的4-重氮基-2,3,5,6-四氟苯甲酸乙胺(TFPA-NH2)的甲醇溶液，将薄膜晶体管背板的有机膜层102远离衬底基板100的一侧经过氧等离子体处理1分钟后，放入甲醇溶液中浸泡不超过2.5小时，有机膜层102经氧等离子体处理后会产生一些活性基团(如-H)，这些基 团会与TFPA-NH2中的氨基官能团以氢键的作用相互连接，完成自组装以形成自组装单分子层101。
例如，自组装完毕后，将复合薄膜从溶液中取出，再放到甲醇溶剂中10分钟以溶解在复合薄膜上形成的过量的单分子层，随后将薄膜用氮气吹干，并在下一步工艺前放入避光环境下保存。
需要说明的是，TFPA-NH2的甲醇溶液的浓度不宜过高，否则制备出的不是单分子层，而是多分子层；浸泡的时间也不宜过长，否则单分子层与后续石墨烯层的连接将不再是化学键连接，因此要严格控制溶液的浓度和制备的时间。
需要说明的是，本实施例形成的自组装单分子层结构中包括至少一种有机分子，选取的有机分子要求其两端分别包括叠氮官能团与氨基官能团，不限于TFPA-NH2(如图2a所示)，例如，自组装单分子层结构中还可以包括其他包括叠氮官能团与氨基官能团的分子等，本实施例不限于此。
S204：将发光二极管从转移基板上转移到自组装单分子层上，并使石墨烯层连接到自组装单分子层。
图6a-图6b为本实施例提供的对形成的发光二极管进行转移的过程示意图。如图6a和图6b所示，采用转印装置140吸附第一保护层103，并将发光二极管110从转移基板130上取走。
例如，该转印装置140可以包括吸气部(图中未示出)用来吸附形成在发光二极管110上的第一保护层103，本实施例不限于此，例如也可以采用转印装置夹取发光二极管以转移发光二极管至衬底基板。由于石墨烯层111与转移基板130之间没有任何化学键的连接，而连接二者的是很微弱的范德华力，因此通过转印装置140吸附第一保护层103可以将石墨烯层111与转移基板130分离，分离状态如图6b所示的箭头。
图7为本实施例提供的将发光二极管转移至衬底基板上的示意图，如图7所示，将发光二极管110转移至自组装单分子层101上，并对自组装单分子层101加热以使叠氮官能团与石墨烯层111中的石墨烯分子的六元环以化学键形式相连。
例如，可通过加热或光照的方式激活自组装单分子层101中的叠氮官能团，使其与石墨烯分子中的碳六元环形成共价键，本实施例包括但不限于此。本实施例中的自组装单分子层充当了发光二极管与衬底基板之间的连接媒介，即石墨烯层通过自组装单分子层与有机膜层以化学键的形式连接，从而增加了发光 二极管与衬底基板的连接强度，具有很好的力学可靠性。
例如，可以使用纳米压印机对自组装单分子层101进行加热，例如，控制纳米压印机的压力为500psi、温度为100℃左右，并且压印30分钟，就可以激活自组装单分子层101中的叠氮基团，本实施例不限于此，例如，还可采用紫外光激活叠氮官能团以使其进行与石墨烯的反应。
例如，如图7所示，在发光二极管110转移到自组装单分子层101之后，在过孔109中图案化形成接触电极105。石墨烯层111作为发光二极管110的电极，其突出部分1111通过接触电极105与漏极121电性相连。在薄膜晶体管120开启的情况下，源极122的电流会通过漏极121传到发光二极管110的石墨烯层111。本实施例包括但不限于此，例如，还可以在石墨烯层上另形成一电极与薄膜晶体管的漏极电性连接，而石墨烯层仅作为形成发光二极管的基底并随发光二极管一并转移到衬底基板上。
例如，如图7所示，在与半导体层112的侧面1121沿X方向相对的另一侧面的位置形成第二保护层104，第二保护层104与第一保护层103整体构成保护层1034。
例如，在保护层1034以及有机膜层102上沉积氧化铟锡等透明导电材料，并图案化形成公共电极107，公共电极107与发光二极管110的导电层113电性连接。本实施例中的第二保护层104用于防止石墨烯层111与公共电极107电连接。需要说明的是，本实施例以第二保护层形成于导电层的部分上表面以及半导体层、石墨烯层的侧面的位置为例进行描述，本实施例不限于此。
例如，导电层为块状电极时，第二保护层可以形成于半导体层的部分上表面以及半导体层、石墨烯层的侧面等位置。
例如，在发光二极管上形成封装层108(图7中未示出，如图1所示)。例如，形成封装层108的材料可以包括二氧化硅，本实施例不限于此，例如还可以包括透明有机材料等。
例如，形成的封装层108沿Y方向的厚度不小于发光二极管110与保护层1034整体沿Y方向的厚度，即封装层108沿Y方向的厚度不小于3-4微米，本实施例不限于此。
图8为本实施例提供的采用卷对卷(roll-to-roll)工艺将发光二极管转移到自组装单分子层上的示意图。如图8所示，例如，可以将转印装置140设计为滚轮形状，或者将用于吸附发光二极管110的“图章(stamp)”位于如图8所示的滚轮上，并且也将薄膜晶体管背板1000位于另一滚轮上，需要说明的是， 衬底基板需要采用柔性材料。
例如，卷对卷装置中呈滚轮状的转印装置140包括吸气部(图中未示出)，用于吸附多个发光二极管110。本实施例包括不限于此，例如，转印装置140可以具有夹取部用于夹取多个发光二极管。
例如，卷对卷装置中呈滚轮状的转印装置140还包括加热部(图中未示出)，用于加热薄膜晶体管背板1000上的自组装单分子层以激活其上的叠氮官能团，使其与石墨烯层中的石墨烯分子中的碳六元环形成化学键。这里的自组装单分子层充当了发光二极管与衬底基板的连接媒介，从而增加了发光二极管与衬底基板的连接强度，具有很好的力学可靠性。由于本公开的实施例采用石墨烯作为媒介进行卷对卷载体转移工艺，并在转移发光二极管的过程中完成了自组装单分子层与石墨烯层的化学键连接，因此可以提高加工过程的工作效率。本实施例不限于采用卷对卷工艺，还可以采用其他转移发光二极管的工艺。
本公开一实施例提供一种显示器，该显示器包括上述实施例提供的任一种发光二极管显示基板，该显示器中的发光二极管与衬底基板通过化学键连接，具有很好的力学可靠性。
例如，该显示器可以为发光二极管显示器、OLED(Organic Light-Emitting Diode，有机发光二极管)显示器等显示器件以及包括该显示器的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本实施例不限于此。
有以下几点需要说明：
(1)除非另作定义，本公开实施例以及附图中，同一标号代表同一含义。
(2)本公开实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(3)为了清晰起见，在用于描述本公开的实施例的附图中，层或区域被放大。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (18)

  1. 一种发光二极管显示基板，包括：
    衬底基板；
    发光二极管，位于所述衬底基板上，其中，
    所述发光二极管包括石墨烯层，且所述石墨烯层位于所述发光二极管的靠近所述衬底基板的一侧；
    自组装单分子层，位于所述石墨烯层与所述衬底基板之间且与所述石墨烯层连接。
  2. 根据权利要求1所述的发光二极管显示基板，其中，所述自组装单分子层包括至少一种有机分子，所述有机分子的两端分别包括叠氮官能团与氨基官能团，且所述叠氮官能团与所述石墨烯层中的石墨烯分子以化学键形式相连。
  3. 根据权利要求2所述的发光二极管显示基板，其中，所述有机分子包括4-重氮基-2,3,5,6-四氟苯甲酸乙胺。
  4. 根据权利要求2或3所述的发光二极管显示基板，还包括：
    有机膜层，位于所述自组装单分子层与所述衬底基板之间，且与所述自组装单分子层中的所述氨基官能团通过氢键连接。
  5. 根据权利要求1-4任一项所述的发光二极管显示基板，其中，所述发光二极管还包括位于所述石墨烯层远离所述自组装单分子层一侧的半导体层以及位于所述半导体层远离所述石墨烯层一侧的导电层。
  6. 根据权利要求5所述的发光二极管显示基板，其中，所述半导体层为氮化镓基半导体层。
  7. 根据权利要求5或6所述的发光二极管显示基板，还包括：
    保护层，位于所述导电层远离所述半导体层的部分上表面。
  8. 根据权利要求7所述的发光二极管显示基板，其中，所述石墨烯层包括在沿平行于所述衬底基板的第一方向上延伸的超过所述半导体层的突出部分，且所述保护层位于所述半导体层的侧面并连接到所述石墨烯层的突出部分。
  9. 根据权利要求1-8任一项所述的发光二极管显示基板，还包括：
    薄膜晶体管，所述薄膜晶体管包括漏极，所述漏极与所述石墨烯层电连接。
  10. 根据权利要求1-9任一项所述的发光二极管显示基板，其中，所述发 光二极管的尺寸为1微米-100微米。
  11. 一种发光二极管显示基板的制作方法，包括：
    在转移基板上形成石墨烯层；
    在所述石墨烯层远离所述转移基板的一侧依次形成半导体层和导电层以形成发光二极管；
    在衬底基板上形成自组装单分子层；
    将所述发光二极管从所述转移基板上转移到所述自组装单分子层上，并使所述石墨烯层连接到所述自组装单分子层。
  12. 根据权利要求11所述的发光二极管显示基板的制作方法，其中，所述自组装单分子层包括至少一种有机分子，所述有机分子的两端分别包括叠氮官能团与氨基官能团。
  13. 根据权利要求12所述的发光二极管显示基板的制作方法，其中，将所述发光二极管从所述转移基板上转移之前包括：
    在所述导电层远离所述半导体层的部分上表面形成保护层。
  14. 根据权利要求13所述的发光二极管显示基板的制作方法，其中，所述石墨烯层包括在沿平行于所述转移基板的第一方向上延伸的超过所述半导体层的突出部分，将所述发光二极管从所述转移基板上转移之前还包括：在所述半导体层的侧面以及所述石墨烯层的突出部分形成所述保护层。
  15. 根据权利要求13或14所述的发光二极管显示基板的制作方法，其中，将所述发光二极管从所述转移基板上转移到所述自组装单分子层上包括：
    采用转印装置吸附所述保护层，将所述发光二极管从所述转移基板上取走并转移到所述自组装单分子层上，并对所述自组装单分子层加热以使所述叠氮官能团与所述石墨烯层的石墨烯分子以化学键形式相连。
  16. 根据权利要求12-15任一项所述的发光二极管显示基板的制作方法，其中，在所述衬底基板上形成所述自组装单分子层包括：
    在所述衬底基板上形成有机膜层，对所述有机膜层的表面进行处理，并在所述有机膜层上形成所述自组装单分子层以使所述自组装单分子层中的所述氨基官能团通过氢键与所述有机膜层连接。
  17. 根据权利要求11-16任一项所述的发光二极管显示基板的制作方法，其中，采用卷对卷工艺将所述发光二极管转移到所述自组装单分子层上。
  18. 一种显示器，包括权利要求1-10任一项所述发光二极管显示基板。
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