WO2018076283A1 - 一种指纹感测芯片及终端设备 - Google Patents

一种指纹感测芯片及终端设备 Download PDF

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Publication number
WO2018076283A1
WO2018076283A1 PCT/CN2016/103790 CN2016103790W WO2018076283A1 WO 2018076283 A1 WO2018076283 A1 WO 2018076283A1 CN 2016103790 W CN2016103790 W CN 2016103790W WO 2018076283 A1 WO2018076283 A1 WO 2018076283A1
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Prior art keywords
signal
fingerprint sensing
voltage
sensing chip
driving signal
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PCT/CN2016/103790
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English (en)
French (fr)
Inventor
王运华
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敦泰电子有限公司
王运华
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Publication date
Application filed by 敦泰电子有限公司, 王运华 filed Critical 敦泰电子有限公司
Priority to PCT/CN2016/103790 priority Critical patent/WO2018076283A1/zh
Priority to US16/345,251 priority patent/US10943906B2/en
Priority to CN201680001397.3A priority patent/CN109196453B/zh
Publication of WO2018076283A1 publication Critical patent/WO2018076283A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing

Definitions

  • the present invention relates to the field of fingerprint sensing technologies, and in particular, to a power supply device, a fingerprint sensing chip, and a terminal device.
  • a fingerprint sensing system is provided on some terminal devices, such as a mobile phone, to implement secure authentication of the terminal device during use by the user.
  • the fingerprint sensing system of the Apple mobile phone has a HOME button with an iron ring R.
  • the first chip IC1 is connected to the iron ring R, and the IC1 controls the driving signal of the iron ring R.
  • the operating voltage of IC1 includes two types, A and B respectively. Among them, A is used to supply power to digital circuits, and B is used to supply power to analog circuits.
  • the A and B processes can output a square wave signal as shown in A and B in Fig. 2, but are not limited to the waveform signal shown in Fig. 2.
  • B is higher than the voltage of A, for example, VDD2 is 3V and VDD1 is 1.8V.
  • B can also be used to drive the iron ring R at the same time.
  • both VSS1 and VSS2 are the ground GND of the connected system.
  • the voltage of VDD2 should be as high as possible. However, if the voltage is too high, driving the iron ring R may cause the user to feel uncomfortable when the HOME button is touched. Therefore, in order to reduce the discomfort when the user uses the fingerprint to unlock, the prior art also introduces a grounding driving method.
  • the grounding drive mode means that IC1 does not work at a fixed voltage, but introduces the second chip IC2.
  • IC2 includes the voltages of A and B and C, and IC2 further generates a C voltage at which the potential is located.
  • the square wave generated between VDD3 and VSS3, such as the voltage waveform shown by D in Fig. 2, is used as VSS of IC1.
  • This is called grounding, that is, the ground of IC1 is raised by the voltage of IC2.
  • the ground of IC1 before lifting the ground is the ground GND of the connected system.
  • the iron ring R can be connected to the ground GND of the system, or the iron ring R can be directly cancelled. The user no longer feels uncomfortable when they touch the HOME button.
  • the chip for fingerprint sensing shown in FIG. 3 includes the first chip IC1 and the second chip IC2. It can be understood that in the manufacturing process, the two chips need to be packaged twice, the integration degree is low, and the cost is also Higher. And the space occupied by the two chips is also It is relatively large and does not meet the thin and light trend of the board requirements.
  • the invention provides a power supply device, a fingerprint sensing chip and a fingerprint sensing device, which can realize the function of lifting the ground, improve the integration degree, and reduce the space and volume of the circuit.
  • the invention provides a fingerprint sensing chip, comprising: a first signal, a second signal and a driving signal;
  • the fingerprint sensing chip generates the second signal by the first signal, and generates the driving signal after lifting the second signal;
  • the driving signal is used to provide a driving voltage for fingerprint sensing.
  • the method further includes: a third signal
  • the fingerprint sensing chip generates the third signal from the first signal.
  • the driving signal is a voltage that is positively raised by using the second signal.
  • the voltage of the third signal ranges from 0 to the first positive voltage
  • the voltage of the first signal ranges from 0 to a second positive voltage
  • the voltage of the second signal ranges from 0 to a third positive voltage
  • the low level of the driving signal is the second signal, and a high level of the driving signal is different from a low level of the driving signal by a predetermined voltage.
  • the third signal, the second signal, the driving signal and the first signal share a P-type substrate
  • the P-type substrate is connected to the ground GND of the fingerprint sensing chip.
  • the driving signal is a voltage that is negatively grounded by the second signal.
  • the voltage of the third signal ranges from 0 to the first positive voltage
  • the voltage of the first signal ranges from 0 to a second positive voltage
  • the voltage of the second signal ranges from 0 to a negative voltage
  • the low level of the driving signal is the second signal, and a high level of the driving signal is different from a low level of the driving signal by a predetermined voltage.
  • the third signal, the second signal, the driving signal and the first signal share a P-type substrate
  • the P-type substrate is connected to a low level of the driving signal, and a voltage of the P-type substrate changes as a voltage of the driving signal changes.
  • the third signal, the second signal and the driving signal are all periodically varying signals.
  • the third signal, the second signal and the driving signal are square wave signals, and the period and frequency of the corresponding square wave are the same.
  • the embodiment of the present invention further provides a terminal device, including: a power source and the fingerprint sensing chip according to any one of claims 1 to 10;
  • the power source is configured to provide power to the fingerprint sensing chip
  • the fingerprint sensing chip is configured to sense a fingerprint. Compared with the prior art, the present invention has the following advantages:
  • the fingerprint sensing chip provided in this embodiment integrates the first chip and the second chip into one chip in the prior art, which reduces the complexity of producing two chips, reduces the area occupied by the entire circuit, and conforms to the user's The requirements for increasingly thinner terminal devices. Moreover, the fingerprint sensing chip lifts the driving voltage of the fingerprint sensing, and eliminates the discomfort of the user using the fingerprint to securely authenticate the terminal device.
  • FIG. 1 is a schematic diagram of a first chip driving with a hoop in the prior art
  • FIG. 2 is a schematic diagram of a grounding voltage in the prior art
  • FIG. 3 is a schematic diagram of a chip for fingerprint sensing in the prior art
  • Embodiment 1 of a fingerprint sensing chip provided by the present invention
  • FIG. 5 is a schematic diagram of Embodiment 2 of a fingerprint sensing chip provided by the present invention.
  • FIG. 6 is a schematic block diagram of a fingerprint sensing chip provided by the present invention.
  • the fingerprint sensing chip provided by the invention realizes the lifting function through one chip to perform fingerprint sensing.
  • FIG. 4 it is a schematic diagram of Embodiment 1 of a fingerprint sensing chip provided by the present invention.
  • the driving signal D is used to provide a driving voltage for fingerprint sensing.
  • B, C, and D of the fingerprint sensing chip may be the voltage signals shown in FIG. 4, but are not limited to the waveform signals shown in FIG.
  • VDD2 is a DC (direct current) potential
  • the emulation circuit operates between VDD2 and VSS2, as shown by the B signal in Figure 4.
  • VDD2 is the external power supply to the entire IC
  • VDD1 is the lower potential generated by the internal PWM through the step-down circuit.
  • VDD3 is generated through the boost circuit on the basis of VDD2, as shown by the C signal of FIG.
  • a drive signal is arranged to switch between VDD3 and VSS3, such as a square wave waveform, and is used as the power supply ground VSS4 of the grounded area circuit, as shown by the D signal of FIG.
  • the fingerprint sensing chip may further include a third signal A, as shown by the A signal of FIG. 4, VDD1 is a DC (direct current) potential, and the digital circuit operates between VDD1 and VSS1.
  • the fingerprint sensing chip may not include the third signal A.
  • the circuit operating with the A power supply of FIG. 4 has a component structure of VSS1 connected to PW (P well), VDD1 connected to NW (N well), PW (P well), and NW (N well) with DNW (deep N) trap)
  • the circuit operating with the B power supply of FIG. 4 has a component structure of VSS2 connected to PW (P well), VDD2 connected to NW (N well), PW (P well), and NW (N well) with DNW (deep N) trap).
  • the circuit operating with the power supply of C of FIG. 4 has a component structure of VSS3 connected to PW (P well), VDD3 connected to NW (N well), PW (P well), and NW (N well) with DNW (deep) N well)
  • the circuit operating with the power supply of D of FIG. 4 has a component structure in which VSS4 is connected to PW (P well), VDD4 is connected to NW (N well), PW (P well), and NW (N well) is provided with DNW (deep). N-well),
  • Circuit components A, B, C, and D of different power domains are isolated from each other by respective DNWs (deep N-wells) and are formed on a P-substrate (P-SUB).
  • DNWs deep N-wells
  • P-SUB P-substrate
  • the third P-type substrate P-SUB of this embodiment is connected to the ground GND of the fingerprint sensing chip.
  • the third pair of circuit modules that need to be grounded are subjected to positive voltage grounding by the driving signal D.
  • D is the voltage after the grounding, and the grounding mode is the positive lifting mode, that is, the positive voltage is raised, and the grounding voltage is greater than 0, which is a positive voltage.
  • the voltage of the second signal C ranges from 0 to the third positive voltage VDD3;
  • VSS1 is the low level of A
  • VSS2 is the low level of B
  • VSS3 is the low level of C.
  • the low level of the driving signal D is the second signal C, and the high level VDD4 of the driving signal is different from the low level VSS4 of the driving signal by a predetermined voltage.
  • the predetermined voltage between the VDD4 and VSS4 can be set according to actual needs.
  • VDD1, VDD2, and VDD3 can also be set according to actual needs.
  • a waveform of C can be generated using a charge pump circuit or a switching power supply circuit.
  • A, B, C, and D are all integrated on one chip, that is, the four voltages share a substrate P-SUB at the time of fabrication, and the substrate P-SUB is connected to the lowest potential of the system, that is, the ground GND of the system.
  • the fingerprint sensing chip provided in this embodiment integrates the first chip and the second chip into one chip in the prior art, thereby reducing the area occupied by the entire circuit, and meeting the requirements of the user for getting thinner and thinner the terminal device. . Moreover, the fingerprint sensing chip lifts the driving voltage of the fingerprint sensing, and eliminates the discomfort of the user using the fingerprint to securely authenticate the terminal device.
  • the potential of the deep well (DNW, Deep N Well) isolation layer corresponding to D in Figure 4 is equal to VDD4, that is, the potential of DNW in D must change with the change of the voltage after the grounding, as shown in Figure 4, VDD4 changes. Then, DNW also changes, but the potential of P-SUB in D is fixed at VSS.
  • A, B, C, and D are compared, and D is used to provide a Fingerprint Sensor Array (FSA). Therefore, the circuit scale corresponding to D occupies most of the area of the chip, so that the fingerprint chip of the structure of FIG.
  • the resulting junction capacitance has a relatively large capacitance.
  • the junction capacitance is a load that cannot be ignored.
  • the capacitance of the junction capacitor is relatively large, if the speed of charge and discharge is taken into consideration, the loss is increased when the voltage is too large, and the voltage that has just been raised is easily pulled down. Therefore, for larger sensor arrays, the problem caused by this junction capacitance is very serious.
  • FIG. 5 is a schematic diagram of Embodiment 2 of the fingerprint sensing chip provided by the present invention, and its principle is explained in detail below with reference to FIG. 5.
  • the driving signal D is a voltage that is negatively grounded by using the second signal C.
  • the voltage of the third signal A ranges from 0 to the first positive voltage VDD1;
  • the voltage of the first signal B ranges from 0 to the second positive voltage VDD2;
  • the voltage of the second signal C ranges from 0 to a negative voltage VCP;
  • the low level of the driving signal D is the second signal C, and the high level VDD4 of the driving signal is different from the low level VSS4 of the driving signal by a predetermined voltage.
  • the predetermined voltage between the VDD4 and VSS4 can be set according to actual needs.
  • VDD1, VDD2, and VDD3 can also be set according to actual needs.
  • the waveform of C can be generated using a charge pump circuit or a switching power supply circuit based on the B signal.
  • the third signal A, the second signal C, the driving signal D and the first signal B share a P-type substrate
  • the P-type substrate is connected to a low level of the driving signal, and a voltage of the P-type substrate changes as a voltage of the driving signal changes.
  • the P-type substrate P-SUB is connected to a low level VSS4 of D, and the P-type substrate P-SUB is electrically The voltage changes as the voltage of the second signal C changes.
  • the fluctuation amplitudes of VDD4 and VSS4 are the same, so the voltage difference between P-SUB and DNW is relatively fixed.
  • the junction capacitance between the P-SUB and the DNW is not repeatedly charged and discharged, so that a large amount of power consumption is not lost.
  • the junction capacitance between the P-SUB in A and the DNW in A may be charged and discharged, but in the chip, the circuits corresponding to A, B, and C occupy a small area, and the circuit corresponding to D occupies The chip area is large. Therefore, this embodiment can solve the hazard caused by repeated charging and discharging of the junction capacitance in D.
  • the sensing chip provided in this embodiment adopts a negative lift mode, which can solve the technical problem corresponding to FIG. 4 .
  • the P-SUB Since the P-SUB is connected to the lowest voltage in the system, and when there is a negative high voltage, the ground GND of the system will not be the lowest voltage in the system, but the negative high voltage. At this time, the P-SUB can connect the negative high voltage. Since the negative high voltage is a modulated signal, it is fluctuating, and therefore, the voltage of the P-SUB is also fluctuating.
  • DNW in D is the same as VDD4, VDD4 is also fluctuating. Therefore, the relative voltage between P-SUB and DNW in D is fixed. Even if there is a junction capacitance, there is no voltage difference between the two ends of the junction capacitor. The junction capacitance does not constantly charge and discharge.
  • the third signal may be a periodically changing signal.
  • the third signal can be a square wave signal.
  • the second signal can also be a square wave signal.
  • the period and frequency of the square wave corresponding to the third signal and the second signal are the same.
  • the embodiment of the present invention further provides a terminal device, where the terminal device includes: a power source and the fingerprint sensing chip described in the above embodiment;
  • the power source is configured to provide power to the fingerprint sensing chip.
  • the voltage supplied by the power source to the fingerprint sensing chip can be the first letter. number.
  • the fingerprint sensing chip can be applied to a terminal device, such as a mobile phone.
  • a terminal device such as a mobile phone.
  • the driving voltage corresponding to D may provide a driving signal for fingerprint sensing.
  • FIG. 6 a schematic diagram of the module of the fingerprint sensing chip can be seen in FIG. 6.
  • the power supply in FIG. 6 uses the voltages corresponding to A, B, C, and D in FIG. 4 or 5.
  • the fingerprint sensing chip 100 includes a fingerprint identification circuit 101 and a power supply circuit 102;
  • the fingerprint identification circuit 101 includes a sensor array, an analog front end circuit (AFE, Analog Front End), and a digital control circuit.
  • AFE analog front end circuit
  • AFE Analog Front End
  • the power supply circuit 102 includes four power supplies: VDD1, VSS1, VDD2, VSS2, VDD3, VSS3, VDD4, VSS4.
  • VDD1 and VSS1 are used to power the digital circuit
  • VDD2 and VSS2 are used to power the analog circuit
  • VDD3 and VDD4 are the high voltage or negative voltage output after the voltage VDD2 is converted
  • VDD4 and VSS4 are used as the fingerprint identification circuit 101. powered by.
  • the fingerprint sensing chip provided by the present invention realizes the functions of IC1 and IC2 in the prior art, and integrates two chips into one chip, which occupies less space and makes the whole device smaller in size. In line with the user's requirements for miniaturization.

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Abstract

一种指纹感测芯片和终端设备，包括：第一信号(B)、第二信号(C)和驱动信号(D)；该指纹感测芯片由所述第一信号(B)产生所述第二信号(C)，并对所述第二信号(C)进行抬地后产生所述驱动信号(D)；所述驱动信号(D)，用于为指纹感测提供驱动电压。其中终端设备包括：电源和所述指纹感测芯片；电源用于为所述指纹感测芯片提供电源；所述指纹感测芯片，用于感测指纹。将现有技术中第一芯片和第二芯片整合为一个芯片，降低了生产两颗芯片的复杂度，减小了整个电路所占的面积，符合用户对于终端设备越来越轻薄化的要求。而且该指纹感测芯片对指纹感测的驱动电压进行抬地，消除用户使用指纹对终端设备安全认证时的不适感。

Description

一种指纹感测芯片及终端设备 技术领域
本发明涉及指纹感测技术领域，尤其涉及一种供电装置、指纹感测芯片及终端设备。
背景技术
现有技术中，一些终端设备，例如手机上设有指纹感测系统，实现用户使用过程中实现对终端设备的安全认证。
例如，苹果手机的指纹感测系统存在一个带铁环R的HOME键，参见图1，与铁环R连接的为第一芯片IC1，IC1实现对铁环R驱动信号的控制。IC1的操作电压包括两种，分别为A和B。其中，A用于为数字电路供电，B用于为模拟电路供电。A和B处理后可输出如图2中A和B所示方波信号，但并不局限于图2所示波形信号。图2中，B比A的电压高，例如VDD2为3V，VDD1为1.8V。其中，B也可同时用于驱动铁环R。一般情况下，VSS1和VSS2均是连接系统的地GND。
为提升指纹感测的精准度，VDD2的电压理应越高越好。但太高的电压对铁环R进行驱动会引起用户在触摸HOME键时感到不适，因此，为了降低用户使用指纹解锁时的不适，现有技术中也有引入抬地的驱动方式。
抬地的驱动方式是指IC1不在固定的电压下工作，而是引入第二芯片IC2，如图3所示，IC2包括A和B和C的电压，IC2并进一步产生一个电位位于的C电压即VDD3和VSS3之间产生的方波，如图2中的D所示的电压波形并作为IC1的VSS，，这就是所谓的抬地，即利用IC2的电压将IC1的地抬高。抬地之前IC1的地是连接系统的地GND。此时铁环R可以接系统的地GND，或者直接取消铁环R。用户触碰HOME键时不再感到不适。
但是，随着技术的发展以及用户要求的提高，目前终端设备的体积越来越小，要求元器件集成度越来越高。而如图3所示的用于指纹感测的芯片包括第一芯片IC1和第二芯片IC2，可以理解的是，在制造过程中，两个芯片需要两次封装，整合度低，而且成本也较高。并且两个芯片所占用的电路板的空间也 比较大，不符合电路板要求的轻薄趋势。
发明内容
本发明提一种供供电装置、指纹感测芯片及指纹感测设备，能够实现抬地的功能的同时，提高整合度，降低了电路的空间和体积。
本发明提供一种指纹感测芯片，包括：第一信号、第二信号和驱动信号；
该指纹感测芯片由所述第一信号产生所述第二信号，并对所述第二信号进行抬地后产生所述驱动信号；
所述驱动信号，用于为指纹感测提供驱动电压。
优选地，还包括：第三信号；
该指纹感测芯片由所述第一信号产生所述第三信号。
优选地，所述驱动信号为利用所述第二信号进行正抬地后的电压。
优选地，
所述第三信号的电压范围为0到第一正电压之间；
所述第一信号的电压范围为0到第二正电压之间；
所述第二信号的电压范围为0到第三正电压之间；
所述驱动信号的低电平为所述第二信号，所述驱动信号的高电平与所述驱动信号的低电平相差预定电压。
优选地，所述第三信号、第二信号、驱动信号和第一信号共享一个P型衬底；
所述P型衬底连接该指纹感测芯片的地GND。
优选地，所述驱动信号为利用所述第二信号进行负抬地后的电压。
优选地，
所述第三信号的电压范围为0到第一正电压之间；
所述第一信号的电压范围为0到第二正电压之间；
所述第二信号的电压范围为0到负电压之间；
所述驱动信号的低电平为所述第二信号，所述驱动信号的高电平与所述驱动信号的低电平相差预定电压。
优选地，所述第三信号、第二信号、驱动信号和第一信号共享一个P型衬底；
所述P型衬底连接所述驱动信号的低电平，所述P型衬底的电压随着所述驱动信号的电压的变化而变化。
优选地，所述第三信号、第二信号和驱动信号均为周期性变化的信号。
优选地，所述第三信号、第二信号和驱动信号均为方波信号，且对应的方波的周期和频率均相同。
本发明实施例还提供一种终端设备，包括：电源和权利要求1-10任一项所述的指纹感测芯片；
所述电源，用于为所述指纹感测芯片提供电源；
所述指纹感测芯片，用于感测指纹。与现有技术相比，本发明具有以下优点：
本实施例提供的指纹感测芯片，将现有技术中第一芯片和第二芯片整合为一个芯片，降低了生产两颗芯片的复杂度，减小了整个电路所占的面积，符合用户对于终端设备越来越轻薄化的要求。而且该指纹感测芯片对指纹感测的驱动电压进行抬地，消除用户使用指纹对终端设备安全认证时的不适感。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1是现有技术中搭配铁环的第一芯片驱动示意图；
图2是现有技术中抬地电压示意图；
图3是现有技术中用于指纹感测的芯片示意图；
图4是本发明提供的指纹感测芯片实施例一的示意图；
图5是本发明提供的指纹感测芯片实施例二的示意图；
图6是本发明提供的指纹感测芯片的模块示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造 性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图对本发明的具体实施方式做详细的说明。
本发明提供的指纹感测芯片，通过一颗芯片实现抬地功能以进行指纹感测。
参见图4，该图为本发明提供的指纹感测芯片实施例一的示意图。
本实施例提供的指纹感测芯片，包括：
第一信号B、第二信号C和驱动信号D；
由所述第一信号B产生所述第二信号C，并对所述第二信号C进行抬地后产生所述驱动信号D；
所述驱动信号D，用于为指纹感测提供驱动电压。
指纹感测芯片的B、C和D可为图4所示电压信号，但并不局限于图4所示波形信号。
VDD2为一DC(直流)电位，仿真电路在VDD2、VSS2间运作，如图4的B信号所示。
一般状况下，VDD2为外部提供给整个IC的电源，VDD1为IC内部透过降压电路产生的较低电位。同时在VDD2的基础上透过增压电路产生VDD3，如图4的C信号所示。
而安排一驱动信号在VDD3和VSS3间切换，如一方波波形，并作为被抬地区域电路的电源地VSS4，如图4的D信号所示。
需要说明的是，该指纹感测芯片还可以包括第三信号A，如图4的A信号所示，VDD1为一DC(直流)电位，数字电路在VDD1、VSS1间运作。
另外，该指纹感测芯片也可以不包括第三信号A。
以图4的A电源进行操作的电路，其组件结构是以VSS1连接PW(P阱)、VDD1连接NW(N阱)、PW(P阱)和NW(N阱)下设有DNW(深N阱)
以图4的B电源进行操作的电路，其组件结构是以VSS2连接PW(P阱)、VDD2连接NW(N阱)、PW(P阱)和NW(N阱)下设有DNW(深N阱)。
以图4的C的电源进行操作的电路，其组件结构是以VSS3连接PW(P阱)、VDD3连接NW(N阱)、PW(P阱)和NW(N阱)下设有DNW(深N阱)
以图4的D的电源进行操作的电路，其组件结构是以VSS4连接PW(P阱)、VDD4连接NW(N阱)、PW(P阱)和NW(N阱)下设有DNW(深N阱)，
不同电源域的电路组件A，B，C，D由各自的DNW(深N阱)彼此隔离，并均形成在P衬底(P-SUB)上。
本实施例的第三P型衬底P-SUB连接指纹感测芯片的地GND。
利用所述驱动信号D第三对需要被抬地的电路模块进行正电压抬地。
如图4所示，D是抬地以后的电压，该抬地方式为正抬地方式，即向正电压方向抬高，抬地电压大于0，是正电压。
所述第二信号C的电压范围为0到第三正电压VDD3之间；
其中图4中的VSS1＝VSS2＝VSS3＝0。VSS1为A的低电平，VSS2为B的低电平，VSS3为C的低电平。
所述驱动信号D的低电平为所述第二信号C，所述驱动信号的高电平VDD4与所述驱动信号的低电平VSS4相差预定电压。
可以理解的是，所述VDD4和VSS4之间相差的预定电压可以根据实际需要来设置。
另外，VDD1、VDD2和VDD3的电压值也可以根据实际需要来设置。例如，可以利用电荷泵电路或者开关电源电路产生C的波形。
将A、B、C和D均集成在一个芯片上，即在制作时这四个电压共享一个衬底P-SUB，该衬底P-SUB接系统的最低电位，即接系统的地GND，可以从图4中看出，P-SUB连接VSS，可以理解的是，系统的地GND是固定不变的。因此，图4中的VSS＝VSS1＝VSS2＝VSS3＝VSS4＝GND。
这样，图4中A、B和C对应的电位，均处于固定电位的状态。
本实施例提供的指纹感测芯片，将现有技术中第一芯片和第二芯片整合为一个芯片，这样减小了整个电路所占的面积，符合用户对于终端设备越来越轻薄化的要求。而且该指纹感测芯片对指纹感测的驱动电压进行抬地，消除用户使用指纹对终端设备安全认证时的不适感。
但图4中D对应的深阱(DNW，Deep N Well)隔离层的电位与VDD4相等，即D中DNW的电位必须随着抬地后电压的变化而变化，如图4所示，VDD4变化，则DNW也随之变化，但D中的P-SUB的电位为VSS固定不变。
即D中DNW的电位一直在波动变化，但D中的P-SUB的电位固定不变，这样将造成D中的DNW与D中的P-SUB之间的结电容(Junction Capacitance)持续的充放电。
另外，A、B、C和D相比较，D用于提供给指纹感测阵列(FSA，Fingerprint Sensor Array),因此D对应的电路规模占用了芯片的大部分面积，这样图4结构的指纹芯片产生的结电容的容值比较大，对于电源来说，该结电容是不容忽视的负载。该结电容的容值比较大时，如果考虑到充放电的速度，电压太大则损耗增加，并且刚被抬高的电压容易被拉低。因此，对于更大规模的传感器阵列，该结电容造成的问题是非常严重的。
因此，为了解决此单一芯片中结电容反复充放电的问题，本发明基于以上实施例提供的正电压抬地的方式，还为该指纹感测芯片提供了负电压抬地的方式，具体可以参见图5所示的本发明提供的指纹感测芯片的实施例二的示意图，下面结合图5对其原理进行详细阐述。
如图5所示，本实施例提供的指纹感测芯片，驱动信号D为利用第二信号C进行负抬地后的电压。
其中，所述第三信号A的电压范围为0到第一正电压VDD1之间；
所述第一信号B的电压范围为0到第二正电压VDD2之间；
所述第二信号C的电压范围为0到负电压VCP之间；
所述驱动信号D的低电平为所述第二信号C，所述驱动信号的高电平VDD4与所述驱动信号的低电平VSS4相差预定电压。
可以理解的是，所述VDD4和VSS4之间相差的预定电压可以根据实际需要来设置。
另外，VDD1、VDD2和VDD3的电压值也可以根据实际需要来设置。例如，可以以B信号为基础利用电荷泵电路或者开关电源电路产生C的波形。
所述第三信号A、第二信号C、驱动信号D和第一信号B共享一个P型衬底；
所述P型衬底连接所述驱动信号的低电平，所述P型衬底的电压随着所述驱动信号的电压的变化而变化。
所述P型衬底P-SUB连接D的低电平VSS4，所述P型衬底P-SUB的电 压随着所述第二信号C的电压的变化而变化。
从图5中可以看出，D中的P-SUB＝VSS4，而D中的DNW＝VDD4，即，P-SUB随VSS4变化波动时，DNW也在同步随VDD4变化波动。VDD4和VSS4的波动幅度是相同的，因此，P-SUB与DNW之间电压差是相对固定的。这样，P-SUB与DNW之间的结电容就不会反复地进行充放电，进而不会损失大量的功耗。
另外，图5对应的A、B和C中的P-SUB与对应的DNW之间存在一定的电压波动。例如以A为例进行说明，A中的P-SUB与VSS4的电压相同，但A中的DNW的电压与VDD1的电压相同，VDD1是固定的，但VSS4是波动的。这样A中的P-SUB与A中的DNW之间的结电容会存在充放电，但是在芯片中，A、B和C对应的电路所占的面积很小，而D对应的电路所占的芯片面积很大，因此，本实施例可以解决D中的结电容反复充放电带来的危害。
需要说明的是，本实施例提供的感测芯片采用负抬地的方式，可以解决图4对应的技术问题。由于P-SUB连接系统中最低的电压，而当存在负向的高压时，系统的地GND将不是系统中最低的电压，而是该负向高压。此时P-SUB可以连接该负向的高压。由于该负向的高压是调制信号，在波动，因此，P-SUB的电压也在波动。另外，由于D中的DNW与VDD4相同，VDD4也在波动，因此，D中的P-SUB与DNW之间相对电压固定，即使存在结电容，该结电容的两端不存在电压差，因此，该结电容不会不断地充放电。
本实施例中，图5的A、B、C、D电路的组件结构和图4相同。
可以理解的是，在上述实施例或其它实施例中，第三信号可为周期性变化的信号。第三信号可为方波信号。第二信号可也为方波信号。
从图5中可以看出，优选，所述第三信号和第二信号对应的方波的周期和频率均相同。
基于以上实施例提供的指纹感测芯片，本发明实施例还提供一种终端设备，该终端设备包括：电源和以上实施例所述的指纹感测芯片；
所述电源，用于为所述指纹感测芯片提供电源。
可以理解的是，所述电源提供给所述指纹感测芯片的电压可以为第一信 号。
可以理解的是，该指纹感测芯片可以应用于终端设备上，例如手机中。以供手机实现用户的指纹解锁功能。其中D对应的驱动电压可以为指纹感测提供驱动信号。
另外，指纹感测芯片的模块示意图可以参见图6所示。
注意的是，图6中的电源使用图4或5中A、B、C和D对应的电压。
指纹感测芯片100包括指纹识别电路101和电源电路102；
其中，指纹识别电路101包括传感器阵列、类比前端电路(AFE，Analog Front End)和数字控制电路。
电源电路102包括四种电源：VDD1、VSS1、VDD2、VSS2、VDD3、VSS3、VDD4、VSS4。
其中，VDD1和VSS1用于为数字电路供电，所述VDD2和VSS2用于为模拟电路供电，VDD3和VDD4为将电压VDD2转换后输出的高压或负压；VDD4和VSS4用于为指纹识别电路101供电。
从图6可以看出，本发明提供的指纹感测芯片实现了现有技术中的IC1和IC2的功能，将两个芯片整合为一个芯片，所占空间更小，使整个设备的体积更小，符合用户对于小型化的要求。
以上所述，仅是本发明的较佳实施例而已，并非对本发明作任何形式上的限制。虽然本发明已以较佳实施例揭露如上，然而并非用以限定本发明。任何熟悉本领域的技术人员，在不脱离本发明技术方案范围情况下，都可利用上述揭示的方法和技术内容对本发明技术方案做出许多可能的变动和修饰，或修改为等同变化的等效实施例。因此，凡是未脱离本发明技术方案的内容，依据本发明的技术实质对以上实施例所做的任何简单修改、等同变化及修饰，均仍属于本发明技术方案保护的范围内。

Claims (11)

  1. 一种指纹感测芯片，其特征在于，包括：第一信号、第二信号和驱动信号；
    该指纹感测芯片由所述第一信号产生所述第二信号，并对所述第二信号进行抬地后产生所述驱动信号；
    所述驱动信号，用于为指纹感测提供驱动电压。
  2. 根据权利要求1所述的指纹感测芯片，其特征在于，还包括：第三信号；
    该指纹感测芯片由所述第一信号产生所述第三信号。
  3. 根据权利要求2所述的指纹感测芯片，其特征在于，所述驱动信号为利用所述第二信号进行正抬地后的电压。
  4. 根据权利要求3所述的指纹感测芯片，其特征在于，
    所述第三信号的电压范围为0到第一正电压之间；
    所述第一信号的电压范围为0到第二正电压之间；
    所述第二信号的电压范围为0到第三正电压之间；
    所述驱动信号的低电平为所述第二信号，所述驱动信号的高电平与所述驱动信号的低电平相差预定电压。
  5. 根据权利要求4所述的指纹感测芯片，其特征在于，所述第三信号、第二信号、驱动信号和第一信号共享一个P型衬底；
    所述P型衬底连接该指纹感测芯片的地GND。
  6. 根据权利要求2所述的指纹感测芯片，其特征在于，所述驱动信号为利用所述第二信号进行负抬地后的电压。
  7. 根据权利要求6所述的指纹感测芯片，其特征在于，
    所述第三信号的电压范围为0到第一正电压之间；
    所述第一信号的电压范围为0到第二正电压之间；
    所述第二信号的电压范围为0到负电压之间；
    所述驱动信号的低电平为所述第二信号，所述驱动信号的高电平与所述驱动信号的低电平相差预定电压。
  8. 根据权利要求6所述的指纹感测芯片，其特征在于，所述第三信号、 第二信号、驱动信号和第一信号共享一个P型衬底；
    所述P型衬底连接所述驱动信号的低电平，所述P型衬底的电压随着所述驱动信号的电压的变化而变化。
  9. 根据权利要求1-8任一项所述的指纹感测芯片，其特征在于，所述第三信号、第二信号和驱动信号均为周期性变化的信号。
  10. 根据权利要求9所述的指纹感测芯片，其特征在于，所述第三信号、第二信号和驱动信号均为方波信号，且对应的方波的周期和频率均相同。
  11. 一种终端设备，其特征在于，包括：电源和权利要求1-10任一项所述的指纹感测芯片；
    所述电源，用于为所述指纹感测芯片提供电源；
    所述指纹感测芯片，用于感测指纹。
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