WO2018074820A1 - Dispositif de production de semi-conducteur incurvé et capteur d'image utilisant un semi-conducteur incurvé - Google Patents

Dispositif de production de semi-conducteur incurvé et capteur d'image utilisant un semi-conducteur incurvé Download PDF

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Publication number
WO2018074820A1
WO2018074820A1 PCT/KR2017/011475 KR2017011475W WO2018074820A1 WO 2018074820 A1 WO2018074820 A1 WO 2018074820A1 KR 2017011475 W KR2017011475 W KR 2017011475W WO 2018074820 A1 WO2018074820 A1 WO 2018074820A1
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WIPO (PCT)
Prior art keywords
light source
mask
source device
concave portion
lens
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Application number
PCT/KR2017/011475
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English (en)
Korean (ko)
Inventor
최진우
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최진우
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Filing date
Publication date
Priority claimed from KR1020170095708A external-priority patent/KR102025762B1/ko
Application filed by 최진우 filed Critical 최진우
Publication of WO2018074820A1 publication Critical patent/WO2018074820A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors

Definitions

  • the present invention relates to a curved semiconductor production apparatus and an image sensor using a curved semiconductor produced using the same.
  • Semiconductor exposure technology is starting from circuit pattern transfer technique using mercury light source and is developing as a nanometer scale exposure device using recent extreme ultraviolet light source.
  • Semiconductor exposure techniques have all been developed to form a fine semiconductor circuit pattern on a planar silicon semiconductor substrate.
  • a light source such as a mercury lamp for focusing all the light extending from the point light source in all directions to a light source incident parallel to the plane of the mask while focusing the light passing through the mask onto a small area of the silicon plane substrate, And a lens unit for correcting the optical path so that the incident light is vertical.
  • the planar mask must have the semiconductor circuit pattern to be transferred thereon etched, and the one produced for semiconductor exposure is called a blank mask.
  • the blank mask is fabricated using a transparent material, which is covered with a metal film having a circuit pattern on the flat substrate.
  • the circuit pattern is etched on the metal film.
  • the metal film is covered with a metal film and the metal film is covered with the metal film.
  • the material is made of a material suitable for the light source and the image forming technology.
  • a light beam of a short wavelength such as extreme ultraviolet ray as a light source.
  • a plurality of UV light emitting devices that emit ultraviolet rays out of the point light source form using a lamp are disposed, A technique has been developed in which a light source is formed and light is directly incident on the entire surface of the mask perpendicularly to the mask.
  • the present invention can be applied to a curved surface image sensor to form a semiconductor layer structure on a curved surface.
  • the surface configuration of the semiconductor substrate of the image sensor may be a concave surface such as a hemispherical surface and a smooth surface with the same curvature at all points.
  • a planar semiconductor process light must be vertically incident on all points of a silicon plane to form an ideal semiconductor hierarchical structure.
  • a curved exposure apparatus light passing through a mask must be incident vertically at all points of the semiconductor substrate An ideal curved semiconductor hierarchical structure can be formed.
  • the present disclosure is directed to a semi-spherical curved surface light source for forming an image on a concave semiconductor curved substrate according to various embodiments, a hemispherical curved circuit pattern mask, and a curved surface formed by a curved surface exposure lens portion capable of forming a semiconductor circuit pattern image on a curved surface.
  • a semiconductor production apparatus can be provided.
  • the curved semiconductor exposure apparatus can transfer a precise curved circuit pattern to the base of silicon formed in a curved surface like hemisphere, and it is possible to carry out a series of process steps such as application of photosensitive agent, circuit pattern mask installation, ultraviolet exposure and etching
  • the hierarchical structure of the semiconductor circuit can be formed repeatedly on the curved surface.
  • the present invention can be applied to a curved surface image sensor to form a semiconductor layer structure on a curved surface.
  • FIG. 1 is a view showing an exposure apparatus according to an embodiment.
  • FIG. 2 is a view for explaining a process for producing a semiconductor substrate including a concave portion according to an embodiment.
  • FIG 3 is a view for explaining a light source device according to an embodiment.
  • FIG. 4 is a view for explaining a mask according to an embodiment.
  • FIG. 5 is a diagram showing a cross-sectional view of an image sensor in which an image pickup device is disposed on a curved semiconductor substrate, according to one embodiment.
  • FIG. 6 is a diagram showing a pattern in which an imaging element is arranged in a concave portion of a curved semiconductor substrate using a cruciform array plate and a cruciform array template according to an embodiment.
  • FIG. 7 is a diagram showing a pattern in which an image pickup element is arranged in a concave portion of a curved semiconductor substrate according to an embodiment.
  • FIG. 8 is a diagram for explaining the arrangement of a row address signal line and a column address signal line according to an embodiment.
  • Figure 9 is a flow diagram illustrating a process for storing dimmer data in a memory using a curved semiconductor substrate image sensor, in accordance with one embodiment.
  • an apparatus for forming a circuit pattern on a semiconductor substrate including a concave portion includes a light source device, a mask including at least one aperture through which light emitted from the light source device passes, wherein the mask includes a circuit pattern composed of at least one aperture, and as the light is irradiated on the concave portion of the semiconductor substrate, the circuit pattern is exposed to the concave portion Lt; / RTI >
  • an apparatus for forming a circuit pattern on a semiconductor substrate including a concave portion includes a light source device, a mask including at least one aperture through which light irradiated from the light source device is transmitted, And a lens configured to irradiate a concave portion of the semiconductor substrate, wherein the mask includes a circuit pattern composed of at least one aperture, and as the light is irradiated on the concave portion of the semiconductor substrate, .
  • the expressions " having, “ “ having, “ “ comprising, “ or “ comprising may " refer to the presence of a feature (e.g., a numerical value, a function, And does not exclude the presence of additional features.
  • a or B “at least one of A and / or B,” or “one or more of A and / or B,” may include all possible combinations of the listed items.
  • “A or B,” “at least one of A and B,” or “at least one of A or B” includes (1) at least one A, (2) Or (3) at least one A and at least one B all together.
  • first may denote various components, regardless of their order and / It is used to distinguish the components and does not limit the components.
  • first user equipment and the second user equipment may represent different user equipment, regardless of order or importance.
  • first component may be named as the second component, and similarly the second component may be named as the first component.
  • the phrase “ configured to” as used herein is intended to encompass, depending on the context, for example, having the ability to, The present invention may be used interchangeably with “designed to,” “adapted to,” “made to,” or “capable of”.
  • the term “ configured to (or set up) " may not necessarily mean “ specifically designed to " in hardware. Instead, in some situations, the expression “ configured to” may mean that the device can " do “ with other devices or components.
  • a processor configured (or configured) to perform the phrases " A, B, and C " may be implemented by executing one or more software programs stored in a memory device or a dedicated processor (e.g., an embedded processor) , And a generic-purpose processor (e.g., a CPU or an application processor) capable of performing the corresponding operations.
  • a dedicated processor e.g., an embedded processor
  • a generic-purpose processor e.g., a CPU or an application processor
  • FIG. 1 is a view showing an exposure apparatus 100 according to an embodiment.
  • the exposure apparatus 100 may include a light source device 110, a mask 120, and a lens 130.
  • the light source device 110 may be configured to emit light.
  • the light source device 110 may emit ultraviolet rays.
  • the light source device 110 may include an ultraviolet light emitting diode (LED) that emits ultraviolet light.
  • LED ultraviolet light emitting diode
  • the light source device 110 may include a light emitting device that outputs light and an optical device that reflects, condenses, or refracts the output light to direct the light in a desired direction.
  • the light source device 110 may include a curved surface.
  • the light source device 110 may include a curved surface with a single curvature center.
  • the light source device 110 may include a hemispherical surface.
  • the light source device 110 may include a light source surface forming a curved surface.
  • the light source device 110 may include a light source surface that forms a concave curved surface toward the mask 120.
  • the light source device 110 may include a light source surface that forms a concave hemisphere towards the mask 120.
  • the light source device 110 may include a planar light source.
  • the surface light source may mean a light source whose surface is uniformly shining and has no thickness.
  • the light source device 110 may include a surface light source implemented using one or more point light sources.
  • the light source device 110 may include an ultraviolet LED, which is a plurality of point light sources arranged on a curved light source surface.
  • the ultraviolet LEDs which are a plurality of light sources, can be arranged at a uniform density on the curved light source surface.
  • the light source apparatus 110 may be configured to emit light traveling toward a predetermined position.
  • the light source device 110 may include a light source surface that forms a concave hemisphere in the direction of the mask 120, and may be configured to emit light in a direction perpendicular to the light source surface. Light emitted in a direction perpendicular to the light source surface having a single curvature center can proceed toward the center of curvature of the light source surface.
  • the mask 120 includes a curved surface and may be configured to transmit light irradiated from the light source device 110 through a perforated portion of the circuit pattern.
  • the curved surface mask may be formed by forming a transparent glass flask in a hemispherical shape, coating the metal film with the substrate as a substrate, and then punching the metal through which the light passes.
  • a circuit pattern can be perforated in the mask 120.
  • a circuit pattern for transfer to the concave portion 150 of the semiconductor substrate 140 may be drilled in the mask 120.
  • the circuit pattern after the scaling and the circuit pattern before scaling can be referred to as the same circuit pattern.
  • the mask 120 may be configured to transmit light irradiated from the light source device 110 through the perforated portion of the circuit pattern. Further, the mask 120 may be configured to block the light irradiated on the portion other than the perforated portion of the circuit pattern
  • the mask 120 may be configured to include a curved surface.
  • the mask 120 may be configured to include a convex curved surface toward the light source device 110.
  • the mask 120 may be configured to include a convex hemisphere toward the light source device 110.
  • Light emitted from the light source device 110 may be irradiated perpendicularly to the surface of the mask 120 at all points of the mask 120.
  • the center of curvature of the curved surface included in the light source device 110 may coincide with the center of curvature of the curved surface of the mask 120.
  • the curved surface of the light source device 110 and the curved surface of the mask 120 are all hemispherical surfaces and the center point of the curved surface of the light source device 110 may coincide with the center point of the curved surface of the mask 120.
  • the lens 130 may be configured to focus the light transmitted through the mask 120 and transfer the circuit pattern to the concave portion 150 of the semiconductor substrate 140 according to one embodiment.
  • the lens 130 may be configured to condense light transmitted through the perforated portion of the circuit pattern of the mask 120 to form an upper surface in the recess 150 of the semiconductor substrate 140 .
  • the lens 130 may be configured to vertically illuminate the concave portion 150 at all points of the concave portion 150 of the semiconductor substrate 140 with the condensed light.
  • the lens 130 may be configured to vertically illuminate the concave portion 150 at a substantial point of the concave portion 150 of the semiconductor substrate 140.
  • the lens 130 may form a curved focal plane.
  • the lens 130 may form a curved focal plane having a single curvature center.
  • the lens 130 may form a hemispherical focal plane.
  • the lens 130 may be a spherical lens.
  • the lens 130 may be a monocentric lens or a ball lens, but is not limited thereto.
  • the depression 150 of the semiconductor substrate 140 may be coated with a sensitizing solution.
  • the sensitizing solution may be of a positive and a negative type.
  • the photosensitive liquid when the photosensitive liquid is a positive type, a portion of the semiconductor substrate 140 which is condensed by the lens and is exposed to the light irradiated on the concave portion 150 can be removed.
  • the photosensitive liquid when the photosensitive liquid is a negative type, a portion which is condensed by the lens and is not exposed to the light irradiated on the concave portion 150 of the semiconductor substrate 140 can be removed.
  • the concave portion 150 of the semiconductor substrate 140 can be configured such that the light irradiated through the lens is uniformly irradiated onto the concave portion 150.
  • the recess 150 of the semiconductor substrate 140 may have a single center of curvature.
  • the single curvature center of the recess 150 of the semiconductor substrate 140 may coincide with the center of the lens. According to one embodiment, the single curvature center of the recess 150 of the semiconductor substrate 140 may coincide with the center of the spherical lens. The single curvature center of the concave portion 150 of the semiconductor substrate 140, the center of the spherical lens 140, the single curvature center of the curved surface of the mask 120, A single curvature center of the curved surface of the curved surface may all coincide.
  • the recess 150 of the semiconductor substrate 140 may be arranged to coincide with the focal plane of the spherical lens.
  • FIG. 2 is a view for explaining a process for producing a semiconductor substrate including a concave portion according to an embodiment.
  • the semiconductor substrate is produced by growing a semiconductor raw material into a rod-like single crystal, cutting the grown semiconductor raw material, finishing it like a mirror surface by polishing or polishing, or the like, and is also referred to as a wafer.
  • wafers In contrast to conventional wafers, which are planar wafers, wafers, according to one embodiment of the present disclosure, can include fully curved recesses.
  • &quot complete curved surface shape " in the present application is not a shape similar to a concave shape produced by pasting a planar wafer, but may represent a shape that forms a smooth curve at all points on the concave portion.
  • the recess manufacturing process may include forming the recess 220 using a silicon ingot.
  • the recess manufacturing process may include embossing a curved groove in the wafer 240 using a grinder 200 including a curved grinding portion 210 to implement the recess 220 have.
  • the recess manufacturing process may include the step of disposing a hemispherical groove on the wafer 240 using the grinder 200 including the hemispherical grinding portion 210, thereby embodying the recess 220.
  • the recess manufacturing process may include cutting the silicon ingot into wafer units 240.
  • the thickness of the wafer 240 may be longer than the distance from the plane including the circumferential periphery of the concave portion 220 to the center portion of the concave portion.
  • the thickness of the wafer 240 may be greater than the radius of curvature of the recess 220.
  • the thickness of the wafer 240 may be greater than about 50 micrometers (um) greater than the distance from the plane including the peripheral circumference of the recess 220 to the center of the recess.
  • the thickness of the wafer 240 may be about 50 micrometers or more thicker than the radius of curvature of the recess 220.
  • the concave manufacturing process may include grinding the wafer 240 and polishing the surface of the concave portion 220 so that the concave portion 220 is formed on the wafer.
  • a plurality of recesses 221 and 222 can be ground on the wafer 241.
  • the grinder 200 used to form the recess 220 may include a curved grinding portion 210 having the same radius of curvature as the recess 220 to be created.
  • the grinder 200 used to form the recess 220 may include a hemispherical grinding portion 210 having the same radius of curvature as the hemispherical recess 220 to be created.
  • ultrafine abrasive grains can be used to polish the surface of the concave portion 220.
  • a metal coating may be formed on the surface of the polished concave portion 220 in accordance with the deposition of metal ions.
  • a photosensitizer may be applied to the concave surface. Further, the photoresist portion irradiated with the light transmitted through the perforations of the mask can be converted to a soluble state. Conversely, the photoresist portion irradiated with the light transmitted through the perforations of the mask may be insoluble.
  • the photosensitizer on the concave surface can be converted to a solubility along a circuit pattern corresponding to the mask perforation pattern as the light transmitted through the mask perforations is irradiated.
  • the photosensitizer on the concave surface can be insoluble along the circuit pattern corresponding to the mask perforation pattern as the light transmitted through the mask perforations is irradiated.
  • FIG 3 is a view for explaining a light source apparatus 300 according to an embodiment.
  • the light source device 300 may be configured to emit light in the ultraviolet region required for exposure.
  • the light source device 300 may include a UV LED.
  • the light source device 300 may be configured such that a plurality of UV LED elements are disposed on a curved surface.
  • the light source apparatus 300 may include a plurality of UV LED elements disposed on the heat sink 330 and the heat sink 330.
  • a UV LED element for example, LED element 320 is shown in a circular shape, but may have various shapes.
  • the distance between the centers of two adjacent LED elements can be determined according to the intensity of light emitted from the light source device 300.
  • the UV LED element for example, the heat sink 330 in which the LED element 320 is disposed, may be configured in a curved shape.
  • a portion 305 of the curved surface portion 310 of the illustrated heat sink 330 is shown in a plan view, but for convenience of explanation.
  • the heat sink 330 may be configured as a curved surface with a single curvature center.
  • the heat sink 330 may be configured in a hemispherical shape.
  • the heat sink 330 may be configured in a concave curved shape toward the mask.
  • the heat sink 330 may be recessed toward the mask 120 and may be configured in a curved shape with a single curvature center. Further, for example, the heat sink 330 may be configured in a concave hemispherical shape toward the mask 120.
  • the single curvature center of the curved heat sink 330 may coincide with the curvature center of the mask.
  • the plurality of UV LED elements may be uniformly disposed on the concave portion of the heat sink 330.
  • the emission axes of light emitted from the plurality of UV LEDs disposed on the heat sink 330 for example, the emission axes 361, 362, and 363 of the light are arranged at positions where each of the plurality of UV LED elements is disposed And may be perpendicular to the surface of the heat sink 330.
  • a plurality of UV LED elements may be disposed on the heat sink 330 such that the number of UV LED elements disposed per unit area of the heat sink 330 is uniform. Also, for example, a plurality of UV LED elements can be disposed on the heat sink 330 such that the number of UV LED elements arranged per unit curved surface area of the heat sink 330 is within a predetermined error range.
  • the plurality of UV LED elements may be disposed on the heat sink 330 such that the light intensity per unit surface area of the heat sink 330 is uniform.
  • a plurality of UV LED elements may be disposed on the heat sink 330 such that the light intensity per unit surface area of the heat sink 330 is within a predetermined error range.
  • light emitted from the plurality of UV LED elements may be emitted toward the mask from the recesses of the heat sink 330.
  • Light emitted from a plurality of UV LED elements according to an embodiment may be irradiated vertically at each point on the mask.
  • the light source device 300 may optionally include a diffusion sheet (not shown).
  • the diffusion sheet may be formed in the shape of a curved surface having the same center of curvature as the concave portion of the heat sink 330.
  • the diffusion sheet may be convex in the direction of the heat sink 330, and may be formed in a curved shape concave in the mask direction.
  • the diffuser sheet may be configured to diffuse the ultraviolet light emitted from the UV LED elements, e.g., the LED element 320, to convert the point light source into a two-dimensional planar light source.
  • the diffusion sheet can be configured to irradiate the converted two-dimensional surface light source perpendicularly to the mask at each incident point on the mask.
  • the light source device 300 may include a plurality of condenser lenses (not shown) coupled to each of the plurality of LED elements.
  • the condensing lens can be configured to condense the light emitted from each of the LED elements.
  • the condensing lens can be configured to condense light emitted from each of the corresponding LED elements and irradiate the corresponding portion of the mask vertically.
  • the light source device 300 may further include a cooler for cooling the heat emitted from the UV LED elements, a controller for individually or collectively controlling the plurality of UV LED elements, and the like.
  • various light source devices for generating curved surface light sources and vertically irradiating the respective points to the mask can be used in the present invention.
  • FIG. 4 is a view for explaining a mask according to an embodiment.
  • the mask may be a plurality of masks.
  • a plurality of different circuit patterns may be perforated in each of the plurality of masks.
  • the mask 400 includes a curved surface and may be configured to transmit light irradiated from the light source device through the perforated portion of the circuit pattern.
  • the mask 400 may comprise a curved surface having a single curvature center.
  • the mask 400 may include a hemispherical surface.
  • a circuit pattern can be drilled into the mask 400.
  • a circuit pattern for transfer to the concave portion 150 of the semiconductor substrate 140 can be drilled in the mask 400.
  • a virtual latitude 0 conductor passing through the center 410 of the curved surface on the mask 400 can be defined.
  • a virtual longitude 0 conductor line 430 perpendicular to the virtual latitude zero conductor line 420 passing through the center point 410 on the curved surface on the mask 400 according to one embodiment may be defined.
  • a plurality of virtual top conductors on the mask 400 according to one embodiment may be defined.
  • the geodesic distance between two adjacent hypotenuses can be constant.
  • a virtual imaging element placement point may be defined at a constant distance along each of a plurality of virtual top conductors, including a point at which each of the plurality of virtual top conductors intersects the virtual longitudinal 0 conductor 420.
  • the mask according to one embodiment may include a perforation including perforations 441, 442, 443 that are perforated to a certain size at a plurality of virtual imaging element placement points.
  • the perforations may correspond to the area of the port diode of the imaging element, which will be described below. Further, perforations having patterns for the signal line layer of the curved semiconductor may be included in peripheries of the perforations corresponding to the plurality of imaging element disposition points, for example, perforations 441, 442, and 443, respectively.
  • FIG. 5 is a diagram showing a cross-sectional view of an image sensor in which an image pickup device is disposed on a curved semiconductor substrate, according to one embodiment.
  • the curved semiconductor substrate 560 may include a concave portion 510 in the form of a curved surface.
  • the curved surface may include, but is not limited to, a hemispherical surface, a curved surface constituted by a partial area of the spherical surface, or a curved surface constituted by a partial area of the elliptical surface.
  • the image sensor may include an imaging element, e.g., an imaging element 520, disposed in the recess 510.
  • the image pickup device 520 includes a color filter 530 disposed on the surface of the concave portion 510, a signal line layer 540 located behind the color filter 530, and a photodiode 550 located behind the signal line layer 540.
  • the color filter 530 disposed on the surface of the concave portion 510 can determine the color of the light 570 incident on the image pickup device, for example, the image pickup device 520.
  • each imaging element for example, the imaging element 520 on the surface of the recess 510, may be represented in the form of a circle, but is not limited thereto.
  • the imaging device 520 may be designed to have a size of several micrometers or less, depending on the application, in actual design.
  • the imaging element may be disposed on the surface of the recess 510 along a plurality of virtual top conductors. A method of disposing the imaging element along the virtual top conductor will be described with reference to FIG.
  • the center-of-curvature of curvature of the photodiode 550 may be longer than the center-of-curvature distance of the color filter 530. Therefore, the area of the photodiode 550 can be wider than the area of the color filter 530, thereby improving the light receiving efficiency.
  • the signal line layer 540 according to one embodiment may be located at the periphery of the imaging element 520. Thus an opaque configuration such as signal line layer 540 can prevent light 570 reaching photodiode 550 through color filter 530 and prevent light 570 from passing through color filter 530 570 may reach the photodiode 550.
  • the light 570 incident on each of the imaging elements, for example, the imaging element 520, on the curved surface may be incident perpendicularly to the surface of the color filter 530.
  • FIG. 6 is a diagram showing a pattern in which the imaging element is arranged in the concave portion 510 of the curved semiconductor substrate 560 using the cruciform pattern 610 and the cruciform pattern 610.
  • FIG. 6 is a diagram showing a pattern in which the imaging element is arranged in the concave portion 510 of the curved semiconductor substrate 560 using the cruciform pattern 610 and the cruciform pattern 610.
  • the concave portion 510 may be curved.
  • the concave portion is shown in a hemispherical form, but as described above, the concave portion may be in a different curved form.
  • Each of the imaging elements shown in Fig. 6 in the surface of the concave portion 510 of the curved semiconductor substrate 560 is not limited to a circle in which the areas are all the same.
  • Two imaginary lines 620 perpendicular to one another and a line 620 in line 630 passing through the center of a predetermined cruciform plate 610 are determined to be virtual latitude 0 conductors, 630 may be determined to be a virtual hardness 0 conductor. Conversely, line 620 may be determined to be a virtual hardness 0 conductor, and line 630 may be determined to be a virtual latitude 0 conductor. In this embodiment, for illustration purposes, line 620 is determined to be a virtual latitude 0 conductor, and line 630 is determined to be a virtual conductor 0 conductor.
  • the center image pickup device 640 may be disposed at the center of the predetermined cruciform plate 610.
  • the center of the cruciform template 610 may be the point where the virtual latitude 0 conductor 620 and the virtual hardness 0 conductor 630 intersect.
  • the center image pickup element 640 disposed at the center of the cruciform pattern 610 may be disposed at the center of the concave portion 510 of the curved semiconductor substrate 560.
  • the distance between two points on the concave surface may represent a curved distance connecting two points of the concave surface.
  • the distance between two points on the concave surface may be the length of the shortest curved line connecting two points on the concave surface.
  • an area surrounded by three or more points may be an area surrounded by a curve of the shortest distance connecting three or more points to each adjacent vertex.
  • the imaging elements may be disposed at regular intervals along the virtual latitude zero conductor 620.
  • the imaging device may be disposed at a diameter interval of the imaging device along a virtual latitude zero conductor 620.
  • the distance between two adjacent imaginary latitudinal lines of the imaginary latitudinal line of the cross-shaped template 610 may be predetermined. According to one embodiment, the distance between two adjacent hypotenuse lines may be constant. For example, the distance between two adjacent virtual top conductors may be equal to the diameter of the imaging element. Each of the imaginary latitudinal lines of the multiple of the cruciform template 610 may be perpendicular to the virtual longitudinal 0 conductor 630.
  • each imaging element may be disposed at a point where the virtual hardness zero conductor 630 intersects each of the plurality of virtual upper conductors.
  • the imaging elements can be arranged at regular intervals along the virtual hardness 0 lead line 630.
  • the imaging elements may be disposed at diametral intervals of the imaging element along the virtual hardness 0 lead 630.
  • the imaginary latitude 0 conductor 620 and virtual imaginary hardness 0 conductor 620 are arranged such that the center of the cruciform template 610 coincides with the center of the recess 510 of the curved semiconductor substrate 560, (Not shown).
  • the imaging device may be placed along a curve, e.g., arc, on the surface of the recess 510 up to the periphery of the recess 510 along the virtual latitude 0 lead 620 and the virtual longitudinal 0 lead 630 .
  • each virtual hypotonic line e.g., a virtual hypotonic line 650, other than the virtual latitude zero conductor 620 may be connected to another imaging element (not shown) May be arranged along the curve on the surface of the concave portion 510 of the curved semiconductor substrate.
  • the imaging elements may be disposed at regular intervals along each virtual top conductor.
  • the imaging elements may be arranged at diametrical intervals of the imaging elements along each of the top conductors.
  • the imaging element disposed along each of the upper conductive lines on the cruciform template 610 may be arranged along the curve on the surface of the concave portion 510 up to the peripheral portion of the concave portion 510 of the curved semiconductor substrate.
  • the latitude of the virtual upper conductor 620 passing through the center of the concave portion 510 is determined as latitude 0 degrees, for convenience of coordinate designation corresponding to the position of the image pickup element, (620) may be determined to be a latitude other than 0 degree latitude.
  • the hardness of the virtual hardness line 630 passing through the center of the concave portion can be determined to be a hardness other than 0 degree hardness.
  • FIG. 7 is a diagram showing a pattern in which an image sensing element is disposed in a recess 510 of a curved semiconductor substrate 560 according to an embodiment.
  • the imaging device may be disposed at a constant density in a center region, which is a predetermined region with respect to the center of the concave portion 510, according to one embodiment.
  • a center region which is a predetermined region with respect to the center of the concave portion 510
  • the effective imaging region may be a central region in which the imaging elements are arranged at an even density. Therefore, when considering that the effective imaging region is generally the center region, an image having a constant resolution without distortion can be obtained.
  • a stable arrangement pattern in the virtual upper conductive line direction can be maintained.
  • the direction of the virtual latitude line is the lateral direction
  • a stable arrangement pattern in the longitudinal direction can be maintained.
  • FIG. 8 is a diagram for explaining the arrangement of a row address signal line and a column address signal line according to an embodiment.
  • a row address signal line for example, a row address signal line 830, which connects the imaging elements arranged along the same virtual top conductor, according to one embodiment, may be disposed.
  • a row address signal line for example, a row address signal line 830, may be connected to the row address decoder 810 for specifying a row address.
  • a column address signal line 840 may be disposed.
  • a column address signal line, for example, a column address signal line 840, may be connected to the column address decoder 820 for specifying the column address.
  • FIG. 9 is a flow diagram illustrating a process for storing dimmer data in a memory using a curved semiconductor substrate image sensor 100, according to one embodiment.
  • the row address and column address for each imaging element may be determined.
  • the row address for each imaging element may be determined, according to one embodiment. For example, for an imaging device disposed along a virtual latitude line with the highest latitude, the row address may be determined to be zero. For an imaging device disposed along a r + 1 th latitude virtual top conductor, according to one embodiment, the row address may be determined as r. If the number of virtual latitude lines is R + 1, the row address for the imaging device disposed along the virtual latitude line with the lowest latitude may be determined as R. [
  • the column address for each imaging element can be determined.
  • the column address of the imaging element disposed at the rightmost one of the imaging elements arranged along the respective virtual imaginary line can be determined to be zero.
  • the column address for the imaging device disposed at the n-th from the rightmost along each virtual top conductor may be determined to be n-1.
  • the number of image pickup elements arranged along the respective virtual top conductors may be different from each other. When the number of the image pickup elements arranged along the r th largest virtual top conductor is C [r] + 1, the column address of the image pickup element disposed at the leftmost of the image pickup elements arranged along the virtual top conductor is C [r].
  • the row address r may be set to an initial value.
  • the row address r may be initialized to zero, but is not limited thereto.
  • column address c may be set to an initial value.
  • column address c may be initialized to zero, but is not limited thereto.
  • the amount of charge accumulated in the photodiodes of the imaging device corresponding to the current row address r and the current column address c may be captured.
  • the photodetection data determined based on the amount of charge captured may be stored in a memory array at locations corresponding to row address r and column address c.
  • column address c may be updated with the next column address.
  • column address c may be increased by one.
  • the photosensitive data storing process can be sequentially performed from the imaging element located at the rightmost position to the imaging element located at the leftmost position. However, it is not limited thereto.
  • the updated column address c is greater than the column address of the last of the imaging elements having the current row address r.
  • the row of the last image pickup element among the image pickup elements having the current row address r The address may be C [r].
  • the imaging element located at the leftmost along the virtual top conductor among the imaging elements having the row address (r) may be determined as the last imaging element, and the column address may be determined as C [r].
  • control may return to block 930. For example, if it is determined that the updated column address c is not greater than the column address (C [r]) of the last one of the imaging elements having the current row address r, It can be judged that the image pickup element among the image pickup elements to be subjected to the photosensitive data storing process remains.
  • processing may proceed to block 770.
  • the updated column address c is greater than the column address C [r] of the last one of the image pickup devices having the current row address r, It can be judged that the photosensitive data storing process has been performed for all the imaging elements.
  • the row address r may be updated to the next row address.
  • the row address r may be increased by 1, but is not limited thereto.
  • the updated row address r is greater than the last row address. As described above, if the number of virtual latitude lines is R + 1, the last row address may be R. [
  • the process may return to block 920 and continue. For example, if it is determined that the updated row address r is not greater than the last row address R, the storage process of the photosensitive data may proceed to the imaging elements corresponding to the updated row address r.
  • the process of storing the dimming data for the current frame may be terminated. For example, if it is determined that the updated row address (r) is greater than the last row address (R), it can be determined that the photosensitive data storage process has been performed for all imaging elements in the current frame.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

Un dispositif pour former un motif de circuit sur un substrat semi-conducteur comprenant une partie concave, selon un mode de réalisation de la présente invention, comprend : un dispositif de source de lumière; un masque comprenant au moins un trou foré, à travers laquelle passe la lumière émise par le dispositif de source de lumière; et une lentille configurée pour focaliser la lumière qui a traversé le masque de telle sorte que la lumière est émise vers la partie concave du substrat semi-conducteur, le masque comprenant le motif de circuit comprenant l'au moins un trou foré, et le masque peut être configuré de telle sorte que, lorsque la lumière est émise vers la partie concave du substrat semi-conducteur, le motif de circuit peut être exposé à la partie concave.
PCT/KR2017/011475 2016-10-19 2017-10-17 Dispositif de production de semi-conducteur incurvé et capteur d'image utilisant un semi-conducteur incurvé WO2018074820A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20160135922 2016-10-19
KR10-2016-0135922 2016-10-19
KR1020170095708A KR102025762B1 (ko) 2016-10-19 2017-07-27 곡면형 반도체 생산 장치 및 곡면형 반도체를 이용한 이미지 센서
KR10-2017-0095708 2017-07-27

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WO2018074820A1 true WO2018074820A1 (fr) 2018-04-26

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114908316A (zh) * 2022-04-28 2022-08-16 昆山丘钛微电子科技股份有限公司 一种镜片、摄像头模组、镜片镀膜方法和掩膜板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60240125A (ja) * 1984-05-15 1985-11-29 Fujitsu Ltd 露光方法
US6245630B1 (en) * 1996-12-04 2001-06-12 Ball Semiconductor, Inc. Spherical shaped semiconductor integrated circuit
US20040032667A1 (en) * 2000-04-03 2004-02-19 Michael Gale Technique for microstructuring replication mold
US20100264502A1 (en) * 2007-10-09 2010-10-21 US Gov't Represented by the Secretary of the Navy Office of Naval Research (ONR/NRL) Code OOCCIP Methods and systems of curved radiation detector fabrication
US20130022764A1 (en) * 2011-07-19 2013-01-24 Hon Hai Precision Industry Co., Ltd. Housing with patterns and method for forming patterns on the housing

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60240125A (ja) * 1984-05-15 1985-11-29 Fujitsu Ltd 露光方法
US6245630B1 (en) * 1996-12-04 2001-06-12 Ball Semiconductor, Inc. Spherical shaped semiconductor integrated circuit
US20040032667A1 (en) * 2000-04-03 2004-02-19 Michael Gale Technique for microstructuring replication mold
US20100264502A1 (en) * 2007-10-09 2010-10-21 US Gov't Represented by the Secretary of the Navy Office of Naval Research (ONR/NRL) Code OOCCIP Methods and systems of curved radiation detector fabrication
US20130022764A1 (en) * 2011-07-19 2013-01-24 Hon Hai Precision Industry Co., Ltd. Housing with patterns and method for forming patterns on the housing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114908316A (zh) * 2022-04-28 2022-08-16 昆山丘钛微电子科技股份有限公司 一种镜片、摄像头模组、镜片镀膜方法和掩膜板
CN114908316B (zh) * 2022-04-28 2023-07-21 昆山丘钛微电子科技股份有限公司 一种镜片、摄像头模组、镜片镀膜方法和掩膜板

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