WO2018073874A1 - Direct-current power supply device, motor drive device, fan, compressor, and air conditioner - Google Patents

Direct-current power supply device, motor drive device, fan, compressor, and air conditioner Download PDF

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Publication number
WO2018073874A1
WO2018073874A1 PCT/JP2016/080746 JP2016080746W WO2018073874A1 WO 2018073874 A1 WO2018073874 A1 WO 2018073874A1 JP 2016080746 W JP2016080746 W JP 2016080746W WO 2018073874 A1 WO2018073874 A1 WO 2018073874A1
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Prior art keywords
switching element
power supply
arm
current
voltage
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PCT/JP2016/080746
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French (fr)
Japanese (ja)
Inventor
啓介 植村
成雄 梅原
崇 山川
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三菱電機株式会社
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Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2016/080746 priority Critical patent/WO2018073874A1/en
Priority to JP2018545731A priority patent/JP6783867B2/en
Publication of WO2018073874A1 publication Critical patent/WO2018073874A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present invention converts a DC power supplied from an AC power source into a DC power and supplies the load to a load, a motor driving device including the DC power device, a blower and a compressor including the motor driving device,
  • the present invention relates to an air conditioner including the blower or the compressor.
  • Patent Document 1 since the control system is configured using a logic circuit, there is a problem that the board area and the volume increase with the increase in the number of parts, and the apparatus becomes larger.
  • the present invention has been made in view of the above, and by configuring a control system that does not use a logic circuit, the number of parts can be reduced, and the DC power supply device, motor drive device, blower, An object is to provide a compressor and an air conditioner.
  • the present invention is a DC power supply device that converts an AC voltage applied from an AC power supply into a DC voltage and applies it to a load.
  • the DC power supply device includes a first arm in which a first switching element and a second switching element are connected in series, and a second arm in which a third switching element and a fourth switching element are connected in series. And having a bridge circuit in which a first arm and a second arm are connected in parallel.
  • the DC power supply device includes a reactor provided between the AC power supply and the bridge circuit, a current detector that detects a current flowing between the AC power supply and the bridge circuit via the reactor, and a first detector that detects an output voltage of the AC power supply.
  • the DC power supply device includes a first switching element, a second switching element, a third switching element, and a fourth switching element based on detection values of the first voltage detector, the current detector, and the second voltage detector. And an arithmetic unit for generating a driving pulse for the switching element. When generating the drive pulse, the arithmetic unit independently generates the drive pulse for the first arm and the drive pulse for the second arm.
  • the present invention since a control system that does not use a logic circuit can be configured, the number of parts can be reduced and the apparatus can be miniaturized.
  • FIG. Diagram showing current path when charging smoothing capacitor (when power supply voltage is positive) A diagram showing the current path when charging the smoothing capacitor (when the power supply voltage is negative) Diagram showing short circuit path of AC power supply via reactor (when power supply voltage is positive) Diagram showing short-circuit path of AC power supply via reactor (when power supply voltage is negative)
  • FIG. Diagram showing current path when charging smoothing capacitor (when power supply voltage is positive) A diagram showing the current path when charging the smoothing capacitor (when the power supply voltage is negative) Diagram showing short circuit path of AC power supply via reactor (when power supply voltage is positive)
  • Diagram showing short-circuit path of AC power supply via reactor (when power supply voltage is negative) The figure which shows the structural example of the control part in the DC power supply device of Embodiment 1.
  • the figure which shows the operation example of a power supply voltage phase calculation part Block diagram showing a configuration example of the first arm pulse generator Diagram for explaining a method of generating a reference PWM signal
  • the figure which serves for explanation of the dead time set in order to prevent the short circuit of the switching element Flow chart showing the operation of the first arm pulse generator
  • Flow chart showing the operation of the second arm pulse generator The figure which shows an example of the operation waveform when a bridge circuit is controlled by the control part
  • FIG. 11 is a diagram for explaining the difference between the operation according to the control flow of FIG. 11 and the operation according to the control flow of FIG. Diagram showing current-loss characteristics of a typical switching element
  • FIG. 35 Diagram for explaining the operation of the power supply voltage polarity detector
  • movement waveform when it controls by the control method demonstrated using FIG. The figure which shows the structural example of the DC power supply device which concerns on Embodiment 2.
  • FIG. 33 The figure which shows the other structural example different from FIG. 33 of the DC power supply device which concerns on Embodiment 2.
  • FIG. The figure which shows the example which applied the direct-current power supply device shown in Embodiment 1 to the motor drive device
  • FIG. 1 is a diagram illustrating a configuration example of a DC power supply device according to the first embodiment.
  • the DC power supply device 100 according to Embodiment 1 is a power supply device having an AC / DC conversion function of converting an AC voltage applied from the AC power supply 1 into a DC voltage and applying the DC voltage to a load 50.
  • a DC power supply device 100 according to Embodiment 1 includes an AC power supply 1, a reactor 2, a bridge circuit 3, a smoothing capacitor 4, a first voltage detector 5 that is power supply voltage detection means, A current detector 6 serving as a detection unit, a second voltage detector 7 serving as a bus voltage detection unit, and a control unit 10 serving as a control unit are provided.
  • the bridge circuit 3 includes a first arm 31 and a second arm 32.
  • the first arm 31 and the second arm 32 are connected in parallel.
  • two switching elements are connected in series. Specifically, in the first arm 31, the first switching element 311 and the second switching element 312 are connected in series, and in the second arm 32, the third switching element 321 and the fourth switching element are connected. 322 are connected in series.
  • MOSFETs Metal-Oxide-Semiconductor Field-Effect Transistors
  • a MOSFET is a switching element that allows a current to flow bidirectionally between a drain and a source, but allows a current to flow bidirectionally between a first terminal corresponding to the drain and a second terminal corresponding to the source. Any switching element can be used as long as it can be switched.
  • the first switching element 311, the second switching element 312, the third switching element 321, and the fourth switching element 322 may be made of silicon (Si), silicon carbide (SiC), or gallium nitride (GaN). ) Is exemplified, but any material may be used and the material is not limited to these.
  • the reactor 2 is provided between the AC power source 1 and the bridge circuit 3.
  • One end of the AC power supply 1 is connected to a connection point between the first switching element 311 and the second switching element 312 in the first arm 31 via the reactor 2.
  • the other end of the AC power source 1 is connected to a connection point between the third switching element 321 and the fourth switching element 322.
  • the output voltage of the bridge circuit 3 is applied across the smoothing capacitor 4.
  • the smoothing capacitor 4 smoothes the output voltage of the bridge circuit 3.
  • the voltage smoothed by the smoothing capacitor 4 is referred to as “bus voltage”.
  • the control unit 10 generates a driving pulse for driving each switching element of the bridge circuit 3 based on detection values of the first voltage detector 5, the current detector 6, and the second voltage detector 7.
  • the first voltage detector 5 detects the power supply voltage Vs that is the output voltage of the AC power supply 1 and outputs it to the control unit 10.
  • the current detector 6 detects the power source current Is flowing between the AC power source 1 and the bridge circuit 3 via the reactor 2 and outputs the detected power source current Is to the control unit 10.
  • the second voltage detector 7 detects the bus voltage Vdc, which is also the voltage applied to the load 50, and outputs it to the control unit 10.
  • FIG. 2 and FIG. 3 are diagram showing a current path when charging the smoothing capacitor 4.
  • 2 is when the polarity of the power supply voltage Vs is positive, that is, when the power supply voltage Vs is positive
  • FIG. 3 is when the polarity of the power supply voltage Vs is negative, that is, when the power supply voltage Vs is negative.
  • 4 and 5 are diagrams illustrating a short-circuit path of the AC power supply 1 through the reactor 2 when both ends of the AC power supply 1 are short-circuited through the reactor 2 without charging the smoothing capacitor 4. is there. The difference between the two is when the power supply voltage Vs is positive, and FIG.
  • FIGS. 5 is when the power supply voltage Vs is negative. As shown in FIGS. 2 and 4, when the upper terminal of the AC power supply 1 is a positive potential, the polarity of the power supply voltage Vs is defined as positive, and as shown in FIGS. 3 and 5, the AC power supply When the upper terminal in 1 is a negative potential, the polarity of the power supply voltage Vs is defined as negative.
  • the short circuit path can be formed by the path 312, the fourth switching element 322, and the AC power supply 1.
  • the first switching element 311 and the third switching element 321 are turned on when the power supply voltage polarity is negative, as shown in FIG. 5, the AC power supply 1, the third switching element 321, the first switching element 321
  • the switching element 311, the reactor 2, and the AC power source 1 can form a short circuit path.
  • Forming a short circuit path is called “power supply short circuit”
  • an operation mode for controlling power supply short circuit is called “power supply short circuit mode”.
  • the power supply current Is and the bus voltage Vdc can be controlled by switching control of these operation modes by switching control of the control unit 10.
  • FIG. 6 is a diagram illustrating a configuration example of the control unit 10 in the DC power supply device of the first embodiment.
  • the control unit 10 includes a power supply current command value control unit 21, an on-duty control unit 22, a power supply voltage phase calculation unit 23, a first arm pulse generation unit 24, and a second arm pulse generation unit 25.
  • the control part 10 is comprised using the calculating device which is a calculating means.
  • An example of the arithmetic unit is a microcomputer, but other than this, a processor or processing device called CPU (Central Processing Unit), microprocessor, or DSP (Digital Signal Processor) may be used. .
  • CPU Central Processing Unit
  • microprocessor or DSP (Digital Signal Processor)
  • the power supply current command value control unit 21 calculates a power supply current effective value command value Is_rms * from the bus voltage Vdc that is an output signal of the second voltage detector 7 and a preset bus voltage command value Vdc *. .
  • the calculation of the power supply current effective value command value Is_rms * is realized by proportional-integral control of the difference between the bus voltage Vdc and the bus voltage command value Vdc *.
  • the proportional-integral control is an example, and proportional control or proportional-differential-integral control may be employed instead of proportional-integral control.
  • the power supply voltage phase calculation unit 23 receives the power supply voltage Vs detected by the first voltage detector 5, generates a power supply voltage phase estimated value ⁇ s, and outputs a sine value sin ⁇ s of the power supply voltage phase estimated value ⁇ s. .
  • the on-duty control unit 22 is calculated from the power supply current effective value command value Is_rms * output from the power supply current command value control unit 21 and the sine value sin ⁇ s of the power supply voltage phase estimation value ⁇ s output from the power supply voltage phase calculation unit 23.
  • the reference on-duty DTs of the first switching element 311 and the second switching element 312 is calculated from the power supply current instantaneous value command value Is * and the power supply current Is detected by the current detector 6.
  • the calculation of the reference on-duty DTs is performed by proportional-integral control of the difference between the power supply current effective value finger command value Is_rms * and the power supply current Is.
  • the control of the on-duty control unit 22 may employ proportional control or proportional differential integral control instead of proportional integral control.
  • FIG. 7 is a diagram illustrating an operation example of the power supply voltage phase calculation unit 23.
  • FIG. 7 shows waveforms under ideal conditions that do not take into account the delay due to control or the delay due to detection processing.
  • the power supply voltage phase estimation value ⁇ s is 360 ° at the point where the power supply voltage Vs switches from negative polarity to positive polarity.
  • the power supply voltage phase calculation unit 23 detects a point where the power supply voltage Vs switches from negative polarity to positive polarity, and resets the power supply voltage phase estimation value ⁇ s at this switching point, that is, returns to zero.
  • a circuit for detecting a zero cross of the power supply voltage Vs may be added to FIG. In any case, any method may be used as long as the phase of the power supply voltage Vs can be detected.
  • FIG. 8 is a block diagram illustrating a configuration example of the first arm pulse generation unit 24.
  • FIG. 9 is a diagram for explaining a method of generating the reference PWM signal Scom.
  • FIG. 10 is a diagram for explaining a dead time set to prevent a short circuit of the switching element.
  • the first arm pulse generation unit 24 includes a carrier generation unit 241, a reference PWM signal generation unit 242, a dead time generation unit 243, and a pulse selector unit 244.
  • the carrier generation unit 241 has a function of generating a carrier (carrier frequency) Cs for generating the reference PWM signal Scom.
  • the reference PWM signal generator 242 generates a reference PWM signal Scom by comparing the magnitude relationship between the reference on-duty DTs and the carrier Cs.
  • the reference PWM signal Scom is generated by setting Scom as an ON signal when DTs> Cs, and by setting Scom as an OFF signal when DTs ⁇ Cs.
  • the ON signal has a higher level than the OFF signal and high active, but the ON signal may have a lower level than the OFF signal and low active.
  • the dead time generation unit 243 functions to generate a dead time td for the reference PWM signal Scom and the inverted signal Scom ′ obtained by inverting the reference PWM signal Scom. Based on the reference PWM signal Scom, the ON state or OFF state of the first switching element 311 and the ON state or OFF state of the second switching element 312 are controlled. In addition, based on the reference PWM signal Scom and the inverted signal Scom ′, the first switching element 311 and the second switching element 312 perform operations that are inverted from each other.
  • the switching element generally has a delay time in the transition from the ON state to the OFF state and in the transition from the OFF state to the ON state.
  • the dead time td is necessary to prevent such a short-circuit phenomenon.
  • FIG. 10 shows an example of a signal waveform considering the dead time td in the case of high active.
  • S1 is the same signal as the reference PWM signal Scom.
  • S2 is an inverted signal of S1, and is set to be short on both sides of the ON period by the dead time td.
  • the period of the dead time td is a period in which both the first switching element 311 and the second switching element 312 are OFF.
  • S1 is referred to as a “reference PWM first signal”
  • S2 is referred to as a “reference PWM second signal”.
  • a known method other than that shown in FIG. 10 is also known, and there is no problem even if any method is used.
  • the pulse selector unit 244 functions to select which of the first switching element 311 and the second switching element 312 each of the reference PWM first signal S1 and the reference PWM second signal S2 is transmitted to.
  • FIG. 11 is a flowchart showing the operation of the pulse selector unit 244.
  • step ST11, Yes when the power supply voltage Vs is positive (step ST11, Yes), the pulse selector unit 244 outputs the reference PWM first signal S1 as a drive pulse to the second switching element 312 (step ST12).
  • the notation “S1 ⁇ pulse — 312” means this control.
  • the pulse selector unit 244 When the power supply voltage Vs is positive (step ST11, Yes), the pulse selector unit 244 outputs the reference PWM second signal S2 as a drive pulse to the first switching element 311 (step ST12).
  • the notation “S2 ⁇ pulse — 311” means this control.
  • the pulse selector unit 244 outputs the reference PWM first signal S1 as a drive pulse to the first switching element 311 (step ST13).
  • the notation “S1 ⁇ pulse_311” means this control. If the power supply voltage Vs is negative or zero (step ST11, No), the reference PWM second signal S2 is output as a drive pulse to the second switching element 312 (step ST13).
  • the notation “S2 ⁇ pulse — 312” means this control.
  • the output destinations of the reference PWM first signal S1 and the reference PWM second signal S2 are switched depending on the polarity of the power supply voltage Vs, but can be switched based on the power supply current Is. The operation in this case will be described later.
  • step ST11 the case where the power supply voltage Vs is zero is determined as “No”, but may be determined as “Yes”. That is, the case where the power supply voltage Vs is zero may be determined as “Yes” or “No”.
  • the first arm pulse generation unit 24 can generate the drive pulse pulse_311 to the first switching element 311 and the drive pulse pulse_312 to the second switching element 312.
  • FIG. 12 is a flowchart showing the operation of the second arm pulse generator 25.
  • the second arm pulse generating unit 25 uses the drive pulse pulse_321 to the third switching element 321 as an OFF level signal, and the fourth switching element.
  • the drive pulse pulse_322 to 322 is set to an ON level signal (step ST22).
  • the drive pulse pulse_321 of the third switching element 321 is an ON level signal
  • the drive pulse pulse_322 to the fourth switching element 322 is an OFF level signal (step ST23). ).
  • step ST21 the case where the power supply voltage Vs is zero is determined as “No”, but may be determined as “Yes”. That is, the case where the power supply voltage Vs is zero may be determined as “Yes” or “No”.
  • the first switching element 311, the second switching element 312, the third switching element 321, and the fourth switching element 322 are operated by the control according to the flow of FIG. 11 and FIG. 12 described above, and the bus voltage Vdc And the power supply current Is are controlled.
  • FIG. 13 is a diagram illustrating an example of an operation waveform when the bridge circuit 3 is controlled by the control unit 10.
  • the horizontal axis represents time
  • the vertical axis represents the power supply voltage Vs, power supply current Is, carrier and reference on-duty, and drive pulses pulse_311, pulse_312, pulse_321, and pulse_322 from the upper stage side.
  • the power supply current Is repeats small fluctuations every carrier cycle, but the peak value or average value of the waveform repeating the small fluctuations is controlled in a sine wave form.
  • the peak value or average value of the waveform in the power supply current Is being controlled in a sine wave shape means that the harmonic component of the power supply current Is is suppressed.
  • the pulse selector unit 244 of the first arm pulse generation unit 24 outputs the reference PWM first signal S1 to the drive pulse pulse_311 to the first switching element 311 according to the polarity of the power supply voltage Vs. Or the output of the drive pulse pulse_312 to the second switching element 312 and the reference PWM second signal S2 is output to the drive pulse pulse_311 to the first switching element 311 or to the second switching element 312. The output of the drive pulse pulse_312 is switched. Similarly, the second arm pulse generator 25 selects which of the third switching element 321 and the fourth switching element 322 is controlled to be ON according to the polarity of the power supply voltage Vs.
  • FIG. 14 is a diagram illustrating a waveform example when the power supply current Is includes many ripple components.
  • the enlarged waveform of the A part in the waveform of the power supply current Is shown on the lower side is shown on the upper side.
  • the vibration component seen in the waveform of the A part is a frequency component depending on the switching frequency of the first switching element 311 and the second switching element 312.
  • a short circuit path can be formed by turning on the second switching element 312. In the case of this switching pattern, as shown in FIG. 15, a short circuit path may be formed even in a state where the polarity of the power supply voltage Vs and the polarity of the power supply current Is are reversed. Further, when the first switching element 311 and the fourth switching element 322 are turned on to form the charging path of the smoothing capacitor 4 as shown in FIG.
  • a short circuit path is formed as shown in FIG. May end up.
  • a discharge path from the smoothing capacitor 4 to the reactor 2 may be formed as indicated by a one-dot chain line.
  • a discharge current flows toward the AC power source 1 and the power source current Is further increases.
  • the switching pattern of FIG. 15 and the switching pattern of FIG. 16 are repeated, so that the power supply short circuit and the discharge of the charge charge are repeatedly performed, and the power supply current Is rapidly grows. The component will increase.
  • FIG. 17 is a flowchart for implementing this technique.
  • step ST31, Yes when the power supply voltage Vs is positive (step ST31, Yes) and the power supply current Is is positive (step ST32, Yes), the pulse selector unit 244 performs the process ⁇ shown as step ST12 in FIG. Is executed (step ST34).
  • step ST31, Yes When the power supply voltage Vs is positive (step ST31, Yes) and the power supply current Is is negative or zero (step ST32, No), the pulse selector unit 244 performs the process ⁇ shown as step ST13 in FIG. Is executed (step ST35).
  • step ST33, Yes when the power supply voltage Vs is negative or zero (step ST31, No) and the power supply current Is is negative (step ST33, Yes), the pulse selector unit 244 executes the process ⁇ (step ST36).
  • step ST37 When the power supply voltage Vs is negative or zero (step ST31, No) and the power supply current Is is positive or zero (step ST33, No), the pulse selector unit 244 executes the process ⁇ (step ST37).
  • the first process ⁇ is executed, and when the polarity of the power supply voltage Vs and the power supply current Is is both negative. Executes the second process, process ⁇ .
  • the process ⁇ is executed if the power supply current Is is positive, and the process ⁇ is executed if the power supply current Is is negative. Thereby, it can prevent that the path
  • FIG. 18 is a diagram for explaining the difference between the operation according to the control flow of FIG. 11 and the operation according to the control flow of FIG.
  • the waveform of the power supply voltage Vs is schematically shown in the upper stage portion
  • the waveform of the power supply current Is is schematically shown in the middle stage portion.
  • the lower part shows the difference between the operation according to the control flow of FIG. 11 and the operation according to the control flow of FIG.
  • the horizontal axis of FIG. 18 represents time, but the waveform of the power supply voltage Vs is approximated as linear in order to represent a waveform in a minute time.
  • a phase difference of ⁇ t is provided between the power supply voltage Vs and the center line in the waveform of the power supply current Is.
  • the phase difference ⁇ t is a relationship in which the power supply current Is is delayed with respect to the power supply voltage Vs.
  • the process ⁇ is continued after the polarity of the power supply voltage Vs turns positive.
  • the portion where the power source current Is is negative has a switching pattern assuming that the power source current Is is positive, and therefore the power source short-circuit mode continues.
  • the process ⁇ or the process ⁇ is appropriately selected according to not only the polarity of the power supply voltage Vs but also the polarity of the power supply current Is. That is, in the case of the operation according to the control flow of FIG. 17, the power supply short-circuit mode does not continue and distortion of the power supply current Is can be suppressed.
  • FIG. 19 is a diagram schematically showing current-loss characteristics in a general switching element.
  • FIG. 19 shows the loss characteristic of the parasitic diode and the loss characteristic when the switching element is on.
  • the current value when the loss value in the loss characteristic of the parasitic diode and the loss value in the loss characteristic of the switching element are reversed is defined as the first current value.
  • the loss characteristic of the switching element is smaller, and this region is referred to as a “low current region A”.
  • the loss characteristic of the parasitic diode is smaller, and this region is referred to as a “high current region B”.
  • the first current value is held inside the calculator, or held in a memory that can be read by the calculator.
  • the parasitic diode of the switching element has a large loss in the low current region A, and it is known that the loss when the switching element is on is smaller. Therefore, in the case of a MOSFET that is one of the switching elements, a synchronous rectification technique using switching characteristics may be used.
  • the switching characteristic referred to here is a characteristic that is turned on in both the direction from the drain to the source and the direction from the source to the drain when an ON command is given to the gate of the MOSFET, that is, the switching element.
  • the parasitic diode in the low current region A shown in FIG. 19, the parasitic diode is not used, and the current is made to flow through the switching element, so that higher efficiency can be achieved than using the parasitic diode.
  • FIG. 20 is a schematic cross-sectional view showing a schematic structure of a MOSFET.
  • FIG. 20 illustrates an n-type MOSFET.
  • a p-type semiconductor substrate is used as shown in FIG.
  • a source electrode (S), a drain electrode (D), and a gate electrode (G) are formed on a p-type semiconductor substrate.
  • a high-concentration impurity is ion-implanted in a portion in contact with the source electrode (S) and the drain electrode (D) to form an n-type region.
  • an oxide insulating film is formed between a portion where the n-type region is not formed and the gate electrode (G). That is, the oxide insulating film is interposed between the gate electrode (G) and the p-type region in the semiconductor substrate.
  • n-type portion becomes a current path and is called a channel (in the example of FIG. 20, an n-type channel).
  • the MOSFET When performing synchronous rectification, the MOSFET is controlled to be ON, so that a larger current flows in the channel side than in the parasitic diode side.
  • FIG. 21 is a diagram illustrating a current path when the fourth switching element 322 is not controlled to be turned ON when the smoothing capacitor 4 is charged.
  • FIG. 22 is a diagram illustrating the fourth switching element when the smoothing capacitor 4 is charged. It is a figure which shows the electric current path
  • the charging current flows through the parasitic diode side of the fourth switching element 322.
  • the fourth switching element 322 is controlled to be ON, the charging current flows through the channel side of the fourth switching element 322 as shown in FIG. Except for initial charging, the charging current does not become very large. For this reason, the loss in FIG. 22 in which the fourth switching element 322 is controlled to be ON and current is supplied to the channel side is lower than that in FIG. 21 in which current is supplied to the parasitic diode.
  • FIG. 23 is a diagram illustrating a current path when the fourth switching element 322 is not controlled to be ON in the power supply short-circuit operation mode
  • FIG. 24 is a diagram illustrating the fourth switching element in the power supply short-circuit operation mode. It is a figure which shows the electric current path
  • FIG. 25 is a diagram illustrating a current path when the third switching element 321 is not controlled to be ON when charging the smoothing capacitor 4.
  • FIG. 26 is a diagram illustrating the third switching element when charging the smoothing capacitor 4. It is a figure which shows the electric current path when 321 is controlled to ON.
  • the charging current flows through the parasitic diode side of the third switching element 321.
  • the third switching element 321 is controlled to be ON, the charging current flows through the channel side of the third switching element 321 as shown in FIG.
  • the charging current does not become very large except for the initial charging. For this reason, the loss in FIG. 26 in which the third switching element 321 is controlled to be ON and current is supplied to the channel side is lower than that in FIG. 25 in which current is supplied to the parasitic diode.
  • FIG. 27 is a diagram illustrating a current path when the third switching element 321 is not controlled to be ON in the power supply short-circuit operation mode
  • FIG. 28 is a diagram illustrating the third switching element in the power-supply short-circuit operation mode. It is a figure which shows the electric current path when 321 is controlled to ON. 27 and 28, the polarity of the power supply voltage is negative.
  • FIG. 28 In which the third switching element 321 is controlled to be ON and current is supplied to the channel side has a lower loss than that in FIG. 27 in which current is supplied to the parasitic diode.
  • the loss reduction can be achieved by the synchronous rectification technology as described above.
  • This synchronous rectification technique can be realized by the function of the control unit 10 described so far.
  • the loss of the parasitic diode is smaller than the loss characteristic when the switching element is ON. Therefore, in the case of the high current region B, the loss is reduced when the switching operation of the second arm 32 is stopped. For this reason, it is a preferred embodiment to switch the control method of the switching control according to the magnitude of the current flowing through the third switching element 321 and the fourth switching element 322 of the second arm 32. Note that the current value flowing through the third switching element 321 and the fourth switching element 322 can be calculated by the calculator of the control unit 10 if the detection value of the current detector 6 is used.
  • control unit 10 when the control unit 10 is configured using hardware, there is a risk of malfunction due to the influence of noise by other hardware. For example, consider a case where a switching element to be turned on during synchronous rectification is turned off due to the influence of noise. In this case, as described above, the loss in the switching element increases, and the amount of heat generated in the switching element increases. Further, when the ON state and OFF state of the switching element are continuously changed, not only the conduction loss of the switching element but also the switching loss is generated, so that the amount of heat generated in the switching element further increases. The risk of destruction of the switching element increases due to an increase in the amount of heat generated by the switching element. On the other hand, when the control system is implemented by software using an arithmetic unit, malfunctions due to noise are very rare. For this reason, configuring the control system using an arithmetic unit has an effect of reducing the risk of destruction of the switching element.
  • the first arm 31 contributes to boosting the charging voltage of the smoothing capacitor 4 and suppressing harmonic components of the power supply current Is. Further, the second arm 32 contributes to a reduction in loss due to synchronous rectification.
  • the first arm 31 performs switching control with a period depending on the carrier frequency, whereas the second arm 32 depends on the period of the power supply voltage Vs or the power supply current Is, so that the switching control is performed around 50 to 60 Hz. Will be. Therefore, when the control is realized by the arithmetic unit, it is desirable that the control for the first arm 31 and the control for the second arm 32 use functions of independent arithmetic units, respectively.
  • FIG. 13 described above shows the waveforms of the power supply voltage Vs, the power supply current Is, the carrier, and the drive pulse to each switching element.
  • the control unit 10 is configured using an arithmetic unit
  • the control of the first switching element 311 and the second switching element 312 is implemented by a control system using a timer, and the third switching element 321 and the second switching element 312 are controlled.
  • the control of the fourth switching element 322 is implemented using a function different from the timer, such as a general-purpose output port or an external interrupt function. As a result, it is possible to use resources with few computing units, and it is possible to realize with a cheaper computing unit.
  • FIG. 29 is a diagram illustrating an example of a drive pulse waveform when the carrier cycle and the cycle of the power supply voltage Vs are not synchronized.
  • the power supply voltage Vs is represented by a linear approximation waveform in order to represent a waveform in a minute time.
  • the drive pulse pulse_311 to the first switching element 311 and the drive pulse pulse_312 to the second switching element 312 are generated based on the carrier, and also to the third switching element 321.
  • the drive pulse pulse_321 and the drive pulse pulse_322 to the fourth switching element 322 are also generated in synchronization with the carrier.
  • the update of the duty command value of the first arm 31 may be performed at a periodic timing depending on the carrier frequency (switching frequency) other than the carrier peak or the carrier valley. Can change.
  • FIG. 30 is a diagram showing a configuration in which an external interrupt function is added to the controller 10 of the DC power supply device shown in FIG.
  • independent generation functions for generating drive pulses to the first switching element 311 and the second switching element 312 and generating drive pulses to the third switching element 321 and the fourth switching element 322 are provided. It is an example configured by using.
  • a power supply voltage polarity detection unit 20 is provided between the first voltage detector 5 that detects the power supply voltage Vs and the control unit 10.
  • the power supply voltage polarity detection unit 20 detects the polarity of the power supply voltage Vs, generates a power supply voltage polarity signal pulse_Vs representing the detected polarity, and outputs it to the external interrupt port 10 a of the control unit 10.
  • FIG. 31 is a diagram for explaining the operation of the power supply voltage polarity detection unit 20.
  • the upper stage shows the waveform of the power supply voltage Vs
  • the middle stage shows the power supply voltage polarity signal pulse_Vs input to the external interrupt port 10a of the control unit 10
  • the lower stage shows the inside of the control unit 10.
  • the trigger signal of the control calculation used is shown.
  • the power supply voltage polarity signal pulse_Vs is at a high level
  • the power supply voltage polarity signal pulse_Vs is at a low level.
  • these signal polarities are merely examples, and may be reversed.
  • the power supply voltage polarity signal pulse_Vs is an external interrupt signal for the control unit 10 and may be in any signal format as long as it represents a change in the polarity of the power supply voltage Vs.
  • the control unit 10 generates a trigger signal in response to the edge of the power supply voltage polarity signal pulse_Vs. When the trigger signal is generated, the control unit 10 generates drive pulses for the third switching element 321 and the fourth switching element 322 of the second arm 32.
  • FIG. 32 is a diagram showing operation waveforms when the control method described with reference to FIG. 31 is used.
  • the upper stage shows the waveform of the power supply voltage Vs
  • the middle stage shows the waveform of the carrier
  • the lower stage shows the drive pulses pulse_311, pulse_312, pulse_321, pulse_322 to the four switching elements, and the power supply voltage.
  • the polarity signal pulse_Vs is shown.
  • the power supply voltage Vs is represented by a linear approximation waveform in order to represent a waveform in a minute time.
  • the drive pulse pulse_311 to the first switching element 311 and the drive pulse pulse_312 to the second switching element 312 are generated based on the carrier.
  • the drive pulse pulse_321 to the third switching element 321 and the drive pulse pulse_322 to the fourth switching element 322 are not synchronized with the carrier but are generated based on the power supply voltage polarity signal pulse_Vs. Accordingly, the driving states of the third switching element 321 and the fourth switching element 322 depend on frequencies other than the carrier (switching) frequency, and the drive pulse pulse_311 to the first switching element 311 and the second switching element It does not depend on the control state of 312. In the case of FIG.
  • the switching of the drive pulse pulse_322 to the third switching element 321 and the fourth switching element 322 is delayed by ⁇ t with respect to the zero cross of the power supply voltage Vs. In the case of FIG. There is no delay. The reason why the delay does not occur is that the control for the third switching element 321 and the fourth switching element 322 does not depend on the control for the first switching element 311 and the second switching element 312.
  • the external interrupt according to the power supply voltage polarity signal pulse_Vs is the highest priority processing in the arithmetic unit.
  • the first switching of the first arm 31 is performed.
  • a carrier wave interrupt for controlling the element 311 and the second switching element 312 can be set as the highest priority process. In any case, flexible handling can be performed by using an arithmetic unit.
  • the generation of drive pulses to the first switching element 311 and the second switching element 312 and the drive pulse to the third switching element 321 and the fourth switching element 322 are performed. Since the independent calculation function is used for each of the generations, it is possible to create an effect of improving controllability and an effect of reducing loss. Note that the control configuration described so far is merely an example, and any method may be used as long as there is independence of a calculation function with respect to generation of a drive pulse. Further, the update of the duty command value in the first arm is not a problem even when thinning is performed once every two carrier cycles.
  • FIG. 33 is a diagram illustrating a configuration example of a DC power supply device according to the second embodiment.
  • the first arm 31 configuring the bridge circuit 3 is configured by using one element pair including a pair of switching elements of the upper and lower arms, but the number of element pairs is plural. Also good.
  • the first arm 31 is configured using two element pairs. Specifically, the first arm 31 includes a first switching element 311 and a second switching element 312 connected in series, as well as a fifth switching element 313 and a sixth switching element 314 connected in series. Is provided. Further, the first switching element 311 and the fifth switching element 313 are connected in parallel, and the second switching element 312 and the sixth switching element 314 are connected in parallel.
  • the current flowing through the two switching elements is half that of one.
  • the loss of the switching element is reduced. Therefore, the loss generated in the first arm 31 is reduced, and the first arm 31 and the second arm in the bridge circuit 3 are reduced.
  • the bias of the loss between the first arm 31 and the second arm 32 can be reduced. As a result, the bias of the heat generation between the first arm 31 and the second arm 32 can be reduced.
  • each of the fifth switching element 313 and the sixth switching element 314 may include a plurality of switching elements connected in parallel.
  • the current flowing through one element pair is 1 / n, so that the loss in the first arm 31 can be further reduced. Note that it is not necessary to completely suppress the bias of loss for each arm, and the number of element pairs connected in parallel may be selected within a range in which the bias of loss is allowed.
  • FIG. 34 is a diagram illustrating another configuration example of the DC power supply device according to the second embodiment.
  • a first reactor 2a and a second reactor 2b are provided between the AC power source 1 and the first arm 31.
  • One end of the first reactor 2a is connected to one output end of the AC power source 1, and the other end is connected between a connection point between the first switching element 311 and the second switching element 312.
  • One end of the second reactor 2 b is connected to an output end on one side of the AC power supply 1, and the other end is connected to a connection point between the first switching element 311 and the second switching element 312.
  • the phase when turning on the first switching element 311 and the fifth switching element 313 connected in parallel is shifted by 180 °, and the parallel connection is performed.
  • the second switching element 312 and the sixth switching element 314 that have been turned on can be driven in an interleaved manner by controlling the phase when the second switching element 312 and the sixth switching element 314 are turned on by shifting 180 degrees.
  • Embodiment 3 FIG.
  • the DC power supply apparatus described in Embodiment 1 and Embodiment 2 can be used as an apparatus that converts DC power into AC power and supplies a DC voltage to an inverter that drives a motor.
  • FIG. 35 is a diagram showing an example in which the DC power supply device shown in the first embodiment is applied to a motor drive device.
  • inverter 50a is connected as a load to the output side of DC power supply device 100 according to Embodiment 1.
  • a motor 50b is connected to the output side of the inverter 50a.
  • the inverter 50a drives the motor 50b by converting the output voltage of the DC power supply device 100 into an AC voltage and applying it to the motor 50b.
  • 35 shows an example in which the DC power supply device 100 according to the first embodiment is applied as the DC power supply device 100 constituting the motor drive device 101, but the DC power supply device 100 according to the second embodiment is applied. May be.
  • 35 can be applied to products such as a blower, a compressor, and an air conditioner.
  • FIG. 36 is a diagram showing an example in which the motor drive device 101 shown in FIG. 35 is applied to an air conditioner.
  • a motor 50 b is connected to the output side of the motor drive device 101, and the motor 50 b is connected to the compression element 54.
  • the compressor 55 includes a motor 50 b and a compression element 54.
  • the refrigeration cycle unit 56 is configured to include a four-way valve 56a, an indoor heat exchanger 56b, an expansion valve 56c, and an outdoor heat exchanger 56d.
  • the flow path of the refrigerant circulating inside the air conditioner passes from the compression element 54 through the four-way valve 56a, the indoor heat exchanger 56b, the expansion valve 56c, the outdoor heat exchanger 56d, and again through the four-way valve 56a.
  • the motor driving device 101 receives supply of AC voltage from the AC power source 1 and rotates the motor 50b.
  • the compression element 54 performs a refrigerant compression operation by rotating the motor 50 b, and circulates the refrigerant inside the refrigeration cycle unit 56.

Abstract

A direct-current power supply device 100 comprises: a bridge circuit 3 in which a first arm 31 and a second arm 32 are connected in parallel, the first arm 31 having a first switching element 311 and a second switching element 312 connected in series, and the second arm 32 having a third switching element 321 and a fourth switching element 322 connected in series; a reactor 2 provided between an alternating-current power supply 1 and the bridge circuit 3; a current detector 6 for detecting current flowing between the alternating-current power supply 1 and the bridge circuit 3 via the reactor 2; a first voltage detector 5 for detecting an output voltage of the alternating-current power supply 1; a second voltage detector 7 for detecting a voltage applied to a load 50; and a control unit 10 that generates a driving pulse for the first switching element 311, the second switching element 312, the third switching element 321, and the fourth switching element 322 on the basis of the detection values from the first voltage detector 5, the current detector 6, and the second voltage detector 7. When generating the driving pulses, the control unit 10 independently generates the driving pulse for the first arm 31 and the driving pulse for the second arm 32.

Description

直流電源装置、モータ駆動装置、送風機、圧縮機および空気調和機DC power supply, motor drive, blower, compressor, and air conditioner
 本発明は、交流電源から供給される交流電力を直流電力に変換して負荷に供給する直流電源装置、当該直流電源装置を備えたモータ駆動装置、当該モータ駆動装置を備えた送風機および圧縮機、ならびに、当該送風機または当該圧縮機を備えた空気調和機に関する。 The present invention converts a DC power supplied from an AC power source into a DC power and supplies the load to a load, a motor driving device including the DC power device, a blower and a compressor including the motor driving device, In addition, the present invention relates to an air conditioner including the blower or the compressor.
 電源電流に含まれる高調波成分による障害を抑制するため、高調波電流を発生する電子機器に対しては、国際的な規制が設けられている。当該規制をクリアするため、コンバータにて交流(AC:Alternate Current)または直流(DC:Direct Current)でのチョッピングにより交流電源から流れ出て交流電源に戻る電流路の短絡を行って、電源電流に含まれる高調波電流を抑制する施策がとられる。 In order to suppress disturbances due to harmonic components contained in the power supply current, international regulations have been established for electronic devices that generate harmonic currents. In order to clear the regulation, short-circuit the current path that flows out from the AC power source and returns to the AC power source by chopping with alternating current (AC: Alternate Current) or direct current (DC: Direct Current) at the converter, and is included in the power source current Measures to suppress harmonic currents are taken.
 ACでのチョッピング技術による損失低減技術として、整流回路をスイッチ素子にて構成したフルブリッジコンバータに関しては、従来から、多くの技術検討が為されている。一例として、下記特許文献1では、フルブリッジ回路のスイッチング制御をロジック回路にて実現し、電源電流を一方のアームにて制御し、他方のアームでは同期整流動作をさせることで、低損失化を実現する技術が開示されている。 As a loss reduction technique by AC chopping technique, many technical studies have been made on a full bridge converter in which a rectifier circuit is configured by a switch element. As an example, in Patent Document 1 below, switching control of a full bridge circuit is realized by a logic circuit, power supply current is controlled by one arm, and synchronous rectification operation is performed by the other arm, thereby reducing loss. Techniques for realizing it are disclosed.
特開2014-099946号公報JP 2014-099946 A
 しかしながら、特許文献1では、ロジック回路を用いて制御系を構成しているため、部品点数増加に伴う基板面積および体積が増加し、装置が大型化するという課題があった。 However, in Patent Document 1, since the control system is configured using a logic circuit, there is a problem that the board area and the volume increase with the increase in the number of parts, and the apparatus becomes larger.
 本発明は、上記に鑑みてなされたものであって、ロジック回路を用いない制御系を構成することで、部品点数を削減し、装置を小型化可能な直流電源装置、モータ駆動装置、送風機、圧縮機および空気調和機を提供することを目的とする。 The present invention has been made in view of the above, and by configuring a control system that does not use a logic circuit, the number of parts can be reduced, and the DC power supply device, motor drive device, blower, An object is to provide a compressor and an air conditioner.
 上述した課題を解決し、目的を達成するために、本発明は、交流電源から印加される交流電圧を直流電圧に変換して負荷に印加する直流電源装置である。直流電源装置は、第一のスイッチング素子と第二のスイッチング素子とが直列接続された第一のアーム、および第三のスイッチング素子と第四のスイッチング素子とが直列接続された第二のアームとを有し、第一のアームと第二のアームとが並列に接続されたブリッジ回路を備える。また、直流電源装置は、交流電源とブリッジ回路との間に設けられるリアクトル、リアクトルを介し交流電源とブリッジ回路との間に流れる電流を検出する電流検出器、交流電源の出力電圧を検出する第一の電圧検出器、負荷への印加電圧を検出する第二の電圧検出器を備える。さらに、直流電源装置は、第一の電圧検出器、電流検出器、および第二の電圧検出器の検出値に基づいて第一のスイッチング素子、第二のスイッチング、第三のスイッチング素子および第四のスイッチング素子への駆動パルスを生成する演算器を備える。演算器は、駆動パルスを生成する際に、第一のアームへの駆動パルスと第二のアームへの駆動パルスを独立して生成する。 In order to solve the above-described problems and achieve the object, the present invention is a DC power supply device that converts an AC voltage applied from an AC power supply into a DC voltage and applies it to a load. The DC power supply device includes a first arm in which a first switching element and a second switching element are connected in series, and a second arm in which a third switching element and a fourth switching element are connected in series. And having a bridge circuit in which a first arm and a second arm are connected in parallel. Further, the DC power supply device includes a reactor provided between the AC power supply and the bridge circuit, a current detector that detects a current flowing between the AC power supply and the bridge circuit via the reactor, and a first detector that detects an output voltage of the AC power supply. One voltage detector and a second voltage detector for detecting a voltage applied to the load are provided. Further, the DC power supply device includes a first switching element, a second switching element, a third switching element, and a fourth switching element based on detection values of the first voltage detector, the current detector, and the second voltage detector. And an arithmetic unit for generating a driving pulse for the switching element. When generating the drive pulse, the arithmetic unit independently generates the drive pulse for the first arm and the drive pulse for the second arm.
 本発明によれば、ロジック回路を用いない制御系を構成できるので、部品点数を削減し、装置を小型化することができる、という効果を奏する。 According to the present invention, since a control system that does not use a logic circuit can be configured, the number of parts can be reduced and the apparatus can be miniaturized.
実施の形態1に係る直流電源装置の構成例を示す図The figure which shows the structural example of the DC power supply device which concerns on Embodiment 1. FIG. 平滑コンデンサを充電するときの電流経路を示す図(電源電圧が正極性のとき)Diagram showing current path when charging smoothing capacitor (when power supply voltage is positive) 平滑コンデンサを充電するときの電流経路を示す図(電源電圧が負極性のとき)A diagram showing the current path when charging the smoothing capacitor (when the power supply voltage is negative) リアクトルを介した交流電源の短絡経路を示す図(電源電圧が正極性のとき)Diagram showing short circuit path of AC power supply via reactor (when power supply voltage is positive) リアクトルを介した交流電源の短絡経路を示す図(電源電圧が負極性のとき)Diagram showing short-circuit path of AC power supply via reactor (when power supply voltage is negative) 実施の形態1の直流電源装置における制御部の構成例を示す図The figure which shows the structural example of the control part in the DC power supply device of Embodiment 1. 電源電圧位相算出部の動作例を示す図The figure which shows the operation example of a power supply voltage phase calculation part 第一アームパルス生成部の構成例を示すブロック図Block diagram showing a configuration example of the first arm pulse generator 基準PWM信号の生成手法の説明に供する図Diagram for explaining a method of generating a reference PWM signal スイッチング素子の短絡を防止するために設定されるデッドタイムの説明に供する図The figure which serves for explanation of the dead time set in order to prevent the short circuit of the switching element 第一アームパルス生成部の動作を示すフローチャートFlow chart showing the operation of the first arm pulse generator 第二アームパルス生成部の動作を示すフローチャートFlow chart showing the operation of the second arm pulse generator 制御部によってブリッジ回路が制御されたときの動作波形の一例を示す図The figure which shows an example of the operation waveform when a bridge circuit is controlled by the control part 電源電流にリプル成分が多く含まれる場合の波形例を示す図The figure which shows the example of a waveform when many ripple components are included in power supply current 電源短絡のスイッチングパターンにおいて短絡経路の向きが逆転する現象の説明に供する図Diagram used to explain the phenomenon in which the direction of the short-circuit path is reversed in the power supply short-circuit switching pattern 平滑コンデンサを充電するスイッチングパターンにおいて電源短絡と放電動作が生起する現象の説明に供する図Diagram for explaining the phenomenon in which a power supply short circuit and discharge operation occur in a switching pattern that charges a smoothing capacitor 図11とは異なる第一アームパルス生成部の動作を示すフローチャートThe flowchart which shows operation | movement of the 1st arm pulse generation part different from FIG. 図11の制御フローによる動作と図17の制御フローによる動作との差異の説明に供する図11 is a diagram for explaining the difference between the operation according to the control flow of FIG. 11 and the operation according to the control flow of FIG. 一般的なスイッチング素子における電流-損失特性を模式的に示す図Diagram showing current-loss characteristics of a typical switching element MOSFETの概略構造を示す模式的断面図Schematic sectional view showing the schematic structure of MOSFET 平滑コンデンサを充電する場合において第四のスイッチング素子をONに制御しないときの電流経路を示す図(電源電圧が正極性のとき)Diagram showing the current path when the fourth switching element is not controlled to be ON when charging the smoothing capacitor (when the power supply voltage is positive) 平滑コンデンサを充電する場合において第四のスイッチング素子をONに制御したときの電流経路を示す図(電源電圧が正極性のとき)Diagram showing the current path when the fourth switching element is controlled to be ON when charging the smoothing capacitor (when the power supply voltage is positive) 電源短絡の動作モードおいて第四のスイッチング素子をONに制御しないときの電流経路を示す図(電源電圧が正極性のとき)Diagram showing the current path when the fourth switching element is not controlled to be ON in the power supply short-circuit operation mode (when the power supply voltage is positive) 電源短絡の動作モードおいて第四のスイッチング素子をONに制御したときの電流経路を示す図(電源電圧が正極性のとき)A diagram showing the current path when the fourth switching element is controlled to be ON in the power supply short-circuit operation mode (when the power supply voltage is positive) 平滑コンデンサを充電する場合において第三のスイッチング素子をONに制御しないときの電流経路を示す図(電源電圧が負極性のとき)Diagram showing the current path when the third switching element is not controlled to be ON when charging the smoothing capacitor (when the power supply voltage is negative) 平滑コンデンサを充電する場合において第三のスイッチング素子をONに制御したときの電流経路を示す図(電源電圧が負極性のとき)Diagram showing the current path when the third switching element is controlled to be ON when charging the smoothing capacitor (when the power supply voltage is negative) 電源短絡の動作モードおいて第三のスイッチング素子をONに制御しないときの電流経路を示す図(電源電圧が負極性のとき)Diagram showing the current path when the third switching element is not controlled to be ON in the power supply short-circuit operation mode (when the power supply voltage is negative) 電源短絡の動作モードおいて第三のスイッチング素子をONに制御したときの電流経路を示す図(電源電圧が負極性のとき)Diagram showing the current path when the third switching element is controlled to ON in the power supply short-circuit operation mode (when the power supply voltage is negative) キャリアの周期と電源電圧の周期とが同期しない場合の駆動パルス波形の例を示す図The figure which shows the example of the drive pulse waveform when the cycle of the carrier and the cycle of the power supply voltage are not synchronized 図1に示した直流電源装置の制御部に外部割込み機能を付加した構成を示す図The figure which shows the structure which added the external interruption function to the control part of the direct-current power supply device shown in FIG. 電源電圧極性検出部の動作説明に供する図Diagram for explaining the operation of the power supply voltage polarity detector 図31を用いて説明した制御手法によって制御したときの動作波形を示す図The figure which shows an operation | movement waveform when it controls by the control method demonstrated using FIG. 実施の形態2に係る直流電源装置の構成例を示す図The figure which shows the structural example of the DC power supply device which concerns on Embodiment 2. FIG. 実施の形態2に係る直流電源装置の図33とは異なる他の構成例を示す図The figure which shows the other structural example different from FIG. 33 of the DC power supply device which concerns on Embodiment 2. FIG. 実施の形態1に示した直流電源装置をモータ駆動装置に適用した例を示す図The figure which shows the example which applied the direct-current power supply device shown in Embodiment 1 to the motor drive device 図35に示したモータ駆動装置を空気調和機に適用した例を示す図The figure which shows the example which applied the motor drive device shown in FIG. 35 to the air conditioner
 以下に添付図面を参照し、本発明の実施の形態に係る直流電源装置、当該直流電源装置を備えたモータ駆動装置、当該モータ駆動装置を備えた送風機および圧縮機、ならびに、当該送風機または当該圧縮機を備えた空気調和機について説明する。なお、以下に示す実施の形態により本発明が限定されるものではない。 Referring to the accompanying drawings below, a DC power supply device according to an embodiment of the present invention, a motor drive device including the DC power supply device, a blower and a compressor including the motor drive device, and the blower or the compression An air conditioner equipped with a machine will be described. In addition, this invention is not limited by embodiment shown below.
実施の形態1.
 図1は、実施の形態1に係る直流電源装置の構成例を示す図である。実施の形態1に係る直流電源装置100は、交流電源1から印加される交流電圧を直流電圧に変換して負荷50に印加する交流直流変換機能を有する電源装置である。図1に示すように、実施の形態1に係る直流電源装置100は、交流電源1、リアクトル2、ブリッジ回路3、平滑コンデンサ4、電源電圧検出手段である第一の電圧検出器5、電源電流検出手段である電流検出器6、母線電圧検出手段である第二の電圧検出器7、および制御手段である制御部10を備えている。
Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration example of a DC power supply device according to the first embodiment. The DC power supply device 100 according to Embodiment 1 is a power supply device having an AC / DC conversion function of converting an AC voltage applied from the AC power supply 1 into a DC voltage and applying the DC voltage to a load 50. As shown in FIG. 1, a DC power supply device 100 according to Embodiment 1 includes an AC power supply 1, a reactor 2, a bridge circuit 3, a smoothing capacitor 4, a first voltage detector 5 that is power supply voltage detection means, A current detector 6 serving as a detection unit, a second voltage detector 7 serving as a bus voltage detection unit, and a control unit 10 serving as a control unit are provided.
 ブリッジ回路3は、第一のアーム31および第二のアーム32を備える。第一のアーム31および第二のアーム32は、並列に接続されている。第一のアーム31および第二のアーム32のそれぞれでは、二つのスイッチング素子が直列に接続されている。具体的に、第一のアーム31では、第一のスイッチング素子311と第二のスイッチング素子312とが直列に接続され、第二のアーム32では、第三のスイッチング素子321と第四のスイッチング素子322とが直列に接続されている。 The bridge circuit 3 includes a first arm 31 and a second arm 32. The first arm 31 and the second arm 32 are connected in parallel. In each of the first arm 31 and the second arm 32, two switching elements are connected in series. Specifically, in the first arm 31, the first switching element 311 and the second switching element 312 are connected in series, and in the second arm 32, the third switching element 321 and the fourth switching element are connected. 322 are connected in series.
 なお、図1では、第一のスイッチング素子311、第二のスイッチング素子312、第三のスイッチング素子321および第四のスイッチング素子322のそれぞれとしてMOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)を例示しているが、MOSFETに限定されない。MOSFETは、ドレインとソースとの間で双方向に電流を流すことができるスイッチング素子であるが、ドレインに相当する第一端子とソースに相当する第二端子との間で双方向に電流を流すことができるスイッチング素子であれば、どのようなスイッチング素子でもよい。また、第一のスイッチング素子311、第二のスイッチング素子312、第三のスイッチング素子321および第四のスイッチング素子322の素材としては、シリコン(Si)、炭化ケイ素(SiC)、または窒化ガリウム(GaN)が例示されるが、どのような素材であってもよく、これらに限定されない。 In FIG. 1, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are illustrated as the first switching element 311, the second switching element 312, the third switching element 321, and the fourth switching element 322, respectively. However, it is not limited to MOSFET. A MOSFET is a switching element that allows a current to flow bidirectionally between a drain and a source, but allows a current to flow bidirectionally between a first terminal corresponding to the drain and a second terminal corresponding to the source. Any switching element can be used as long as it can be switched. The first switching element 311, the second switching element 312, the third switching element 321, and the fourth switching element 322 may be made of silicon (Si), silicon carbide (SiC), or gallium nitride (GaN). ) Is exemplified, but any material may be used and the material is not limited to these.
 リアクトル2は、交流電源1とブリッジ回路3との間に設けられている。交流電源1の一端は、リアクトル2を介し、第一のアーム31における第一のスイッチング素子311と第二のスイッチング素子312との接続点に接続されている。交流電源1の他端は、第三のスイッチング素子321と第四のスイッチング素子322との接続点に接続されている。 The reactor 2 is provided between the AC power source 1 and the bridge circuit 3. One end of the AC power supply 1 is connected to a connection point between the first switching element 311 and the second switching element 312 in the first arm 31 via the reactor 2. The other end of the AC power source 1 is connected to a connection point between the third switching element 321 and the fourth switching element 322.
 ブリッジ回路3の出力電圧は、平滑コンデンサ4の両端に印加される。平滑コンデンサ4は、ブリッジ回路3の出力電圧を平滑化する。なお、平滑コンデンサ4で平滑された電圧を「母線電圧」と呼ぶ。 The output voltage of the bridge circuit 3 is applied across the smoothing capacitor 4. The smoothing capacitor 4 smoothes the output voltage of the bridge circuit 3. The voltage smoothed by the smoothing capacitor 4 is referred to as “bus voltage”.
 制御部10は、第一の電圧検出器5、電流検出器6、および第二の電圧検出器7の検出値に基づいて、ブリッジ回路3の各スイッチング素子を駆動させる駆動パルスを生成する。第一の電圧検出器5は、交流電源1の出力電圧である電源電圧Vsを検出して制御部10に出力する。電流検出器6は、リアクトル2を介し交流電源1とブリッジ回路3との間に流れる電源電流Isを検出して制御部10に出力する。第二の電圧検出器7は、負荷50への印加電圧でもある母線電圧Vdcを検出して制御部10に出力する。 The control unit 10 generates a driving pulse for driving each switching element of the bridge circuit 3 based on detection values of the first voltage detector 5, the current detector 6, and the second voltage detector 7. The first voltage detector 5 detects the power supply voltage Vs that is the output voltage of the AC power supply 1 and outputs it to the control unit 10. The current detector 6 detects the power source current Is flowing between the AC power source 1 and the bridge circuit 3 via the reactor 2 and outputs the detected power source current Is to the control unit 10. The second voltage detector 7 detects the bus voltage Vdc, which is also the voltage applied to the load 50, and outputs it to the control unit 10.
 次に、実施の形態1に係る直流電源装置100の基本的な回路動作について、図1から図5の図面を参照して説明する。図2および図3のそれぞれは、平滑コンデンサ4を充電するときの電流経路を示す図である。両者の違いは、図2は電源電圧Vsの極性が正すなわち電源電圧Vsが正極性のときであり、図3は電源電圧Vsの極性が負すなわち電源電圧Vsが負極性のときである。また、図4および図5のそれぞれは、平滑コンデンサ4を充電せずに交流電源1の両端をリアクトル2を介して短絡させるとき、すなわちリアクトル2を介した交流電源1の短絡経路を示す図である。両者の違いは、図4は電源電圧Vsが正極性のときであり、図5は電源電圧Vsが負極性のときである。なお、図2および図4に示すように、交流電源1における上側の端子がプラス電位のときを電源電圧Vsの極性が正であると定義し、図3および図5に示すように、交流電源1における上側の端子がマイナス電位のときを電源電圧Vsの極性が負であると定義する。 Next, a basic circuit operation of the DC power supply device 100 according to the first embodiment will be described with reference to the drawings of FIGS. Each of FIG. 2 and FIG. 3 is a diagram showing a current path when charging the smoothing capacitor 4. 2 is when the polarity of the power supply voltage Vs is positive, that is, when the power supply voltage Vs is positive, and FIG. 3 is when the polarity of the power supply voltage Vs is negative, that is, when the power supply voltage Vs is negative. 4 and 5 are diagrams illustrating a short-circuit path of the AC power supply 1 through the reactor 2 when both ends of the AC power supply 1 are short-circuited through the reactor 2 without charging the smoothing capacitor 4. is there. The difference between the two is when the power supply voltage Vs is positive, and FIG. 5 is when the power supply voltage Vs is negative. As shown in FIGS. 2 and 4, when the upper terminal of the AC power supply 1 is a positive potential, the polarity of the power supply voltage Vs is defined as positive, and as shown in FIGS. 3 and 5, the AC power supply When the upper terminal in 1 is a negative potential, the polarity of the power supply voltage Vs is defined as negative.
 第一のスイッチング素子311、第二のスイッチング素子312、第三のスイッチング素子321および第四のスイッチング素子322をスイッチング動作させない場合、図2及び図3に示すように、電源電圧の極性に応じて平滑コンデンサ4を充電する電流が流れる。なお、このときの動作モードを「通常モード」と呼ぶ。 When the first switching element 311, the second switching element 312, the third switching element 321, and the fourth switching element 322 are not switched, as shown in FIGS. 2 and 3, depending on the polarity of the power supply voltage A current for charging the smoothing capacitor 4 flows. The operation mode at this time is referred to as “normal mode”.
 一方、電源電圧Vsが正極性のときに、第二のスイッチング素子312および第四のスイッチング素子322をON動作させると、図4に示すように、交流電源1、リアクトル2、第二のスイッチング素子312、第四のスイッチング素子322、交流電源1という経路で短絡経路を形成することができる。また、電源電圧極性が負のときに、第一のスイッチング素子311および第三のスイッチング素子321をON動作させると、図5に示すように、交流電源1、第三のスイッチング素子321、第一のスイッチング素子311、リアクトル2、交流電源1の経路で短絡経路を形成することができる。なお、短絡経路を形成することを「電源短絡」と呼び、電源短絡の制御を行う動作モードを「電源短絡モード」と呼ぶ。 On the other hand, when the second switching element 312 and the fourth switching element 322 are turned on when the power supply voltage Vs is positive, as shown in FIG. 4, the AC power supply 1, the reactor 2, the second switching element The short circuit path can be formed by the path 312, the fourth switching element 322, and the AC power supply 1. Further, when the first switching element 311 and the third switching element 321 are turned on when the power supply voltage polarity is negative, as shown in FIG. 5, the AC power supply 1, the third switching element 321, the first switching element 321 The switching element 311, the reactor 2, and the AC power source 1 can form a short circuit path. Forming a short circuit path is called “power supply short circuit”, and an operation mode for controlling power supply short circuit is called “power supply short circuit mode”.
 実施の形態1に係る直流電源装置では、制御部10のスイッチング制御により、これらの動作モードを切替制御することで、電源電流Isおよび母線電圧Vdcを制御することが可能である。 In the DC power supply device according to the first embodiment, the power supply current Is and the bus voltage Vdc can be controlled by switching control of these operation modes by switching control of the control unit 10.
 図6は、実施の形態1の直流電源装置における制御部10の構成例を示す図である。図6に示すように、制御部10は、電源電流指令値制御部21、オンデューティ制御部22、電源電圧位相算出部23、第一アームパルス生成部24、および第二アームパルス生成部25を有する。制御部10は、演算手段である演算器を用いて構成される。演算器の一例は、マイクロコンピュータであるが、これ以外にも、CPU(Central Processing Unit)、マイクロプロセッサ、またはDSP(Digital Signal Processor)といった呼び方をされる処理器または処理装置であってもよい。 FIG. 6 is a diagram illustrating a configuration example of the control unit 10 in the DC power supply device of the first embodiment. As shown in FIG. 6, the control unit 10 includes a power supply current command value control unit 21, an on-duty control unit 22, a power supply voltage phase calculation unit 23, a first arm pulse generation unit 24, and a second arm pulse generation unit 25. Have. The control part 10 is comprised using the calculating device which is a calculating means. An example of the arithmetic unit is a microcomputer, but other than this, a processor or processing device called CPU (Central Processing Unit), microprocessor, or DSP (Digital Signal Processor) may be used. .
 電源電流指令値制御部21は、第二の電圧検出器7の出力信号である母線電圧Vdcと、予め設定された母線電圧指令値Vdc*とから、電源電流実効値指令値Is_rms*を演算する。電源電流実効値指令値Is_rms*の演算は、母線電圧Vdcと母線電圧指令値Vdc*との差分を比例積分制御することで実現する。なお、比例積分制御は一例であり、比例積分制御に代えて比例制御または比例微分積分制御を採用してもよい。 The power supply current command value control unit 21 calculates a power supply current effective value command value Is_rms * from the bus voltage Vdc that is an output signal of the second voltage detector 7 and a preset bus voltage command value Vdc *. . The calculation of the power supply current effective value command value Is_rms * is realized by proportional-integral control of the difference between the bus voltage Vdc and the bus voltage command value Vdc *. The proportional-integral control is an example, and proportional control or proportional-differential-integral control may be employed instead of proportional-integral control.
 電源電圧位相算出部23は、第一の電圧検出器5により検出された電源電圧Vsを入力し、電源電圧位相推定値θsを生成すると共に、電源電圧位相推定値θsの正弦値sinθsを出力する。オンデューティ制御部22は、電源電流指令値制御部21が出力する電源電流実効値指令値Is_rms*、および電源電圧位相算出部23が出力する電源電圧位相推定値θsの正弦値sinθsにより演算された電源電流瞬時値指令値Is*と、電流検出器6により検出された電源電流Isとから、第一のスイッチング素子311および第二のスイッチング素子312の基準オンデューティDTsを演算する。基準オンデューティDTsの演算は、電源電流実効値指指令値Is_rms*と電源電流Isとの差分を比例積分制御することで行う。なお、オンデューティ制御部22の制御も、比例積分制御に代えて比例制御または比例微分積分制御を採用してもよい。 The power supply voltage phase calculation unit 23 receives the power supply voltage Vs detected by the first voltage detector 5, generates a power supply voltage phase estimated value θs, and outputs a sine value sin θs of the power supply voltage phase estimated value θs. . The on-duty control unit 22 is calculated from the power supply current effective value command value Is_rms * output from the power supply current command value control unit 21 and the sine value sinθs of the power supply voltage phase estimation value θs output from the power supply voltage phase calculation unit 23. The reference on-duty DTs of the first switching element 311 and the second switching element 312 is calculated from the power supply current instantaneous value command value Is * and the power supply current Is detected by the current detector 6. The calculation of the reference on-duty DTs is performed by proportional-integral control of the difference between the power supply current effective value finger command value Is_rms * and the power supply current Is. Note that the control of the on-duty control unit 22 may employ proportional control or proportional differential integral control instead of proportional integral control.
 図7は、電源電圧位相算出部23の動作例を示す図である。なお、図7では、制御による遅延または検出処理による遅延を考慮しない理想的な条件下での波形を示している。図7に示すように、電源電圧Vsが負極性から正極性に切り替わる点において、電源電圧位相推定値θsは360°となる。電源電圧位相算出部23は、電源電圧Vsが負極性から正極性に切り替わる点を検出し、この切り替わり点で電源電圧位相推定値θsをリセット、すなわち零に戻す。なお、マイコンの割込み機能を用いる場合には、電源電圧Vsのゼロクロスを検出する回路を、図6に追加する場合がある。何れの場合も、電源電圧Vsの位相が検出可能であれば、どのような手法を用いてもよい。 FIG. 7 is a diagram illustrating an operation example of the power supply voltage phase calculation unit 23. FIG. 7 shows waveforms under ideal conditions that do not take into account the delay due to control or the delay due to detection processing. As shown in FIG. 7, the power supply voltage phase estimation value θs is 360 ° at the point where the power supply voltage Vs switches from negative polarity to positive polarity. The power supply voltage phase calculation unit 23 detects a point where the power supply voltage Vs switches from negative polarity to positive polarity, and resets the power supply voltage phase estimation value θs at this switching point, that is, returns to zero. When using the interrupt function of the microcomputer, a circuit for detecting a zero cross of the power supply voltage Vs may be added to FIG. In any case, any method may be used as long as the phase of the power supply voltage Vs can be detected.
 図8は、第一アームパルス生成部24の構成例を示すブロック図である。図9は、基準PWM信号Scomの生成手法の説明に供する図である。図10は、スイッチング素子の短絡を防止するために設定されるデッドタイムの説明に供する図である。 FIG. 8 is a block diagram illustrating a configuration example of the first arm pulse generation unit 24. FIG. 9 is a diagram for explaining a method of generating the reference PWM signal Scom. FIG. 10 is a diagram for explaining a dead time set to prevent a short circuit of the switching element.
 第一アームパルス生成部24は、キャリア生成部241、基準PWM信号生成部242、デッドタイム生成部243、およびパルスセレクタ部244を有する。キャリア生成部241は、基準PWM信号Scomを生成するためのキャリア(キャリア周波数)Csを生成する機能を果たす。 The first arm pulse generation unit 24 includes a carrier generation unit 241, a reference PWM signal generation unit 242, a dead time generation unit 243, and a pulse selector unit 244. The carrier generation unit 241 has a function of generating a carrier (carrier frequency) Cs for generating the reference PWM signal Scom.
 基準PWM信号生成部242は、図9に示すように、基準オンデューティDTsとキャリアCsとの大小関係を比較することで、基準PWM信号Scomを生成する。図9の場合では、DTs>Csの場合はScomをON信号とし、DTs<Csの場合はScomをOFF信号とすることで、基準PWM信号Scomを生成する。なお、図9の場合では、ON信号がOFF信号よりもレベルが高い、ハイアクティブとしているが、ON信号がOFF信号よりもレベルが低い、ローアクティブとしてもよい。 As shown in FIG. 9, the reference PWM signal generator 242 generates a reference PWM signal Scom by comparing the magnitude relationship between the reference on-duty DTs and the carrier Cs. In the case of FIG. 9, the reference PWM signal Scom is generated by setting Scom as an ON signal when DTs> Cs, and by setting Scom as an OFF signal when DTs <Cs. In the case of FIG. 9, the ON signal has a higher level than the OFF signal and high active, but the ON signal may have a lower level than the OFF signal and low active.
 デッドタイム生成部243は、基準PWM信号Scomと、基準PWM信号Scomを反転した反転信号Scom’に対してデッドタイムtdを生成する機能を果たす。基準PWM信号Scomに基づき、第一のスイッチング素子311のON状態またはOFF状態、および、第二のスイッチング素子312のON状態またはOFF状態が制御される。また、基準PWM信号Scomおよび反転信号Scom’に基づき、第一のスイッチング素子311と第二のスイッチング素子312は互いに反転した動作を行う。 The dead time generation unit 243 functions to generate a dead time td for the reference PWM signal Scom and the inverted signal Scom ′ obtained by inverting the reference PWM signal Scom. Based on the reference PWM signal Scom, the ON state or OFF state of the first switching element 311 and the ON state or OFF state of the second switching element 312 are controlled. In addition, based on the reference PWM signal Scom and the inverted signal Scom ′, the first switching element 311 and the second switching element 312 perform operations that are inverted from each other.
 ただし、スイッチング素子は、一般的にON状態からOFF状態への遷移、および、OFF状態からON状態への遷移には遅延時間が発生する。これにより、基準PWM信号Scomおよび反転信号Scom’を用いるだけでは、遅延時間中に第一のスイッチング素子311と第二のスイッチング素子312との間が短絡してしまうことになる。デッドタイムtdは、このような短絡現象を防止するために必要である。図10には、ハイアクティブの場合におけるデッドタイムtdを考慮した信号波形の一例が示されている。 However, the switching element generally has a delay time in the transition from the ON state to the OFF state and in the transition from the OFF state to the ON state. As a result, only using the reference PWM signal Scom and the inverted signal Scom ′ causes a short circuit between the first switching element 311 and the second switching element 312 during the delay time. The dead time td is necessary to prevent such a short-circuit phenomenon. FIG. 10 shows an example of a signal waveform considering the dead time td in the case of high active.
 図10において、S1は基準PWM信号Scomと同一の信号とされている。また、S2はS1の反転信号とされ、且つ、デッドタイムtdの分だけ、ONとなる期間の両側において短く設定されている。デッドタイムtdの期間は、第一のスイッチング素子311および第二のスイッチング素子312が共にOFFとなる期間である。以下、S1を「基準PWM第一信号」と呼び、S2を「基準PWM第二信号」と呼ぶ。なお、図10に示す以外の公知の手法も知られており、何れの手法を用いても問題はない。 In FIG. 10, S1 is the same signal as the reference PWM signal Scom. S2 is an inverted signal of S1, and is set to be short on both sides of the ON period by the dead time td. The period of the dead time td is a period in which both the first switching element 311 and the second switching element 312 are OFF. Hereinafter, S1 is referred to as a “reference PWM first signal”, and S2 is referred to as a “reference PWM second signal”. A known method other than that shown in FIG. 10 is also known, and there is no problem even if any method is used.
 パルスセレクタ部244は、基準PWM第一信号S1および基準PWM第二信号S2のそれぞれを、第一のスイッチング素子311および第二のスイッチング素子312のどちらに伝送するかを選択する機能を果たす。図11は、パルスセレクタ部244の動作を示すフローチャートである。 The pulse selector unit 244 functions to select which of the first switching element 311 and the second switching element 312 each of the reference PWM first signal S1 and the reference PWM second signal S2 is transmitted to. FIG. 11 is a flowchart showing the operation of the pulse selector unit 244.
 図11において、電源電圧Vsが正の場合(ステップST11,Yes)、パルスセレクタ部244は、基準PWM第一信号S1を第二のスイッチング素子312への駆動パルスとして出力する(ステップST12)。“S1→pulse_312”の表記は、この制御を意味する。また、電源電圧Vsが正の場合(ステップST11、Yes)、パルスセレクタ部244は、基準PWM第二信号S2を第一のスイッチング素子311への駆動パルスとして出力する(ステップST12)。“S2→pulse_311”の表記は、この制御を意味する。これらの制御は、図4で述べたように、電源電圧Vsが正極性のとき、第二のスイッチング素子312のスイッチング動作により短絡経路を形成することができるためであり、また、母線電圧Vdcおよび電源電流Isの制御は第二のスイッチング素子312の操作により為されるためである。 In FIG. 11, when the power supply voltage Vs is positive (step ST11, Yes), the pulse selector unit 244 outputs the reference PWM first signal S1 as a drive pulse to the second switching element 312 (step ST12). The notation “S1 → pulse — 312” means this control. When the power supply voltage Vs is positive (step ST11, Yes), the pulse selector unit 244 outputs the reference PWM second signal S2 as a drive pulse to the first switching element 311 (step ST12). The notation “S2 → pulse — 311” means this control. These controls are because, as described in FIG. 4, when the power supply voltage Vs is positive, a short-circuit path can be formed by the switching operation of the second switching element 312, and the bus voltage Vdc and This is because the power supply current Is is controlled by the operation of the second switching element 312.
 また、電源電圧Vsが負または零の場合(ステップST11,No)、パルスセレクタ部244は、基準PWM第一信号S1を第一のスイッチング素子311への駆動パルスとして出力する(ステップST13)。“S1→pulse_311”の表記は、この制御を意味する。また、電源電圧Vsが負または零の場合(ステップST11,No)、基準PWM第二信号S2を第二のスイッチング素子312への駆動パルスとして出力する(ステップST13)。“S2→pulse_312”の表記は、この制御を意味する。これらの制御は、図5で述べたように、電源電圧Vsが負極性のとき、第一のスイッチング素子311のスイッチング動作により短絡経路を形成することができるためであり、また、母線電圧Vdcおよび電源電流Isの制御は第一のスイッチング素子311の操作により為されるためである。 If the power supply voltage Vs is negative or zero (No in step ST11), the pulse selector unit 244 outputs the reference PWM first signal S1 as a drive pulse to the first switching element 311 (step ST13). The notation “S1 → pulse_311” means this control. If the power supply voltage Vs is negative or zero (step ST11, No), the reference PWM second signal S2 is output as a drive pulse to the second switching element 312 (step ST13). The notation “S2 → pulse — 312” means this control. These controls are because, as described in FIG. 5, when the power supply voltage Vs is negative, a short-circuit path can be formed by the switching operation of the first switching element 311, and the bus voltage Vdc and This is because the power supply current Is is controlled by operating the first switching element 311.
 なお、図11のフロー場合、電源電圧Vsの極性によって基準PWM第一信号S1および基準PWM第二信号S2の出力先を切り替えているが、電源電流Isによって切り替えることも可能である。この場合の動作に関しては後述する。 In the flow of FIG. 11, the output destinations of the reference PWM first signal S1 and the reference PWM second signal S2 are switched depending on the polarity of the power supply voltage Vs, but can be switched based on the power supply current Is. The operation in this case will be described later.
 また、上記のステップST11の判定処理では、電源電圧Vsが零の場合を“No”と判定しているが、“Yes”と判定してもよい。すなわち、電源電圧Vsが零の場合を“Yes”または“No”の何れで判定してもよい。 In the determination process of step ST11, the case where the power supply voltage Vs is zero is determined as “No”, but may be determined as “Yes”. That is, the case where the power supply voltage Vs is zero may be determined as “Yes” or “No”.
 以上により、第一アームパルス生成部24は、第一のスイッチング素子311への駆動パルスpulse_311と、第二のスイッチング素子312への駆動パルスpulse_312とを生成することができる。 As described above, the first arm pulse generation unit 24 can generate the drive pulse pulse_311 to the first switching element 311 and the drive pulse pulse_312 to the second switching element 312.
 次に、第二アームパルス生成部25の動作に関して説明する。図12は、第二アームパルス生成部25の動作を示すフローチャートである。 Next, the operation of the second arm pulse generator 25 will be described. FIG. 12 is a flowchart showing the operation of the second arm pulse generator 25.
 図12において、電源電圧Vsが正の場合(ステップST21,Yes)、第二アームパルス生成部25は、第三のスイッチング素子321への駆動パルスpulse_321をOFFレベルの信号とし、第四のスイッチング素子322への駆動パルスpulse_322をONレベルの信号とする(ステップST22)。また、電源電圧Vsが負または零の場合、第三のスイッチング素子321の駆動パルスpulse_321をONレベルの信号とし、第四のスイッチング素子322への駆動パルスpulse_322をOFFレベルの信号とする(ステップST23)。これらの制御は、双方向に電流を流すことができるMOSFETの特性を利用した同期整流による低損失化を狙ったものである。これらの制御の詳細に関しては、後述する。 In FIG. 12, when the power supply voltage Vs is positive (step ST21, Yes), the second arm pulse generating unit 25 uses the drive pulse pulse_321 to the third switching element 321 as an OFF level signal, and the fourth switching element. The drive pulse pulse_322 to 322 is set to an ON level signal (step ST22). When the power supply voltage Vs is negative or zero, the drive pulse pulse_321 of the third switching element 321 is an ON level signal, and the drive pulse pulse_322 to the fourth switching element 322 is an OFF level signal (step ST23). ). These controls are aimed at reducing the loss by synchronous rectification using the characteristics of a MOSFET capable of flowing a current in both directions. Details of these controls will be described later.
 なお、上記のステップST21の判定処理では、電源電圧Vsが零の場合を“No”と判定しているが、“Yes”と判定してもよい。すなわち、電源電圧Vsが零の場合を“Yes”または“No”の何れで判定してもよい。 In the determination process of step ST21, the case where the power supply voltage Vs is zero is determined as “No”, but may be determined as “Yes”. That is, the case where the power supply voltage Vs is zero may be determined as “Yes” or “No”.
 以上に示した図11および図12のフローによる制御により、第一のスイッチング素子311、第二のスイッチング素子312、第三のスイッチング素子321、および第四のスイッチング素子322が動作し、母線電圧Vdcと電源電流Isとが制御されることとなる。 The first switching element 311, the second switching element 312, the third switching element 321, and the fourth switching element 322 are operated by the control according to the flow of FIG. 11 and FIG. 12 described above, and the bus voltage Vdc And the power supply current Is are controlled.
 図13は、制御部10によってブリッジ回路3が制御されたときの動作波形の一例を示す図である。図13では、横軸に時間をとり、縦軸には上段側から、電源電圧Vs、電源電流Is、キャリア及び基準オンデューティ、ならびに、駆動パルスpulse_311,pulse_312,pulse_321,pulse_322を表している。図13において特筆すべきことは、電源電流Isは、キャリアの1周期ごとに小刻みな変動を繰り返すが、小刻みな変動を繰り返す波形のピーク値または平均値は正弦波状に制御されていることである。電源電流Isにおける波形のピーク値または平均値が正弦波状に制御されていることは、電源電流Isの高調波成分が抑制されていることを意味する。 FIG. 13 is a diagram illustrating an example of an operation waveform when the bridge circuit 3 is controlled by the control unit 10. In FIG. 13, the horizontal axis represents time, and the vertical axis represents the power supply voltage Vs, power supply current Is, carrier and reference on-duty, and drive pulses pulse_311, pulse_312, pulse_321, and pulse_322 from the upper stage side. What should be noted in FIG. 13 is that the power supply current Is repeats small fluctuations every carrier cycle, but the peak value or average value of the waveform repeating the small fluctuations is controlled in a sine wave form. . The peak value or average value of the waveform in the power supply current Is being controlled in a sine wave shape means that the harmonic component of the power supply current Is is suppressed.
 次に、制御部10の制御によるブリッジ回路3の動作のうちで、考慮を要する動作について説明する。 Next, of the operations of the bridge circuit 3 under the control of the control unit 10, operations that require consideration will be described.
 まず、前述の通り、第一アームパルス生成部24のパルスセレクタ部244は、電源電圧Vsの極性に応じて、基準PWM第一信号S1を第一のスイッチング素子311への駆動パルスpulse_311に出力するか、第二のスイッチング素子312への駆動パルスpulse_312に出力するかを切り替え、基準PWM第二信号S2を第一のスイッチング素子311への駆動パルスpulse_311に出力するか、第二のスイッチング素子312への駆動パルスpulse_312に出力するかを切り替えている。また同様に、第二アームパルス生成部25は、電源電圧Vsの極性に応じて、第三のスイッチング素子321および第四のスイッチング素子322の何れをONに制御するかを選択している。 First, as described above, the pulse selector unit 244 of the first arm pulse generation unit 24 outputs the reference PWM first signal S1 to the drive pulse pulse_311 to the first switching element 311 according to the polarity of the power supply voltage Vs. Or the output of the drive pulse pulse_312 to the second switching element 312 and the reference PWM second signal S2 is output to the drive pulse pulse_311 to the first switching element 311 or to the second switching element 312. The output of the drive pulse pulse_312 is switched. Similarly, the second arm pulse generator 25 selects which of the third switching element 321 and the fourth switching element 322 is controlled to be ON according to the polarity of the power supply voltage Vs.
 一方、ブリッジ回路3における、ある動作によって、電源電流Isにリプル成分が多く含まれる場合がある。図14は、電源電流Isにリプル成分が多く含まれる場合の波形例を示す図である。図14において、上段側には、下段側に示した電源電流Isの波形におけるA部の拡大波形が示されている。A部の波形を見ると、電流が小刻みに変動している。A部の波形に見られる振動成分は、第一のスイッチング素子311および第二のスイッチング素子312のスイッチング周波数に依存した周波数成分である。次に、このような電源電流Isの波形が生じるときのブリッジ回路3の動作に関して、図15および図16の図面を参照して説明する。図15は、電源短絡のスイッチングパターンにおいて短絡経路の向きが逆転する現象の説明に供する図であり、図16は、平滑コンデンサ4を充電するスイッチングパターンにおいて電源短絡と放電動作が生起する現象の説明に供する図である。 On the other hand, a certain operation in the bridge circuit 3 may include a lot of ripple components in the power supply current Is. FIG. 14 is a diagram illustrating a waveform example when the power supply current Is includes many ripple components. In FIG. 14, the enlarged waveform of the A part in the waveform of the power supply current Is shown on the lower side is shown on the upper side. Looking at the waveform at part A, the current fluctuates little by little. The vibration component seen in the waveform of the A part is a frequency component depending on the switching frequency of the first switching element 311 and the second switching element 312. Next, the operation of the bridge circuit 3 when such a waveform of the power supply current Is occurs will be described with reference to the drawings of FIGS. FIG. 15 is a diagram for explaining a phenomenon in which the direction of the short circuit path is reversed in the switching pattern of the power supply short circuit, and FIG. FIG.
 電源電圧Vsが正極性であり、電源電流Isが負極性の場合に関して考えてみる。これは、リアクトル2のインダクタンス値が非常に大きい場合、または、過渡的な負荷変動により電源力率が極端に悪化する場合において生じる現象として想定される。図4で述べた通り、第二のスイッチング素子312をオンすることで短絡経路を形成することが可能となる。このスイッチングパターンの場合、図15に示すように、電源電圧Vsの極性と、電源電流Isの極性とが反転する状態においても、短絡経路が形成されてしまう場合がある。また、図2のように、平滑コンデンサ4の充電経路を形成するために第一のスイッチング素子311および第四のスイッチング素子322をON状態とした場合において、図16のように短絡経路が形成されてしまう場合がある。さらに、図16の場合、一点鎖線で示すように、平滑コンデンサ4からリアクトル2への放電経路が形成されてしまう場合がある。これにより、交流電源1に向けて放電電流が流れ、電源電流Isはさらに増加することとなる。その結果、図15のスイッチングパターンと図16のスイッチングパターンとが繰り返されることで、電源短絡と充電電荷の放電とが繰り返し実施され、電源電流Isが急成長することで、電源電流Isの高調波成分が増加することとなる。ここでは、電源電圧Vsが正極性であり、電源電流Isが負極性である場合について説明したが、電源電圧Vsが負極性であり、電源電流Isが正極性である場合においても、同様な現象が発生する可能性がある。 Consider the case where the power supply voltage Vs is positive and the power supply current Is is negative. This is assumed as a phenomenon that occurs when the inductance value of the reactor 2 is very large, or when the power source power factor is extremely deteriorated due to a transient load fluctuation. As described with reference to FIG. 4, a short circuit path can be formed by turning on the second switching element 312. In the case of this switching pattern, as shown in FIG. 15, a short circuit path may be formed even in a state where the polarity of the power supply voltage Vs and the polarity of the power supply current Is are reversed. Further, when the first switching element 311 and the fourth switching element 322 are turned on to form the charging path of the smoothing capacitor 4 as shown in FIG. 2, a short circuit path is formed as shown in FIG. May end up. Further, in the case of FIG. 16, a discharge path from the smoothing capacitor 4 to the reactor 2 may be formed as indicated by a one-dot chain line. As a result, a discharge current flows toward the AC power source 1 and the power source current Is further increases. As a result, the switching pattern of FIG. 15 and the switching pattern of FIG. 16 are repeated, so that the power supply short circuit and the discharge of the charge charge are repeatedly performed, and the power supply current Is rapidly grows. The component will increase. Although the case where the power supply voltage Vs has a positive polarity and the power supply current Is has a negative polarity has been described here, the same phenomenon occurs when the power supply voltage Vs has a negative polarity and the power supply current Is has a positive polarity. May occur.
 上記現象への対策として、電源電圧Vsおよび電源電流Isの両方の極性によりパルスセレクタ部244の動作を切り替える手法が考えられる。図17は、この手法を具現するフローチャートである。 As a countermeasure against the above phenomenon, a method of switching the operation of the pulse selector unit 244 according to the polarities of both the power supply voltage Vs and the power supply current Is can be considered. FIG. 17 is a flowchart for implementing this technique.
 図17において、電源電圧Vsが正であり(ステップST31,Yes)、且つ、電源電流Isが正の場合(ステップST32,Yes)、パルスセレクタ部244は、図11においてステップST12として示した処理αを実行する(ステップST34)。また、電源電圧Vsが正であり(ステップST31,Yes)、且つ、電源電流Isが負または零の場合(ステップST32,No)、パルスセレクタ部244は、図11においてステップST13として示した処理βを実行する(ステップST35)。一方、電源電圧Vsが負または零であり(ステップST31,No)、且つ、電源電流Isが負の場合(ステップST33,Yes)、パルスセレクタ部244は、処理βを実行する(ステップST36)。また、電源電圧Vsが負または零であり(ステップST31,No)、且つ、電源電流Isが正または零の場合(ステップST33,No)、パルスセレクタ部244は、処理αを実行する(ステップST37)。 In FIG. 17, when the power supply voltage Vs is positive (step ST31, Yes) and the power supply current Is is positive (step ST32, Yes), the pulse selector unit 244 performs the process α shown as step ST12 in FIG. Is executed (step ST34). When the power supply voltage Vs is positive (step ST31, Yes) and the power supply current Is is negative or zero (step ST32, No), the pulse selector unit 244 performs the process β shown as step ST13 in FIG. Is executed (step ST35). On the other hand, when the power supply voltage Vs is negative or zero (step ST31, No) and the power supply current Is is negative (step ST33, Yes), the pulse selector unit 244 executes the process β (step ST36). When the power supply voltage Vs is negative or zero (step ST31, No) and the power supply current Is is positive or zero (step ST33, No), the pulse selector unit 244 executes the process α (step ST37). ).
 上記の処理を纏めると、電源電圧Vsおよび電源電流Isの極性が共に正の場合には第一の処理である処理αを実行し、電源電圧Vsおよび電源電流Isの極性が共に負の場合には第二の処理である処理βを実行する。また、電源電圧Vsと電源電流Isの極性が異なる場合、電源電流Isが正極性であれば処理αを実行し、電源電流Isが負極性の場合には処理βを実行する。これにより、電源短絡となる経路が連続することを防止することができる。 In summary, when the polarity of the power supply voltage Vs and the power supply current Is are both positive, the first process α is executed, and when the polarity of the power supply voltage Vs and the power supply current Is is both negative. Executes the second process, process β. When the polarities of the power supply voltage Vs and the power supply current Is are different, the process α is executed if the power supply current Is is positive, and the process β is executed if the power supply current Is is negative. Thereby, it can prevent that the path | route used as a power supply short circuit continues.
 なお、上記の処理において、電源電圧Vsと電源電流Isの極性が異なる場合、処理αも処理βも実行せずに、第一のアーム31および第二のアーム32への駆動パルスの生成を停止するようにしてもよい。この制御の場合、電源電流Isの極性に応じた制御は実施できないが、第一のアーム31および第二のアーム32への駆動パルスの生成を停止するので、電源電流Isが急成長する現象を抑止するができ、電源電流Isの高調波成分の抑制に寄与することができる。 In the above processing, when the polarities of the power supply voltage Vs and the power supply current Is are different, the generation of drive pulses to the first arm 31 and the second arm 32 is stopped without executing the processing α and the processing β. You may make it do. In the case of this control, control according to the polarity of the power supply current Is cannot be performed, but since the generation of the drive pulse to the first arm 31 and the second arm 32 is stopped, the phenomenon that the power supply current Is rapidly grows. This can be suppressed and can contribute to suppression of harmonic components of the power supply current Is.
 図18は、図11の制御フローによる動作と図17の制御フローによる動作との差異の説明に供する図である。図18において、上段部には電源電圧Vsの波形を模式的に示し、中段部には電源電流Isの波形を模式的に示している。また、下段部には、図11の制御フローによる動作と図17の制御フローによる動作との差異を示している。ここで、図18の横軸は時間を表しているが、微小時間での波形を表すため、電源電圧Vsの波形は線形として近似している。また、電源電圧Vsと電源電流Isの波形における中央線との間に位相差をΔtだけ持たせている。位相差Δtは、電源電圧Vsに対して電源電流Isが遅れる関係である。 FIG. 18 is a diagram for explaining the difference between the operation according to the control flow of FIG. 11 and the operation according to the control flow of FIG. In FIG. 18, the waveform of the power supply voltage Vs is schematically shown in the upper stage portion, and the waveform of the power supply current Is is schematically shown in the middle stage portion. The lower part shows the difference between the operation according to the control flow of FIG. 11 and the operation according to the control flow of FIG. Here, the horizontal axis of FIG. 18 represents time, but the waveform of the power supply voltage Vs is approximated as linear in order to represent a waveform in a minute time. Further, a phase difference of Δt is provided between the power supply voltage Vs and the center line in the waveform of the power supply current Is. The phase difference Δt is a relationship in which the power supply current Is is delayed with respect to the power supply voltage Vs.
 図11の制御フローによる動作の場合、電源電圧Vsの極性のみで判定しているため、電源電圧Vsの極性が正に転じた後は、処理βが継続している。処理βの部分において、電源電流Isが負極性である部分は、電源電流Isが正極性を想定したスイッチングパターンとなるため、電源短絡モードが連続することとなる。 In the case of the operation according to the control flow in FIG. 11, since the determination is made based only on the polarity of the power supply voltage Vs, the process β is continued after the polarity of the power supply voltage Vs turns positive. In the portion of the process β, the portion where the power source current Is is negative has a switching pattern assuming that the power source current Is is positive, and therefore the power source short-circuit mode continues.
 一方、図17の制御フローによる動作の場合、電源電圧Vsの極性だけでなく、電源電流Isの極性に応じて処理αまたは処理βが適切に選択されている。すなわち、図17の制御フローによる動作の場合、電源短絡モードが連続することは無く、電源電流Isの歪みを抑制することができる。 On the other hand, in the case of the operation according to the control flow of FIG. 17, the process α or the process β is appropriately selected according to not only the polarity of the power supply voltage Vs but also the polarity of the power supply current Is. That is, in the case of the operation according to the control flow of FIG. 17, the power supply short-circuit mode does not continue and distortion of the power supply current Is can be suppressed.
 ここまで述べたように、制御を構成する上で、スイッチング素子の駆動方法に対して詳細な制御を行う必要がある。これらの制御をアナログ回路またはロジック回路で構成した場合、制御方法が複雑であるが故に、制御装置が大型化することとなる。また、アナログ回路またはロジック回路で構成した場合、他のハードウェアによるノイズの影響を受け、誤動作するリクスがある。 As described so far, in configuring the control, it is necessary to perform detailed control on the switching element driving method. When these controls are configured by an analog circuit or a logic circuit, the control method becomes large because the control method is complicated. In the case of an analog circuit or a logic circuit, there is a risk of malfunction due to the influence of noise from other hardware.
 これに対し、制御系を演算器を用いたソフトウェアで実装する場合には、演算器のみを用いるため、装置が大型化することはない。また、ここまでに述べた制御ロジックをソフトウェアで実装した場合には、ノイズの影響で誤動作することは極めて少なく、誤動作を防止する回路を省略できるので、システム構成を小型化することが可能となる。 On the other hand, when the control system is implemented by software using an arithmetic unit, since only the arithmetic unit is used, the apparatus does not increase in size. In addition, when the control logic described so far is implemented in software, malfunctions due to the effects of noise are very rare, and a circuit that prevents malfunctions can be omitted, so that the system configuration can be reduced in size. .
 ここまで制御部10におけるパルスセレクタ部244に関して説明したが、次に第二アームパルス生成部25における同期整流動作の詳細に関して説明する。図19は、一般的なスイッチング素子における電流-損失特性を模式的に示す図である。図19には、寄生ダイオードの損失特性と、スイッチング素子のオン時の損失特性とが示されている。ここで、寄生ダイオードの損失特性における損失値と、スイッチング素子の損失特性における損失値とが逆転するときの電流値を第1の電流値とする。第一の電流値よりも電流値が小さいときは、スイッチング素子の損失特性の方が小さく、この領域を「低電流領域A」とする。また、第1の電流値よりも電流値が大きいときは、寄生ダイオードの損失特性の方が小さく、この領域を「高電流領域B」とする。なお、第1の電流値は、演算器の内部に保持されるか、もしくは演算器が読み取り可能なメモリに保持される。 So far, the pulse selector unit 244 in the control unit 10 has been described. Next, the details of the synchronous rectification operation in the second arm pulse generation unit 25 will be described. FIG. 19 is a diagram schematically showing current-loss characteristics in a general switching element. FIG. 19 shows the loss characteristic of the parasitic diode and the loss characteristic when the switching element is on. Here, the current value when the loss value in the loss characteristic of the parasitic diode and the loss value in the loss characteristic of the switching element are reversed is defined as the first current value. When the current value is smaller than the first current value, the loss characteristic of the switching element is smaller, and this region is referred to as a “low current region A”. Further, when the current value is larger than the first current value, the loss characteristic of the parasitic diode is smaller, and this region is referred to as a “high current region B”. Note that the first current value is held inside the calculator, or held in a memory that can be read by the calculator.
 一般的に、スイッチング素子の寄生ダイオードは、図19に示すように、低電流領域Aでは損失が多く、スイッチング素子オン時の損失の方が小さいことが知られている。そこで、スイッチング素子の一つであるMOSFETの場合、スイッチング特性を利用した同期整流技術を用いる場合がある。ここで言うスイッチング特性とは、MOSFETのゲートにオン指令を与えたとき、ドレインからソースに向かう方向、およびソースからドレインに向かう方向の何れに対しても、ON状態となる特性、すなわちスイッチング素子の双方向に電流を流すことができる特性がある。この特性は、バイポーラトランジスタ、IGBTといったスイッチング素子では一方向しか電流を導通させることができない点と異なる特性である。この特性を利用した場合、図19に示す低電流領域Aでは、寄生ダイオードを使わず、スイッチング素子に電流を導通させることで、寄生ダイオードを用いるより高効率化を図ることができる。 Generally, as shown in FIG. 19, the parasitic diode of the switching element has a large loss in the low current region A, and it is known that the loss when the switching element is on is smaller. Therefore, in the case of a MOSFET that is one of the switching elements, a synchronous rectification technique using switching characteristics may be used. The switching characteristic referred to here is a characteristic that is turned on in both the direction from the drain to the source and the direction from the source to the drain when an ON command is given to the gate of the MOSFET, that is, the switching element. There is a characteristic that allows current to flow in both directions. This characteristic is different from that in which a switching element such as a bipolar transistor or IGBT can conduct current only in one direction. In the case of utilizing this characteristic, in the low current region A shown in FIG. 19, the parasitic diode is not used, and the current is made to flow through the switching element, so that higher efficiency can be achieved than using the parasitic diode.
 次に、実施の形態1におけるスイッチング素子の動作と同期整流との関係性に関して説明する。なお、本説明の前に、MOSFETの概略の構造について、図20を参照して説明する。図20は、MOSFETの概略構造を示す模式的断面図である。図20では、n型MOSFETを例示している。 Next, the relationship between the operation of the switching element and the synchronous rectification in the first embodiment will be described. Prior to this description, the schematic structure of the MOSFET will be described with reference to FIG. FIG. 20 is a schematic cross-sectional view showing a schematic structure of a MOSFET. FIG. 20 illustrates an n-type MOSFET.
 n型MOSFETの場合、図20に示すように、p型の半導体基板が用いられる。p型の半導体基板には、ソース電極(S)、ドレイン電極(D)およびゲート電極(G)が形成される。ソース電極(S)およびドレイン電極(D)と接する部位には、高濃度の不純物がイオン注入されてn型の領域が形成される。また、p型の半導体基板において、n型の領域が形成されない部位とゲート電極(G)との間には、酸化絶縁膜が形成される。すなわち、ゲート電極(G)と、半導体基板におけるp型の領域との間には、酸化絶縁膜が介している。 In the case of an n-type MOSFET, a p-type semiconductor substrate is used as shown in FIG. A source electrode (S), a drain electrode (D), and a gate electrode (G) are formed on a p-type semiconductor substrate. A high-concentration impurity is ion-implanted in a portion in contact with the source electrode (S) and the drain electrode (D) to form an n-type region. In the p-type semiconductor substrate, an oxide insulating film is formed between a portion where the n-type region is not formed and the gate electrode (G). That is, the oxide insulating film is interposed between the gate electrode (G) and the p-type region in the semiconductor substrate.
 ゲート電極(G)に正電圧が印加されると、半導体基板におけるp型の領域と酸化絶縁膜との間の境界面に電子が引き寄せられ、負に帯電する。電子が集まった所は、電子の密度がホールよりも多くなりn型化する。このn型化した部分は電流の通り道となりチャネル(図20の例ではn型チャネル)と呼ばれる。 When a positive voltage is applied to the gate electrode (G), electrons are attracted to the interface between the p-type region and the oxide insulating film in the semiconductor substrate, and are negatively charged. Where the electrons gather, the electron density is higher than that of the holes and becomes n-type. This n-type portion becomes a current path and is called a channel (in the example of FIG. 20, an n-type channel).
 同期整流を行う場合、MOSFETをONに制御するので、通流する電流は、寄生ダイオード側よりもチャネル側の方に多く流れるようになる。 When performing synchronous rectification, the MOSFET is controlled to be ON, so that a larger current flows in the channel side than in the parasitic diode side.
 次に、具体的な同期整流の動作について説明する。まず、電源電圧Vsの極性が正の場合について説明する。図21は、平滑コンデンサ4を充電する場合において第四のスイッチング素子322をONに制御しないときの電流経路を示す図であり、図22は、平滑コンデンサ4を充電する場合において第四のスイッチング素子322をONに制御したときの電流経路を示す図である。 Next, a specific synchronous rectification operation will be described. First, a case where the polarity of the power supply voltage Vs is positive will be described. FIG. 21 is a diagram illustrating a current path when the fourth switching element 322 is not controlled to be turned ON when the smoothing capacitor 4 is charged. FIG. 22 is a diagram illustrating the fourth switching element when the smoothing capacitor 4 is charged. It is a figure which shows the electric current path | route when 322 is controlled to ON.
 図21のように第四のスイッチング素子322がOFF状態の場合、充電電流は第四のスイッチング素子322の寄生ダイオード側を流れることになる。一方、第四のスイッチング素子322をONに制御した場合、充電電流は、図22のように第四のスイッチング素子322のチャネル側を流れることになる。初期充電を除き、充電電流はあまり大きくならない。このため、第四のスイッチング素子322をONに制御してチャネル側に電流を流す図22の方が、寄生ダイオードに電流を流す図21よりも低損失となる。 When the fourth switching element 322 is in the OFF state as shown in FIG. 21, the charging current flows through the parasitic diode side of the fourth switching element 322. On the other hand, when the fourth switching element 322 is controlled to be ON, the charging current flows through the channel side of the fourth switching element 322 as shown in FIG. Except for initial charging, the charging current does not become very large. For this reason, the loss in FIG. 22 in which the fourth switching element 322 is controlled to be ON and current is supplied to the channel side is lower than that in FIG. 21 in which current is supplied to the parasitic diode.
 また、図23は、電源短絡の動作モードおいて第四のスイッチング素子322をONに制御しないときの電流経路を示す図であり、図24は、電源短絡の動作モードおいて第四のスイッチング素子322をONに制御したときの電流経路を示す図である。なお、図23および図24の何れも電源電圧の極性は正である。 FIG. 23 is a diagram illustrating a current path when the fourth switching element 322 is not controlled to be ON in the power supply short-circuit operation mode, and FIG. 24 is a diagram illustrating the fourth switching element in the power supply short-circuit operation mode. It is a figure which shows the electric current path | route when 322 is controlled to ON. 23 and 24, the polarity of the power supply voltage is positive.
 図23のように第四のスイッチング素子322がOFF状態の場合、短絡電流は第四のスイッチング素子322の寄生ダイオード側を流れることになる。一方、図24のように第四のスイッチング素子322をONに制御した場合、短絡電流は、図22と同様に第四のスイッチング素子322のチャネル側を流れることになる。短絡経路にはリアクトル2があるため、短絡電流の大きさはリアクトル2によって抑えられる。このため、第四のスイッチング素子322をONに制御してチャネル側に電流を流す図24の方が、寄生ダイオードに電流を流す図23よりも低損失となる。 23, when the fourth switching element 322 is in the OFF state, the short-circuit current flows through the parasitic diode side of the fourth switching element 322. On the other hand, when the fourth switching element 322 is controlled to be ON as shown in FIG. 24, the short-circuit current flows through the channel side of the fourth switching element 322 as in FIG. Since there is the reactor 2 in the short circuit path, the magnitude of the short circuit current is suppressed by the reactor 2. Therefore, the loss in FIG. 24 in which the fourth switching element 322 is controlled to be ON and current is supplied to the channel side is lower than that in FIG. 23 in which current is supplied to the parasitic diode.
 次に、電源電圧Vsの極性が負の場合について説明する。図25は、平滑コンデンサ4を充電する場合において第三のスイッチング素子321をONに制御しないときの電流経路を示す図であり、図26は、平滑コンデンサ4を充電する場合において第三のスイッチング素子321をONに制御したときの電流経路を示す図である。 Next, the case where the polarity of the power supply voltage Vs is negative will be described. FIG. 25 is a diagram illustrating a current path when the third switching element 321 is not controlled to be ON when charging the smoothing capacitor 4. FIG. 26 is a diagram illustrating the third switching element when charging the smoothing capacitor 4. It is a figure which shows the electric current path when 321 is controlled to ON.
 図25のように第三のスイッチング素子321がOFF状態の場合、充電電流は第三のスイッチング素子321の寄生ダイオード側を流れることになる。一方、第三のスイッチング素子321をONに制御した場合、充電電流は、図26のように第三のスイッチング素子321のチャネル側を流れることになる。ただし、初期充電を除き、充電電流はあまり大きくならない。このため、第三のスイッチング素子321をONに制御してチャネル側に電流を流す図26の方が、寄生ダイオードに電流を流す図25よりも低損失となる。 When the third switching element 321 is in the OFF state as shown in FIG. 25, the charging current flows through the parasitic diode side of the third switching element 321. On the other hand, when the third switching element 321 is controlled to be ON, the charging current flows through the channel side of the third switching element 321 as shown in FIG. However, the charging current does not become very large except for the initial charging. For this reason, the loss in FIG. 26 in which the third switching element 321 is controlled to be ON and current is supplied to the channel side is lower than that in FIG. 25 in which current is supplied to the parasitic diode.
 また、図27は、電源短絡の動作モードおいて第三のスイッチング素子321をONに制御しないときの電流経路を示す図であり、図28は、電源短絡の動作モードおいて第三のスイッチング素子321をONに制御したときの電流経路を示す図である。なお、図27および図28の何れも電源電圧の極性は負である。 FIG. 27 is a diagram illustrating a current path when the third switching element 321 is not controlled to be ON in the power supply short-circuit operation mode, and FIG. 28 is a diagram illustrating the third switching element in the power-supply short-circuit operation mode. It is a figure which shows the electric current path when 321 is controlled to ON. 27 and 28, the polarity of the power supply voltage is negative.
 図27のように第三のスイッチング素子321がOFF状態の場合、短絡電流は第三のスイッチング素子321の寄生ダイオード側を流れることになる。一方、図28のように第三のスイッチング素子321をONに制御した場合、短絡電流は、図26と同様に第三のスイッチング素子321のチャネル側を流れることになる。短絡経路にはリアクトル2があるため、短絡電流の大きさはリアクトル2によって抑えられる。このため、第三のスイッチング素子321をONに制御してチャネル側に電流を流す図28の方が、寄生ダイオードに電流を流す図27よりも低損失となる。 When the third switching element 321 is in the OFF state as shown in FIG. 27, the short-circuit current flows through the parasitic diode side of the third switching element 321. On the other hand, when the third switching element 321 is controlled to be ON as shown in FIG. 28, the short-circuit current flows on the channel side of the third switching element 321 as in FIG. Since there is the reactor 2 in the short circuit path, the magnitude of the short circuit current is suppressed by the reactor 2. Therefore, FIG. 28 in which the third switching element 321 is controlled to be ON and current is supplied to the channel side has a lower loss than that in FIG. 27 in which current is supplied to the parasitic diode.
 以上による同期整流技術により低損失化を図ることが可能となる。この同期整流技術は、ここまでに説明した制御部10の機能により実現することができる。 The loss reduction can be achieved by the synchronous rectification technology as described above. This synchronous rectification technique can be realized by the function of the control unit 10 described so far.
 なお、図19に示すように、高電流領域Bの場合、スイッチング素子のON時の損失特性に対して、寄生ダイオードの損失の方が小さくなる。従って、高電流領域Bの場合、第二のアーム32のスイッチング動作を停止した方が低損失になる。このため、第二のアーム32の第三のスイッチング素子321および第四のスイッチング素子322に流れる電流の大きさに応じてスイッチング制御の制御方式を切り替えることが好ましい実施態様となる。なお、第三のスイッチング素子321および第四のスイッチング素子322に流れる電流値は、電流検出器6の検出値を使用すれば、制御部10の演算器によって算出可能である。 Note that, as shown in FIG. 19, in the case of the high current region B, the loss of the parasitic diode is smaller than the loss characteristic when the switching element is ON. Therefore, in the case of the high current region B, the loss is reduced when the switching operation of the second arm 32 is stopped. For this reason, it is a preferred embodiment to switch the control method of the switching control according to the magnitude of the current flowing through the third switching element 321 and the fourth switching element 322 of the second arm 32. Note that the current value flowing through the third switching element 321 and the fourth switching element 322 can be calculated by the calculator of the control unit 10 if the detection value of the current detector 6 is used.
 このような処理を実現する場合においても、制御部10に演算器を用いたソフトウェア実装を行った方が、機能を集約することができ、装置全体を小型化することができる。 Even in the case where such processing is realized, it is possible to consolidate functions and to reduce the size of the entire apparatus by implementing software implementation using an arithmetic unit in the control unit 10.
 また、制御部10をハードウェアを用いて構成した場合、他のハードウェアによってノイズの影響を受け、誤動作するリスクがある。例えば、同期整流の際、ONすべきスイッチング素子が、ノイズの影響によってOFF状態となってしまった場合を考える。この場合、上記で説明したようにスイッチング素子での損失が増加し、スイッチング素子での発熱量が増加する。また、スイッチング素子のON状態およびOFF状態が連続して変化した場合、スイッチング素子の導通損だけでなくスイッチング損失が発生するため、スイッチング素子での発熱量がさらに増加する。スイッチング素子の発熱量の増加によって、スイッチング素子の破壊のリスクが高まる。これに対し、制御系を演算器を用いたソフトウェアで実装する場合には、ノイズの影響で誤動作することは極めて少ない。このため、制御系を演算器を用いて構成することは、スイッチング素子の破壊のリスクを低減させる効果がある。 Also, when the control unit 10 is configured using hardware, there is a risk of malfunction due to the influence of noise by other hardware. For example, consider a case where a switching element to be turned on during synchronous rectification is turned off due to the influence of noise. In this case, as described above, the loss in the switching element increases, and the amount of heat generated in the switching element increases. Further, when the ON state and OFF state of the switching element are continuously changed, not only the conduction loss of the switching element but also the switching loss is generated, so that the amount of heat generated in the switching element further increases. The risk of destruction of the switching element increases due to an increase in the amount of heat generated by the switching element. On the other hand, when the control system is implemented by software using an arithmetic unit, malfunctions due to noise are very rare. For this reason, configuring the control system using an arithmetic unit has an effect of reducing the risk of destruction of the switching element.
 上記の説明から理解できるように、第一のアーム31は、平滑コンデンサ4の充電電圧の昇圧と、電源電流Isの高調波成分抑制に寄与する。また、第二のアーム32は、同期整流による低損失化に寄与する。第一のアーム31は、キャリア周波数に依存した周期でスイッチング制御するのに対して、第二のアーム32は、電源電圧Vsもしくは電源電流Isの周期に依存するため、50~60Hz周辺でスイッチング制御することとなる。従って、演算器で制御を実現する場合、第一のアーム31に対する制御と、第二のアーム32に対する制御とは、それぞれ独立した演算器の機能を用いることが望ましい。 As can be understood from the above description, the first arm 31 contributes to boosting the charging voltage of the smoothing capacitor 4 and suppressing harmonic components of the power supply current Is. Further, the second arm 32 contributes to a reduction in loss due to synchronous rectification. The first arm 31 performs switching control with a period depending on the carrier frequency, whereas the second arm 32 depends on the period of the power supply voltage Vs or the power supply current Is, so that the switching control is performed around 50 to 60 Hz. Will be. Therefore, when the control is realized by the arithmetic unit, it is desirable that the control for the first arm 31 and the control for the second arm 32 use functions of independent arithmetic units, respectively.
 前述した図13では、電源電圧Vs、電源電流Is、キャリアの各波形、および、各スイッチング素子への駆動パルスの波形を示している。図13を参照すると、第一のスイッチング素子311および第二のスイッチング素子312に比して、第三のスイッチング素子321および第四のスイッチング素子322の方が低周波駆動であることが分かる。従って、制御部10を演算器を用いて構成する場合、第一のスイッチング素子311および第二のスイッチング素子312の制御は、タイマを用いた制御系で実装し、第三のスイッチング素子321および第四のスイッチング素子322の制御は、汎用出力ポートまたは外部割込み機能といった当該タイマと異なる機能を用いて実装する。これにより、演算器の少ないリソースを使用することができ、より安価な演算器で実現することができる。 FIG. 13 described above shows the waveforms of the power supply voltage Vs, the power supply current Is, the carrier, and the drive pulse to each switching element. Referring to FIG. 13, it can be seen that the third switching element 321 and the fourth switching element 322 are driven at a lower frequency than the first switching element 311 and the second switching element 312. Therefore, when the control unit 10 is configured using an arithmetic unit, the control of the first switching element 311 and the second switching element 312 is implemented by a control system using a timer, and the third switching element 321 and the second switching element 312 are controlled. The control of the fourth switching element 322 is implemented using a function different from the timer, such as a general-purpose output port or an external interrupt function. As a result, it is possible to use resources with few computing units, and it is possible to realize with a cheaper computing unit.
 また、第一のアーム31のスイッチング速度を決めるキャリアの周期と、電源電圧Vsおよび電源電流Isの各周期が必ずしも同期するとは限らない。図29は、キャリアの周期と電源電圧Vsの周期とが同期しない場合の駆動パルス波形の例を示す図である。なお、図29でも、図18と同様に、微小時間での波形を表すため、電源電圧Vsは線形近似した波形で表している。図29の例によれば、第一のスイッチング素子311への駆動パルスpulse_311および第二のスイッチング素子312への駆動パルスpulse_312は、キャリアに基づいて生成され、また、第三のスイッチング素子321への駆動パルスpulse_321および第四のスイッチング素子322への駆動パルスpulse_322も、キャリアに同期して生成されている。 Also, the carrier cycle that determines the switching speed of the first arm 31 and the cycles of the power supply voltage Vs and the power supply current Is are not necessarily synchronized. FIG. 29 is a diagram illustrating an example of a drive pulse waveform when the carrier cycle and the cycle of the power supply voltage Vs are not synchronized. In FIG. 29, similarly to FIG. 18, the power supply voltage Vs is represented by a linear approximation waveform in order to represent a waveform in a minute time. According to the example of FIG. 29, the drive pulse pulse_311 to the first switching element 311 and the drive pulse pulse_312 to the second switching element 312 are generated based on the carrier, and also to the third switching element 321. The drive pulse pulse_321 and the drive pulse pulse_322 to the fourth switching element 322 are also generated in synchronization with the carrier.
 ロジック回路を用いた一般的なPWM制御の観点によれば、スイッチング素子の駆動パルスの更新は、キャリアの山か、もしくはキャリアの谷でしか変更することができないというのが普通の考え方である。現に、図29の例では、キャリアの山および谷でデューティ指令値を更新している。そのため、図29のΔtの区間では、実際の電源電圧が正極性となっているのに対して、制御系は電源電圧Vsが負極性の場合の制御を行ってしまい、制御性が悪化してしまう。これは、各スイッチング素子への駆動パルスの生成タイミングと、電源電圧Vsに対する駆動パルスの生成タイミングとが、キャリアの分解能により決定されてしまい、電源電圧Vsのゼロクロス点との間で遅延時間が発生していることに起因する。従って、演算器を用いた場合には、第一のスイッチング素子311および第二のスイッチング素子312への駆動パルスの生成と、第三のスイッチング素子321および第四のスイッチング素子322への駆動パルスの生成とは、それぞれに独立した演算機能を用いた方が望ましいと言うことができる。これにより、演算器を用いた場合には、第一のアーム31のデューティ指令値の更新は、キャリアの山、もしくはキャリアの谷以外のキャリア周波数(スイッチング周波数)に依存した周期タイミングであっても変更できる。 From the viewpoint of general PWM control using a logic circuit, it is a normal idea that the update of the driving pulse of the switching element can be changed only at the peak of the carrier or at the valley of the carrier. In fact, in the example of FIG. 29, the duty command value is updated at the peaks and valleys of the carrier. Therefore, in the section of Δt in FIG. 29, the actual power supply voltage is positive, whereas the control system performs control when the power supply voltage Vs is negative, and the controllability deteriorates. End up. This is because the generation timing of the drive pulse for each switching element and the generation timing of the drive pulse for the power supply voltage Vs are determined by the carrier resolution, and a delay time occurs between the zero cross point of the power supply voltage Vs. It is caused by doing. Therefore, when an arithmetic unit is used, generation of drive pulses to the first switching element 311 and the second switching element 312 and generation of drive pulses to the third switching element 321 and the fourth switching element 322 are performed. It can be said that it is preferable to use an independent calculation function for generation. Thereby, when the arithmetic unit is used, the update of the duty command value of the first arm 31 may be performed at a periodic timing depending on the carrier frequency (switching frequency) other than the carrier peak or the carrier valley. Can change.
 図30は、図1に示した直流電源装置の制御部10に外部割込み機能を付加した構成を示す図である。すなわち、第一のスイッチング素子311および第二のスイッチング素子312への駆動パルスの生成、および第三のスイッチング素子321および第四のスイッチング素子322への駆動パルスの生成のそれぞれを独立した演算機能を用いて構成した例である。 FIG. 30 is a diagram showing a configuration in which an external interrupt function is added to the controller 10 of the DC power supply device shown in FIG. In other words, independent generation functions for generating drive pulses to the first switching element 311 and the second switching element 312 and generating drive pulses to the third switching element 321 and the fourth switching element 322 are provided. It is an example configured by using.
 図30の構成では、電源電圧Vsを検出する第一の電圧検出器5と制御部10との間に電源電圧極性検出部20が設けられている。電源電圧極性検出部20は、電源電圧Vsの極性を検出し、検出した極性を表す電源電圧極性信号pulse_Vsを生成して制御部10の外部割込みポート10aへ出力する。 30, a power supply voltage polarity detection unit 20 is provided between the first voltage detector 5 that detects the power supply voltage Vs and the control unit 10. The power supply voltage polarity detection unit 20 detects the polarity of the power supply voltage Vs, generates a power supply voltage polarity signal pulse_Vs representing the detected polarity, and outputs it to the external interrupt port 10 a of the control unit 10.
 図31は、電源電圧極性検出部20の動作説明に供する図である。図31において、上段部には電源電圧Vsの波形を示し、中段部には制御部10の外部割込みポート10aに入力される電源電圧極性信号pulse_Vsを示し、下段部には制御部10の内部で使用される制御演算のトリガ信号を示している。電源電圧Vsの極性が正の場合、電源電圧極性信号pulse_VsはHighレベルとなり、電源電圧Vsの極性が負の場合、電源電圧極性信号pulse_VsはLowレベルとなっている。ただし、これらの信号極性はあくまで一例であり、逆転していても構わない。また、電源電圧極性信号pulse_Vsは制御部10に対する外部割込み信号であり、電源電圧Vsの極性の変化を表す信号であれば、どのような信号形式でもよい。制御部10は、電源電圧極性信号pulse_Vsのエッジに反応して、トリガ信号を生成する。制御部10は、トリガ信号が生成されると、第二のアーム32の第三のスイッチング素子321および第四のスイッチング素子322への駆動パルスを生成する。 FIG. 31 is a diagram for explaining the operation of the power supply voltage polarity detection unit 20. In FIG. 31, the upper stage shows the waveform of the power supply voltage Vs, the middle stage shows the power supply voltage polarity signal pulse_Vs input to the external interrupt port 10a of the control unit 10, and the lower stage shows the inside of the control unit 10. The trigger signal of the control calculation used is shown. When the polarity of the power supply voltage Vs is positive, the power supply voltage polarity signal pulse_Vs is at a high level, and when the polarity of the power supply voltage Vs is negative, the power supply voltage polarity signal pulse_Vs is at a low level. However, these signal polarities are merely examples, and may be reversed. The power supply voltage polarity signal pulse_Vs is an external interrupt signal for the control unit 10 and may be in any signal format as long as it represents a change in the polarity of the power supply voltage Vs. The control unit 10 generates a trigger signal in response to the edge of the power supply voltage polarity signal pulse_Vs. When the trigger signal is generated, the control unit 10 generates drive pulses for the third switching element 321 and the fourth switching element 322 of the second arm 32.
 図32は、図31を用いて説明した制御手法によって制御したときの動作波形を示す図である。図32において、上段部には、電源電圧Vsの波形を示し、中段部にはキャリアの波形を示し、下段部には4つのスイッチング素子への駆動パルスpulse_311,pulse_312,pulse_321,pulse_322、および電源電圧極性信号pulse_Vsを示している。なお、図32でも、図18および図29と同様に、微小時間での波形を表すため、電源電圧Vsは線形近似した波形で表している。 FIG. 32 is a diagram showing operation waveforms when the control method described with reference to FIG. 31 is used. In FIG. 32, the upper stage shows the waveform of the power supply voltage Vs, the middle stage shows the waveform of the carrier, the lower stage shows the drive pulses pulse_311, pulse_312, pulse_321, pulse_322 to the four switching elements, and the power supply voltage. The polarity signal pulse_Vs is shown. In FIG. 32 as well, as in FIGS. 18 and 29, the power supply voltage Vs is represented by a linear approximation waveform in order to represent a waveform in a minute time.
 図32において、第一のスイッチング素子311への駆動パルスpulse_311および第二のスイッチング素子312への駆動パルスpulse_312は、キャリアに基づいて生成される。一方、第三のスイッチング素子321への駆動パルスpulse_321および第四のスイッチング素子322への駆動パルスpulse_322は、キャリアには同期せず、電源電圧極性信号pulse_Vsに基づいて生成される。これにより、第三のスイッチング素子321および第四のスイッチング素子322の駆動状態は、キャリア(スイッチング)周波数以外の周波数に依存し、第一のスイッチング素子311への駆動パルスpulse_311および第二のスイッチング素子312の制御状態に依存しない。図29の場合では、第三のスイッチング素子321および第四のスイッチング素子322への駆動パルスpulse_322の切り替わりが電源電圧Vsのゼロクロスに対してΔtだけ遅延が生じていたが、図32の場合では、遅延は生じていない。遅延が生じない理由は、第三のスイッチング素子321および第四のスイッチング素子322に対する制御が、第一のスイッチング素子311および第二のスイッチング素子312に対する制御に依存しないからである。 32, the drive pulse pulse_311 to the first switching element 311 and the drive pulse pulse_312 to the second switching element 312 are generated based on the carrier. On the other hand, the drive pulse pulse_321 to the third switching element 321 and the drive pulse pulse_322 to the fourth switching element 322 are not synchronized with the carrier but are generated based on the power supply voltage polarity signal pulse_Vs. Accordingly, the driving states of the third switching element 321 and the fourth switching element 322 depend on frequencies other than the carrier (switching) frequency, and the drive pulse pulse_311 to the first switching element 311 and the second switching element It does not depend on the control state of 312. In the case of FIG. 29, the switching of the drive pulse pulse_322 to the third switching element 321 and the fourth switching element 322 is delayed by Δt with respect to the zero cross of the power supply voltage Vs. In the case of FIG. There is no delay. The reason why the delay does not occur is that the control for the third switching element 321 and the fourth switching element 322 does not depend on the control for the first switching element 311 and the second switching element 312.
 なお、図32では、電源電圧極性信号pulse_Vsに応じた外部割込みを演算器における最優先処理としているが、電源高調波抑制制御に重点を置く場合には、第一のアーム31の第一のスイッチング素子311および第二のスイッチング素子312の制御を行うための搬送波割込みを最優先処理とすることも可能である。いずれにしても、演算器を用いることで柔軟な対応を行うことができる。 In FIG. 32, the external interrupt according to the power supply voltage polarity signal pulse_Vs is the highest priority processing in the arithmetic unit. However, when emphasizing the power harmonic suppression control, the first switching of the first arm 31 is performed. A carrier wave interrupt for controlling the element 311 and the second switching element 312 can be set as the highest priority process. In any case, flexible handling can be performed by using an arithmetic unit.
 以上説明したように、実施の形態1では、第一のスイッチング素子311および第二のスイッチング素子312への駆動パルスの生成と、第三のスイッチング素子321および第四のスイッチング素子322への駆動パルスの生成とを、それぞれに独立した演算機能を用いることとしたので、制御性の改善効果および損失低減の効果を創出することができる。なお、ここまでに説明した制御構成はあくまでも一例であり、駆動パルスの生成に関して演算機能の独立性があれば、何れの手法で実現してもよい。また第一のアームにおけるデューティ指令値の更新はキャリア2周期に1回等の間引きを行った場合においても問題ない。 As described above, in the first embodiment, the generation of drive pulses to the first switching element 311 and the second switching element 312 and the drive pulse to the third switching element 321 and the fourth switching element 322 are performed. Since the independent calculation function is used for each of the generations, it is possible to create an effect of improving controllability and an effect of reducing loss. Note that the control configuration described so far is merely an example, and any method may be used as long as there is independence of a calculation function with respect to generation of a drive pulse. Further, the update of the duty command value in the first arm is not a problem even when thinning is performed once every two carrier cycles.
実施の形態2.
 図33は、実施の形態2に係る直流電源装置の構成例を示す図である。実施の形態1,2では、ブリッジ回路3を構成する第一のアーム31を上下アームの一対のスイッチング素子からなる一つの素子対を用いて構成していたが、素子対の数を複数にしてもよい。図33では、第1のアーム31を二つの素子対を用いて構成している。具体的に説明すると、第1のアーム31は、直列接続された第一のスイッチング素子311および第二のスイッチング素子312に加え、直列接続された第五のスイッチング素子313および第六のスイッチング素子314を備える。さらに、第一のスイッチング素子311と第五のスイッチング素子313とは並列に接続され、第二のスイッチング素子312と第六のスイッチング素子314とは並列に接続されて構成されている。
Embodiment 2. FIG.
FIG. 33 is a diagram illustrating a configuration example of a DC power supply device according to the second embodiment. In the first and second embodiments, the first arm 31 configuring the bridge circuit 3 is configured by using one element pair including a pair of switching elements of the upper and lower arms, but the number of element pairs is plural. Also good. In FIG. 33, the first arm 31 is configured using two element pairs. Specifically, the first arm 31 includes a first switching element 311 and a second switching element 312 connected in series, as well as a fifth switching element 313 and a sixth switching element 314 connected in series. Is provided. Further, the first switching element 311 and the fifth switching element 313 are connected in parallel, and the second switching element 312 and the sixth switching element 314 are connected in parallel.
 二つのスイッチング素子対が並列に接続された第一のアーム31を駆動する際には、上アームを構成する二つのスイッチング素子のそれぞれを同時に駆動し、また、下アームを構成する二つのスイッチング素子のそれぞれを同時に駆動する。図33の構成であれば、第一のスイッチング素子311と第五のスイッチング素子313のそれぞれを同時に駆動し、第二のスイッチング素子312と第六のスイッチング素子314のそれぞれを同時に駆動する。なお、並列に接続された二つのスイッチング素子のそれぞれを同時に駆動することを「並列駆動」と呼ぶ。 When driving the first arm 31 in which two pairs of switching elements are connected in parallel, the two switching elements constituting the upper arm are simultaneously driven, and the two switching elements constituting the lower arm are also driven. Are driven simultaneously. 33, the first switching element 311 and the fifth switching element 313 are simultaneously driven, and the second switching element 312 and the sixth switching element 314 are simultaneously driven. In addition, simultaneously driving each of the two switching elements connected in parallel is called “parallel driving”.
 並列に接続された二つのスイッチング素子を並列駆動することにより、二つのスイッチング素子に流れる電流は、一つのときの二分の一となる。図19の特性から明らかなように、電流が小さくなれば、スイッチング素子の損失は小さくなるので、第一のアーム31で発生する損失が低減され、ブリッジ回路3における第一のアーム31と第二のアーム32との間の損失の偏りを小さくすることができ、その結果、第一のアーム31と第二のアーム32との間の発熱の偏りを小さくすることができる。 By driving in parallel two switching elements connected in parallel, the current flowing through the two switching elements is half that of one. As is clear from the characteristics of FIG. 19, if the current is reduced, the loss of the switching element is reduced. Therefore, the loss generated in the first arm 31 is reduced, and the first arm 31 and the second arm in the bridge circuit 3 are reduced. The bias of the loss between the first arm 31 and the second arm 32 can be reduced. As a result, the bias of the heat generation between the first arm 31 and the second arm 32 can be reduced.
 なお、図33では、二つの素子対を並列に接続する構成を例示しているが、二つに限定されるものではなく、三つ以上の素子対のそれぞれを並列接続して構成してもよい。すなわち、第五のスイッチング素子313および第六のスイッチング素子314のそれぞれは、並列接続される複数のスイッチング素子を備えていてもよい。なお、n個(nは自然数)の素子対を用いて構成した場合、一つの素子対に流れる電流はn分の1となるので、第一のアーム31における損失をさらに小さくすることができる。なお、アームごとの損失の偏りを完全に抑制する必要はなく、損失の偏りが許容される範囲において、並列に接続する素子対の数を選定すればよい。 In addition, in FIG. 33, although the structure which connects two element pairs in parallel is illustrated, it is not limited to two, You may comprise by connecting each of three or more element pairs in parallel. Good. That is, each of the fifth switching element 313 and the sixth switching element 314 may include a plurality of switching elements connected in parallel. In the case of using n (n is a natural number) element pairs, the current flowing through one element pair is 1 / n, so that the loss in the first arm 31 can be further reduced. Note that it is not necessary to completely suppress the bias of loss for each arm, and the number of element pairs connected in parallel may be selected within a range in which the bias of loss is allowed.
 また、上述の例では、第一のアーム31における並列接続された二つのスイッチング素子を同時に駆動することを説明したが、並列接続された二つのスイッチング素子の位相を180°ずらして制御する、いわゆるインタリーブ制御を行ってもよい。図34は、実施の形態2に係る直流電源装置の他の構成例を示す図である。 In the above-described example, the two switching elements connected in parallel in the first arm 31 are driven at the same time. However, the phase of the two switching elements connected in parallel is controlled by shifting by 180 °. Interleave control may be performed. FIG. 34 is a diagram illustrating another configuration example of the DC power supply device according to the second embodiment.
 図34において、交流電源1と第一のアーム31との間には第一のリアクトル2aおよび第二のリアクトル2bが設けられている。第一のリアクトル2aは、一端が交流電源1における一方側の出力端に接続され、他端が第一のスイッチング素子311と第二のスイッチング素子312との接続点との間に接続され、第二のリアクトル2bは、一端が交流電源1における一方側の出力端に接続され、他端が第一のスイッチング素子311と第二のスイッチング素子312との接続点に接続されている。 34, a first reactor 2a and a second reactor 2b are provided between the AC power source 1 and the first arm 31. One end of the first reactor 2a is connected to one output end of the AC power source 1, and the other end is connected between a connection point between the first switching element 311 and the second switching element 312. One end of the second reactor 2 b is connected to an output end on one side of the AC power supply 1, and the other end is connected to a connection point between the first switching element 311 and the second switching element 312.
 図34のように構成された直流電源装置100では、並列接続された第一のスイッチング素子311と第五のスイッチング素子313をONにする際の位相を180°ずらして制御し、また、並列接続された第二のスイッチング素子312と第六のスイッチング素子314をONにする際の位相を180°ずらして制御することでインタリーブ駆動させることが可能である。第一のアーム31をインタリーブ駆動することにより、高周波化が容易となり、リアクトルの小型化、およびリアクトル損失の低減が可能となる。 In the DC power supply device 100 configured as shown in FIG. 34, the phase when turning on the first switching element 311 and the fifth switching element 313 connected in parallel is shifted by 180 °, and the parallel connection is performed. The second switching element 312 and the sixth switching element 314 that have been turned on can be driven in an interleaved manner by controlling the phase when the second switching element 312 and the sixth switching element 314 are turned on by shifting 180 degrees. By driving the first arm 31 in an interleaved manner, it is easy to increase the frequency, and the reactor can be downsized and the reactor loss can be reduced.
実施の形態3.
 実施の形態1および実施の形態2で説明した直流電源装置は、直流電力を交流電力に変換してモータを駆動するインバータに直流電圧を供給する装置として用いることができる。
Embodiment 3 FIG.
The DC power supply apparatus described in Embodiment 1 and Embodiment 2 can be used as an apparatus that converts DC power into AC power and supplies a DC voltage to an inverter that drives a motor.
 図35は、実施の形態1に示した直流電源装置をモータ駆動装置に適用した例を示す図である。図35に示す実施の形態3に係るモータ駆動装置101は、実施の形態1に係る直流電源装置100の出力側にインバータ50aが負荷として接続されている。そして、インバータ50aの出力側には、モータ50bが接続されている。インバータ50aは、直流電源装置100の出力電圧を交流電圧に変換してモータ50bに印加することでモータ50bを駆動する。なお、図35では、モータ駆動装置101を構成する直流電源装置100として、実施の形態1の直流電源装置100を適用する例を示しているが、実施の形態2に係る直流電源装置100を適用してもよい。 FIG. 35 is a diagram showing an example in which the DC power supply device shown in the first embodiment is applied to a motor drive device. In motor drive device 101 according to Embodiment 3 shown in FIG. 35, inverter 50a is connected as a load to the output side of DC power supply device 100 according to Embodiment 1. A motor 50b is connected to the output side of the inverter 50a. The inverter 50a drives the motor 50b by converting the output voltage of the DC power supply device 100 into an AC voltage and applying it to the motor 50b. 35 shows an example in which the DC power supply device 100 according to the first embodiment is applied as the DC power supply device 100 constituting the motor drive device 101, but the DC power supply device 100 according to the second embodiment is applied. May be.
 また、図35に示すモータ駆動装置101は、送風機、圧縮機および空気調和機といった製品に適用することが可能である。 35 can be applied to products such as a blower, a compressor, and an air conditioner.
 図36は、図35に示したモータ駆動装置101を空気調和機に適用した例を示す図である。モータ駆動装置101の出力側にはモータ50bが接続されており、モータ50bは、圧縮要素54に連結されている。圧縮機55は、モータ50bと圧縮要素54を備える。冷凍サイクル部56は、四方弁56a、室内熱交換器56b、膨張弁56cおよび室外熱交換器56dを含む態様で構成されている。空気調和機の内部を循環する冷媒の流路は、圧縮要素54から、四方弁56a、室内熱交換器56b、膨張弁56c、室外熱交換器56dを経由し、再び四方弁56aを経由して、圧縮要素54へ戻る態様で構成されている。モータ駆動装置101は、交流電源1より交流電圧の供給を受け、モータ50bを回転させる。圧縮要素54は、モータ50bが回転することによって、冷媒の圧縮動作を実行し、冷媒を冷凍サイクル部56の内部で循環させる。 FIG. 36 is a diagram showing an example in which the motor drive device 101 shown in FIG. 35 is applied to an air conditioner. A motor 50 b is connected to the output side of the motor drive device 101, and the motor 50 b is connected to the compression element 54. The compressor 55 includes a motor 50 b and a compression element 54. The refrigeration cycle unit 56 is configured to include a four-way valve 56a, an indoor heat exchanger 56b, an expansion valve 56c, and an outdoor heat exchanger 56d. The flow path of the refrigerant circulating inside the air conditioner passes from the compression element 54 through the four-way valve 56a, the indoor heat exchanger 56b, the expansion valve 56c, the outdoor heat exchanger 56d, and again through the four-way valve 56a. , In a manner returning to the compression element 54. The motor driving device 101 receives supply of AC voltage from the AC power source 1 and rotates the motor 50b. The compression element 54 performs a refrigerant compression operation by rotating the motor 50 b, and circulates the refrigerant inside the refrigeration cycle unit 56.
 なお、以上の実施の形態に示した構成は、本発明の内容の一例を示すものであり、別の公知の技術と組み合わせることも可能であるし、本発明の要旨を逸脱しない範囲で、構成の一部を省略、変更することも可能である。 Note that the configurations shown in the above embodiments are examples of the contents of the present invention, and can be combined with other known techniques, and can be combined without departing from the gist of the present invention. It is also possible to omit or change a part of.
 1 交流電源、2 リアクトル、2a 第一のリアクトル、2b 第二のリアクトル、3 ブリッジ回路、4 平滑コンデンサ、5 第一の電圧検出器、6 電流検出器、7 第二の電圧検出器、10 制御部、10a 外部割込みポート、20 電源電圧極性検出部、21 電源電流指令値制御部、22 オンデューティ制御部、23 電源電圧位相算出部、24 第一アームパルス生成部、25 第二アームパルス生成部、31 第一のアーム、32 第二のアーム、50 負荷、50a インバータ、50b モータ、54 圧縮要素、55 圧縮機、56 冷凍サイクル部、56a 四方弁、56b 室内熱交換器、56c 膨張弁、56d 室外熱交換器、100 直流電源装置、101 モータ駆動装置、241 キャリア生成部、242 基準PWM信号生成部、243 デッドタイム生成部、244 パルスセレクタ部、311 第一のスイッチング素子、312 第二のスイッチング素子、313 第五のスイッチング素子、314 第六のスイッチング素子、321 第三のスイッチング素子、322 第四のスイッチング素子。 1 AC power supply, 2 reactor, 2a 1st reactor, 2b 2nd reactor, 3 bridge circuit, 4 smoothing capacitor, 5th voltage detector, 6 current detector, 7 second voltage detector, 10 control Unit, 10a external interrupt port, 20 power supply voltage polarity detection unit, 21 power supply current command value control unit, 22 on-duty control unit, 23 power supply voltage phase calculation unit, 24 first arm pulse generation unit, 25 second arm pulse generation unit , 31 1st arm, 32 2nd arm, 50 load, 50a inverter, 50b motor, 54 compression element, 55 compressor, 56 refrigeration cycle section, 56a four-way valve, 56b indoor heat exchanger, 56c expansion valve, 56d Outdoor heat exchanger, 100 DC power supply, 101 motor drive, 241 carrier life Part, 242 reference PWM signal generation part, 243 dead time generation part, 244 pulse selector part, 311 first switching element, 312 second switching element, 313 fifth switching element, 314 sixth switching element, 321st Three switching elements, 322 Fourth switching element.

Claims (16)

  1.  交流電源から印加される交流電圧を直流電圧に変換して負荷に印加する直流電源装置であって、
     第一のスイッチング素子と第二のスイッチング素子とが直列接続された第一のアームと、第三のスイッチング素子と第四のスイッチング素子とが直列接続された第二のアームとを有し、前記第一のアームと前記第二のアームとが並列に接続されたブリッジ回路と、
     前記交流電源と前記ブリッジ回路との間に設けられるリアクトルと、
     前記リアクトルを介し前記交流電源と前記ブリッジ回路との間に流れる電流を検出する電流検出器と、
     前記交流電源の出力電圧を検出する第一の電圧検出器と、
     前記負荷への印加電圧を検出する第二の電圧検出器と、
     前記第一の電圧検出器、前記電流検出器、および前記第二の電圧検出器の検出値に基づいて、前記第一のスイッチング素子、前記第二のスイッチング、前記第三のスイッチング素子および前記第四のスイッチング素子への駆動パルスを生成する際に、前記第一のアームへの駆動パルスと前記第二のアームへの駆動パルスを独立して生成する演算器と、
     を備えた直流電源装置。
    A DC power supply device that converts an AC voltage applied from an AC power source into a DC voltage and applies it to a load,
    A first arm in which a first switching element and a second switching element are connected in series; and a second arm in which a third switching element and a fourth switching element are connected in series; A bridge circuit in which the first arm and the second arm are connected in parallel;
    A reactor provided between the AC power supply and the bridge circuit;
    A current detector for detecting a current flowing between the AC power source and the bridge circuit via the reactor;
    A first voltage detector for detecting an output voltage of the AC power supply;
    A second voltage detector for detecting a voltage applied to the load;
    Based on detection values of the first voltage detector, the current detector, and the second voltage detector, the first switching element, the second switching, the third switching element, and the first An arithmetic unit that independently generates a driving pulse for the first arm and a driving pulse for the second arm when generating the driving pulse for the four switching elements;
    DC power supply with
  2.  前記演算器は、スイッチング周波数に依存した周期でデューティが変更される駆動パルスを第一のアームに出力し、前記スイッチング周波数以外の周波数に依存した周期の駆動パルスを第二のアームに出力する
     請求項1に記載の直流電源装置。
    The computing unit outputs a driving pulse whose duty is changed at a cycle depending on a switching frequency to the first arm, and outputs a driving pulse having a cycle depending on a frequency other than the switching frequency to the second arm. Item 4. The DC power supply device according to Item 1.
  3.  前記演算器は、前記第一の電圧検出器が検出した電圧の極性に応じて前記第一のアームおよび前記第二のアームの駆動状態を制御する駆動パルスを出力する
     請求項1または2に記載の直流電源装置。
    The said arithmetic unit outputs the drive pulse which controls the drive state of said 1st arm and said 2nd arm according to the polarity of the voltage which said 1st voltage detector detected. DC power supply.
  4.  前記演算器は、前記第一の電圧検出器が検出した電圧の極性、および前記電流検出器が検出した電流の極性に応じて前記第一のアームおよび前記第二のアームの駆動状態を制御する駆動パルスを出力する
     請求項1から3の何れか1項に記載の直流電源装置。
    The computing unit controls the driving state of the first arm and the second arm according to the polarity of the voltage detected by the first voltage detector and the polarity of the current detected by the current detector. The DC power supply device according to any one of claims 1 to 3, wherein a driving pulse is output.
  5.  前記演算器は、前記第一のアームおよび前記第二のアームへの駆動パルスを生成する際に、
     前記電圧の極性と前記電流の極性が共に正の場合には第一の処理を実行し、
     前記電圧の極性と前記電流の極性が共に負の場合には第二の処理を実行し、
     前記電圧の極性と前記電流の極性が異なる場合、前記電流が正極性であれば前記第一の処理を実行し、前記電流が負極性の場合には前記第二の処理を実行する
     請求項4に記載の直流電源装置。
    When the arithmetic unit generates drive pulses to the first arm and the second arm,
    If both the polarity of the voltage and the polarity of the current are positive, the first process is executed,
    When both the polarity of the voltage and the polarity of the current are negative, a second process is executed,
    5. If the polarity of the voltage and the polarity of the current are different, the first process is executed if the current is positive, and the second process is executed if the current is negative. The direct current power supply device described in 1.
  6.  前記演算器は、前記第一のアームおよび前記第二のアームへの駆動パルスを生成する際に、
     前記電圧の極性と前記電流の極性が共に正の場合には第一の処理を実行し、
     前記電圧の極性と前記電流の極性が共に負の場合には第二の処理を実行し、
     前記電圧の極性と前記電流の極性が異なる場合、前記第一の処理および前記第二の処理の実行を停止する
     請求項4に記載の直流電源装置。
    When the arithmetic unit generates drive pulses to the first arm and the second arm,
    If both the polarity of the voltage and the polarity of the current are positive, the first process is executed,
    When both the polarity of the voltage and the polarity of the current are negative, a second process is executed,
    The DC power supply device according to claim 4, wherein when the polarity of the voltage is different from the polarity of the current, the execution of the first process and the second process is stopped.
  7.  前記演算器は、前記第三のスイッチング素子に流れる電流の大きさに応じて、当該第三のスイッチング素子のスイッチング動作を停止し、前記第四のスイッチング素子に流れる電流の大きさに応じて、当該第四のスイッチング素子のスイッチング動作を停止する
     請求項4から6の何れか1項に記載の直流電源装置。
    The computing unit stops the switching operation of the third switching element according to the magnitude of the current flowing through the third switching element, and according to the magnitude of the current flowing through the fourth switching element, The DC power supply device according to any one of claims 4 to 6, wherein the switching operation of the fourth switching element is stopped.
  8.  前記演算器は、前記第一のアームをキャリア周波数に依存した周期で制御する駆動パルスを出力し、前記第二のアームを電源電圧もしくは電源電流の周期で制御する駆動パルスを出力する
     請求項1から7の何れか1項に記載の直流電源装置。
    2. The computing unit outputs a driving pulse for controlling the first arm with a period depending on a carrier frequency, and outputs a driving pulse for controlling the second arm with a period of a power supply voltage or a power supply current. The direct current power supply device according to any one of 1 to 7.
  9.  前記演算器において、前記第一のアームの制御は、タイマを用いた制御系で実装し、前記第二のアームの制御は、汎用出力ポートまたは外部割り込み機能を用いて実装する
     請求項1から8の何れか1項に記載の直流電源装置。
    In the computing unit, the control of the first arm is implemented by a control system using a timer, and the control of the second arm is implemented by using a general-purpose output port or an external interrupt function. The DC power supply device according to any one of the above.
  10.  前記第一のアームは、直列接続された第五のスイッチング素子および第六のスイッチング素子をさらに備え、
     前記第一のスイッチング素子と前記第五のスイッチング素子とは並列に接続され、前記第二のスイッチング素子と前記第六のスイッチング素子は並列に接続されて構成される
     請求項1から9の何れか1項に記載の直流電源装置。
    The first arm further includes a fifth switching element and a sixth switching element connected in series,
    The first switching element and the fifth switching element are connected in parallel, and the second switching element and the sixth switching element are connected in parallel. The direct-current power supply device according to item 1.
  11.  前記第五のスイッチング素子および前記第六のスイッチング素子のそれぞれは、並列接続される複数のスイッチング素子を備えて構成される
     請求項10に記載の直流電源装置。
    The DC power supply device according to claim 10, wherein each of the fifth switching element and the sixth switching element includes a plurality of switching elements connected in parallel.
  12.  前記第一のアームは、直列接続された第五のスイッチング素子および第六のスイッチング素子を備え、
     前記第一のアームでは、前記第五のスイッチング素子と前記第六のスイッチング素子による素子対と、前記第一のスイッチング素子と前記第二のスイッチング素子による素子対とが並列に接続され、
     一端が前記交流電源における一方側の出力端に接続され、他端が前記第一のスイッチング素子と前記第二のスイッチング素子との接続点との間に接続される第一のリアクトルと、
     一端が前記交流電源における一方側の出力端に接続され、他端が前記第五のスイッチング素子と前記第六のスイッチング素子との接続点に接続される第二のリアクトルと、を備え、
     前記第二のスイッチング素子と前記第六のスイッチング素子とはインタリーブ駆動される
     請求項1から8の何れか1項に記載の直流電源装置。
    The first arm includes a fifth switching element and a sixth switching element connected in series,
    In the first arm, the element pair by the fifth switching element and the sixth switching element, and the element pair by the first switching element and the second switching element are connected in parallel,
    A first reactor having one end connected to an output end on one side of the AC power supply and the other end connected between a connection point of the first switching element and the second switching element;
    A second reactor having one end connected to an output end on one side of the AC power supply and the other end connected to a connection point between the fifth switching element and the sixth switching element;
    The DC power supply device according to any one of claims 1 to 8, wherein the second switching element and the sixth switching element are interleaved.
  13.  モータを駆動するモータ駆動装置であって、
     請求項1から12の何れか1項に記載の直流電源装置と、
     前記直流電源装置の出力電圧を交流電圧に変換して前記モータに印加するインバータと、
     を備えたモータ駆動装置。
    A motor driving device for driving a motor,
    The DC power supply device according to any one of claims 1 to 12,
    An inverter that converts the output voltage of the DC power supply device into an AC voltage and applies it to the motor;
    A motor drive device comprising:
  14.  請求項13に記載のモータ駆動装置を備えた送風機。 A blower comprising the motor drive device according to claim 13.
  15.  請求項13に記載のモータ駆動装置を備えた圧縮機。 A compressor provided with the motor drive device according to claim 13.
  16.  請求項13に記載のモータ駆動装置を備えた空気調和機。 An air conditioner provided with the motor drive device according to claim 13.
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