WO2018040385A1 - 一种基于pam4调制的光收发模块 - Google Patents

一种基于pam4调制的光收发模块 Download PDF

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WO2018040385A1
WO2018040385A1 PCT/CN2016/110667 CN2016110667W WO2018040385A1 WO 2018040385 A1 WO2018040385 A1 WO 2018040385A1 CN 2016110667 W CN2016110667 W CN 2016110667W WO 2018040385 A1 WO2018040385 A1 WO 2018040385A1
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pam4
optical
unit
electrical
interface unit
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PCT/CN2016/110667
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English (en)
French (fr)
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胡毅
钱坤
马卫东
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武汉光迅科技股份有限公司
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Publication of WO2018040385A1 publication Critical patent/WO2018040385A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/40—Transceivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50—Transmitters
    • H04B10/516—Details of coding or modulation
    • H04B10/524—Pulse modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50—Transmitters
    • H04B10/516—Details of coding or modulation
    • H04B10/54—Intensity modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50—Transmitters
    • H04B10/516—Details of coding or modulation
    • H04B10/54—Intensity modulation
    • H04B10/541—Digital intensity or amplitude modulation

Definitions

  • the present invention relates to an optical transceiver module based on PAM4 (Pulse Amplitude Modulation) modulation, and in particular to a device for implementing an SFP56 optical transceiver module using a PAM4 modulation format.
  • the optical transceiver module of the present invention can be used in a high speed optical communication network.
  • the invention belongs to the field of communication.
  • the 400G will continue to adopt the parallel transmission mode of the 100G communication system, and can realize the 10 ⁇ 40G architecture by using the commercially available 40G EML technology, and can also implement the 8 ⁇ 50G architecture by using the PAM4 modulation format, or can pass the complex amplitude phase modulation format.
  • Implement a 4 x 100G architecture At present, the most concerned is the 8 ⁇ 50G architecture using the PAM4 modulation format.
  • John D'Ambrosia chairman of the Ethernet Alliance, pointed out that the future 50G, 100G, and 200G will all be based on 50G PAM4.
  • the PAM4 modulation format has twice the transmission rate of the NRZ at the same baud rate and has a higher transmission rate.
  • the present invention proposes a PAM4 modulated optical transceiver module effectively reduces the bandwidth requirements of high-speed communication systems for optical devices, reduces the number of optical components in the module, saves module cost, reduces module power consumption, and reduces package size.
  • the object of the present invention is to overcome the technical drawbacks of the prior art solutions.
  • an optical transceiver module based on PAM4 modulation is proposed.
  • the module is available in SFP56 standard package for 50Gb/s rate communication system information transmission.
  • N SFP56 optical transceiver modules can also be used for information transmission of N ⁇ 50Gb/s rate communication systems.
  • An optical transceiver module based on PAM4 modulation comprising a light emitting unit, a light receiving unit, a first electrical interface unit, a first optical interface unit, and a second optical interface unit; wherein the light emitting unit comprises a DSP processor chip code a unit, a driver chip, and a laser, wherein the DSP processor chip coding unit is connected to the first electrical interface unit to input two NRZ electrical signals of the same rate, and modulate two NRZ electrical signals into one PAM4 electrical signal, and modulate
  • the PAM4 electrical signal is amplified by the driver chip, converted into a PAM4 optical signal by the laser, and transmitted by the first optical interface unit;
  • the optical receiving unit includes an optical receiver, a DSP processor chip decoding unit, The optical receiver will receive the PAM4 optical signal through the second optical interface unit and convert it into the received PAM4 electrical signal, and the received PAM4 electrical signal enters the DSP processor chip decoding unit, and the DSP processor chip decoding unit The received PAM4
  • the electrical signals input and output of the first electrical interface unit employ two NRZ electrical signals at a rate of 25 Gb/s.
  • the laser uses an externally modulated laser based on an electroabsorption mechanism or an MZI-based modulator Externally modulating the laser or directly modulating the laser.
  • the optical receiver employs a PIN photodiode or an APD avalanche photodiode.
  • An optical transceiver module based on PAM4 modulation comprising a light emitting unit, a light receiving unit, a first electrical interface unit, a DSP processor chip encoding unit, a DSP processor chip decoding unit, a second electrical interface unit, and a first optical interface unit a second optical interface unit, wherein the first electrical interface unit is an external electrical communication interface of the DSP processor chip coding unit and the DSP processor chip decoding unit; the second electrical interface unit is An electrical communication interface between the light emitting unit and the light receiving unit and the DSP processor chip encoding unit and the DSP processor chip decoding unit;
  • the DSP processor chip encoding unit preprocesses and modulates two NRZ electrical signals of the same rate input by the first electrical interface unit into electrical signals of one PAM4, and passes through the second electrical interface unit. Inputting an optical signal converted to the PAM4 by the light emitting unit, and transmitting by the first optical interface;
  • the light receiving unit converts the PAM4 optical signal received by the second optical interface unit into a PAM4 electrical signal, and then inputs the signal to the DSP processor chip decoding unit via the second electrical interface unit, where the DSP processor chip
  • the decoding unit performs clock recovery, amplification, equalization, and PAM4 demodulation on the PAM4 electrical signal to convert the two-channel NRZ electrical signal to the first electrical interface unit for output.
  • the light emitting unit includes a driver chip for electrical signal amplification processing, a laser for electro-optical conversion, and a light receiving unit including an optical receiver that converts the optical signal into an electrical signal.
  • the electrical signals input and output of the first electrical interface unit employ two NRZ electrical signals at a rate of 25 Gb/s.
  • An optical transceiver module based on PAM4 modulation comprising a PAM4 optical transceiver module in the form of N SFP56 packages, a first electrical interface unit, a DSP processor chip coding unit, and a DSP processor chip decoding unit, where N is a positive integer greater than 0. Preferably 8; wherein
  • the first electrical interface unit is an external electrical communication interface of the DSP processor chip coding unit and the DSP processor chip decoding unit; the DSP processor chip coding unit inputs N input by the first electrical interface unit *
  • the 2-way NRZ electrical signal is pre-processed and modulated and converted into the electrical signal of the N-channel PAM4.
  • the electrical signals of the N-channel PAM4 are respectively connected to the optical signals of the N-channel PAM4 by the PAM4 optical transceiver module in the form of N SFP56 package.
  • the PAM4 optical transceiver module in the form of N SFP56 package receives the optical signal of the N-channel PAM4 and converts the electrical signal converted into the N-channel PAM4 into the DSP processor chip decoding unit, where the DSP processor chip decoding unit inputs
  • the electrical signals of the N-channel PAM4 are respectively clocked, amplified, equalized, demodulated by PAM4, converted into N*2 NRZ electrical signals, and then connected to the first electrical interface unit for output.
  • the PAM4 optical transceiver module of each SFP56 package includes a second electrical interface unit, a light emitting unit, a light receiving unit, a first optical interface unit, and a second optical interface unit; and the PAM4 of the PAM4 optical transceiver module input into the SFP56 package.
  • An electrical signal is input to the optical signal converted by the second optical interface unit to the optical transmitting unit into a PAM4, and is transmitted by the first optical interface; the optical receiving unit is to be received by the second optical interface unit.
  • the PAM4 optical signal is converted into a PAM4 electrical signal and output through the second electrical interface unit.
  • the input and output electrical signals of the first electrical interface unit are N*2 NRZ electrical signals with a rate of 25 Gb/s, and the PAM4 optical transceiver module of each SFP56 package is used for information transmission of a 50 Gb/s rate communication system.
  • the PAM4 modulation-based optical transceiver module proposed by the present invention adopts the PAM4 modulation format, and the symbol rate is only one-half of the bit rate, which effectively reduces the bandwidth requirement of the optical device for the high-speed optical communication system;
  • the optical transceiver module based on PAM4 modulation proposed by the present invention requires only one laser in one module
  • the device and a receiver can achieve a transmission rate of 50 GBit/s.
  • the number of optical components in the module is reduced, the module cost is saved, the power consumption of the module is reduced, and the package size is reduced.
  • Figure 1 Schematic diagram of the functional structure of the first embodiment of the present invention
  • FIG. 2 Schematic diagram of the functional structure of the second embodiment of the present invention.
  • FIG. 3 is a schematic diagram showing the functional structure of a plurality of optical transceiver modules in parallel according to a second embodiment
  • 11 a first electrical interface unit
  • 12 a light emitting unit
  • 121 DSP processor chip coding unit
  • 122 driver chip
  • 131 DSP processor chip decoding unit; 132: optical receiver;
  • FIG. 1 is a structural diagram of a PAM4-modulated optical transceiver module according to the present invention, including a light emitting unit 12, a light receiving unit 13, a first electrical interface unit 11, a first optical interface unit 14, and a first The two optical interface unit 15 is configured.
  • the first electrical interface unit 11 is an electrical communication interface between the module and an external system.
  • the first optical interface unit 14 and the second optical interface unit 15 are optical communication interfaces between the module and the external system; the light emitting unit 12 is connected to the two high-speed electrical signals of the first electrical interface unit 11 and will be input by the first electrical interface unit 11.
  • the first optical interface unit 14 transmits; the optical receiving unit 13 receives the high-speed optical signal through the second optical interface unit 15, converts it into a high-speed electrical signal, performs PAM4 decoding, and finally connects with the two high-speed electrical signals of the first electrical interface unit 11.
  • the light emitting unit 12 includes a DSP processor chip encoding unit 121 for electrical signal processing and PAM4 modulation, a driver chip 122 for electrical signal amplification, a laser 123 for electro-optical conversion, and a light receiving unit 13 including optical signals for conversion to electricity
  • the optical receiver 132 of the signal and the DSP processor chip decoding unit 131 for electrical signal processing and PAM4 demodulation.
  • the light emitting unit 12 transmits a signal process: two 25G NRZ electrical signals are input from the first electrical interface unit 11 of the optical transceiver module, and the DSP processor chip encoding unit 121 performs preprocessing and PAM4 modulation on the two electrical signals, and outputs 1
  • the path PAM4 electrical signal, the driver chip 122 amplifies the PAM4 electrical signal and converts the PAM4 electrical signal into a PAM4 optical signal by the laser 123 to be output by the first optical interface unit 14.
  • the light receiving unit 13 receives the signal: the received 1-channel PAM4 optical signal is input to the optical transceiver module through the second optical interface unit 15, and the optical receiver 132 converts the high-speed optical signal into a high-speed electrical signal input to the DSP processor chip decoding unit 131.
  • the DSP processor chip decoding unit 131 performs clock recovery, amplification, equalization, and PAM4 demodulation on the electrical signal, and converts it into two 25G NRZ electrical signals, and outputs the same from the first electrical interface unit 11.
  • the optical transceiver module based on the PAM4 modulation can also be implemented by the structure shown in FIG. 2.
  • the DSP processor chip encoding unit 121 and the DSP processor chip decoding unit 131 are disposed outside the optical transceiver module, and the first electrical interface unit 11 is a DSP.
  • the processor chip encoding unit 121 and the DSP processor chip decoding unit 131 are electrically connected to an external system, and the second electrical interface unit 16 is an optical transceiver module (ie, the light emitting unit 12 and the light receiving unit 13) and the DSP processor chip.
  • the electrical communication interface between the unit 121 and the DSP processor chip decoding unit 131, the first optical interface unit 14 and the second optical interface unit 15 are optical communication interfaces between the module and the external system, and the second 25G NRZ electrical signals are received from the optical transceiver module.
  • the input of the element 11 is pre-processed and modulated by the DSP processor chip encoding unit 121 and converted into an electrical signal of a 25G PAM4, and input to the optical transceiver module via the second electrical interface unit 16; the second transceiver of the optical transceiver module
  • the output signal of the interface unit 16 is 1 channel 25G PAM4 electrical signal
  • the DSP processor chip decoding unit 131 performs clock recovery, amplification, equalization, and PAM4 demodulation on 1 channel 25G PAM4 electrical signal to convert into 2 channels of 25G NRZ electrical signals through the first The electrical interface unit 11 outputs.
  • the structured optical transceiver module includes a light emitting unit 12, a light receiving unit 13, a second electrical interface unit 16, a first optical interface unit 14, and a second optical interface unit 15.
  • the light emitting unit 12 includes a driver chip 122 for electrical signal amplification processing, a laser 123 for electro-optical conversion, and a light receiving unit 13 including an optical receiver 132 that converts an optical signal into an electrical signal.
  • the light emitting unit 12 emits a signal process: a 1-way PAM4 electrical signal is input from the second electrical interface unit 16 of the optical transceiver module, and the driver chip 122 amplifies the electrical signal and converts the PAM4 electrical signal into a PAM4 optical signal through the laser 123.
  • An optical interface unit 14 outputs.
  • the light receiving unit 13 receives the signal process: the received 1-channel PAM4 optical signal is input to the optical transceiver module through the second optical interface unit 15, and the optical receiver 132 converts the high-speed optical signal into a high-speed electrical signal and outputs it through the second electrical interface unit 16.
  • the PAM4-based optical transceiver module proposed by the present invention adopts an SFP standard package format for information transmission of a 50 Gb/s rate communication system.
  • An optical transceiver module in the form of N SFP56 packages can also be used for information transmission of the N ⁇ 50 Gb/s rate communication system, as shown in FIG. 3 .
  • the second external DSP processor chip is adopted, multiple SFP56 transceiver modules can share one DSP processing chip, which is advantageous for reducing the module size and saving module cost.
  • the laser 123 in the above two structures is generally configured as a 25G/28G TOSA, and may be an externally modulated laser or a direct modulated laser.
  • it may be an externally modulated laser based on an electric absorption mechanism or an externally modulated laser based on an MZI type modulator.
  • the optical receiver 132 of the above two structures is generally configured as a 25G/28G PIN/TIA ROSA, and may be a PIN photodiode or an APD avalanche photodiode.
  • FIG. 1 A schematic diagram of the functional structure of the first embodiment is shown in FIG.
  • the electrical signal is exemplified by an NRZ signal input of 25G per channel (supporting an operating rate of 25.78Gb/s to 27.97Gb/s, simplified to 25G).
  • the electrical signal interface After receiving the two-way 25G NRZ electrical signal, the electrical signal interface inputs the optical transceiver module through the first electrical interface unit 11.
  • the two-way 25G NRZ electrical signal is input into the DSP processor chip encoding unit 121, and is pre-processed by the DSP processor chip encoding unit 121 and PAM4 modulated to become a 1-way 25G PAM4 electrical signal, which is loaded into the driver chip 122, and the laser 123 passes through
  • the modulation or external modulation method converts one 25G PAM4 electrical signal into one 25G PAM4 optical signal, and outputs it to the first optical interface unit 14.
  • the second optical interface unit 15 converts the received 1 channel 50 Gb/s high-speed optical signal into a 1-way high-speed electrical signal through the optical receiver 132, inputs the DSP processor chip decoding unit 131, and decodes the DSP processor chip.
  • the unit 131 performs clock recovery, amplification, equalization, and PAM4 demodulation on the electrical signal, and then converts it into two 25G NRZ electrical signals and outputs the same to the first electrical interface unit 11.
  • FIG. 2 A schematic diagram of the functional structure of the second embodiment is shown in FIG. 2.
  • the external DSP processor chip encoding unit 121 performs pre-processing and PAM4 modulation on two 25G NRZ electrical signals, outputs one 25G PAM4 electrical signal, inputs the optical transceiver module through the second electrical interface unit 16, and loads the driver chip 122.
  • the laser 123 converts one 25G PAM4 electrical signal into one 25G PAM4 optical signal by internal modulation or external modulation, and outputs the first optical interface unit 14.
  • the second optical interface unit 15 converts the received 1 channel 50 Gb/s high-speed optical signal into an electrical signal through the optical receiver, and then outputs it through the second electrical interface unit 16, and externally
  • the DSP processor chip decoding chip 131 performs clock recovery, amplification, equalization, and PAM4 demodulation on the electrical signal, and then converts it into two 25G NRZ electrical signal outputs.
  • the optical transceiver module in the form of N SFP56 package can realize the information transmission of the N ⁇ 50Gb/s rate communication system.
  • the plurality of parallel SFP56 optical transceiver modules can share the first electrical interface unit 11 and the first DSP processor chip 121.
  • the second DSP processor chip 131 is as shown in FIG.
  • more than one package of the SFP56 standard package is connected in parallel, and the second electrical interface unit 16 of each package is connected to the DSP processor chip coding unit 121 and the DSP processor chip decoding unit 131; the DSP processor The chip encoding unit 121 and the DSP processor chip decoding unit 131 are connected to the first electrical interface unit 11.

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Abstract

一种基于PAM4调制的光收发模块，包括光发射单元(12)、光接收单元(13)，所述光发射单元(12)包括DSP处理器芯片编码单元(121)、驱动器芯片(122)、激光器(123)，DSP处理器芯片编码单元(121)与第一电接口单元(11)的两路NRZ电信号连接，将两路NRZ电信号调制成一路的PAM4电信号，经驱动器芯片(122)、激光器(123)放大转换为PAM4光信号，通过第一光接口单元(14)发射；光接收单元(13)包括光接收机(132)、DSP处理器芯片解码单元(131)，第二光接口单元(15)接收PAM4光信号转换成电信号进入DSP处理器芯片解码单元(131)，将PAM4光信号解调制成两路的NRZ电信号，与第一电接口单元(11)连接。降低高速通信系统对光器件带宽的要求，减少光器件数量，节约成本。

Description

一种基于PAM4调制的光收发模块 技术领域
本发明涉及一种基于PAM4(Pulse Amplitude Modulation)调制的光收发模块，具体地说，涉及一种采用PAM4调制格式实现SFP56光收发模块装置，本发明的光收发模块可用于高速光通信网络，本发明属于通信领域。
背景技术
随着各种新兴数据应用的发展，用户对高清视频和高速数据业务的需求迅速增加，对网络带宽的需求也随之迅速增大。为满足数据通讯在视频和移动驱动下的爆发式增长，各大互联网内容提供商如Amazon、Microsoft、Google、Facebook正在建造超大规模数据中心，为此需要功率效率更高、体积更小、成本更具优势的高速互联解决方案。目前，100Gbit/s的通信系统已商用，而400Gbit/s的通信系统方案早在几年前已被系统厂商实现。随着数据中心100G连接成本的下滑、每个机架输入/输出带宽需求的增长，以及新一代器件技术的面世，未来几年400G光通信有望实现商用。
400G将继续采用100G通信系统的并行传输方式，可采用已商用化的40G的EML技术实现10×40G架构，还可以利用PAM4调制格式实现8×50G的架构，也可以通过复杂的幅度相位调制格式实现4×100G的架构。目前，最受关注的是采用PAM4调制格式的8×50G架构。以太网联盟(Ethernet Alliance)的主席John D'Ambrosia指出未来50G、100G、200G都将基于50G PAM4。相对于传统的NRZ调制格式，在相同的波特率下，PAM4调制格式的传输速率是NRZ的两倍，具有更高的传输速率。针对这些问题，本发明提出了一种基于 PAM4调制的光收发模块，有效降低了高速通信系统对光器件带宽的要求，减少模块中光器件数量，节约模块成本，降低模块功耗，减小封装尺寸。
发明内容
本发明的目的是克服现有技术方案存在的技术缺陷，针对高速光通信系统，提出了一种基于PAM4调制的光收发模块。该模块采用SFP56标准封装形式，用于50Gb/s速率通信系统信息传输。亦可采用N个SFP56光收发模块，用于N×50Gb/s速率通信系统信息传输。
本发明所采用的技术方案是：
一种基于PAM4调制的光收发模块，包括光发射单元、光接收单元、第一电接口单元、第一光接口单元、第二光接口单元；其中，所述光发射单元包括DSP处理器芯片编码单元、驱动器芯片、激光器，所述DSP处理器芯片编码单元与所述第一电接口单元相连接输入两路相同速率的NRZ电信号，并将两路NRZ电信号调制成一路PAM4电信号，调制成的PAM4电信号经所述驱动器芯片放大处理、由所述激光器转换为PAM4光信号，通过所述第一光接口单元发射；所述光接收单元包括光接收机、DSP处理器芯片解码单元，所述光接收机将通过所述第二光接口单元接收PAM4光信号并将其转换成接收到的PAM4电信号，接收到的PAM4电信号进入DSP处理器芯片解码单元，DSP处理器芯片解码单元将该接收到的PAM4光信号解调制成两路的NRZ电信号，通过第一电接口单元输出。
所述第一电接口单元的输入和输出的电信号采用速率为25Gb/s的两路NRZ电信号。
所述激光器采用基于电吸收机理的外调制激光器或者基于MZI型调制器的 外调制激光器或者直接调制激光器。
所述光接收机采用PIN光电二极管或者APD雪崩光电二极管。
一种基于PAM4调制的光收发模块，包括光发射单元、光接收单元、第一电接口单元、DSP处理器芯片编码单元、DSP处理器芯片解码单元、第二电接口单元、第一光接口单元、第二光接口单元；其中，所述第一电接口单元为所述DSP处理器芯片编码单元和所述DSP处理器芯片解码单元对外的电通信接口；所述第二电接口单元为所述光发射单元和光接收单元与所述DSP处理器芯片编码单元和DSP处理器芯片解码单元的电通信接口；
所述DSP处理器芯片编码单元将由所述第一电接口单元输入的2路相同速率的NRZ电信号进行预处理及调制后转换为1路PAM4的电信号，并经所述第二电接口单元输入到所述光发射单元转换为PAM4的光信号，由所述第一光接口进行发射；
所述光接收单元将通过所述第二光接口单元接收的PAM4光信号转换为PAM4电信号后经所述第二电接口单元输入到所述DSP处理器芯片解码单元，所述DSP处理器芯片解码单元对PAM4电信号进行时钟回复、放大、均衡、PAM4解调后转换成2路NRZ电信号通过第一电接口单元输出。
所述光发射单元包括用于电信号放大处理的驱动器芯片、用于电光转换的激光器；光接收单元包括将光信号转换为电信号的光接收机。
所述第一电接口单元的输入和输出的电信号采用速率为25Gb/s的两路NRZ电信号。
一种基于PAM4调制的光收发模块，包括N个SFP56封装形式的PAM4光收发模块、第一电接口单元、DSP处理器芯片编码单元、DSP处理器芯片解码单元，N为大于0的正整数，优选为8；其中，
所述第一电接口单元为所述DSP处理器芯片编码单元和所述DSP处理器芯片解码单元对外的电通信接口；所述DSP处理器芯片编码单元将由所述第一电接口单元输入的N*2路的NRZ电信号进行预处理及调制后转换为N路PAM4的电信号，N路PAM4的电信号分别接入N个SFP56封装形式的PAM4光收发模块转换为N路PAM4的光信号进行发射；N个SFP56封装形式的PAM4光收发模块接收N路PAM4的光信号并转换为N路PAM4的电信号输入到所述DSP处理器芯片解码单元，所述DSP处理器芯片解码单元将输入的N路PAM4的电信号分别进行时钟回复、放大、均衡、PAM4解调后转换为N*2路的NRZ电信号后接入所述第一电接口单元进行输出。
每个SFP56封装形式的PAM4光收发模块均包括第二电接口单元、光发射单元、光接收单元、第一光接口单元、第二光接口单元；输入SFP56封装形式的PAM4光收发模块的PAM4的电信号经所述第二电接口单元输入到所述光发射单元转换为PAM4的光信号，由所述第一光接口进行发射；所述光接收单元将通过所述第二光接口单元接收的PAM4光信号转换为PAM4电信号后经所述第二电接口单元输出。
所述第一电接口单元的输入和输出的电信号为N*2路速率为25Gb/s的NRZ电信号，每个SFP56封装形式的PAM4光收发模块为用于50Gb/s速率通信系统信息传输的SFP56标准封装形式的封装体。
本发明具有以下优点和积极效果：
1、本发明提出的基于PAM4调制的光收发模块，采用PAM4调制格式，码元速率只有比特率的二分之一，有效的降低了高速光通信系统对光器件带宽的要求；
2、本发明提出的基于PAM4调制的光收发模块，一个模块中仅需一个激光 器和一个接收机即可实现50GBit/s传输比特率，相对于采用NRZ调制格式的光模块减少了模块中光器件数量，节约模块成本，降低模块功耗，减小封装尺寸。
附图说明
图1—本发明第一实施例的功能结构示意图；
图2—本发明第二实施例的功能结构示意图；
图3—多个第二实施例光收发模块并联的功能结构示意图；
其中：
11：第一电接口单元；            12：光发射单元；
121：DSP处理器芯片编码单元；    122：驱动器芯片；
123：激光器；                   13：光接收单元；
131：DSP处理器芯片解码单元；    132：光接收机；
14：第一光接口单元；            15：第二光接口单元；
16：第二电接口单元；
具体实施方式
下面结合附图和实施例进一步说明。
本发明所涉及的一种基于PAM4调制的光收发模块的结构图如图1所示，包括由光发射单元12、光接收单元13、第一电接口单元11、第一光接口单元14以及第二光接口单元15构成。其中，第一电接口单元11为模块与外部系统的电通信接口。第一光接口单元14、第二光接口单元15为模块与外部系统的光通信接口；光发射单元12与第一电接口单元11的两路高速电信号连接，将由第一电接口单元11输入的高速电信号进行PAM4编码并转换为高速光信号通 过第一光接口单元14发射；光接收单元13通过第二光接口单元15接收高速光信号，转换为高速电信号并进行PAM4解码，最终与第一电接口单元11的两路高速电信号连接。光发射单元12包括用于电信号处理和PAM4调制的DSP处理器芯片编码单元121、用于电信号放大的驱动器芯片122、用于电光转换的激光器123；光接收单元13包括光信号转换为电信号的光接收机132和用于电信号处理及PAM4解调的DSP处理器芯片解码单元131。
光发射单元12发射信号过程：2路25G NRZ电信号从光收发模块的第一电接口单元11输入，DSP处理器芯片编码单元121对这2路电信号进行预处理和PAM4调制，并输出1路PAM4电信号，驱动器芯片122对PAM4电信号进行放大处理并通过激光器123将PAM4电信号转换为PAM4光信号由第一光接口单元14输出。
光接收单元13接收信号过程：将接收的1路PAM4光信号通过第二光接口单元15输入光收发模块，光接收机132将高速光信号转换为高速电信号输入DSP处理器芯片解码单元131，DSP处理器芯片解码单元131对电信号进行时钟回复、放大、均衡、PAM4解调后转换成2路25G的NRZ电信号，从第一电接口单元11输出。
基于PAM4调制的光收发模块也可以通过如图2所示的结构实现，DSP处理器芯片编码单元121和DSP处理器芯片解码单元131置于光收发模块之外，第一电接口单元11为DSP处理器芯片编码单元121和DSP处理器芯片解码单元131与外部系统的电通信接口，第二电接口单元16为光收发模块(即光发射单元12与光接收单元13)与DSP处理器芯片编码单元121和DSP处理器芯片解码单元131的电通信接口，第一光接口单元14、第二光接口单元15为模块与外部系统的光通信接口，2路25G NRZ电信号从光收发模块的第一电接口单 元11输入，由DSP处理器芯片编码单元121将其预处理及调制后转换为1路25G PAM4的电信号，并经第二电接口单元16输入光收发模块；光收发模块的通过第二电接口单元16输出信号为1路25G PAM4电信号，DSP处理器芯片解码单元131对1路25G PAM4电信号进行时钟回复、放大、均衡、PAM4解调后转换成2路25G NRZ电信号通过第一电接口单元11输出。该结构光收发模块包括光发射单元12、光接收单元13、第二电接口单元16、第一光接口单元14以及第二光接口单元15。其中，光发射单元12包括用于电信号放大处理的驱动器芯片122、用于电光转换的激光器123；光接收单元13包括将光信号转换为电信号的光接收机132。
光发射单元12发射信号过程：1路PAM4电信号从光收发模块的第二电接口单元16输入，驱动器芯片122对电信号进行放大处理并通过激光器123将PAM4电信号转换为PAM4光信号由第一光接口单元14输出。
光接收单元13接收信号过程：将接收的1路PAM4光信号通过第二光接口单元15输入光收发模块，光接收机132将高速光信号转换为高速电信号通过第二电接口单元16输出。
本发明提出的基于PAM4的光收发模块采用SFP标准封装形式，用于50Gb/s速率通信系统信息传输。亦可采用N个SFP56封装形式的光收发模块，用于N×50Gb/s速率通信系统信息传输，如图3所示。当用于N×50Gb/s速率通信系统时，若采用第二种外置DSP处理器芯片的方案，多个SFP56收发模块可以共用一个DSP处理芯片，有利于缩小模块体积，节约模块成本。
上述两种结构中的激光器123，一般构造为25G/28G TOSA，可以是外调制激光器，也可以是直接调制激光器。当为外调制器时，可以是基于电吸收机理的外调制激光器，也可以是基于MZI型调制器的外调制激光器。
上述两种结构中的光接收机132，一般构造为25G/28G PIN/TIA ROSA，可以采用PIN光电二极管，也可采用APD雪崩光电二极管。
本发明装置的实现的工作过程如下：
第一实施例的功能结构示意图如图1所示。电信号以采用每通道25G(支持25.78Gb/s到27.97Gb/s的工作速率，简化为25G)NRZ信号输入为例。电信号接口接收2路25G的NRZ电信号后，通过第一电接口单元11输入光收发模块。2路25G的NRZ电信号输入DSP处理器芯片编码单元121后，经DSP处理器芯片编码单元121预处理和PAM4调制后变成1路25G PAM4电信号，加载到驱动器芯片122，激光器123通过内调制或者外调制方式将1路25G PAM4电信号转换为1路25G PAM4光信号，输出至第一光接口单元14。
第二光接口单元15接收光信号时，将接收的1路的50Gb/s高速光信号通过光接收机132转换为1路高速电信号，输入DSP处理器芯片解码单元131，DSP处理器芯片解码单元131对电信号进行时钟恢复、放大、均衡、PAM4解调后，转换成2路25G的NRZ电信号后输出至第一电接口单元11。
第二实施例的功能结构示意图如图2所示。外置的DSP处理器芯片编码单元121将2路25G的NRZ电信号进行预处理和PAM4调制，输出1路25G PAM4电信号，通过第二电接口单元16输入光收发模块，加载驱动器芯片122上，激光器123通过内调制或者外调制方式将1路25G PAM4电信号转换为1路25G PAM4光信号，输出第一光接口单元14。
第二光接口单元15接收光信号时，将接收的1路的50Gb/s高速光信号通过光接收机将所接收的光信号转换成为电信号后，通过第二电接口单元16输出，外置DSP处理器芯片解码芯片131对电信号进行时钟恢复、放大、均衡、PAM4解调后，转换成2路25G的NRZ电信号输出。
采用N个SFP56封装形式的光收发模块，可实现N×50Gb/s速率通信系统信息传输。当用于N×50Gb/s速率通信系统时，若采用第二种外置DSP处理器芯片的方案，多个并联SFP56光收发模块可以共用第一电接口单元11、第一DSP处理器芯片121、第二DSP处理器芯片131，如图3所示。本实施例中，一个以上的所述SFP56标准封装形式的封装体并联，各封装体的第二电接口单元16接入DSP处理器芯片编码单元121、DSP处理器芯片解码单元131；DSP处理器芯片编码单元121、DSP处理器芯片解码单元131与第一电接口单元11相连接。
虽然本发明已经详细示例并描述了相关的特定实施例做参考，但对本领域的技术人员来说，在阅读和理解了该说明书和附图后，在不背离本发明的思想和范围上，可以在基于PAM4调制的光收发模块结构和制作细节上作出各种改变。这些改变都将落入本发明的权利要求所要求的保护范围。

Claims (10)

  1. 一种基于PAM4调制的光收发模块，其特征在于：包括光发射单元(12)、光接收单元(13)、第一电接口单元(11)、第一光接口单元(14)、第二光接口单元(15)；其中，所述光发射单元包括DSP处理器芯片编码单元(121)、驱动器芯片(122)、激光器(123)，所述DSP处理器芯片编码单元(121)与所述第一电接口单元(11)相连接输入两路相同速率的NRZ电信号，并将两路NRZ电信号调制成一路PAM4电信号，调制成的PAM4电信号经所述驱动器芯片(122)放大处理、由所述激光器(123)转换为PAM4光信号，通过所述第一光接口单元(14)发射；
    所述光接收单元(13)包括光接收机(132)、DSP处理器芯片解码单元(131)，所述光接收机(132)将通过所述第二光接口单元(15)接收PAM4光信号并将其转换成接收到的PAM4电信号，接收到的PAM4电信号进入DSP处理器芯片解码单元(131)，DSP处理器芯片解码单元(131)将该接收到的PAM4光信号解调制成两路的NRZ电信号，通过第一电接口单元(11)输出。
  2. 根据权利要求1所述的一种基于PAM4调制的光收发模块，其特征在于：所述第一电接口单元(11)的输入和输出的电信号采用速率为25Gb/s的两路NRZ电信号。
  3. 根据权利要求2所述的一种基于PAM4调制的光收发模块，其特征在于：所述激光器(123)采用基于电吸收机理的外调制激光器或者基于MZI型调制器的外调制激光器或者直接调制激光器。
  4. 根据权利要求2所述的一种基于PAM4调制的光收发模块，其特征在于：所述光接收机(132)采用PIN光电二极管或者APD雪崩光电二极管。
  5. 一种基于PAM4调制的光收发模块，其特征在于：包括光发射单元(12)、光接收单元(13)、第一电接口单元(11)、DSP处理器芯片编码单元(121)、DSP处理器芯片解码单元(131)、第二电接口单元(16)、第一光接口单元(14)、第二光接口单元(15)；其中，所述第一电接口单元(11)为所述DSP处理器芯片编码单元(121)和所述DSP处理器芯片解码单元(131)对外的电通信接口；所述第二电接口单元(16)为所述光发射单元(12)和光接收单元(13)与所述DSP处理器芯片编码单元(121)和DSP处理器芯片解码单元(131)的电通信接口；
    所述DSP处理器芯片编码单元(121)将由所述第一电接口单元(11)输入的2路相同速率的NRZ电信号进行预处理及调制后转换为1路PAM4的电信号，并经所述第二电接口单元(16)输入到所述光发射单元(12)转换为PAM4的光信号，由所述第一光接口(14)进行发射；
    所述光接收单元(13)将通过所述第二光接口单元(15)接收的PAM4光信号转换为PAM4 电信号后经所述第二电接口单元(16)输入到所述DSP处理器芯片解码单元(131)，所述DSP处理器芯片解码单元(131)对PAM4电信号进行时钟回复、放大、均衡、PAM4解调后转换成2路NRZ电信号通过第一电接口单元(11)输出。
  6. 根据权利要求5所述的一种基于PAM4调制的光收发模块，其特征在于：所述光发射单元(12)包括用于电信号放大处理的驱动器芯片(122)、用于电光转换的激光器(123)；光接收单元(13)包括将光信号转换为电信号的光接收机(132)。
  7. 根据权利要求5或6所述的一种基于PAM4调制的光收发模块，其特征在于：所述第一电接口单元(11)的输入和输出的电信号采用速率为25Gb/s的两路NRZ电信号。
  8. 一种基于PAM4调制的光收发模块，其特征在于：包括N个SFP56封装形式的PAM4光收发模块、第一电接口单元(11)、DSP处理器芯片编码单元(121)、DSP处理器芯片解码单元(131)，N为大于0的正整数，优选为8；其中，
    所述第一电接口单元(11)为所述DSP处理器芯片编码单元(121)和所述DSP处理器芯片解码单元(131)对外的电通信接口；
    所述DSP处理器芯片编码单元(121)将由所述第一电接口单元(11)输入的N*2路的NRZ电信号进行预处理及调制后转换为N路PAM4的电信号，N路PAM4的电信号分别接入N个SFP56封装形式的PAM4光收发模块转换为N路PAM4的光信号进行发射；
    N个SFP56封装形式的PAM4光收发模块接收N路PAM4的光信号并转换为N路PAM4的电信号输入到所述DSP处理器芯片解码单元(131)，所述DSP处理器芯片解码单元(131)将输入的N路PAM4的电信号分别进行时钟回复、放大、均衡、PAM4解调后转换为N*2路的NRZ电信号后接入所述第一电接口单元(11)进行输出。
  9. 根据权利要求8所述的一种基于PAM4调制的光收发模块，其特征在于：每个SFP56封装形式的PAM4光收发模块均包括第二电接口单元(16)、光发射单元(12)、光接收单元(13)、第一光接口单元(14)、第二光接口单元(15)；
    输入SFP56封装形式的PAM4光收发模块的PAM4的电信号经所述第二电接口单元(16)输入到所述光发射单元(12)转换为PAM4的光信号，由所述第一光接口(14)进行发射；所述光接收单元(13)将通过所述第二光接口单元(15)接收的PAM4光信号转换为PAM4电信号后经所述第二电接口单元(16)输出。
  10. 根据权利要求8或9所述的一种基于PAM4调制的光收发模块，其特征在于：所述第一电接口单元(11)的输入和输出的电信号为N*2路速率为25Gb/s的NRZ电信号，每个SFP56封装形式的PAM4光收发模块为用于50Gb/s速率通信系统信息传输的SFP56标准封装形式的封装体。
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