WO2018032309A1 - I-v转换模块 - Google Patents

I-v转换模块 Download PDF

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Publication number
WO2018032309A1
WO2018032309A1 PCT/CN2016/095429 CN2016095429W WO2018032309A1 WO 2018032309 A1 WO2018032309 A1 WO 2018032309A1 CN 2016095429 W CN2016095429 W CN 2016095429W WO 2018032309 A1 WO2018032309 A1 WO 2018032309A1
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WIPO (PCT)
Prior art keywords
switch
circuit
conversion
bypass
conversion module
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PCT/CN2016/095429
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English (en)
French (fr)
Inventor
张孟文
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深圳市汇顶科技股份有限公司
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Publication date
Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to KR1020177030105A priority Critical patent/KR102001754B1/ko
Priority to EP16898874.9A priority patent/EP3309645B1/en
Priority to CN201680000904.1A priority patent/CN106489107B/zh
Priority to PCT/CN2016/095429 priority patent/WO2018032309A1/zh
Priority to US15/793,563 priority patent/US10146245B2/en
Publication of WO2018032309A1 publication Critical patent/WO2018032309A1/zh

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/12—Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/262—Current mirrors using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M11/00—Power conversion systems not covered by the preceding groups

Definitions

  • the present invention relates to the field of electronic circuit technologies, and in particular, to an I-V conversion module.
  • the existing current-voltage conversion module that is, the I-V conversion module, as shown in FIG. 1, is composed of a conventional I-V conversion circuit 1, a sample-and-hold circuit 2, and a current output type sensor 3.
  • the sample-and-hold circuit 2 is for canceling the DC current component output from the current output type sensor 3 to increase the output dynamic range of the I-V conversion module.
  • the establishment speed of the existing sample-and-hold circuit 2 is slow, resulting in a decrease in the speed of the overall I-V conversion, that is, the acquisition time of the AC signal becomes long.
  • the switch S 2 is closed.
  • the setup speed of the sample-and-hold circuit 2 is very slow, causing the IV conversion circuit 1 to take a long time to collect the AC current component output from the current output type sensor 3. , greatly reducing the conversion rate of the IV conversion module.
  • An object of the embodiments of the present invention is to provide an I-V conversion module, which greatly speeds up the establishment of the sample-and-hold circuit, thereby improving the conversion rate of the I-V conversion circuit.
  • an embodiment of the present invention provides an IV conversion module including: a current output type sensor, an IV conversion circuit, a sample and hold circuit, a source follower, a loop switch, and a bypass circuit;
  • the drain of the device is connected to the input and output end of the sample-and-hold circuit, the source is connected to the input end of the IV conversion circuit and the output end of the current output type sensor, and the gate is connected to the output end of the IV conversion circuit through the loop switch;
  • the source The gate of the follower is also connected to the bypass circuit; wherein the loop switch is closed and the bypass circuit is disabled, the feedback loop formed by the source follower, the IV conversion circuit and the loop switch is turned on, and the IV conversion module enters The sampling setup phase; the loop switch is turned on and the bypass circuit is enabled, the feedback loop is bypassed, and the IV conversion module enters the IV conversion phase.
  • an embodiment of the present invention provides an IV conversion module.
  • a sampling establishment phase a feedback loop formed by a source follower, an IV conversion circuit, and a loop switch is turned on, and the source follows.
  • the sample-and-hold circuit is isolated from the current output type sensor, so that the time constant formed by the sample-and-hold circuit and the current output type sensor is greatly reduced, the speed of establishing the sample-and-hold circuit is greatly accelerated, and the conversion rate of the IV conversion module is improved.
  • the present invention makes the voltage at the output end of the current output type sensor remain unchanged during the sampling establishment phase, thereby ensuring that the output current does not change with the voltage of the output terminal, ensuring the consistency of the output current of the current output type sensor.
  • the I-V conversion module further includes a loop capacitor; the loop capacitor is connected between the gate of the source follower and the input of the I-V conversion circuit; and the stability of the feedback loop is increased.
  • bypass circuit includes a bypass switch and a power supply, and the bypass switch is connected between the gate of the source follower and the power supply; wherein the bypass circuit is disabled when the bypass switch is turned on.
  • the bypass circuit includes a first bypass switch, a second bypass switch, and a ground layer;
  • the switch is connected between the gate of the source follower and the ground layer;
  • the second bypass switch is connected between the source and the drain of the source follower; wherein the first bypass switch and the second bypass When the switch is turned on, the bypass circuit is disabled.
  • the embodiment provides another specific implementation manner of the bypass circuit. Compared with the bypass circuit described above, the ripple in the power supply is prevented from being introduced into the IV conversion circuit, thereby improving the IV conversion circuit 1 The signal-to-noise ratio improves the power supply rejection capability of the IV conversion circuit.
  • the inverting amplifier includes an inverter or an operational amplifier; two different types of inverting amplifiers are provided, which expands the application scenario of the present invention.
  • the conversion path includes resistors and switches connected in series or capacitors and switches connected in series; two types of conversion paths are provided to ensure the feasibility of the present invention.
  • the source follower includes an N-type field effect transistor or an NPN type transistor; providing different types of source followers extends the application scenario of the present invention.
  • the loop switch is an electronic switch or a physical switch; different types of loop switches are provided, which expands the application scenario of the present invention.
  • FIG. 1 is a circuit configuration diagram of an I-V conversion module according to the background art
  • FIG. 2 is a circuit configuration diagram of an I-V conversion module according to the first embodiment
  • FIG. 3 is a circuit configuration diagram of a first type I-V conversion circuit according to the first embodiment
  • FIG. 4 is a circuit configuration diagram of a second I-V conversion circuit according to the first embodiment
  • FIG. 5 is a circuit configuration diagram of an I-V conversion module according to a second embodiment
  • Fig. 6 is a circuit configuration diagram of an I-V conversion module according to a third embodiment.
  • a first embodiment of the present invention relates to an IV conversion module, that is, a current-voltage conversion module.
  • the IV conversion module includes: an IV conversion circuit 1, a sample and hold circuit 2, a current output type sensor 3, and a source.
  • the IV conversion module includes: an IV conversion circuit 1, a sample and hold circuit 2, a current output type sensor 3, and a source.
  • the IV conversion module includes: an IV conversion circuit 1, a sample and hold circuit 2, a current output type sensor 3, and a source.
  • follower M 1 loop switch S 1 and bypass circuit.
  • the source follower M 1 includes an N-type field effect transistor or an NPN-type transistor, and is not limited thereto. The present embodiment is described by taking an N-type field effect transistor as an example.
  • the drain of the source follower M 1 is connected to the input and output terminals of the sample and hold circuit 2
  • a source connected to the IV conversion circuit input terminal V in and the output terminal of the current output type sensor 1 is 3
  • the loop switch S 1 is connected to the output terminal V out of the IV conversion circuit 1, and the gate is also connected to the bypass circuit.
  • the loop switch S 1 is an electronic switch or a physical switch; the electronic switch is, for example, a field effect transistor or a bipolar junction transistor.
  • the present embodiment does not impose any limitation on the type of the loop switch S 1 .
  • the current output type sensor 3 includes a parasitic capacitance C 3 .
  • One end of the parasitic capacitance C 3 is connected to the ground GND1, and the other end is connected to the output terminal of the current output type sensor 3.
  • Output terminal of the current output type sensor 3 is connected to the source electrode of the source follower M IV conversion circuit input terminal V in 1 1.
  • the output terminal of the current output type sensor 3 outputs a current I 0 , wherein the DC current component output from the current output type sensor 3 is 1.
  • the sample and hold circuit 2 includes a sampling field effect transistor M 2 , a sampling capacitor C 2 , and a sampling switch S 2 .
  • One end of the sampling capacitor C 2 is connected to the source of the sampling field effect transistor M 2 and is connected to the power supply voltage VDD.
  • the other end of the sampling capacitor C 2 is connected to the gate of the sampling field effect transistor M 2 and the sampling switch S 2 .
  • the other end of the sampling switch S 2 is connected to the drain of the source follower M 1 together with the drain of the sampling field effect transistor M 2 .
  • the IV conversion circuit 1 includes an inverting amplifier and at least one conversion path.
  • the conversion path is connected across the input end and the output end of the inverting amplifier, and the input end and the output end of the inverting amplifier form an input terminal V in and an output end V out of the IV conversion circuit 1, respectively.
  • the inverting amplifier includes an inverter or an operational amplifier (without any limitation).
  • the conversion path includes a resistor and a switch connected in series or a capacitor and a switch connected in series; and the conversion path may be multiple or a single strip; in this embodiment, the type and the transformation path of the series connection of the conversion path may be specifically set according to actual conditions.
  • the number of the articles is not limited in this embodiment.
  • This embodiment provides two implementation manners of the I-V conversion circuit 1, which are specifically described as follows:
  • the first IV conversion circuit 3, an inverter 11 inverting amplifier, converting path 12 includes a capacitor C 12 connected in series with the change-over switch S 12. Specifically, one end of the capacitor C 12 is connected to the input terminal of inverter 11 V in, and the other end connected to one end of the changeover switch S 12; S 12 the other end of the changeover switch is connected to the output terminal of the inverter 11 is V out , the inverting input terminal and the output terminal V in V out are formed. 11 IV input terminal V in V out and the output terminal of the conversion circuit 1;
  • the changeover switch S 12 when the changeover switch S 12 is turned off, the conversion path 12 is not operated, and the IV conversion circuit 1 is equivalent to an open loop amplifier.
  • the changeover switch S 12 When the changeover switch S 12 is closed, the IV conversion circuit 1 converts the input current signal I in into a voltage signal output.
  • the changeover switch S 12 is turned on and off at intervals controlled by the clock signal ⁇ .
  • the input current signal I in is the alternating current component output by the current output type sensor 3 .
  • the second IV conversion circuit is an operational amplifier 13 and the conversion path 12 includes a resistor R 12 and a changeover switch S 12 connected in series. Specifically, one end of resistor R 12 is connected to the input terminal of the operational amplifier V in 13 (i.e., the operational amplifier inverting input terminal 13 receives its noninverting input terminal of the common-mode power supply V cm), the other end of the resistor R 12 is connected to the one end of the changeover switch S 12, the other end of the conversion switch S 12 is connected to operational amplifier output 13 Vout of, the operational amplifier input terminal V in and the output terminal V out 13 are formed an input terminal V in and an output IV converting circuit 1 End V out .
  • the conversion path 12 when the changeover switch S 12 is turned off, the conversion path 12 does not operate, and the IV conversion circuit 1 is equivalent to an open loop amplifier; when the changeover switch S 12 is closed, the IV conversion circuit 1 Convert the input current signal I in into a voltage signal output.
  • the IV conversion circuit 1 has other implementations.
  • the implementation of the IV conversion circuit 1 that can make the IV conversion module work normally can be applied to the present embodiment.
  • the IV conversion circuit 1 may be connected by an operational amplifier, a conversion path including a capacitor connected in series and a switch, or may be connected by an inverter, a conversion path including a resistor connected in series and a switch.
  • the bypass circuit includes a bypass switch S 3 and a power supply.
  • the bypass switch S 3 is connected between the gate of the source follower M 1 and the power supply.
  • the power supply of the bypass circuit may be the power supply voltage VDD in the sample and hold circuit 2, or may be a separate power supply. This embodiment does not impose any limitation.
  • bypass circuit when the bypass switch S 3 is open, a bypass circuit is disabled, i.e., a bypass circuit is in non-operation state; S 3 when the bypass switch is closed, the bypass circuit is enabled, i.e., The bypass circuit is in operation; at this time, the gate of the source follower M 1 is connected to the power supply, the source follower M 1 enters the linear region and the source follower M 1 is equivalent to a closed switch.
  • the loop switch S 1 when the control signal sh is at a high level, the loop switch S 1 is closed and the bypass circuit is disabled (ie, the bypass switch S 3 is turned on).
  • the feedback loop formed by the source follower M 1 , the IV conversion circuit 1 and the loop switch S 1 is turned on, and the IV conversion module enters the sampling setup phase; the loop switch S 1 is opened and the bypass circuit is enabled (ie, bypass) Switch S 3 is closed), the feedback loop is bypassed, and the IV conversion module enters the IV conversion phase.
  • the loop switch S 1 and the sampling switch S 2 are controlled by the control signal sh, and the changeover switch S 12 is controlled by the control signal. control.
  • the control signal sh is at a high level
  • the loop switch S 1 and the sampling switch S 2 are closed, and the changeover switch S 12 and the bypass switch S 3 are turned on.
  • the feedback loop is turned on, the source follower M 1 enters the saturation region, and the sample and hold circuit 2 and the current output type sensor 3 are isolated.
  • the IV conversion module enters the sampling establishment phase, that is, the sampling and holding circuit 2 starts sampling current, the gate and drain of the sampling field effect transistor M 2 are short-circuited, and the sampling capacitor C 2 is charged, and the voltage V c2 of one end of the sampling capacitor C 2 is stabilized to a voltage value such that the drain current of the sampling field effect transistor M 2 is equal to the direct current current component I output by the current output type sensor 3.
  • the sampling field effect transistor M 2 is equivalent to a resistance having a resistance value of gm. This resistor is connected in parallel with the sampling capacitor C 2 and the capacitance seen from the drain of the source follower M 1 to produce a time constant ⁇ 1 .
  • the loop switch S 1 and the sampling switch S 2 are turned on, and the changeover switch S 12 and the bypass switch S 3 are closed.
  • the IV conversion module enters the IV conversion stage, and the sampling field effect transistor M 2 outputs a constant current and cancels the DC current component I, while the source follower M 1 enters the linear region. At this time, the source follower M 1 is equivalent to a closed
  • the switch, IV conversion circuit converts the AC signal output from the current output type sensor 3 into a voltage output signal.
  • the switch S 2 in the sampling establishment phase, that is, when the control signal sh is at a high level, the switch S 2 is closed, and the voltage of the parasitic capacitor C 3 and the sampling capacitor C 2 connected to the plate starts to be established, and the sampling field is started at this time.
  • the effect transistor M 2 is equivalent to a resistor having a resistance of gm.
  • the time constant ⁇ 1 C 2 /gm 1 (gm 1 is the transconductance of the sampling field effect transistor M 2 ).
  • the time constant ⁇ 1 is less The impact of C 3 .
  • the time constant ⁇ 1 ⁇ 1us in the sample-and-hold circuit 2 that is, the settling speed of the sample-and-hold circuit 2 is set to be almost faster than the existing sample-and-hold circuit.
  • the increase is 100 times (usually increased by 10 to 100 times); thus, the IV conversion circuit 1 can convert the AC current component output from the current output type sensor 3 in a short time.
  • the time constant ⁇ 2 of the input terminal Vin 2 C3 ⁇ Req (Req is the equivalent of the input terminal Vin in the loop composed of the conversion path 12 and the inverter 11 impedance).
  • Req the equivalent of the input terminal Vin in the loop composed of the conversion path 12 and the inverter 11 impedance.
  • the gain of the inverter 11 is A
  • Req 1/(gm 2 ⁇ A) (gm 2 is the transconductance of the source follower M 1 )
  • the time constant ⁇ 2 of the input terminal Vin C3 ⁇ Req (Req is the equivalent impedance of the input terminal Vin in the loop composed of the conversion path 12 and the inverter 11).
  • Req the equivalent impedance of the input terminal Vin in the loop composed of the conversion path 12 and the inverter 11.
  • the gain of the inverter 11 is A
  • Req 1/(gm 2 ⁇ A) (gm 2 is the transconductance of the source follower M 1 )
  • the establishment speed of the input terminal Vin has been greatly improved, and improved It is about 10 to 100 times.
  • the present embodiment provides an IV conversion module, which forms a feedback loop with the source follower M 1 , the IV conversion circuit 1 and the loop switch S 1 such that the source follower M 1 is
  • the parasitic capacitance C 3 is isolated from the sampling capacitor C 1 , that is, the sample and hold circuit 2 and the current output sensor 3 are isolated.
  • the time constant formed by the parasitic capacitance C 3 and the sampling capacitor C 1 is greatly reduced, thereby greatly increasing the settling speed of the sample and hold circuit 2 and increasing the slew rate of the IV varying circuit.
  • the control circuit of the IV conversion module provided by the invention is relatively simple, and the formed feedback loop multiplexes the inverting amplifier in the IV conversion circuit, thereby saving circuit cost.
  • a second embodiment of the invention relates to an IV conversion module.
  • the second embodiment is improved on the basis of the first embodiment, and the main improvement is that in the second embodiment of the present invention, as shown in FIG. 5, the loop capacitance C 1 is added to the feedback loop.
  • the loop capacitance C 1 is connected between the gate of the source follower M 1 and the input terminal Vin of the IV conversion circuit 1 .
  • the loop capacitor C 1 is connected in parallel with the inverter 11 . Due to the Miller effect, the loop capacitor C 1 is multiplied to the source of the source follower M 1 . Therefore, the source follower M 1 source generates a low frequency pole to allow The feedback loop is more stable.
  • the time constant ⁇ 2 C 3 ⁇ Req of the input terminal Vin of the IV conversion circuit 1 (Req is the conversion path 12 and the inverter 11 is the equivalent impedance of the input terminal Vin in the loop.
  • Req the gain of the inverter 11 is A
  • Req the gain of the inverter 11 is A
  • Req the gain of the inverter 11 is A
  • the present embodiment increases the loop capacitance C 1 in the feedback loop, which increases the stability of the feedback loop.
  • a third embodiment of the invention relates to an IV conversion module.
  • the third embodiment is substantially the same as the second embodiment, and the main difference is that in the second embodiment, the bypass circuit includes a bypass switch and a power supply.
  • the bypass circuit includes a first bypass switch S 3 (ie, the bypass switch S 3 in the second embodiment), a second bypass switch S 4 , and Ground plane GND2.
  • the first bypass switch S 3 is connected between the gate of the source follower M 1 and the ground layer GND 2 ; the second bypass switch S 4 is connected across the source of the source follower M 1 and Between the drains.
  • the second bypass switch S 4 uses a p-type field effect transistor without any limitation.
  • bypass circuit when both the first bypass switch S 3 and the second bypass switch S 4 are turned on, the bypass circuit is disabled, that is, the bypass circuit is in an inoperative state.
  • the bypass circuit is enabled, i.e., the bypass circuit is in an active state.
  • the loop switch S 1 when the control signal sh is at a high level, the loop switch S 1 is closed, and the first bypass switch S 3 and the second bypass switch S 4 are turned on.
  • the feedback loop begins to work, at which point the source follower M 1 enters the saturation region (due to negative feedback).
  • sh is low, the loop switch S 1 is open, the first bypass switch S 3 and the second bypass switch S 4 are closed, and the feedback loop is bypassed.
  • the IV conversion circuit is equivalent to a conventional conversion circuit, the gate of the source follower M 1 is connected to the ground layer GND2, the source follower M 1 enters the cut-off region, and at the same time, the second bypass switch S 4 Closed, the source follower M 1 is shorted.
  • the present embodiment differs from the second embodiment in the mechanism of the bypass circuit.
  • the gate of the source follower M 1 is pulled to the power supply terminal, and usually the power supply terminal has a large voltage ripple, and the gate of the source follower M 1 is There is a parasitic capacitance between the source and the drain. Therefore, the bypass circuit introduces ripple in the voltage into the IV conversion circuit 1, which introduces a large amount of noise, thereby affecting the final signal-to-noise ratio.
  • the gate of the second bypass switch S 4 (when the p-type field effect transistor is used) is grounded and turns on the shorted source follower M 1 , and the source follower M1
  • the gate is connected to the ground plane GND2 (ie, ground), so that the ripple in the power supply is prevented from being introduced into the IV conversion circuit, thereby improving the signal-to-noise ratio of the IV conversion circuit 1, that is, improving the power supply rejection of the IV conversion circuit. ability.
  • the source follower is equivalent to a closed switch when the sampling setup phase is in the linear region, thereby eliminating some switches in the circuit, saving cost and reducing the cost.
  • the control complexity of the IV conversion module is equivalent to a closed switch when the sampling setup phase is in the linear region, thereby eliminating some switches in the circuit, saving cost and reducing the cost.
  • each module involved in this embodiment is a logic module.
  • a logical unit may be a physical unit, a part of a physical unit, or multiple physical entities. A combination of units is implemented.
  • the present embodiment does not introduce a unit that is not closely related to solving the technical problem proposed by the present invention, but this does not mean that there are no other units in the present embodiment.

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Abstract

一种I-V转换模块，涉及电子技术领域，包括：电流输出型传感器（3）、I-V变换电路（1）、采样保持电路（2）、源极跟随器（M1）、环路开关（S1）以及旁路电路；源极跟随器（M1）的漏极连接于采样保持电路（2）的输入输出端，源极连接于I-V变换电路（1）的输入端与电流输出型传感器（3）的输出端，栅极通过环路开关（S1）连接于I-V变换电路（1）的输出端；源极跟随器（M1）的栅极还连接于旁路电路；其中，闭合环路开关（S1）且禁能旁路电路，源极跟随器（M1）、I-V变换电路（1）以及环路开关（S1）形成的反馈环路被导通，I-V转换模块进入采样建立阶段。上述I-V转换模块极大的加快了采样保持电路（2）的建立速度，从而提高了I-V变换电路（1）的转换速率。

Description

I-V转换模块 技术领域
本发明涉及电子电路技术领域，特别涉及一种I-V转换模块。
背景技术
现有的电流-电压转换模块，即I-V转换模块，如图1所示，由常规I-V变换电路1、采样保持电路2以及电流输出型传感器3组成。采样保持电路2用于抵消电流输出型传感器3输出的直流电流分量，以增加I-V转换模块的输出动态范围。然而，现有的采样保持电路2的建立速度较慢，导致整体I-V转换的速度降低，即导致交流信号的获取时间变长。
现有的I-V转换模块中，若电流输出型传感器3输出电流为I0，输出的直流电流分量为I，在采样建立阶段中，即控制信号sh为高电平时，开关S2闭合，此时P型场效应晶体管M2等效为一个阻值为gm的电阻。由于场效应晶体管M2一般工作在亚阈值区，因此该场效应晶体管M2的电阻与电流输出型传感器3输出的直流电流分量I成正比，即gm＝α·I(α为常数)。当控制信号sh为低电平时，即开关S2闭合的一瞬间，寄生电容C3和采样电容C2相连极板的电压开始建立，因此采样保持电路2的时间常数τ＝(C3+C2)/gm＝(C3+C2)/α·I。
以上式中通常出现频率较高的参数值为例，若gm＝α·I＝1us，C3＝100pF，C2＝1pF，得时间常数τ≈100us。在实现本发明的过程中，发明人发现现有技术存在如下问题：采样保持电路2的建立速度非常慢，导致I-V变换电路1需要较长时间对电流输出型传感器3输出的交流电流分量进行采集，极大的降低了I-V转换模块的转换速率。
发明内容
本发明实施方式的目的在于提供一种I-V转换模块，极大的加快了采样保持电路的建立速度，从而提高了I-V变换电路的转换速率。
为解决上述技术问题，本发明的实施方式提供了一种I-V转换模块，包括：电流输出型传感器、I-V变换电路、采样保持电路、源极跟随器、环路开关以及旁路电路；源极跟随器的漏极连接于采样保持电路的输入输出端，源极连接于I-V变换电路的输入端与电流输出型传感器的输出端，栅极通过环路开关连接于I-V变换电路的输出端；源极跟随器的栅极还连接于旁路电路；其中，闭合环路开关且禁能旁路电路，源极跟随器、I-V变换电路以及环路开关形成的反馈环路被导通，I-V转换模块进入采样建立阶段；打开环路开关且使能旁路电路，反馈环路被旁路，I-V转换模块进入I-V转换阶段。
本发明实施方式相对于现有技术而言，提供了一种I-V转换模块，在采样建立阶段，以源极跟随器、I-V变换电路以及环路开关形成的反馈环路被导通，源极跟随器将采样保持电路与电流输出型传感器隔离，从而使得采样保持电路与电流输出型传感器形成的时间常数大大减小，极大的加快了采样保持电路的建立速度，提高了I-V转换模块的转换速率。并且本发明使得电流输出型传感器输出端的电压在采样建立阶段保持不变，从而保证输出的电流不随输出端的电压而变化，确保了电流输出型传感器的输出电流大小的一致性。
另外，I-V转换模块还包括环路电容；环路电容连接于源极跟随器的栅极与所述I-V变换电路的输入端之间；增加了反馈环路的稳定性。
另外，旁路电路包括旁路开关与供电电源，旁路开关连接于源极跟随器的栅极与供电电源之间；其中，旁路开关被打开时，旁路电路被禁能。本实施例提供了一种旁路电路的具体实现方式，且此种旁路电路较为简单。
另外，旁路电路包括第一旁路开关、第二旁路开关以及接地层；第一旁 路开关连接于源极跟随器的栅极与接地层之间；第二旁路开关跨接于源极跟随器的源极与漏极之间；其中，第一旁路开关与第二旁路开关均被打开时，旁路电路被禁能。本实施例提供了另外一种旁路电路的具体实现方式，相对于上述一种旁路电路而言，避免了供电电源中的纹波被引入到I-V变换电路中，从而能够提高I-V变换电路1的信噪比，即提高了I-V变换电路的电源抑制能力。
另外，反相放大器包括反相器或者运算放大器；提供了两种不同的反相放大器的类型，拓展了本发明的应用场景。
另外，变换路径包括串联连接的电阻与开关或者串联连接的电容与开关；提供了两种类型的变换路径，保证了本发明的可行性。
另外，源极跟随器包括N型场效应晶体管或者NPN型三极管；提供不同类型的源极跟随器，拓展了本发明的应用场景。
另外，环路开关为电子开关或者物理开关；提供了不同类型的环路开关，拓展了本发明的应用场景。
附图说明
图1是根据背景技术中的I-V转换模块的电路结构图；
图2是根据第一实施方式的I-V转换模块的电路结构图；
图3是根据第一实施方式的第一种I-V变换电路的电路结构图；
图4是根据第一实施方式的第二种I-V变换电路的电路结构图；
图5是根据第二实施方式的I-V转换模块的电路结构图；
图6是根据第三实施方式的I-V转换模块的电路结构图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，下面将结合附图对本发明的各实施方式进行详细的阐述。然而，本领域的普通技术人员可以理解，在本发明各实施方式中，为了使读者更好地理解本申请而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施方式的种种变化和修改，也可以实现本申请所要求保护的技术方案。
本发明的第一实施方式涉及一种I-V转换模块，即电流-电压转换模块，如图2所示，I-V转换模块包括：I-V变换电路1、采样保持电路2、电流输出型传感器3、源极跟随器M1、环路开关S1以及旁路电路。
其中，源极跟随器M1包括N型场效应晶体管或者NPN型三极管，然不作任何限制；本实施方式以N型场效应晶体管为例进行说明。
本实施方式中，源极跟随器M1的漏极连接于采样保持电路2的输入输出端，源极连接于I-V变换电路1的输入端Vin与电流输出型传感器3的输出端，栅极通过环路开关S1连接于I-V变换电路1的输出端Vout，栅极还连接于旁路电路。
其中，环路开关S1为电子开关或者物理开关；电子开关例如为场效应晶体管或双极结型晶体管，本实施方式对环路开关S1的类型不作任何限制。
本实施方式中，电流输出型传感器3包括寄生电容C3。寄生电容C3的一端连接于接地端GND1，另一端连接于电流输出型传感器3的输出端。电流输出型传感器3的输出端连接于源极跟随器M1的源极与I-V变换电路1的输入端Vin。电流输出型传感器3的输出端输出电流I0，其中，电流输出型传感器3输出的直流电流分量为I。
本实施方式中，采样保持电路2包括：采样场效应晶体管M2、采样电容C2以及采样开关S2。采样电容C2的一端与采样场效应晶体管M2的源极相连并一同连接于电源电压VDD上，采样电容C2的另一端连接于采样场效应晶 体管M2的栅极与采样开关S2的一端。采样开关S2的另一端与采样场效应晶体管M2的漏极一同连接于源极跟随器M1的漏极。
在采样保持电路2中，当采样开关S2闭合时，采样场效应晶体管M2等效为一个阻值为gm的电阻。由于源极跟随器M1一般工作在亚阈值区，因此该采样场效应晶体管M2的电阻与电流输出型传感器3输出的直流电流分量I成正比，即gm＝α·I(α为常数)。
本实施方式中，I-V变换电路1包括反相放大器与至少一条变换路径。变换路径跨接在反相放大器的输入端与输出端，反相放大器的输入端与输出端分别形成I-V变换电路1的输入端Vin与输出端Vout。
其中，反相放大器包括反相器或者运算放大器(然不作任何限制)。变换路径包括串联连接的电阻与开关或者串联连接的电容与开关；并且，变换路径可以是多条，也可以是单条；本实施方式中可根据实际情况具体设置变换路径串联连接的类型和变换路径的条数，本实施方式对此不作任何限制。
本实施方式提供了I-V变换电路1的两种实现方式，具体说明如下：
第一种I-V变换电路，如图3所示，反相放大器为反相器11，变换路径12包括串联连接的电容C12与变换开关S12。具体而言，电容C12的一端连接于反相器11的输入端Vin，另一端连接于变换开关S12的一端；变换开关S12的另一端连接于反相器11的输出端Vout，反相器11的输入端Vin与输出端Vout分别形成I-V变换电路1的输入端Vin与输出端Vout；
在第一种I-V变换电路中，当变换开关S12断开，变换路径12不工作，此时I-V变换电路1等效为一个开环放大器。变换开关S12闭合时，I-V变换电路1将输入的电流信号Iin转换为电压信号输出。变换开关S12受时钟信号φ控制间隔地打开与关闭。其中，输入的电流信号Iin即为电流输出型传感器3输出的交流电流分量。
第二种I-V变换电路，如图4所示，反相放大器为运算放大器13，变换 路径12包括串联连接的电阻R12与变换开关S12。具体而言，电阻R12的一端连接于运算放大器13的输入端Vin(即运算放大器13的反相输入端，其同相输入端接收共模电源Vcm)，电阻R12的另一端连接于变换开关S12的一端，变换开关S12的另一端连接于运算放大器13的输出端Vout，运算放大器13的输入端Vin与输出端Vout分别形成I-V变换电路1的输入端Vin与输出端Vout。
在第二种I-V变换电路1中，当变换开关S12断开时，变换路径12不工作，此时I-V变换电路1等效为一个开环放大器；当变换开关S12闭合时，I-V变换电路1将输入的电流信号Iin转换为电压信号输出。
于实际上，I-V变换电路1还有其他多种实现方式，本实施方式对此不作任何限制，凡是能够使I-V转换模块正常工作的I-V变换电路1的实现方式，皆可应用于本实施方式中；例如，I-V变换电路1还可以以运算放大器、包括串联连接的电容与开关的变换路径连接而成，或者还可以以反相器、包括串联连接的电阻与开关的变换路径连接而成。
本实施方式中，旁路电路包括旁路开关S3与供电电源。旁路开关S3连接于源极跟随器M1的栅极与供电电源之间。其中，旁路电路的供电电源可以是采样保持电路2中的电源电压VDD，也可以为单独的供电电源，本实施方式对此不作任何限制。
在旁路电路中，当旁路开关S3被打开，旁路电路被禁能，即，旁路电路处于非工作状态；当旁路开关S3被闭合，旁路电路被使能，即，旁路电路处于工作状态；此时，源极跟随器M1的栅极被连接至供电电源，源极跟随器M1进入线性区且源极跟随器M1等效为一个闭合的开关。
本实施方式中，当控制信号sh为高电平时，闭合环路开关S1且禁能旁路电路(即旁路开关S3被打开)。源极跟随器M1、I-V变换电路1以及环路开关S1形成的反馈环路被导通，I-V转换模块进入采样建立阶段；打开环路 开关S1且使能旁路电路(即旁路开关S3闭合)，反馈环路被旁路，I-V转换模块进入I-V转换阶段。
示例的，在I-V转换模块中，如图2、3所示，本实施方式中，环路开关S1、采样开关S2由控制信号sh控制，变换开关S12由控制信号
Figure PCTCN2016095429-appb-000001
控制。当控制信号sh为高电平时，环路开关S1以及采样开关S2闭合，变换开关S12以及旁路开关S3打开。反馈环路被导通，源极跟随器M1进入饱和区，隔离采样保持电路2和电流输出型传感器3。I-V转换模块进入采样建立阶段，即采样保持电路2开始采样电流，采样场效应晶体管M2栅极、漏极短接并对采样电容C2充电，最终采样电容C2的一端电压Vc2稳定至一个电压值，使得采样场效应晶体管M2的漏极电流与电流输出型传感器3输出的直流电流分量I相等，此时，采样场效应晶体管M2等效为一阻值大小为gm的电阻，该电阻与采样电容C2以及从源极跟随器M1漏极看到的电容并联，产生时间常数τ1。当控制信号sh为低电平时，环路开关S1以及采样开关S2打开，变换开关S12以及旁路开关S3闭合。I-V转换模块进入I-V转换阶段，采样场效应晶体管M2输出恒定电流并抵消直流电流分量I，同时源极跟随器M1进入线性区，此时，源极跟随器M1等效为一个闭合的开关，I-V变换电路将电流输出型传感器3输出的交流信号转换为电压输出信号。
具体而言，现有技术中，在采样建立阶段中，即控制信号sh为高电平时，开关S2闭合，寄生电容C3和采样电容C2相连极板的电压开始建立，此时采样场效应晶体管M2等效为一个阻值为gm的电阻。由于采样场效应晶体管M2一般工作在亚阈值区，因此该采样场效应晶体管M2的电阻与电流输出型传感器3输出的直流电流分量I成正比，即gm＝α·I(α为常数)，采样保持电路2的时间常数τ＝(C3+C2)/gm＝(C3+C2)/α·I。
本实施方式中，由于源极跟随器M1处于饱和区，其沟道发生夹断，因此从源极跟随器M1的漏级几乎看不到电容，因此时间常数τ1＝C2/gm1(gm1 为采样场效应晶体管M2的跨导)。同现有的时间常数τ＝(C3+C2)/gm＝(C3+C2)/α·I(α为常数，是gm与I的比)相比，时间常数τ1中少了C3的影响。若gm1＝1us，C3＝100pF，C2＝1pF，那么采样保持电路2中的时间常数τ1≈1us，即采样保持电路2的建立速度与现有的采样保持电路相比，建立速度几乎提高了100倍(通常提高了10～100倍)；从而I-V变换电路1只需很短的时间就可以对电流输出型传感器3输出的交流电流分量进行转换。
具体而言，现有技术中，在I-V变换电路1中，输入端Vin的时间常数τ2＝C3·Req(Req为变换路径12和反相器11组成的环路中输入端Vin的等效阻抗)。假设反相器11的增益为A，则可以推导出Req＝1/(gm2·A)(gm2为源极跟随器M1的跨导)，则输入端Vin的时间常数可以修改为τ2＝(C3+A)/A。
本实施方式中，在I-V变换电路1中，输入端Vin的时间常数τ2＝C3·Req(Req为变换路径12和反相器11组成的环路中输入端Vin的等效阻抗)。假设反相器11的增益为A，则可以推导出Req＝1/(gm2·A)(gm2为源极跟随器M1的跨导)，则输入端Vin的时间常数可以修改为τ2＝(C3+A)/(gm2·A)，与现有技术中的τ2＝(C3+A)/A相比，输入端Vin的建立速度得到了极大的提高，提高了约10～100倍。
本实施方式相对于现有技术而言，提供了一种I-V转换模块，以源极跟随器M1、I-V变换电路1以及环路开关S1形成反馈环路，使得源极跟随器M1在采样建立阶段处于饱和区时，以起到寄生电容C3与采样电容C1隔离的作用，即，隔离采样保持电路2与电流输出型传感器3。且使寄生电容C3与采样电容C1形成的时间常数大大减小，从而极大的加快采样保持电路2的建立速度，提高了I-V变化电路的转换速率。并且本发明提供的I-V转换模块的控制电路较为简单，且形成的反馈环路复用了I-V变换电路中的反相放大器，节省了电路成本。
本发明的第二实施方式涉及一种I-V转换模块。第二实施方式在第一实施方式的基础上作出改进，主要改进之处在于：在本发明第二实施方式中，如图5所示，反馈环路中增加了环路电容C1。
本实施方式中，环路电容C1连接于源极跟随器M1的栅极与I-V变换电路1的输入端Vin之间。环路电容C1与反相器11并联，由于米勒效应，环路电容C1倍增至源极跟随器M1的源极，因此，源极跟随器M1源极产生一个低频极点来让反馈环路更稳定。
示例的，本实施方式中，如图3、5所示，在I-V转换模块中，I-V变换电路1的输入端Vin的时间常数τ2＝C3·Req(Req为变换路径12和反相器11组成的环路中输入端Vin的等效阻抗)。假设反相器11的增益为A，则可以推导出Req＝1/(gm2·A)(gm2为源极跟随器M1的跨导)，则输入端Vin的时间常数可以修改为τ2＝(C3+C1·A)/(gm2·A)。与第一实施方式中的τ2＝(C3+A)/(gm2·A)相比，输入端Vin的建立速度得到了极大的提高。
本实施方式相对于第一实施方式技术而言，在反馈环路中增加环路电容C1，增加了反馈环路的稳定性。
本发明的第三实施方式涉及一种I-V转换模块。第三实施方式与第二实施方式大致相同，主要区别之处在于：在第二实施方式中，旁路电路包括旁路开关与供电电源。而在本发明第三实施方式中，如图6所示，旁路电路包括第一旁路开关S3(即第二实施方式中的旁路开关S3)、第二旁路开关S4以及接地层GND2。
本实施方式中，第一旁路开关S3连接于源极跟随器M1的栅极与接地层GND2之间；第二旁路开关S4跨接于源极跟随器M1的源极与漏极之间。
较佳的，第二旁路开关S4采用p型场效应晶体管，然不作任何限制。
在旁路电路中，当第一旁路开关S3与第二旁路开关S4均被打开时，旁路电路被禁能，即，旁路电路处于非工作状态。当第一旁路开关S3与第二旁 路开关S4均闭合时，旁路电路被使能，即，旁路电路处于工作状态。
本实施方式中，当控制信号sh高电平时，环路开关S1闭合，第一旁路开关S3以及第二旁路开关S4打开。反馈环路开始工作，此时，源极跟随器M1进入饱和区(由于负反馈作用)。当sh为低电平时，环路开关S1断开、第一旁路开关S3以及第二旁路开关S4闭合，反馈环路被旁路。此时，I-V变换电路等效为常规变换电路，源极跟随器M1的栅极被连接至接地层GND2，源极跟随器M1进入截止区，与此同时，第二旁路开关S4闭合，源极跟随器M1短路。
本实施方式相对于第二实施方式而言，旁路电路的机制不同。在第二实施方式采样建立阶段中，源极跟随器M1的栅极被拉至供电电源端，通常供电电源端有较大的电压纹波，且源极跟随器M1的栅极对其源极、漏极存在一个寄生电容，因此，该旁路电路会将电压中的纹波引入到I-V变换电路1中，即引入了大量噪声，从而影响最终的信噪比。而在本实施方式中，在采样建立阶段，第二旁路开关S4(为p型场效应晶体管时)的栅极接地并导通短路的源极跟随器M1，且源极跟随器M1的栅极连接于接地层GND2(即接地)，避免了供电电源中的纹波被引入到I-V变换电路中，从而能够提高I-V变换电路1的信噪比，即提高了I-V变换电路的电源抑制能力。
但是第二实施方式相对于本实施方式而言，源极跟随器在采样建立阶段处于线性区时，等效为一个闭合的开关，从而省去了电路中的一些开关，节约了成本，降低了I-V转换模块的控制复杂度。
值得一提的是，本实施方式中所涉及到的各模块均为逻辑模块，在实际应用中，一个逻辑单元可以是一个物理单元，也可以是一个物理单元的一部分，还可以以多个物理单元的组合实现。此外，为了突出本发明的创新部分，本实施方式中并没有将与解决本发明所提出的技术问题关系不太密切的单元引入，但这并不表明本实施方式中不存在其它的单元。
本领域的普通技术人员可以理解，上述各实施方式是实现本发明的具体实施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本发明的精神和范围。

Claims (9)

  1. 一种I-V转换模块，其特征在于，包括：电流输出型传感器、I-V变换电路、采样保持电路、源极跟随器、环路开关以及旁路电路；
    所述源极跟随器的漏极连接于所述采样保持电路的输入输出端，源极连接于所述I-V变换电路的输入端与所述电流输出型传感器的输出端，栅极通过所述环路开关连接于所述I-V变换电路的输出端；
    所述源极跟随器的栅极还连接于所述旁路电路；
    其中，闭合所述环路开关且禁能所述旁路电路，所述源极跟随器、所述I-V变换电路以及所述环路开关形成的反馈环路被导通，所述I-V转换模块进入采样建立阶段；打开所述环路开关且使能所述旁路电路，所述反馈环路被旁路，所述I-V转换模块进入I-V转换阶段。
  2. 根据权利要求1所述的I-V转换模块，其特征在于，所述I-V转换模块还包括环路电容；
    所述环路电容连接于所述源极跟随器的栅极与所述I-V变换电路的输入端之间。
  3. 根据权利要求1所述的I-V转换模块，其特征在于，所述旁路电路包括旁路开关与供电电源，所述旁路开关连接于所述源极跟随器的栅极与所述供电电源之间；
    其中，所述旁路开关被打开时，所述旁路电路被禁能。
  4. 根据权利要求1所述的I-V转换模块，其特征在于，所述旁路电路包括第一旁路开关、第二旁路开关以及接地层；
    所述第一旁路开关连接于所述源极跟随器的栅极与所述接地层之间；
    所述第二旁路开关跨接于所述源极跟随器的源极与漏极之间；
    其中，所述第一旁路开关与所述第二旁路开关均被打开时，所述旁路电路被禁能。
  5. 根据权利要求1所述的I-V转换模块，其特征在于，所述I-V变换电路包括反相放大器与至少一条变换路径；
    所述变换路径跨接在所述反相放大器的输入端与输出端；
    所述反相放大器的输入端与输出端分别形成所述I-V变换电路的输入端与输出端。
  6. 根据权利要求5所述的I-V转换模块，其特征在于，所述反相放大器包括反相器或者运算放大器。
  7. 根据权利要求5所述的I-V转换模块，其特征在于，所述变换路径包括串联连接的电阻与开关或者串联连接的电容与开关。
  8. 根据权利要求1所述的I-V转换模块，其特征在于，所述源极跟随器包括N型场效应晶体管或者NPN型三极管。
  9. 根据权利要求1所述的I-V转换模块，其特征在于，所述环路开关为电子开关或者物理开关。
PCT/CN2016/095429 2016-08-16 2016-08-16 I-v转换模块 WO2018032309A1 (zh)

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