WO2018010293A1 - 用于单双屏可控切换显示的goa电路及其驱动方法 - Google Patents

用于单双屏可控切换显示的goa电路及其驱动方法 Download PDF

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Publication number
WO2018010293A1
WO2018010293A1 PCT/CN2016/099172 CN2016099172W WO2018010293A1 WO 2018010293 A1 WO2018010293 A1 WO 2018010293A1 CN 2016099172 W CN2016099172 W CN 2016099172W WO 2018010293 A1 WO2018010293 A1 WO 2018010293A1
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WIPO (PCT)
Prior art keywords
goa
screen
goa circuit
group
control signals
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/099172
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English (en)
French (fr)
Inventor
张洲
蔡育徵
马长文
徐盼
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Wuhan China Star Optoelectronics Technology Co Ltd
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Wuhan China Star Optoelectronics Technology Co Ltd
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Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd, Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US15/308,360 priority Critical patent/US10297219B2/en
Publication of WO2018010293A1 publication Critical patent/WO2018010293A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3666—Control of matrices with row and column drivers using an active matrix with the matrix divided into sections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/02—Composition of display devices
    • G09G2300/026—Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0221—Addressing of scan or signal lines with use of split matrices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18—Timing circuits for raster scan displays

Definitions

  • the invention relates to a GOA (Gate Driver on Array) circuit for single and dual screen controllable switching display and a driving method thereof.
  • GOA Gate Driver on Array
  • the multi-screen mobile phone includes more than two display screens
  • the control circuit connected to the display screen includes at least one analog switch
  • an analog input switch is used to input one input signal. Expands to two outputs to drive multiple displays.
  • such a multi-screen mobile phone needs to separately set a plurality of display screens and analog switches, which increases the design difficulty and cost, and when it is necessary to switch to the single-screen display, the edges of the plurality of display screens are prone to a boundary line, thereby causing the screen to be unsmooth. .
  • the GOA circuit includes: a first GOA circuit located on both sides of the main screen and controlling display of the main screen; and a second GOA circuit located at the pair Displaying the display of the secondary screen on both sides of the screen; the first group of GOA control signals controlling the signal output of the first GOA circuit; the second group of GOA control signals controlling the signal output of the second GOA circuit; and switching the control unit to connect the first The GOA circuit and the second GOA circuit control the on or off of the first group of GOA control signals and the second group of GOA control signals, respectively.
  • the first set of GOA control signals includes a first scan trigger signal and a plurality of clock signals
  • the second set of GOA control signals includes a second scan trigger signal and a plurality of clock signals
  • the first GOA circuit and the second GOA circuit respectively include a plurality of cascaded transistor modules.
  • each transistor module includes a plurality of transistors.
  • the switching control unit includes a GOA signal switching switch unit, a GOA line connection switch unit, and a scan trigger switch unit each having a plurality of sets of switches.
  • the GOA signal switching switch unit includes: a first group of GOA signal switching switches for controlling turning on or off of the first group of GOA control signals; and a second group of GOA signal switching switches for Controlling the turning on or off of the second group of GOA control signals.
  • the GOA line connection switch unit includes two sets of connection switches and connects the first GOA circuit and the second GOA circuit.
  • the scan trigger switch unit includes a first set of scan trigger switches and a second set of scan trigger switches.
  • a driving method of a GOA circuit for single- and dual-screen controllable switching display wherein when the main screen is separately displayed, the GOA circuit is controlled such that the first group of GOA control signals are output normally, The second group of GOA control signals have no output, and the first group of scan trigger switches are turned on; when the sub-screens are separately displayed, the GOA circuit is controlled such that the first group of GOA control signals have no output, and the second group of GOA control signals are normally output.
  • the second set of scan trigger switches are turned on, and the second group of GOA signal switchers are turned on; when the main screen and the sub screen are separately displayed, the GOA circuit is controlled such that the first group of GOA control signals and the second group of GOA control signals are both Normal output, the second group of GOA signal switching switches are turned on, and the two sets of switches in the scan triggering switch unit are respectively turned on; when the main screen and the sub screen are combined into a single screen display, the GOA circuit is controlled so that the first group of GOAs The control signal is normally output, and the second group of GOA control signals have no output, and the two sets of switches in the GOA line connection switch unit are turned on.
  • a GOA circuit for single multi-screen controllable switching display comprising: a plurality of sets of GOA sub-circuits, including three or more sets of GOA sub-circuits, wherein Each set of GOA sub-circuits is located on both sides of the display and controls the display of the display area connected thereto; a plurality of sets of GOA control signals, including three or more sets of GOA control signals, controlling the signal output of each set of GOA sub-circuits;
  • the switching control unit connects the adjacent two sets of GOA sub-circuits and controls the turning on or off of the plurality of sets of GOA control signals, respectively.
  • FIG. 1 is a plan view showing a display structure of an LCD based on a GOA circuit according to the prior art
  • Figure 2 is a partial structural view showing the GOA circuit of Figure 1;
  • Figure 3 is a signal timing diagram showing the GOA circuit of Figure 2;
  • FIG. 4 is a diagram showing an LCD display architecture based on a GOA circuit according to an exemplary embodiment of the present invention
  • FIG. 5 is a structural diagram showing a GOA circuit for adding switches and signal groups according to an exemplary embodiment of the present invention
  • FIG. 6 is a timing chart showing GOA circuit signals of a main screen and a sub screen when two screens are separately displayed according to an exemplary embodiment of the present invention
  • FIG. 7 is a timing chart showing GOA circuit signals of a main screen and a sub screen when an overall single screen is displayed, according to an exemplary embodiment of the present invention.
  • FIG. 1 is a plan view showing a display structure of an LCD based on a GOA circuit according to the related art.
  • a GOA circuit-based LCD display architecture includes a display screen (such as an LCD display screen), GOA circuits on the left and right sides of the display screen, and a driver IC on the lower side of the display screen.
  • the GOA circuit and the driver IC are all printed on a flexible circuit board (FPC).
  • the pixels of the display screen may be arranged horizontally 1440 pixels x vertical 2560 pixels, ie, the resolution is 1440 ⁇ 2560, but is not limited thereto, and the pixel resolution of the display screen may be arbitrarily set as needed.
  • the GOA circuit disposed on the left and right sides of the display is connected to each pixel of the display screen, and sequentially controls the driving of the pixels from the 1st line to the 2560th line in the display screen from bottom to top.
  • FIG. 2 is a partial structural view showing the GOA circuit of FIG. 1.
  • FIG. 2 is a partial structural view showing the GOA circuit of FIG. 1.
  • the GOA circuit includes a set of GOA control signals (eg, including scan trigger signal STVA and clock signals CK1A-CK4A) and a plurality of cascaded GOA circuit units.
  • the GOA circuit is arranged on both sides of the display screen, and the GOA circuit on the left side controls the driving of the odd gate lines, and the GOA circuit on the right side controls the driving of the even gate lines, so that the circuit arrangement on both sides can thin the circuit distribution on both sides. The thickness of the area.
  • Each GOA circuit unit may be composed of a plurality of transistors of the same or different types and other circuit elements, and thus may also be referred to as a TFT module.
  • a typical GOA circuit includes the following: a P-type thin film transistor-based GOA circuit, a CMOS-based GOA circuit, and an N-type thin film transistor-based GOA circuit.
  • the description will be made by taking the TFT module at a high level voltage as an example.
  • the present invention is not limited thereto, and may be applied to a circuit in which the TFT module is turned on at a low level.
  • the pixels of each of the first row to the 2560th row are respectively connected to the gate lines of the corresponding rows, and the pixels of the row are driven by the gate lines of the corresponding rows, for example, the pixels of the first row (not shown) ) is connected to the first gate line GATE_1 (output scan signal G1), the pixels of the second row (not shown) are connected to the second row gate line GATE_2 (output scan signal G2), and so on.
  • the gate lines are alternately arranged from the lower side to the upper side on both sides of the display screen in the order of GATE_1 to GATE_2560. side. It can be seen that when the GOA circuit of FIG. 2 is arranged to the display screen of FIG. 1, the circuit diagram needs to be flipped by 180 degrees to arrange the gate lines GATE_1 G GATE_2560 in order from bottom to top on both sides of the display screen.
  • each TFT module is connected to a clock signal, and its output terminal (OUT) is connected to the gate terminal (set terminal or END terminal) of the next TFT module.
  • the scan trigger signal STVA is applied to the first TFT module (for example, the T1 module) on the left side, and the T1 module is turned on when the STVA is a high level voltage, and the clock signal CK1A (or CK3A) Input to the T1 module, and then the T1 module outputs the same scan signal G1 as the clock signal CK1A (or CK3A), and outputs the scan signal G1 to the gate terminal of the next TFT module (for example, T3 module) connected thereto (set end) ), for controlling the turn-on and turn-off of the next TFT module, so that the scanning signals G1 G G are sequentially supplied to the pixels of the corresponding row from the first TFT module (for example, T1 module) on the left side to the last module.
  • the first TFT module for example, the T1 module
  • the T1 module is turned on when the STVA is a high level voltage
  • the scanning signals G(2K-1) to G1 may be sequentially supplied to the corresponding pixel units in the order from the last TFT module to the first TFT module.
  • the driving method is the same as the left driving method, from the order of the first TFT module (for example, T2 module) on the right side to the last module (for example, T2K module).
  • Scanning signals G2 to G2K (K is an integer and 1280 ⁇ K ⁇ 1) are supplied to the pixels of the corresponding row, or scanning signals G2K are sequentially supplied to the pixels of the corresponding row from the order of the last TFT module on the right side to the first TFT module.
  • G2K Scanning signals
  • FIG. 3 is a signal timing diagram showing the GOA circuit of FIG.
  • the STV is a scan trigger signal
  • CK1 to CK4 are clock signals input to different TFT modules
  • the output signal of the Nth gate line GATE_N is GN.
  • the crystal module is turned off, and all the scan signals GN are low level voltages.
  • the scan trigger signal STVA is a high level voltage
  • the first TFT module on the left side (for example, the T1 module) is turned on, and the TFT module outputs the received clock signal CK1A (or CK3A) as the scan signal G1, that is,
  • the scan signal G1 outputted after the T1 module is turned on is synchronized with the clock signal CK1A (or CK3A), as shown in the signal timing diagram of the gate line GATE_1 in FIG.
  • the next TFT module for example, the T3 module
  • the T3 module outputs the received clock signal CK1A (or CK3A) as the scan signal G3, that is,
  • the scan signal G3 outputted after the T3 module is turned on is synchronized with the clock signal CK1A (or CK3A) (not shown in FIG. 3) Out).
  • the first TFT module on the right side is turned on (for example, the T2 module) is turned on, that is, the scan output after the T2 module is turned on.
  • the signal G2 is synchronized with the clock signal CK2A (or CK4A) as shown in the signal timing diagram of the gate line GATE_2 in FIG.
  • the next TFT module for example, the T4 module connected thereto is turned on, and so on.
  • the LCD display screen based on the GOA circuit according to the prior art can only realize single screen display, and cannot realize dual screen or even multi screen display.
  • the GOA circuit according to the present invention can solve the above problem by adding a set of GOA control signals and a switching control unit including a plurality of sets of switches, that is, the GOA circuit according to the present invention controls the display of two screens respectively by two sets of GOA control signals, And the control and switching of the two screens are realized by switching the control unit, thereby realizing single and double screen switching display. This structure will be described in detail below.
  • FIG. 4 is a diagram showing an LCD display architecture based on a GOA circuit according to an exemplary embodiment of the present invention.
  • the LCD display architecture includes a main display screen (abbreviated as a main screen), a sub-display screen (abbreviated as a sub-screen), a main screen GOA circuit located on the left and right sides of the main screen, a sub-screen GOA circuit located on the left and right sides of the sub-screen, and A driver IC located on the underside of the entire display.
  • the main screen GOA circuit, the sub-screen GOA circuit and the driver IC are all printed on a flexible circuit board (FPC).
  • the pixel resolution R x 2N of the display screen can be arbitrarily set, where R > 0 and N is any even number greater than zero.
  • the resolution of the entire display screen is 1440 ⁇ 2560 as an example, but the present invention is not limited thereto.
  • the display screen is exemplarily divided into two parts, the upper part is a sub-screen, the resolution is horizontal R pixel ⁇ vertical N pixel (for example, 1440 ⁇ 1280); the lower part is the main screen, and the resolution is Horizontal R pixels ⁇ vertical N pixels (for example, 1440 ⁇ 1280).
  • a set of GOA control signals and a plurality of sets of switches are added; one set of switches is a switch for controlling the STV signal of the sub-screen GOA circuit and the clock signal CK, and the other group switches are respectively disposed in the middle of the left and right GOA circuits for The connection between the last two GATE signals of the main screen and the first and second GATE signals starting from the sub screen is controlled.
  • the specific GOA circuit diagram will be specifically described with reference to FIG. 5. In this way, the GOA circuit on both sides of the main screen can be controlled to control the display of the main screen, and the display of the sub-screen is controlled based on the GOA circuit on both sides of the sub-screen.
  • the position and display ratio of the main screen and the sub screen are merely examples, the positions of the two screens may be interchanged, the ratio of the two may be arbitrarily set according to needs, and the display screen may be similarly used as needed. Divided into two or more display areas, and the GOA circuits on both sides are set accordingly to realize single-screen, dual-screen or multi-screen control and switching display.
  • the gate lines of the GOA circuits on both sides of the sub-screen are GATE_(N+1) to GATE_2N (for example, GATE_1281 to GATE_2560) from bottom to top, and output scan signals G(N+1) to G2N, thereby controlling the display of the main screen.
  • the gate line may also be referred to as GATE_1 to GATE_N.
  • FIG. 5 is a block diagram showing a GOA circuit in which switches and signal groups are added according to an exemplary embodiment of the present invention.
  • the GOA circuit shown in FIG. 5 is similar to the GOA circuit shown in FIG. 2, the GOA circuit is disposed on both sides of the display screen, and the GOA circuit on the left side controls the driving of the odd gate lines, on the right side.
  • the GOA circuit controls the driving of the even gate lines.
  • the GOA circuit shown in FIG. 5 adds a set of GOA control signals (including scan trigger signal STVB and clock signals CK1B to CK4B), and a switching control unit including switch groups A, B, and C.
  • the scan trigger signal STVB and the two clock signals CK1B and CK3B (which may also be CK2B and CK4B) are added, and the switch groups A and B are added.
  • the last TFT module on the main screen ie, T(N-1) module, for example, T1279 module
  • the secondary screen At positions intermediate the first TFT module (i.e., T(N+1) module, for example, T1281 module), switches K1A, K2A, and K3A are added to the signal lines of the clock signals CK1A and CK3A and the scan trigger signal STVA.
  • the signal line of the STVB is connected to the signal line of the STVA, and the signal line of the CK1B is connected to the signal of the CK1A.
  • the line, the signal line of CK3B is connected to the signal line of CK3A, and the switches K1B, K2B and K3B are added to the signal lines of CK3B and CK1B and STVB.
  • the signal lines of STVB, CK1B, and CK3B may not be separately connected to the signal lines of STVA, CK1A, and CK3A, but may be separately arranged.
  • the switch group A including K1A, K2A, K3A, K1B, K2B, and K3B may be referred to as a GOA signal changeover switch unit.
  • the switch group B includes switches arranged to add a switch KO1 between the END end of the last TFT module of the main screen (ie, the T(N-1) module, for example, the T1279 module) and the line connected to the STVA signal line, similarly,
  • the switch KO2 is added to the line connecting the end point of the STVA signal line and the STVB signal line to the set terminal of the first TFT module (i.e., T(N+1) module, for example, T1281 module) of the sub-screen.
  • a switch KO3 is added to the line connecting the OUT output of T(N+1) (for example, T1281 module) to the END end of T(N-1) (for example, T1279 module), and at T(N- 1) (For example, the T1279 module)
  • the OUT output is connected to the set terminal of T(N+1) (for example, T1281 module) to add the switch KO4.
  • the switch group B includes KO1, KO2, KO3, and KO4, and may be referred to as an odd line switch.
  • the arrangement of the right GOA circuit is similar to the arrangement of the left GOA circuit. That is, the signal lines of STVB, CK2B, and CK4B are respectively connected to the signal lines of the STVA and CK2A and CK4A, and at the intermediate position of the GOA circuit, that is, the last TFT module of the main screen (ie, the TN module, for example, the T1280 module) At the position intermediate the first TFT module of the sub-screen (ie, the T(N+2) module, for example, the T1282 module), the signal lines of the STVA, CK4A, and CK2A, and the signal lines of the STVB, CK2B, and CK4B are respectively added to the switch K4A.
  • the last TFT module of the main screen ie, the TN module, for example, the T1280 module
  • the signal lines of the STVA, CK4A, and CK2A, and the signal lines of the STVB, CK2B, and CK4B
  • the switch group C includes switches arranged to add a switch KE1 between the END end of the TN module (for example, the T1280 module) and the line connected to the STVA signal line, similarly, the end point where the STVA signal line intersects the STVB signal line is connected to A switch KE2 is added to the line of the set terminal of the T(N+2) module (for example, the T1282 module).
  • a switch KE3 is added to the line connected to the END end of the TN module at the OUT output of the T(N+2) module, and is connected to the set end of the T(N+2) module at the OUT output of the TN module.
  • the switch KE4 is added.
  • Switch group C includes KE1, KE2, KE3, and KE4, which may be referred to as an even line switch.
  • the GOA signal switching switch unit includes a first switch group K1A to K6A for turning on or off the control signals STVA and CK1A to CK4A, and a second switch group K1B to K6B for controlling signals STVB and CK1B.
  • ⁇ CK4B is turned on or off.
  • the GOA line connection switch unit includes KO3 and KO4 for connecting the GOA circuit on the left side of the main screen to the GOA circuit on the left side of the sub screen; and KE3 and KE4 for connecting the GOA circuit on the right side of the main screen to the right side of the sub screen GOA circuit.
  • the scan trigger switch unit includes a first set of scan trigger switches, namely, KO1 and KE1; and a second set of scan trigger switches, namely KO2 and KE2.
  • the output G(N+1) to G2N of the lower portion of the GOA circuit diagram shown in 4 controls the display of the sub-screen. The method of switching between single and dual screens will be described below.
  • the scan trigger signal STVA and the clock signals CK1A to CK4A are normally output, and the STVB and CK1B to CK4B do not need to output signals (ie, No output), the switches KO1 and KE1 are turned on, and the other switches are turned off. Since the signals STVA and CK1A to CK4A are normally output, and the switches KO1 and KE1 are turned on, the signals STVA and CK1A to CK4A can control the driving of the T1 module to the TN module (for example, the T1 module to the T1280 module), thereby outputting signals G1 to GN.
  • the TN module for example, the T1 module to the T1280 module
  • the scan trigger signal STVB and the clock signals CK1B to CK4B are normally output, and the signals STVA and CK1A to CK4A are not required to be output (ie, No output), switches K1B to K6B are turned on, and KO2 and KE2 Turn on and the other switches are off.
  • signals STVB and CK1A to CK4A can control T(N+1) module to T2N module.
  • the driving of (for example, T1281 module to T2560 module) outputs signals G(N+1) to G2N (for example, G1281 to G2560) to control the display of the sub-screen. Since the switches KO3, KO4, KE3, and KE4 in the switch groups B and C are disconnected, the signal of the sub-screen cannot be transmitted to the main screen.
  • STVB and CK1B to CK4B normally output signals, and at the same time, STVA and CK1A to CK4A also output signals normally, and switches K1B to K6B are turned on. And KO2, KE2, KO1 and KE1 are turned on, and other switches are turned off. Since the signals STVA and CK1A to CK4A output signals normally, and KO1 and KE1 are turned on, the signals STVA and CK1A to CK4A can control the driving of the T1 module to the TN module (for example, the T1 module to the T1280 module), thereby outputting signals G1 to GN.
  • the T1 module for example, the T1 module to the T1280 module
  • the switches KO3, KO4, KE3, and KE4 in the switch groups B and C are disconnected, and the signal of the main screen cannot be transmitted to the sub-screen.
  • the STVB and CK1B to CK4B output signals normally, and the switches K1B to K6B, KO2 and KE2
  • the STVB and CK1B to CK4B signals can individually control the driving of the T(N+1) module to the T2N module (for example, the T1281 module to the T2560 module), thereby outputting signals G(N+1) to G2N (for example, G1281). ⁇ G2560), to control the display of the secondary screen.
  • the main screen and the sub screen are respectively controlled by different signals, and the separate display can be realized.
  • signals STVB and CK1B to CK4B do not need to be output (ie, no output), signals STVA and CK1A.
  • ⁇ CK4A is normally output, switches K1A to K6A are turned on, and KO3, KE3, KO4, and KE4 are turned on, and other switches are turned off.
  • T(N+1) module to T2N module for example, T1281 module to T2560 module
  • the signals STVA and CK1A to CK4A are normally output, and the switches K1A to K6A, KO3, KE3, KO4, and KE4 are turned on, the signals STVA and CK1A to CK4A can control the T1 module to the TN module (for example, the T1 module to the T1280 module).
  • the entire screen can be displayed on a single screen. This is the same as the display effect of the GOA circuit of FIG. 2, and realizes the single-screen display effect of the entire screen.
  • the gate lines GATE_1 G GATE_2N may also be disposed from the upper side to the lower side of the display screen, such that FIG. 4
  • the outputs G1 to G1280 of the upper portion of the GOA circuit shown therein control the display of the sub-screen, and the outputs G(N+1) to G2N of the lower portion of the GOA circuit control the display of the sub-screen.
  • the GOA circuit according to an exemplary embodiment may scan forward or reverse.
  • the scan trigger signals STVA and STVB may be different or the same.
  • the clock signals CK1A to CK4A may be different from or different from CK1B to CK4B, and the clock signal lines are not limited to the illustrated number and timing chart, and may be arbitrarily set as needed. Accordingly, the number of switches that control the clock signal lines can also be changed accordingly. That is, the switch group in the switching control unit in the present embodiment is not limited thereto, and the number of the switch groups and the set position are not limited thereto, and any modifications and variations can be made as needed.
  • FIG. 6 is a timing chart showing GOA circuit signals of a main screen and a sub screen when dual screens are separately displayed according to an exemplary embodiment of the present invention.
  • the upper part of Fig. 6 is the main screen GOA timing diagram, and the lower part is the sub screen GOA timing diagram.
  • the signals STVA and CK1A to CK4A control the signal output G(N+1) to GN of the main screen (for example, G1 to G1280), the signals STVB and CK1B to CK4B control the signal output G(N+1) to G2N (for example, G1281 to G2560) of the sub-screen.
  • the first TFT module on the left side (for example, the T1 module) is turned on, and the T1 module will receive the clock signal CK1A (or The output of CK3A) is the scan signal G1, that is, the scan signal G1 outputted after the T1 module is turned on is synchronized with the clock signal CK1A (or CK3A), as shown by the signal of the gate line GATE_1 in the main screen GOA timing diagram of FIG.
  • the next TFT module (for example, the T3 module) is connected to be turned on, and the T3 module outputs the received clock signal CK1A (or CK3A) as the scan signal G3, that is, The scan signal G3 outputted after the T3 module is turned on is synchronized with the clock signal CK1A (or CK3A) (not shown in FIG. 6).
  • the scan signal G2 outputted after the first TFT module (for example, T2 module) on the right side is turned on is synchronized with the clock signal CK2A (or CK4A), as shown in the main screen GOA timing diagram in FIG. middle
  • the signal of the gate line GATE_2 is shown.
  • the first TFT module on the left side ie, the T(N+1) module, for example, the T1281 module is turned on.
  • the T(N+1) module outputs the received clock signal CK1B (or CK3B) as the scan signal G(N+1) (in the secondary screen, which may also be referred to as the signal G1 of the first gate line GATE_1), that is, The scan signal G1 outputted after the T(N+1) module is turned on is synchronized with the clock signal CK1A (or CK3A), as shown by the signal of the gate line GATE_1 in the sub-screen GOA timing diagram of FIG.
  • the scanning signal G(N+2) outputted after the first TFT module (for example, T(N+2) module) on the right side is turned on (in the secondary screen,
  • the signal which may also be referred to as the second gate line GATE_2, is synchronized with the clock signal CK2A (or CK4A) as shown by the signal of the gate line GATE_2 in the sub-screen GOA timing diagram of FIG.
  • FIG. 7 is a timing chart showing GOA circuit signals of a main screen and a sub screen when an overall single screen is displayed, according to an exemplary embodiment of the present invention.
  • the upper part of Fig. 7 is the main screen GOA timing diagram, and the lower part is the sub screen GOA timing diagram. According to the condition setting circuit in the (4) described with reference to FIG.
  • the signal STVB has no output
  • CK1B to CK4B have no output (or floating)
  • the signal STVA And CK1A to CK4A output normally and control signal output G1 to GN (for example, G1 to G1280) of the main screen and signal output G(N+1) to G2N (for example, G1281 to G2560) of the sub screen.
  • the signal output is basically the same as the signal output process described with reference to FIGS. 2 and 3, and will not be described again here.
  • the position of the switch group in the switching control unit can be changed correspondingly.
  • the switch group in the switching control unit can be set at a position where the main screen and the sub screen are at the intersection.
  • the display screen can also be divided into two or more display screens.
  • the GOA circuit can be divided into multiple groups of GOA sub-circuits, and each group of GOA sub-circuits is located on both sides of the display screen.
  • the GOA circuit for single- and dual-screen controllable switching display and its driving method have been described above, and it should be understood that the present invention is not limited thereto, and the GOA circuit of the present invention can be omitted without departing from the inventive concept.
  • a GOA circuit or the like for a single multi-screen controllable switching display can be realized.

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Abstract

一种用于单双屏可控切换显示的GOA电路及其驱动方法。该GOA电路包括：第一GOA电路，位于主屏两侧且控制主屏的显示；第二GOA电路，位于副屏两侧且控制副屏的显示；第一组GOA控制信号，控制第一GOA电路的信号输出；第二组GOA控制信号，控制第二GOA电路的信号输出；切换控制单元，连接第一GOA电路与第二GOA电路，并且分别控制第一组GOA控制信号和第二组GOA控制信号的接通或断开。

Description

用于单双屏可控切换显示的GOA电路及其驱动方法 技术领域
本发明涉及一种用于单双屏可控切换显示的GOA(Gate Driver on Array)电路及其驱动方法。
背景技术
随着智能手机及平板的发展，加载在智能手机及平板上的功能越来越多，在很多使用领域单屏显示效果已经无法满足用户要求，因而需要双屏或多屏显示来满足人们对视觉效果不断提高的需求。
目前，现有的相关的一种多屏手机，其中，所述多屏手机包括两个以上的显示屏，并且与显示屏连接的控制电路包括至少一个模拟开关，利用该模拟开关将一路输入信号扩展为两路输出，从而驱动多个显示屏。然而，这样的多屏手机需要分别设置多个显示屏和模拟开关，增大设计难度和成本，并且在需要切换到单屏显示时，多个显示屏的边缘容易出现分界线从而造成画面不流畅。
发明内容
为此，需要一种技术相对简单、成本较低、在一个显示屏上可显示多个画面(即，实现多屏显示)并且单双屏可流畅切换的显示技术。
本发明的目的在于提供一种能够实现单双屏可切换显示的GOA电路及其驱动方法。
为了实现上述目的，提供了一种用于单双屏可控切换显示的GOA电路，所述GOA电路包括：第一GOA电路，位于主屏两侧且控制主屏的显示；第二GOA电路，位于副屏两侧且控制副屏的显示；第一组GOA控制信号，控制第一GOA电路的信号输出；第二组GOA控制信号，控制第二GOA电路的信号输出；以及切换控制单元，连接第一GOA电路与第二GOA电路，并且分别控制第一组GOA控制信号和第二组GOA控制信号的接通或断开。
根据本发明的示例性实施例，第一组GOA控制信号包括第一扫描触发信号和多个时钟信号，第二组GOA控制信号包括第二扫描触发信号和多个时钟信号。
根据本发明的示例性实施例，第一GOA电路和第二GOA电路分别包括多个级联的晶体管模块。
根据本发明的示例性实施例，每个晶体管模块包括多个晶体管。
根据本发明的示例性实施例，切换控制单元包括分别具有多组开关的GOA信号切换开关单元、GOA线路连接开关单元和扫描触发开关单元。
根据本发明的示例性实施例，GOA信号切换开关单元包括：第一组GOA信号切换开关，用于控制第一组GOA控制信号的接通或断开；以及第二组GOA信号切换开关，用于控制第二组GOA控制信号的接通或断开。
根据本发明的示例性实施例，GOA线路连接开关单元包括两组连接开关，且连接第一GOA电路与第二GOA电路。
根据本发明的示例性实施例，扫描触发开关单元包括第一组扫描触发开关和第二组扫描触发开关。
根据本发明的示例性实施例，提供一种用于单双屏可控切换显示的GOA电路的驱动方法，其中，当主屏单独显示时，控制GOA电路，使得第一组GOA控制信号正常输出，第二组GOA控制信号无输出，并且将第一组扫描触发开关接通；当副屏单独显示时，控制GOA电路，使得第一组GOA控制信号无输出，第二组GOA控制信号正常输出，将第二组扫描触发开关接通，并且将第二组GOA信号切换开关接通；当主屏和副屏分开显示时，控制GOA电路，使得第一组GOA控制信号和第二组GOA控制信号均正常输出，将第二组GOA信号切换开关接通，并且将扫描触发开关单元中的两组开关分别接通；当主屏和副屏合成为单屏显示时，控制GOA电路，使得第一组GOA控制信号正常输出，第二组GOA控制信号无输出，将GOA线路连接开关单元中的两组开关接通。
根据本发明的另一个示例性实施例，提供一种用于单多屏可控切换显示的GOA电路，包括：多组GOA子电路，包括三组或更多组GOA子电路，其中， 每组GOA子电路位于显示屏的两侧并且控制与其连接的显示屏区域的显示；多组GOA控制信号，包括三组或更多组GOA控制信号，控制每组GOA子电路的信号输出；以及切换控制单元，连接相邻两组GOA子电路，并且分别控制多组GOA控制信号的接通或断开。
附图说明
通过下面结合示例性地示出一例的附图进行的描述，本发明的上述和其他目的和特点将会变得更加清楚，其中：
图1是示出根据现有技术的基于GOA电路的LCD显示架构平面图；
图2是示出图1中的GOA电路的局部结构图；
图3是示出图2中的GOA电路的信号时序图；
图4是示出根据本发明的示例性实施例的基于GOA电路的LCD显示架构图；
图5是示出根据本发明的示例性实施例增加开关和信号组的GOA电路的结构图；
图6是示出根据本发明的示例性实施例当双屏分别显示时主屏和副屏的GOA电路信号时序图；
图7是示出根据本发明的示例性实施例当整体单屏显示时主屏和副屏的GOA电路信号时序图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。
在附图中，为了清晰起见，会夸大层、膜、面板、区域等的厚度。在整个说明书中同样的附图标记表示相同的元件。将理解，当诸如层、膜、区域或基底的元件被称作“在”另一元件“上”时，该元件可以直接在所述另一元件上，或者也可以存在中间元件。可选择地，当元件被称作“直接在”另一元件“上”时，不存在中间元件。
参照下面将详细描述的示例性实施例以及附图，本发明的优点和特征以及如何实现这些将变得清楚。然而，本发明不限于下面公开的示例性实施例，而是可以以各种不同的形式来实现本发明。
图1是示出根据现有技术的基于GOA电路的LCD显示架构平面图。
参照图1，根据现有技术的基于GOA电路的LCD显示架构包括显示屏(诸如LCD显示屏)、位于显示屏左右两侧的GOA电路、以及位于显示屏下侧的驱动器IC。其中，GOA电路和驱动器IC均印刷在柔性电路板(FPC)上。
示例性地，显示屏的像素可以布置为水平1440像素×竖直2560像素，即，分辨率为1440×2560，但不限于此，显示屏的像素分辨率可以根据需要任意设置。布置在显示屏的左侧和右侧的GOA电路与显示屏的每个像素连接，从下到上依次控制显示屏中的第1行至第2560行像素的驱动。
图2是示出图1中的GOA电路的局部结构图。
GOA电路包括一组GOA控制信号(例如，包括扫描触发信号STVA和时钟信号CK1A～CK4A)以及级联的多个GOA电路单元。GOA电路布置在显示屏的两侧，并且左侧的GOA电路控制奇数栅极线的驱动，右侧的GOA电路控制偶数栅极线的驱动，这样两侧的电路布置可以减薄两侧电路分布区域的厚度。
每个GOA电路单元可以由多个相同或不同类型的晶体管以及其他电路元件组成，因而也可以称为TFT模块。通常的GOA电路包括以下几种：基于P型薄膜晶体管的GOA电路、基于CMOS的GOA电路和基于N型薄膜晶体管的GOA电路等。在这里，以TFT模块在高电平电压导通为例进行说明，但是不限于此，也可以适用于TFT模块在低电平电压导通的电路。
第1行至第2560行之中每行的像素分别连接到对应行的栅极线上，并且由对应行的栅极线来驱动该行的像素，例如，第一行的像素(未示出)连接到第一条栅极线GATE_1(输出扫描信号G1)，第二行的像素(未示出)连接到第二行栅极线GATE_2(输出扫描信号G2)，依次类推。在图1所示的显示屏中，栅极线以GATE_1～GATE_2560的顺序在显示屏两侧从下侧交替布置到上 侧。可见，在图2的GOA电路布置到图1的显示屏时，需要将电路图翻转180度，以将栅极线GATE_1～GATE_2560在显示屏两侧按照从下到上的顺序布置。
如图2所示，每个TFT模块的输入端(CK或CKB)连接时钟信号，其输出端(OUT)连接到下一个TFT模块的栅极端(set端或END端)。如图2左侧GOA电路所示，对左侧第一个TFT模块(例如，T1模块)施加扫描触发信号STVA，STVA为高电平电压时T1模块导通，则时钟信号CK1A(或CK3A)输入到T1模块，然后T1模块输出与时钟信号CK1A(或CK3A)相同的扫描信号G1，并且将该扫描信号G1输出到与其连接的下一个TFT模块(例如，T3模块)的栅极端(set端)，用于控制下一个TFT模块的导通和截止，因此，从左侧第一个TFT模块(例如，T1模块)到最后一个模块的顺序依次向对应行的像素提供扫描信号G1～G(2K-1)(例如，K为整数且1280≥K≥1)。同样地，以如上类似的方法，也可以按照从最后一个TFT模块到第一个TFT模块的顺序依次向对应的像素单元提供扫描信号G(2K-1)～G1。同理，在驱动右侧GOA电路的情况下，其驱动方法与左侧驱动方法相同，从右侧第一个TFT模块(例如，T2模块)到最后一个模块(例如，T2K模块)的顺序依次向对应行的像素提供扫描信号G2～G2K(K为整数且1280≥K≥1)，或者从右侧最后一个TFT模块到第一个TFT模块的顺序依次向对应行的像素提供扫描信号G2K～G2。
图3是示出图2中的GOA电路的信号时序图。STV为扫描触发信号，CK1～CK4为输入到不同TFT模块的时钟信号，第N条栅极线GATE_N的输出信号为GN。
对于针对左侧GOA电路，以GATE_1的信号为例，当扫描触发信号STVA为低电平电压时，晶体模块截止，所有扫描信号GN均为低电平电压。当扫描触发信号STVA为高电平电压时，左侧的第一个TFT模块(例如，T1模块)导通，该TFT模块将接收的时钟信号CK1A(或CK3A)输出为扫描信号G1，即，T1模块导通后输出的扫描信号G1与时钟信号CK1A(或CK3A)同步，如图3中栅极线GATE_1的信号时序图所示。当T1模块输出的扫描信号G1为高电平电压时，与其连接的下一个TFT模块(例如，T3模块)导通，T3模块将接收的时钟信号CK1A(或CK3A)输出为扫描信号G3，即，T3模块导通后输出的扫描信号G3与时钟信号CK1A(或CK3A)同步(图3中未示 出)。
同理，对于右侧GOA电路，当扫描触发信号STVA为高电平电压时，右侧的第一个TFT模块导通(例如，T2模块)导通，即，T2模块导通后输出的扫描信号G2与时钟信号CK2A(或CK4A)同步，如图3中栅极线GATE_2的信号时序图所示。当T2模块输出的扫描信号G2为高电平电压时，与其连接的下一个TFT模块(例如，T4模块)导通，依次类推。
根据现有技术的基于GOA电路的LCD显示屏只能实现单屏显示，而无法实现双屏，甚至多屏显示。根据本发明的GOA电路通过增加一组GOA控制信号和包括多组开关的切换控制单元，可以解决上述问题，即，根据本发明的GOA电路通过两组GOA控制信号分别控制两个屏幕的显示，并且通过切换控制单元实现两个屏幕的控制和切换，从而实现单双屏切换显示。以下将详细描述该结构。
图4是示出根据本发明的示例性实施例的基于GOA电路的LCD显示架构图。
根据示例性实施例的LCD显示架构包括主显示屏(简称主屏)、副显示屏(简称副屏)、位于主屏左右两侧的主屏GOA电路、位于副屏左右两侧的副屏GOA电路、以及位于整个显示屏下侧的驱动器IC。其中，主屏GOA电路、副屏GOA电路和驱动器IC均印刷在柔性电路板(FPC)上。
在本发明中，可以任意设置显示屏的像素分辨率R×2N，其中R>0，N为大于0的任意偶数。在本示例性实施例中，以整个显示屏的分辨率为1440×2560为例来说明，但本发明不限于此。如图4所示，将显示屏示例性地分为两部分，上部分为副屏，分辨率为水平R像素×竖直N像素(例如，1440×1280)；下部分为主屏，分辨率为水平R像素×竖直N像素(例如，1440×1280)。相应地，再增加一组GOA控制信号和多组开关；1组开关为控制副屏GOA电路的STV信号和时钟信号CK的开关，其他组开关分别设置在左右两侧GOA电路的中间，用于控制主屏最后2条GATE信号与副屏起始的第一和第二条GATE信号的连接，具体的GOA电路图将参照图5来具体描述。这样就可以实现基于主屏两侧的GOA电路来控制主屏的显示，基于副屏两侧的GOA电路来控制副屏的显示。
这里应当注意，主屏和副屏的位置和显示比例仅仅是例示，二者的位置可以互换，二者的比例可以是根据需要任意设置的比例，并且也可以根据需要以类似的方法将显示屏划分为两个或更多个显示区域，并且相应地设置两侧的GOA电路来实现单屏、双屏或多屏的控制和切换显示。
在图4的显示屏中，与图1中布置栅极线类似，栅极线以GATE_1～GATE_2N(N为偶数，例如，N＝1280)的顺序在显示屏两侧从下侧交替布置到上侧。即，主屏两侧的GOA电路的栅极线从下到上依次为GATE_1～GATE_N(例如，GATE_1～GATE_1280)，输出扫描信号G1～GN，从而控制主屏的显示。副屏两侧的GOA电路的栅极线从下到上依次为GATE_(N+1)～GATE_2N(例如，GATE_1281～GATE_2560)，输出扫描信号G(N+1)～G2N，从而控制主屏的显示，单独对于副屏而言，其栅极线也可以称为GATE_1～GATE_N。
图5是示出根据本发明的示例性实施例增加开关和信号组的GOA电路的结构图。
在示例性实施例中，图5所示的GOA电路与图2所示的GOA电路类似，GOA电路布置在显示屏的两侧，并且左侧的GOA电路控制奇数栅极线的驱动，右侧的GOA电路控制偶数栅极线的驱动，此外，根据本发明的示例性实施例的GOA电路增加了一组GOA控制信号和包括多组开关的切换控制单元。与图2类似，在将图5中的GOA电路布置到图4的显示屏时，需要将电路图翻转180度，以将输出的扫描信号G1～G2N(N为偶数，例如，N＝1280)在显示屏两侧按照从下到上的顺序依次布置。
为了避免重复，与图2相同部分的GOA电路不再描述，将仅描述与图2不同部分的GOA电路结构。
与图2相比，图5中所示的GOA电路增加了一组GOA控制信号(包括扫描触发信号STVB和时钟信号CK1B～CK4B)，以及包括开关组A、B和C的切换控制单元。
以左侧的GOA电路为例，增加扫描触发信号STVB和两个时钟信号CK1B和CK3B(也可以是CK2B和CK4B)，并且增加了开关组A和B。具体来说，在主屏的最后一个TFT模块(即T(N-1)模块，例如，T1279模块)与副屏 第一个TFT模块(即T(N+1)模块，例如，T1281模块)中间的位置处，对时钟信号CK1A和CK3A以及扫描触发信号STVA的信号线增加了开关K1A、K2A和K3A。同样地，在中间位置处(即，T(N-1)模块与T(N+1)模块的中间)，将STVB的信号线连接到STVA的信号线，CK1B的信号线连接到CK1A的信号线，CK3B的信号线连接到CK3A的信号线，并且对CK3B和CK1B以及STVB的信号线增加开关K1B、K2B和K3B。应当理解，在其他实施例中，STVB、CK1B和CK3B的信号线也可以不与STVA、CK1A和CK3A的信号线分别连接，而可以单独布置。开关组A包括K1A、K2A、K3A、K1B、K2B和K3B可以称为GOA信号切换开关单元。
开关组B包括以下布置的开关，在主屏的最后一个TFT模块(即T(N-1)模块，例如，T1279模块)的END端与STVA信号线连接的线路之间增加开关KO1，类似地，在STVA信号线与STVB信号线交叉的端点连接到副屏第一个TFT模块(即T(N+1)模块，例如，T1281模块)的set端的线路之中增加开关KO2。此外，在T(N+1)(例如，T1281模块)的OUT输出端与T(N-1)(例如，T1279模块)的END端连接的线路之中增加开关KO3，并且在T(N-1)(例如，T1279模块)的OUT输出端与T(N+1)(例如，T1281模块)的set端连接的线路之中增加开关KO4。开关组B包括KO1、KO2、KO3和KO4，可以称为奇数线路切换开关。
右侧GOA电路的布置与左侧GOA电路的布置类似。即，将STVB、CK2B和CK4B的信号线分别连接到STVA以及CK2A和CK4A的信号线，并且在GOA电路中间位置处，即，在主屏的最后一个TFT模块(即TN模块，例如，T1280模块)与副屏第一个TFT模块(即T(N+2)模块，例如，T1282模块)中间的位置处，对STVA、CK4A和CK2A的信号线以及STVB、CK2B和CK4B的信号线分别增加开关K4A、K5A、K6A、K4B、K5B和K6B，并且这些增加的开关也可以称为GOA信号切换开关。开关组C包括以下布置的开关，在TN模块(例如，T1280模块)的END端与STVA信号线连接的线路之间增加开关KE1，类似地，在STVA信号线与STVB信号线交叉的端点连接到T(N+2)模块(例如，例如，T1282模块)的set端的线路之中增加开关KE2。此外，在T(N+2)模块的OUT输出端与TN模块的END端连接的线路之中增加开关KE3，并且在TN模块的OUT输出端与T(N+2)模块的set端连接的线路 之中增加开关KE4。开关组C包括KE1、KE2、KE3和KE4，可以称为偶数线路切换开关。
也可以根据三组开关A、B、C在GOA电路中所起的作用，将其划分为GOA信号切换开关单元、GOA线路连接开关单元和扫描触发开关单元。具体来说，GOA信号切换开关单元包括第一开关组K1A～K6A，用于控制信号STVA及CK1A～CK4A的接通或断开；以及第二开关组K1B～K6B，用于控制信号STVB及CK1B～CK4B的接通或断开。GOA线路连接开关单元包括KO3和KO4，用于将主屏左侧的GOA电路连接到副屏左侧的GOA电路；以及KE3和KE4，用于将主屏右侧的GOA电路连接到副屏右侧的GOA电路。扫描触发开关单元包括第一组扫描触发开关，即，KO1和KE1；以及第二组扫描触发开关，即KO2和KE2。
在本示例性实施例中，根据图4和图5的描述，图4中所示的GOA电路图的上部分的输出G1～GN(N为偶数，例如，N＝1280)控制主屏的显示，图4中所示的GOA电路图的下部分的输出G(N+1)～G2N控制副屏的显示。以下将描述单双屏切换显示的方法。
根据本发明的示例性实施例，当需要主屏单独显示(即，副屏不显示)时，控制扫描触发信号STVA以及时钟信号CK1A～CK4A正常输出，而STVB和CK1B～CK4B无需输出信号(即，无输出)，将开关KO1和KE1接通，其他开关都断开。由于信号STVA以及CK1A～CK4A正常输出，且开关KO1和KE1接通，则信号STVA以及CK1A～CK4A可以控制T1模块～TN模块(例如，T1模块～T1280模块)的驱动，从而输出信号G1～GN(例如，G1～G1280)来控制主屏显示。由于开关组B和C中的开关KO3、KO4、KE3、KE4断开，因此主屏的信号无法传输到副屏，此外，由于信号STVB和CK1B～CK4B无输出，且开关组A以及开关KO2和KE2全部断开，所以没有信号输出到副屏的T(N+1)模块～T2N模块(例如，T1281模块～T2560模块)，因而副屏不显示图像。
根据本发明的示例性实施例，当需要副屏单独显示(即，主屏不显示)时，控制扫描触发信号STVB和时钟信号CK1B～CK4B正常输出，而信号STVA和CK1A～CK4A无需输出(即，无输出)，开关K1B～K6B接通，并且KO2和KE2 接通，其他开关都断开。由于STVA和CK1A～CK4A无输出，而信号STVB和CK1B～CK4B正常输出，且开关K1B～K6B以及KO2和KE2接通，则信号STVB和CK1B～CK4B可以控制T(N+1)模块～T2N模块(例如，T1281模块～T2560模块)的驱动，从而输出信号G(N+1)～G2N(例如，G1281～G2560)来控制副屏的显示。由于开关组B和C中的开关KO3、KO4、KE3、KE4断开，因此副屏的信号无法传输到主屏，此外，由于信号STVA和CK1A～CK4A无输出，且开关K1A～K6A以及开关KO1和KE1全部断开，所以没有信号输出到主屏的T1模块～TN模块(例如，T1模块～T1280模块)，因而主屏不显示图像。
根据本发明的示例性实施例，当主屏和副屏都显示图像并且分开显示时，STVB和CK1B～CK4B正常输出信号，同时，STVA和CK1A～CK4A也正常输出信号，开关K1B～K6B接通，且KO2、KE2、KO1和KE1接通，其他开关都断开。由于信号STVA和CK1A～CK4A正常输出信号，且KO1和KE1接通，则信号STVA以及CK1A～CK4A可以控制T1模块～TN模块(例如，T1模块～T1280模块)的驱动，从而输出信号G1～GN(例如，G1～G1280)来控制主屏显示。此外，开关组B和C中的开关KO3、KO4、KE3、KE4断开，主屏的信号无法传输到副屏，但是，由于STVB和CK1B～CK4B正常输出信号，且开关K1B～K6B、KO2和KE2接通，所以STVB和CK1B～CK4B信号可以单独控制T(N+1)模块～T2N模块(例如，T1281模块～T2560模块)的驱动，从而输出信号G(N+1)～G2N(例如，G1281～G2560)，来控制副屏的显示。这样，主屏和副屏分别通过不同的信号来控制，可以实现分开显示。
根据本发明的示例性实施例，当主屏和副屏都显示且作为整体显示(即，单屏显示)时，此时信号STVB和CK1B～CK4B无需输出(即，无输出)，信号STVA和CK1A～CK4A正常输出，开关K1A～K6A接通，且KO3、KE3、KO4和KE4接通，其他开关都断开。由于STVB和CK1B～CK4B无输出，且K1B～K6B、KE1、KE2、KO1和KO2均断开，所以没有信号单独控制T(N+1)模块～T2N模块(例如，T1281模块～T2560模块)(即副屏)的驱动。但是由于信号STVA和CK1A～CK4A正常输出，且开关K1A～K6A、KO3、KE3、KO4和KE4接通，所以信号STVA和CK1A～CK4A可以控制T1模块～TN模块(例如，T1模块～T1280模块)，即控制主屏的显示，且主屏的信号可以传输到副屏， 从而整个屏可以单屏显示。这样就与图2的GOA电路的显示效果一样，实现整屏的单屏显示效果。
应当理解，本发明不限于此，在其他示例性实施例中，也可以从显示屏的上侧到下侧布置栅极线GATE_1～GATE_2N(N为偶数，例如，N＝1280)，使得图4中所示的GOA电路的上部分的输出G1～G1280控制副屏的显示，GOA电路的下部分的输出G(N+1)～G2N控制副屏的显示。此外，根据示例性实施例的GOA电路可以正向扫描，也可以反向扫描。
扫描触发信号STVA和STVB可以不同，也可以相同。时钟信号CK1A～CK4A可以与CK1B～CK4B可以不同，也可以相同，且时钟信号线不限于例示的数量和时序图，可以根据需要任意设置。相应地，控制时钟信号线的开关的数量也相应地可以改变。即，本实施例中切换控制单元中的开关组不限于此，开关组的数量和设置位置不限于此，可以根据需要做出任意的修改和变型。
图6是示出根据本发明的示例性实施例当双屏分别显示时主屏和副屏的GOA电路信号时序图。图6的上部分为主屏GOA时序图，下部分为副屏GOA时序图。根据参照图5描述的第(3)种情况设置电路，当主屏和副屏都显示图像并且分开显示时，信号STVA以及CK1A～CK4A控制主屏的信号输出G(N+1)～GN(例如，G1～G1280)，信号STVB和CK1B～CK4B控制副屏的信号输出G(N+1)～G2N(例如，G1281～G2560)。
参照图5，针对主屏左侧的GOA电路，当扫描触发信号STVA为高电平电压时，左侧第一个TFT模块(例如，T1模块)导通，T1模块将接收的时钟信号CK1A(或CK3A)输出为扫描信号G1，即，T1模块导通后输出的扫描信号G1与时钟信号CK1A(或CK3A)同步，如图6中主屏GOA时序图中的栅极线GATE_1的信号所示。当T1模块输出的扫描信号G1为高电平电压时，与其连接下一个TFT模块(例如，T3模块)导通，该T3模块将接收的时钟信号CK1A(或CK3A)输出为扫描信号G3，即，T3模块导通后输出的扫描信号G3与时钟信号CK1A(或CK3A)同步(图6中未示出)。同理，针对主屏右侧的GOA电路，右侧第一个TFT模块(例如，T2模块)导通后输出的扫描信号G2与时钟信号CK2A(或CK4A)同步，如图6中主屏GOA时序图中的 栅极线GATE_2的信号所示。
参照图5，针对副屏左侧的GOA电路，当扫描触发信号STVB为高电平电压时，左侧第一个TFT模块(即T(N+1)模块，例如，T1281模块)导通，T(N+1)模块将接收的时钟信号CK1B(或CK3B)输出为扫描信号G(N+1)(单独在副屏中，也可以称为第一栅极线GATE_1的信号G1)，即，T(N+1)模块导通后输出的扫描信号G1与时钟信号CK1A(或CK3A)同步，如图6中副屏GOA时序图中的栅极线GATE_1的信号所示。同理，针对副屏右侧的GOA电路，右侧第一个TFT模块(例如，T(N+2)模块)导通后输出的扫描信号G(N+2)(单独在副屏中，也可称为第二栅极线GATE_2的信号)与时钟信号CK2A(或CK4A)同步，如图6中副屏GOA时序图中的栅极线GATE_2的信号所示。
图7是示出根据本发明的示例性实施例当整体单屏显示时主屏和副屏的GOA电路信号时序图。图7的上部分为主屏GOA时序图，下部分为副屏GOA时序图。根据参照图5描述的第(4)中情况设置电路，当主屏和副屏都显示图像并且整体单屏显示时，信号STVB无输出，且CK1B～CK4B无输出(或浮置)，而信号STVA以及CK1A～CK4A正常输出且控制主屏的信号输出G1～GN(例如，G1～G1280)以及副屏的信号输出G(N+1)～G2N(例如，G1281～G2560)。其信号输出与参照图2和图3描述的信号输出过程基本相同，这里不再赘述。
由于主屏和副屏的显示比例可以任意设置，因而切换控制单元中开关组的位置可以相应地改变，具体来说，切换控制单元中的开关组可以设置在主屏与副屏交接处的位置。当然，显示屏也可以划分为两个或更多个显示屏，参照本示例实施例的GOA电路设计，可以将GOA电路分为多组GOA子电路，每组GOA子电路位于显示屏的两侧并且控制与其连接的显示屏区域的显示；相应地，提供多组GOA控制信号，用于控制每组GOA子电路的信号输出；同样地，设置切换控制单元，连接相邻两组GOA子电路，并且分别控制多组GOA控制信号的接通或断开。
以上描述了用于单双屏可控切换显示的GOA电路及其驱动方法，应当理解，本发明不限于此，在不脱离本发明构思的情况下，对本发明的GOA电路 进行适当地修改和变型，可以实现用于单多屏可控切换显示的GOA电路等。
前述内容是对示例实施例的举例说明且不应被解释为对其的限制。虽然已经描述了一些示例实施例，但是本领域技术人员将容易地理解，在实质上不脱离本发明构思的新颖性教导和优点的情况下，可在示例实施例中进行许多修改。对所公开的示例实施例以及其他示例实施例的修改意图被包括在权利要求及其等同物的范围内。

Claims (10)

  1. 一种用于单双屏可控切换显示的GOA电路，包括：
    第一GOA电路，位于主屏两侧且控制主屏的显示；
    第二GOA电路，位于副屏两侧且控制副屏的显示；
    第一组GOA控制信号，控制第一GOA电路的信号输出；
    第二组GOA控制信号，控制第二GOA电路的信号输出；以及
    切换控制单元，连接第一GOA电路与第二GOA电路，并且分别控制第一组GOA控制信号和第二组GOA控制信号的接通或断开。
  2. 根据权利要求1所述的GOA电路，其中，第一组GOA控制信号包括第一扫描触发信号和多个时钟信号，第二组GOA控制信号包括第二扫描触发信号和多个时钟信号。
  3. 根据权利要求2所述的GOA电路，其中，第一GOA电路和第二GOA电路分别包括多个级联的晶体管模块。
  4. 根据权利要求3所述的GOA电路，其中，每个晶体管模块包括多个晶体管。
  5. 根据权利要求3所述的GOA电路，其中，切换控制单元包括分别具有多组开关的GOA信号切换开关单元、GOA线路连接开关单元和扫描触发开关单元。
  6. 根据权利要求5所述的GOA电路，其中，GOA信号切换开关单元包括：
    第一组GOA信号切换开关，用于控制第一组GOA控制信号的接通或断开；以及
    第二组GOA信号切换开关，用于控制第二组GOA控制信号的接通或断 开。
  7. 根据权利要求6所述的GOA电路，其中，GOA线路连接开关单元包括两组连接开关，且连接第一GOA电路与第二GOA电路。
  8. 根据权利要求7所述的GOA电路，其中，扫描触发开关单元包括第一组扫描触发开关和第二组扫描触发开关。
  9. 一种用于单多屏可控切换显示的GOA电路，包括：
    多组GOA子电路，包括三组或更多组GOA子电路，其中，每组GOA子电路位于显示屏的两侧并且控制与其连接的显示屏区域的显示；
    多组GOA控制信号，包括三组或更多组GOA控制信号，控制每组GOA子电路的信号输出；以及
    切换控制单元，连接相邻两组GOA子电路，并且分别控制多组GOA控制信号的接通或断开。
  10. 一种根据权利要求1所述的GOA电路的驱动方法，其中，
    当主屏单独显示时，控制GOA电路，使得第一组GOA控制信号正常输出，第二组GOA控制信号无输出，并且将第一组扫描触发开关接通；
    当副屏单独显示时，控制GOA电路，使得第一组GOA控制信号无输出，第二组GOA控制信号正常输出，将第二组扫描触发开关接通，并且将第二组GOA信号切换开关接通；
    当主屏和副屏分开显示时，控制GOA电路，使得第一组GOA控制信号和第二组GOA控制信号均正常输出，将第二组GOA信号切换开关接通，并且将扫描触发开关单元中的两组开关分别接通；
    当主屏和副屏合成为单屏显示时，控制GOA电路，使得第一组GOA控制信号正常输出，第二组GOA控制信号无输出，将GOA线路连接开关单元中的两组开关接通。
PCT/CN2016/099172 2016-07-13 2016-09-18 用于单双屏可控切换显示的goa电路及其驱动方法 Ceased WO2018010293A1 (zh)

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