WO2017215150A1 - 半导体设备的成膜方法以及半导体设备的氮化铝成膜方法 - Google Patents

半导体设备的成膜方法以及半导体设备的氮化铝成膜方法 Download PDF

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WO2017215150A1
WO2017215150A1 PCT/CN2016/100799 CN2016100799W WO2017215150A1 WO 2017215150 A1 WO2017215150 A1 WO 2017215150A1 CN 2016100799 W CN2016100799 W CN 2016100799W WO 2017215150 A1 WO2017215150 A1 WO 2017215150A1
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sputtering
substrate
surface modification
semiconductor device
batch
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PCT/CN2016/100799
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English (en)
French (fr)
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王军
董博宇
郭冰亮
耿玉洁
马怀超
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北京北方华创微电子装备有限公司
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Priority to SG11201810652SA priority Critical patent/SG11201810652SA/en
Priority to MYPI2018002525A priority patent/MY186220A/en
Priority to KR1020177035463A priority patent/KR102003151B1/ko
Priority to US15/691,211 priority patent/US10643843B2/en
Publication of WO2017215150A1 publication Critical patent/WO2017215150A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10323—Aluminium nitride [AlN]

Definitions

  • the present invention relates to a film forming method of a semiconductor device, and more particularly to a method for forming an aluminum nitride film of a semiconductor device.
  • PVD Physical vapor deposition
  • LEDs light emitting diodes
  • displays In the chamber of the PVD sputtering apparatus, a high-power DC power source is usually connected to the target, and the working gas in the chamber is excited into plasma by the loading power, and the ions in the plasma are attracted to the sputtering target. Therefore, the material of the target is sputtered and deposited on a substrate such as a wafer.
  • process parameters such as sputtering power and sputtering rate, but basically the direction for improving film formation quality, film thickness uniformity and increasing equipment productivity is very clear.
  • the present invention provides a film forming method of a semiconductor device which forms a thin film by a sputtering method and performs a surface modification process on the target before forming the thin film.
  • the method of the invention adopts different process parameters in the surface modification process of different sputtering processes, so that the targets in different sputtering processes have different surface states, and thus for different times.
  • the offset phenomenon of film formation uniformity of the main sputtering in the sputtering process produces a compensation effect to improve film formation quality and film thickness uniformity.
  • Some embodiments of the present invention provide a film forming method of a semiconductor device, comprising sequentially performing a plurality of sputtering processes to form a film on a plurality of batches of substrates, respectively, wherein each sputtering process package
  • the following steps are included: loading the substrate into the chamber and placing it on the carrying base; moving the shielding disc between the target and the substrate; introducing an inert gas into the chamber to surface modify the target; performing pre-sputtering, Pre-treating the surface of the target; removing the shielding disk from the target and the substrate, and performing main sputtering on the substrate by using the target to form a film on the substrate; moving the substrate out of the chamber; and,
  • the surface modification process of the sputtering process performed on the Nth batch substrate has different process parameters from the surface modification process of the sputtering process performed on the N+1th batch substrate, and N is a positive integer.
  • Some embodiments of the present invention provide a method for forming an aluminum nitride film of a semiconductor device, comprising sequentially performing a plurality of sputtering processes to form an aluminum nitride film on a plurality of batches of substrates, respectively, wherein each sputtering process includes the following Step: loading the substrate into the chamber and placing it on the bearing base; moving the shielding disk between the aluminum-containing target and the substrate; introducing an inert gas into the chamber to perform surface modification on the aluminum-containing target; performing pre-splashing Shooting, pre-treating the surface of the aluminum-containing target, changing the surface of the aluminum-containing target from an aluminum-rich state to a transition state; removing the shielding disk from the target and the substrate, and introducing inertness into the chamber Gas and nitrogen-containing gas and main sputtering of the substrate with an aluminum target to form an aluminum nitride film on the substrate; removing the substrate from the chamber; and surface modification process of the sputtering process of the N
  • the plurality of sputtering processes sequentially performed are for forming a thin film on a plurality of batches of substrates, respectively.
  • the surface modification process of each sputtering process can remove the residue on the surface of the target, and can be compensated for multiple times by using different process parameters in the surface modification process of different sputtering processes for multiple batches of substrates.
  • the surface modification process of the sputtering process has a negative effect on the film thickness uniformity (for example, the problem that the film formation uniformity shifts toward a specific direction), so that the film formation quality can be improved and the film thickness uniformity can be improved.
  • FIG. 1 is a schematic flow chart of a film forming method of a semiconductor device according to some embodiments of the present invention.
  • FIG. 2A is a schematic view showing a film forming method of a semiconductor device according to some embodiments of the present invention.
  • 2B is a schematic view showing a film forming method of a semiconductor device according to some embodiments of the present invention.
  • 2C is a schematic view showing a film forming method of a semiconductor device according to some embodiments of the present invention.
  • FIG. 3 is a schematic diagram of an electronic device according to some embodiments of the present invention.
  • the reaction chamber 100 includes an upper electrode device and a lower electrode device.
  • the lower electrode device is disposed in the reaction chamber 100 for carrying the workpiece to be processed by the workpiece.
  • the lower electrode device includes a susceptor 104 and is grounded.
  • each sputtering process corresponds to a batch of substrates.
  • each batch of the substrate refers to all the substrates processed by each sputtering process, and may be one substrate or a plurality of substrates (for example, when a plurality of substrates are simultaneously carried on the tray).
  • Each sputtering process includes a pre-treatment process of the target prior to the main sputtering, which includes performing a surface modification process to remove residues on the surface of the target (eg, a film formed on the surface of the target during the previous sputtering process)
  • the layer is pre-sputtered to pre-treat the surface of the target to ensure that the target is in a stable state during the main sputtering of each sputtering process.
  • surface modification of the aluminum-containing target by using an inert gas such as argon (Ar) may be performed.
  • the surface of the aluminum-containing target is in an Al-rich state, and the pre-sputtering can change the surface of the aluminum-containing target from an aluminum-rich state to a transition state, thereby ensuring formation of nitrogen during subsequent main sputtering.
  • the aluminum film has a good film forming quality. Further, in the actual production process of aluminum nitride, it is often observed that the film thickness distribution of the film layer formed in the multiple sputtering processes tends to shift toward a specific direction due to unpredictable factors, and further Affects film thickness uniformity.
  • the surface modification process of the target is performed first in each sputtering process, and the surface modification process in different sputtering processes is provided by using different process parameters.
  • the compensation effect further improves the film thickness distribution and continues to shift in the same direction, resulting in a serious decrease in film thickness uniformity.
  • the aluminum nitride film formed by the method of the invention has better quality, and the epitaxial growth quality of the gallium nitride layer formed on the aluminum nitride film is also improved.
  • the aluminum nitride film and the gallium nitride layer can be applied to an electronic device such as a light emitting diode device, and a gallium nitride layer with improved film quality can be used to enhance the electrical performance of the electronic device, and the aluminum nitride film with improved thickness uniformity is also used. It is positive for the stability of the mass production products of electronic devices.
  • FIG. 1 is a schematic flow chart of a film forming method of a semiconductor device according to some embodiments of the present invention.
  • some embodiments of the present invention provide a film forming method 100 for a semiconductor device, which includes repeating multiple times of sputtering.
  • the process SR is sprayed to form a film on different batches of substrates, respectively.
  • Each sputtering process SR includes the following steps 110, 112, 114, 115, 116, and 118. In this embodiment, a description will be given of a single substrate including only one substrate.
  • a substrate is loaded into the chamber and placed on the carrier base.
  • the masking disk is moved between the target and the substrate.
  • step 114 an inert gas is introduced into the chamber to perform a surface modification process on the target.
  • Pre-sputtering is performed to pretreat the surface of the target.
  • step 116 the masking disk is removed and the substrate is primarily sputtered with the target to form a film on the substrate.
  • step 118 the substrate is removed from the chamber.
  • the next sputtering process SR is continued to form a thin film on another batch of substrates.
  • the film forming method of the semiconductor device of the present embodiment includes sequentially performing a plurality of sputtering processes SR, each of which processes a batch of substrates to form a thin film on the surface of each substrate of the batch, wherein
  • the so-called batch of substrates refers to all the substrates processed by each sputtering process SR, which may be one substrate or a plurality of substrates.
  • the surface modification process of the sputtering process performed on the substrate of the Nth batch has different process parameters from the surface modification process of the sputtering process performed on the substrate of the N+1th batch, and N is a positive integer.
  • the problem that the film thickness distribution of the surface of the target material is continuously shifted toward the same direction due to contamination or defects generated after the sputtering process is performed multiple times can be improved, thereby improving the film thickness uniformity.
  • the sputtering process performed on the Nth batch substrate and the sputtering process performed on the N+1th substrate are two consecutive sputtering processes for forming a thin film on different substrates, and The surface modification process within this two successive sputtering processes has different process parameters.
  • the process parameters of the surface modification process in the ongoing sputtering process are adjusted in an alternating manner, that is, the surface modification process corresponding to the odd number of sputtering processes may have the same process.
  • the surface modification process corresponding to the parameters and the even number of sputtering processes may have the same process parameters, but the surface modification process corresponding to the odd number of sputtering processes is different from the surface modification process corresponding to the even number of sputtering processes.
  • Process parameters may be used to adjust the process parameters of the surface modification process corresponding to different sputtering processes.
  • the foregoing method 100 is merely an example, and the present invention is not limited to the content of the method 100. Other required additional steps may also be performed before, after, and/or in the method 100, and the steps described in the method 100 may also be performed. The order is replaced, deleted or changed in other embodiments. Moreover, the term "step” as used in this specification is not limited to a single action, and the term “step” may include a single action, operation, or technique, or may be composed of multiple actions, operations, and/or techniques. Collection.
  • FIG. 2A-2C are schematic diagrams showing a film forming method of a semiconductor device according to some embodiments of the present invention.
  • some embodiments of the present invention provide a film forming method 100 for a semiconductor device, including the following steps.
  • a sputtering device 20 can be provided.
  • the sputtering apparatus 20 includes a chamber 21, a carrier base 22, and a shielding disk 24.
  • the sputtering apparatus 20 may further include a shielding disk magazine 25, a heat insulating ring 26, a cover ring 27, a lower end cover 28A, an upper end cover 28B, and a magnetron 29 that store the shielding disk 24, and the shielding disk library 25 is worn.
  • the inner wall 21S of the chamber 21 communicates with the internal environment of the chamber 21, but is not limited thereto. In other embodiments of the invention, other desirable components may also be disposed within and/or outside of the sputtering apparatus 20 as desired. Then, a sputtering process SR is performed, and the sputtering process SR includes step 110, step 112, step 114, step 115, and step 116, and step 118.
  • the substrate 31 is loaded into the chamber 21 and placed on the carrier base 22.
  • a batch of substrates 31 (which may be one substrate or a plurality of substrates) may be placed on the tray 23, and then the tray 23 on which the substrate 31 is placed is loaded by, for example, a robot arm.
  • the chamber 21 is placed on the carrier base 22. In other embodiments, a batch of substrates 31 may also be placed directly on the carrier base 22 without the tray 23.
  • the substrate 31 may be a substrate formed of a sapphire substrate, silicon carbide (SiC), or other suitable material, such as a semiconductor substrate, a silicon-on-insulator (SOI) substrate, a glass substrate, or a ceramic substrate, and the tray 23 It can be made of, for example, silicon carbide (SiC) or molybdenum, but is not limited thereto.
  • SiC silicon carbide
  • SOI silicon-on-insulator
  • the masking disk 24 is moved between the target T and the substrate 31, and at step 114, an inert gas is introduced into the chamber 21 to target the target.
  • T performs a surface modification process.
  • ions generated by the inert gas collide with the target T, thereby achieving the effect of modifying the surface of the target T. For example, remove because of before A film formed on the surface of the target T by a sputtering process.
  • the flow rate of the inert gas such as argon may be between 100 standard cent centimeters per minute (sccm) to 300 sccm, and preferably may be between 180 sccm and Between 280sccm, but not limited to this.
  • the sputtering power applied to the target T may be between 2,500 watts and 4,000 watts, and preferably between 2,800 watts and 3,500 watts, but not limited thereto. . In some embodiments, it may also include introducing only an inert gas such as argon into the chamber 21 without introducing other reactive gases.
  • the masking disk 24 may first be placed in the masking tray library 25 when the surface modification process is not performed, and the masking tray 24 may be moved from the masking tray library 25 into the chamber 21 before the surface finishing process is performed.
  • a surface modification process is performed between the target T and the substrate 31.
  • the masking disk 24 is also positioned between the target T and the substrate 31 during the surface modification process, thereby preventing the material of the target T from being formed on the substrate 31 by a surface modification process.
  • the masking disk 24 can be regarded as a baffle to block particles generated in the surface finishing process from falling onto the substrate 31 or the carrier base 22 to affect subsequent film formation quality.
  • the surface modification process is performed after the substrate 31 is loaded into the chamber 21, and the masking disk 24 is located between the target T and the substrate 31 when the surface modification process is performed, but is not limited thereto.
  • pre-sputtering is performed to pretreat the surface of the target T.
  • the surface of the surface-modified target T can be further processed by pre-sputtering so that the surface of the target T is in a transition state.
  • the pre-sputtering described above may include introducing an inert gas and a reactive gas into the chamber 21, wherein the inert gas may be, for example, argon (Ar), and the reactive gas may be selected depending on the material of the film layer to be formed.
  • the gas that is introduced during the pre-sputtering may be the same as the gas that is introduced during the subsequent main sputtering, but is not limited thereto.
  • the flow rate of the reaction gas may be between 30 sccm and 300 sccm, and preferably between 100 sccm and 220 sccm; the flow rate of the inert gas such as argon may be introduced. Between 15sccm and 100sccm, and It may preferably be between 20 sccm and 70 sccm.
  • the sputtering power applied to the target T may include a pulsed DC power source having a power ranging from 2,500 watts to 4,000 watts, and the power range may preferably be between 2,800 watts and 3,500 watts, but Not limited to this.
  • the masking disk 24 is removed from between the target T and the substrate 31, and the substrate 31 is subjected to main sputtering by the target T to form on the substrate 31.
  • the above-described main sputtering may include introducing an inert gas and a reactive gas into the chamber 21, wherein the inert gas may be, for example, argon (Ar), and the reactive gas may be selected depending on the material of the film layer to be formed. Ions (for example, Ar ions) generated by an inert gas collide with the target T, and the target T reacts with the reaction gas to form a film layer on the substrate 31.
  • Ions for example, Ar ions
  • the flow rate of the reactive gas may be between 30 sccm and 300 sccm, and preferably may be between 100 sccm and 220 sccm; the flow rate of the inert gas such as argon may be introduced. It is between 15 sccm and 100 sccm, and preferably between 20 sccm and 70 sccm.
  • the sputtering power applied to the target T may include a pulsed DC power source having a power ranging from 2,500 watts to 4,000 watts, and the power range may preferably be between 2,800 watts and 3,500 watts, but Not limited to this.
  • the substrate 31 on which the thin film is formed is removed from the chamber 21.
  • the sputtering power applied to the target T by the pre-sputtering is equal to the sputtering power applied to the target T during the main sputtering, but is not limited thereto.
  • step 110, step 112, step 114, step 115, step 116 and step 118 may be repeated to complete the next sputtering process SR, the next sputtering process SR corresponding to another batch Substrate 31.
  • the primary sputtering process SR refers to a process of surface modification after loading a tray on which a batch of substrates 31 are placed into the chamber 21, and performing main sputtering on the batch of substrates 31 on the tray 23 to form a film, and then the tray is formed. 23 and the flow of the batch of substrate 31 of the batch out of the chamber 21.
  • the film forming method of the semiconductor device of the present embodiment includes sequentially performing a plurality of sputtering processes SR, each of which processes a batch of substrates for each substrate of the batch.
  • the surface is formed into a film, wherein the so-called batch of substrates refers to all the substrates processed by each sputtering process SR, which may be one substrate or a plurality of substrates.
  • the surface modification process of the sputtering process performed on the substrate of the Nth batch has different process parameters from the surface modification process of the sputtering process performed on the substrate of the N+1th batch, and N is a positive integer.
  • the problem that the surface thickness distribution of the target material is shifted in the same direction due to contamination or defects caused by surface modification after performing corresponding sputtering processes on the plurality of batches of substrates, respectively, can be improved. Improve film thickness uniformity.
  • the surface modification process of the sputtering process performed on the substrate of the Nth batch has different process parameters from the surface modification process of the sputtering process performed on the substrate of the N+1th batch by selecting different processes. Time to achieve.
  • the surface modification process of the sputtering process performed on the substrate of the Nth batch has a first process time
  • the surface modification process of the sputtering process performed on the substrate of the (N+1)th batch has a different process time than the first process time.
  • the second process time, and the second process time is about 2 to 8 times of the first process time, for example, the first process time is about 1-3 seconds, and the second process time is about 6-8 seconds, but not Limited.
  • the Nth batch is The surface modification process of the sputtering process performed by the substrate may have the same sputtering power as the surface modification process of the sputtering process performed on the N+1th batch substrate.
  • the surface modification process of the sputtering process performed on the substrate of the Nth batch and the surface modification process of the sputtering process performed on the substrate of the N+1th batch may have different process times and different splashes. Shooting power.
  • the surface modification process of the sputtering process performed on the Nth batch substrate may have different sputtering power and the same as the surface modification process of the sputtering process performed on the N+1th substrate. Process time.
  • the surface modification process of the sputtering process performed on the substrate of the Nth batch and the surface modification process of the sputtering process performed on the substrate of the N+1th batch may have other different process parameters.
  • the method 100 can further include performing a pasting process before and/or after successively repeating the plurality of sputtering processes (the multiple sputtering processes performed continuously may constitute a batch sputtering process). . It is worth noting that the existing film forming method does not have a surface modification process on the target, so the target material must be coated after several sputtering processes, wherein the process time of the existing coating process is required.
  • the film forming method of the present invention because the surface modification process of the target T is performed by using different process parameters in different sputtering processes, wherein the process time of the surface modification process can improve the condition of the target T in only a few seconds. Therefore, in the case where the condition of the target T is good, the method of the present invention can not only reduce the number and frequency of performing the coating process, but also shorten the overall process time, and the coating of the present invention, compared to the conventional film forming method.
  • the treatment only needs to load the target T with a low power of between about 2500 watts and 4,000 watts to extend the lifetime of the target T to 1 to 2 years.
  • the film forming method 100 of a semiconductor device can be used to form a non-metal film, a metal film, or a metal compound film.
  • the target T may be an aluminum-containing target, such as a pure aluminum target or an aluminum nitride target, and the above method 100 It can be regarded as a method of forming an aluminum nitride film of a semiconductor device.
  • the above-described pre-sputtering may include introducing a nitrogen-containing gas and an inert gas such as argon gas into the chamber 21, and impinging on the aluminum-containing target by ions generated by the inert gas ( That is, the target T) causes the surface of the target T to change from an Al-rich state to a transition state.
  • the flow rate of the nitrogen-containing gas for example, nitrogen
  • the nitrogen-containing gas may be between 30 sccm and 300 sccm, and preferably between 100 sccm and 220 sccm; and an inert gas such as argon is introduced.
  • the flow rate of the gas may range from 15 sccm to 100 sccm, and preferably may range from 20 sccm to Between 70sccm, but not limited to this.
  • the sputtering power applied to the target T may include a pulsed DC power source having a power ranging from 2,500 watts to 4,000 watts, and the power range may preferably be between 2,800 watts and 3,500 watts, but Not limited to this.
  • an oxygen-containing gas may be additionally introduced into the chamber 21 such that the surface of the target T has a state of oxygen dopant (which may also be regarded as aluminum oxynitride, AlON).
  • the flow rate of the oxygen-containing gas such as oxygen may be between 0.5 sccm and 10 sccm, and preferably may be between 0.5 sccm and 5 sccm, but not limited thereto.
  • the above-described main sputtering may include introducing a nitrogen-containing gas and an inert gas such as argon (Ar) into the chamber 21, and causing ions (for example, Ar ions) generated by the inert gas.
  • the aluminum-containing target that is, the target T
  • an oxygen-containing gas may be introduced into the chamber 21 during the main sputtering, and the aluminum nitride film formed may include an oxygen-doped aluminum nitride film.
  • a flow rate of a nitrogen-containing gas such as nitrogen may be between 30 sccm and 300 sccm, and preferably may be between 100 sccm and 220 sccm; a flow rate of an inert gas such as argon is introduced.
  • the range may be between 15 sccm and 100 sccm, and preferably may be between 20 sccm and 70 sccm; the flow rate of the oxygen-containing gas, such as oxygen, may range from 0.5 sccm to 10 sccm, and preferably may be between 0.5 sccm. Up to 5sccm, but not limited to this.
  • the sputtering power applied to the target T may include a pulsed DC power source having a power ranging from 2,500 watts to 4,000 watts, and the power range may preferably be between 2,800 watts and 3,500 watts, but Not limited to this.
  • the sputtering power applied to the target T by the pre-sputtering is equal to the sputtering power applied to the target T during the main sputtering, but is not limited thereto.
  • the surface modification process may also include introducing only an inert gas such as argon into the chamber 21 without introducing a reactive gas such as a nitrogen-containing gas and an oxygen-containing gas, and causing ions generated by the inert gas to impinge on the aluminum.
  • the target (that is, the target T) is formed to achieve the effect of modifying the surface of the target T.
  • the flow rate of the inert gas such as argon may be between 100 sccm and 300 sccm, and preferably may be between 180 sccm and 280 sccm, but not limited thereto.
  • the sputtering power applied to the target T may be between 2,500 watts and 4,000 watts, and preferably may be between 2,800 watts and 3,500 watts, but not limited thereto.
  • the sputtering power can be continuously applied to the target T during the pre-sputtering and main sputtering processes, that is, the pre-sputtering is performed in a continuous glow (ie, the chamber 21 does not glow). Main sputtering.
  • the method of the present invention performs a surface modification process on the target T during each sputtering process, and adopts different process parameters in the surface modification process of the sputtering process corresponding to each of the different batches of substrates.
  • the condition in the chamber 21 and the condition of the target T can be stabilized, thereby compensating for the surface modification process of the target T in the multiple sputtering processes or only using the surface modification process having the same process parameters.
  • the negative influence on the film thickness uniformity can be achieved, so that the film forming quality can be improved and the film thickness uniformity can be improved.
  • Table 1 and Table 2 below.
  • Table 1 shows the thickness of the aluminum nitride film formed by the method of a comparative example (the surface modification process is not performed in each sputtering process), and each sputtering process is a five-piece substrate placed on the tray (ie, each One batch of the substrate contains five substrates) for main sputtering; and Table 2 shows the thickness of the aluminum nitride film formed by the above method 100, and each sputtering process is also a five-piece substrate placed on the tray ( That is, each batch of the substrate contains five substrates) for main sputtering.
  • the thickness uniformity of the aluminum nitride film formed by the method of the present invention is remarkably superior to the thickness uniformity of the aluminum nitride film formed by the method of the comparative example.
  • the above-described sputtering process of the present invention was continuously performed 20 times, and the results showed that each substrate had a good film thickness uniformity and a film thickness between different substrates for each batch of substrates. Uniformity is also good; and, for different batches of substrates, film thickness uniformity between batches is also improved.
  • the surface modification process performed on the target by the method of forming a film of the present invention can effectively improve film thickness uniformity.
  • FIG. 1 , FIG. 2C and FIG. 3 are schematic diagrams of an electronic device according to some embodiments of the present invention.
  • the aluminum nitride film forming method 100 of a semiconductor device can be used to form an electronic device 30 such as a gallium nitride based substrate.
  • the electronic device 30 can include a substrate 31, an aluminum nitride buffer layer 32, and a gallium nitride layer 33.
  • the aluminum nitride buffer layer 32 is on the substrate 31, and the gallium nitride layer 33 is on the aluminum nitride buffer layer 32.
  • the aluminum nitride buffer layer 32 may be formed on the substrate 31 by the method 100 described above, and the gallium nitride layer 33 may be formed on the aluminum nitride buffer layer 32. Since the lattice mismatch and the thermal mismatch between the aluminum nitride buffer layer 32 and the substrate 31 (for example, the sapphire substrate) are relatively small, the aluminum nitride buffer layer 32 can be used to improve the subsequent The quality of the gallium nitride layer 33 formed by epitaxial growth on the aluminum nitride buffer layer 32 further enhances the performance of the electronic device 30.
  • the electronic device 30 may include a light emitting diode device or other suitable semiconductor electronic device, and when the electronic device 30 is a gallium nitride based light emitting diode device, the electronic device 30 may further include a quantum well layer 34 formed on the gallium nitride layer.
  • the layer 33 at this time, the gallium nitride layer 33 can be processed to form an N-type doped gallium nitride layer 33N, and the P-type doped gallium nitride layer 33P can be further formed on the quantum well layer 34, but This is limited.
  • the introduction of oxygen during the main sputtering of the aluminum nitride buffer layer 32 improves the film formation quality of the gallium nitride layer 33 formed on the aluminum nitride buffer layer 32, and the electronic device 30 (for example, a light emitting diode device) The various electrical performance can be improved.
  • the film forming method of the semiconductor device of the present invention can stabilize the condition of the chamber by using different process parameters in the surface modification process of different sputtering processes performed on the multi-batch substrate.
  • the condition of the target can compensate for the negative influence on the film thickness uniformity without the surface modification process of the target in the sputtering process, so that the film formation quality can be improved and the film thickness uniformity can be improved. effect.
  • the film formation method of the semiconductor device of the present invention is used to form an aluminum nitride film, since the film formation quality and thickness uniformity of the aluminum nitride film are improved, nitridation for subsequent formation on the aluminum nitride film is performed.
  • the epitaxial growth quality of the gallium layer has also improved.

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Abstract

提供一种半导体设备的成膜方法及半导体设备的氮化铝成膜方法。半导体设备的成膜方法包括依序进行多次溅射流程，各溅射流程包括步骤：将基板（31）载入腔室（21）内并放置于承载底座（22）上；将遮蔽盘（24）移至靶材（T）与基板（31）之间；在腔室（21）内通入惰性气体以对靶材（T）进行表面修饰工艺；进行预溅射，以对靶材（T）的表面进行预处理；将遮蔽盘（24）从靶材（T）与基板（31）之间移开，并利用靶材（T）对基板（31）进行主溅射，在基板（31）上形成薄膜；将基板（31）移出腔室（21）；并且，对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺具有不同的工艺参数，且N为正整数。半导体设备的成膜方法及半导体设备的氮化铝成膜方法，能够改善成膜质量，提升成膜厚度均匀性。

Description

半导体设备的成膜方法以及半导体设备的氮化铝成膜方法 技术领域
本发明涉及一种半导体设备的成膜方法，特别涉及一种半导体设备的氮化铝成膜方法。
背景技术
物理气相沉积(physical vapor deposition,PVD)溅射工艺已广泛用于现今的半导体集成电路、发光二极管(light emitting diode，LED)、太阳能电池及显示器等工艺中。在PVD溅射设备的腔室中，通常是利用高功率直流电源连接至靶材，通过加载功率将腔室内的工作气体激发为等离子体(plasma)，并吸引等离子体中的离子轰击溅射靶材，以此使靶材的材料被溅射下来而沉积在晶片等基板上。不同的应用领域通常对溅射功率、溅射速率等工艺参数的要求也有所不同，但基本上对于提升成膜质量、成膜厚度均匀性以及增加设备产能的努力方向却是非常明确的。
发明内容
为解决上述技术问题，本发明提供一种半导体设备的成膜方法，其利用溅射方式形成薄膜，并在形成薄膜之前先对靶材进行表面修饰工艺。本发明的方法通过在不同次的溅射流程的表面修饰工艺时采用不同的工艺参数的作法，以此使得在不同次的溅射流程中的靶材具有不同的表面状态，进而对于不同次的溅射流程的主溅射的成膜均匀性的偏移现象产生补偿效果，以提高成膜质量及成膜厚度均匀性。
本发明的一些实施例提供一种半导体设备的成膜方法，包括依序进行多次溅射流程，以分别在多批次基板上形成薄膜，其中各溅射流程包 括下列步骤：将基板载入腔室内并放置于承载底座上；将遮蔽盘移至靶材与基板之间；在腔室内通入惰性气体以对靶材进行表面修饰工艺；进行预溅射，以对靶材的表面进行预处理；将遮蔽盘从靶材与基板之间移开，并利用靶材对基板进行主溅射，以在基板上形成薄膜；将基板移出腔室；并且，对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺具有不同的工艺参数，且N为正整数。
本发明的一些实施例提供一种半导体设备的氮化铝成膜方法，包括依序进行多次溅射流程，以分别在多批次基板上形成氮化铝薄膜，其中各溅射流程包括下列步骤：将基板载入腔室内并放置于承载底座上；将遮蔽盘移至含铝靶材与基板之间；在腔室内通入惰性气体以对含铝靶材进行表面修饰工艺；进行预溅射，以对含铝靶材的表面进行预处理，使含铝靶材的表面由富铝状态转变为过渡状态；将遮蔽盘从靶材与基板之间移开，并在腔室内通入惰性气体及含氮气体且以并含铝靶材对基板进行主溅射以在基板上形成氮化铝薄膜；将基板移出腔室；并且对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺具有不同的工艺参数，且N为正整数。
在本发明的半导体设备的成膜方法以及半导体设备的氮化铝成膜方法中，依序进行的多次溅射流程是用以分别在多批次基板上形成薄膜。每次溅射流程的表面修饰工艺可去除靶材表面的残留物，而通过在针对多批次基板所进行的不同次的溅射流程的表面修饰工艺中采用不同的工艺参数可补偿在多次的溅射流程的表面修饰工艺对于成膜厚度均匀性产生的负面影响(例如成膜均匀性朝向特定方向偏移的问题)，故可达到改善成膜质量以及提升成膜厚度均匀性等效果。
附图说明
图1为本发明一些实施例的半导体设备的成膜方法的流程示意图；
图2A为本发明一些实施例的半导体设备的成膜方法示意图；
图2B为本发明一些实施例的半导体设备的成膜方法示意图；
图2C为本发明一些实施例的半导体设备的成膜方法示意图；以及
图3为本发明一些实施例的电子装置的示意图。
【符号说明】
20                溅射装置
21                腔室
21S               内壁
22                承载底座
23                托盘
24                遮蔽盘
25                遮蔽盘库
26                隔热环
27                覆盖环
28A               下端盖
28B               上端盖
29                磁控管
30                电子装置
31                基板
32                氮化铝缓冲层
33                氮化镓层
33N               N型掺杂氮化镓层
33P               P型掺杂氮化镓层
34                量子阱层
100               方法
110、112、114、115、116、118  步骤
SR                溅射流程
T                 靶材
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图来对本发明提供的反应腔室及半导体加工设备进行详细描述。
图1为本发明第一实施例提供的反应腔室的剖视图。请参阅图1，反应腔室100包括上电极装置和下电极装置。其中，下电极装置设置在反应腔室100内，用于承载被加工工件被加工工件。在本实施例中，下电极装置包括基座104，且接地。
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图对本发明提供的半导体设备的成膜方法以及半导体设备的氮化铝成膜方法进行说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
在本发明的制造方法中，一次溅射流程用以在一批次的基板上形成薄膜，下一次溅射流程用以在下一批次的基板上形成薄膜。也就是说，每一次溅射流程对应一批次的基板。其中，每一批次的基板指的是每一次溅射流程所处理的全部基板，其可以为一个基板，也可以为多个基板(例如托盘上同时承载多个基板时)。每次溅射流程包括在主溅射之前先对靶材进行前置处理工艺，其包括进行表面修饰工艺以去除靶材表面的残留物(例如前次溅射流程时在靶材表面形成的膜层)，以及进行预溅射以对靶材的表面进行预处理，以确保每次溅射流程的主溅射时靶材处于稳定状态。举例而言，在使用含铝靶材进行溅射制作氮化铝薄膜的情况下，利用惰性气体例如氩气(Ar)对含铝靶材进行表面修饰可以使 含铝靶材表面处于富铝(Al-rich)状态，而预溅射可以使含铝靶材的表面由富铝状态转变为过渡状态，以此在后续的主溅射时可以确保形成的氮化铝薄膜具有良好的成膜质量。进一步说明，在氮化铝的实际生产过程中，常因为不可预期的因素而观察到在多次的溅射流程中所形成的膜层的膜厚分布有逐渐朝向特定方向偏移的趋势，进而影响到成膜厚度均匀性。上述膜厚分布均匀性的偏移的可能成因之一推测为某些不可预期的因素造成靶材的表面状态产生偏差，而每次溅射流程时若未对靶材进行表面修饰会使得此偏差持续地被放大而造成膜厚分布均匀性的偏移朝向相同的方向持续地被放大。
在本发明的半导体设备的成膜方法中，在每次的溅射流程中会先对靶材进行表面修饰工艺，且在不同次的溅射流程中的表面修饰工艺采用不同的工艺参数可提供补偿效果，进而改善膜厚分布持续朝向同一方向偏移而导致成膜厚度均匀性严重下降的问题。
本发明的方法所形成的氮化铝薄膜具有较佳的质量，对于后续形成于氮化铝薄膜上的氮化镓层的外延生长(Epitaxy)质量亦有所提升。氮化铝薄膜与氮化镓层可应用于电子装置例如发光二极管装置中，成膜质量提升的氮化镓层可用以提升电子装置的电性表现，而厚度均匀性提升的氮化铝薄膜亦对电子装置的量产产品的稳定性有正面的帮助。
图1为本发明一些实施例的半导体设备的成膜方法的流程示意图，如图1所示，本发明一些实施例提供一种半导体设备的成膜方法100，该方法100包括重复进行多次溅射流程SR，以分别在不同批次的基板上形成薄膜。各溅射流程SR包括下列的步骤110、步骤112、步骤114、步骤115、步骤116以及步骤118。本实施例中，以一批次基板仅包含1片基板进行说明。在步骤110处，将一基板载入腔室内，并放置于承载底座上。在步骤112处，将遮蔽盘移至靶材与基板之间。在步骤114中，在腔室内通入惰性气体以对靶材进行表面修饰工艺。在步骤115处， 进行预溅射，以对靶材的表面进行预处理。在步骤116处，将遮蔽盘移开并利用靶材对基板进行主溅射，以在基板上形成薄膜。在步骤118处，将基板移出腔室。接着，继续进行下一次的溅射流程SR，以在另一批次的基板上形成薄膜。
本实施例的半导体设备的成膜方法包括依序进行多次的溅射流程SR，每一次溅射流程SR对一批次的基板进行加工以在该批次的各基板的表面形成薄膜，其中，所谓一批次的基板，指的是每一次溅射流程SR所处理的全部基板，其可以是一个基板，也可以是多个基板。其中，对第N批次的基板进行的溅射流程的表面修饰工艺与对第N+1批次的基板进行的溅射流程的表面修饰工艺具有不同的工艺参数，且N为正整数。通过上述方法，可改善靶材的表面在进行了多次的溅射流程后而未加以修饰而产生的污染或缺陷所造成膜厚分布持续朝向同一方向偏移的问题，进而提升成膜厚度均匀性。在本实施例中，对第N批次基板进行的溅射流程与对第N+1批次基板进行的溅射流程是两次连续且用于在不同基板上形成薄膜的溅射流程，且此两次连续进行的溅射流程内的表面修饰工艺具有不同的工艺参数。在一些实施例中，持续进行的溅射流程内的表面修饰工艺的工艺参数是以交替变换方式的规则加以调整，也就是说奇数次的溅射流程所对应的表面修饰工艺可以具有相同的工艺参数，而偶数次的溅射流程所对应的表面修饰工艺可以具有相同的工艺参数，但奇数次的溅射流程所对应的表面修饰工艺与偶数次的溅射流程所对应的表面修饰工艺具有不同的工艺参数。或者在另一些实施例中，可以利用不同的规则调整不同次溅射流程所对应的表面修饰工艺的工艺参数。
上述的方法100仅为示例，而本发明并不以方法100的内容为限，其它需要的额外步骤亦可在方法100之前、之后和/或其中进行，而方法100中所述的步骤亦可在其它实施例中被取代、删除或改变其顺序。 此外，本说明书中所使用的“步骤”一词并不限于单一动作，此“步骤”一词可包括单一个动作、操作或手法，或者可为由多个动作、操作和/或手法所组成的集合。
图2A至图2C为本发明一些实施例的半导体设备的成膜方法示意图。如图2A以及图1所示，本发明一些实施例提供一种半导体设备的成膜方法100，包括下列步骤。首先，可提供一溅射装置20。溅射装置20包括一腔室21、一承载底座22以及一遮蔽盘24。在一些实施例中，溅射装置20还可包括存放遮蔽盘24的遮蔽盘库25、隔热环26、覆盖环27、下端盖28A、上端盖28B以及磁控管29，遮蔽盘库25穿透腔室21的内壁21S而与腔室21的内部环境连通，但并不以此为限。在本发明的其它实施例中，亦可视需要在溅射装置20之内和/或之外设置其它需要的部件。然后，进行溅射流程SR，溅射流程SR包括步骤110、步骤112、步骤114、步骤115和步骤116以及步骤118。在步骤110处，将基板31载入腔室21内，并放置于承载底座22上。在一些实施例中，可先将一批次的基板31(其可以为一个基板，也可以为多个基板)放置于托盘23上，再将放置有基板31的托盘23通过例如机械手臂载入腔室21内并放置于承载底座22上。在另外一些实施例中，亦可不通过托盘23而直接将一批次的基板31放置于承载底座22上。
在一些实施例中，基板31可为蓝宝石基板、碳化硅(SiC)或其它适合的材质所形成的基板，例如半导体基板、绝缘层覆硅(SOI)基板、玻璃基板或陶瓷基板，而托盘23可由例如碳化硅(SiC)或钼所制成，但并不以此为限。
然后，如图2B以及图1所示，在步骤112处，将遮蔽盘24移至靶材T与基板31之间，以及在步骤114处，在腔室21内通入惰性气体以对靶材T进行表面修饰工艺。在表面修饰工艺中，惰性气体产生的离子会撞击靶材T，以此达到修饰靶材T的表面的效果。例如，除去因为前 一次溅射流程在靶材T表面所形成的膜层。举例来说，于表面修饰工艺时，通入惰性气体例如氩气的流量范围可介于100每分钟标准毫升(standard cubic centimeter per minute，sccm)至300sccm之间，且优选地可介于180sccm至280sccm之间，但并不以此为限。此外，在表面修饰工艺时，对靶材T载入的溅射功率可介于2500瓦至4000瓦之间，且优选地可介于2800瓦至3500瓦之间，但并不以此为限。在一些实施例中，也可包括在腔室21内只通入惰性气体例如氩气而不通入其它反应气体。
在一些实施例中，遮蔽盘24在未进行表面修饰工艺时可先放置于遮蔽盘库25中，而要进行表面修饰工艺之前，遮蔽盘24可自遮蔽盘库25移至腔室21中并位于靶材T与基板31之间再进行表面修饰工艺。在表面修饰工艺进行时遮蔽盘24亦是位于靶材T与基板31之间，以此避免靶材T的材料通过表面修饰工艺形成在基板31上。换言之，遮蔽盘24可被视为一挡板，用以阻挡表面修饰工艺中产生的微粒掉落在基板31或承载底座22上而影响后续成膜质量。在本实施例中，表面修饰工艺是在基板31加载腔室21之后进行，且表面修饰工艺进行时遮蔽盘24是位于靶材T与基板31之间，但并不以此限。
随后，如图2B以及图1所示，在步骤115处，进行预溅射，以对靶材T的表面进行预处理。预溅射可对表面修饰后的靶材T的表面进行进一步处理，使得靶材T的表面处于过渡状态。上述的预溅射可包括于腔室21内通入惰性气体与反应气体，其中惰性气体例如可为氩气(Ar)，而反应气体则可视欲形成的膜层的材料作选择。在一些实施例中，预溅射时通入的气体可与在后续进行的主溅射时通入的气体相同，但不以此为限。举例来说，在预溅射时，通入反应气体的流量范围可介于30sccm至300sccm之间，且优选地可介于100sccm至220sccm之间；通入惰性气体例如氩气的流量范围可介于15sccm至100sccm之间，且 优选地可介于20sccm至70sccm之间。此外，在预溅射时，对靶材T加载的溅射功率可包括功率范围介于2500瓦至4000瓦的脉冲直流电源，且功率范围优选地可介于2800瓦至3500瓦之间，但并不以此为限。
之后，如图2C以及图1所示，在步骤116处，将遮蔽盘24从靶材T与基板31之间移开并利用靶材T对基板31进行主溅射，以在基板31上形成薄膜。上述的主溅射可包括在腔室21内通入惰性气体与反应气体，其中惰性气体例如可为氩气(Ar)，而反应气体则可视欲形成的膜层的材料作选择。通过惰性气体产生的离子(例如Ar离子)撞击靶材T，并使靶材T与反应气体反应以在基板31上形成膜层。举例来说，在主溅射时，通入反应气体的流量范围可介于30sccm至300sccm之间，且优选地可介于100sccm至220sccm之间；通入惰性气体例如氩气的流量范围可介于15sccm至100sccm之间，且优选地可介于20sccm至70sccm之间。此外，在主溅射时，对靶材T加载的溅射功率可包括功率范围介于2500瓦至4000瓦的脉冲直流电源，且功率范围优选地可介于2800瓦至3500瓦之间，但并不以此为限。接着，在步骤118处，将形成有薄膜的基板31移出腔室21。在一些实施例中，进行预溅射对靶材T加载的溅射功率等于进行主溅射时对靶材T加载的溅射功率，但不以此为限。
此后，可重复进行步骤110、步骤112、步骤114、步骤115、步骤116以及步骤118，以完成对下一次的溅射流程SR，所述下一次的溅射流程SR对应于另一批次的基板31。一次的溅射流程SR是指将放置有一批次基板31的托盘加载至腔室21后，进行表面修饰工艺以及对托盘23上的该批次的基板31进行主溅射形成薄膜，而后将托盘23及其上的该批次的基板31移出腔室21的流程。
本实施例的半导体设备的成膜方法包括依序进行多次的溅射流程SR，每一次溅射流程SR对一批次的基板进行加工以在该批次的各基板 的表面形成薄膜，其中，所谓一批次的基板，指的是每一次溅射流程SR所处理的全部基板，其可以是一个基板，也可以是多个基板。其中，对第N批次的基板进行的溅射流程的表面修饰工艺与对第N+1批次的基板进行的溅射流程的表面修饰工艺具有不同的工艺参数，且N为正整数。通过上述方法，可改善靶材的表面在分别对多批次的基板进行相应的溅射流程后未加以表面修饰而产生的污染或缺陷所造成膜厚分布持续朝向同一方向偏移的问题，进而提升成膜厚度均匀性。
在一些实施例中，对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺具有不同的工艺参数是通过选择不同的工艺时间来实现。举例而言，对第N批次基板进行的溅射流程的表面修饰工艺具有第一工艺时间，对第N+1批次基板进行的溅射流程的表面修饰工艺具有不同于第一工艺时间的第二工艺时间，且第二工艺时间约为第一工艺时间的2至8倍，例如第一工艺时间约为1～3秒，且第二工艺时间约为6～8秒，但不以此为限。另外，在对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺具有不同的工艺时间的前提下，对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺可以具有相同溅射功率。在另一些实施例中，对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺可具有不同的工艺时间以及不同的溅射功率。在又一些实施例中，对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺可具有不同的溅射功率以及具有相同工艺时间。在另一些实施例中，对第N批次基板进行的溅射流程的表面修饰工艺与对第N+1批次基板进行的溅射流程的表面修饰工艺可具有其它不同的工艺参数。
在本实施例中，通过在不同次的溅射流程的表面修饰工艺中采用不 同的工艺参数，可以稳定靶材的状况，从而可达到改善成膜质量以及提升成膜厚度均匀性等效果。在一些实施例中，方法100可进一步包括在连续重复进行多次溅射流程(连续进行的多次溅射流程可构成一批次溅射流程)之前和/或之后进行涂布(pasting)处理。值得说明的是，现有成膜方法由于没有对靶材进行表面修饰工艺，因此在进行了数次溅射流程之后即必须对靶材进行涂布处理，其中现有涂布处理的工艺时间需持续数十分钟，不仅大幅增加了整体工艺时间，且现有涂布处理需使用高功率(大于4500瓦的功率)进行，更会造成靶材的使用寿命(life time)减短至约3至6个月。反观本发明的成膜方法，由于在不同次的溅射流程中采用不同的工艺参数对靶材T进行表面修饰工艺，其中表面修饰工艺的工艺时间仅需数秒即可改善靶材T的状况。因此在靶材T的状况良好的情况下，相较于现有成膜方法，本发明的方法不仅可以减少进行涂布处理的次数与频率，而可以缩短整体工艺时间，而且本发明的涂布处理仅需对靶材T加载约介于2500瓦至4000瓦之间的低功率，即可将靶材T的使用寿命延长到1至2年。
在一些实施例中，半导体设备的成膜方法100可用以形成非金属薄膜、金属薄膜或金属化合物薄膜。举例来说，当要在基板31上形成的薄膜为氮化铝(AlN)时，靶材T可为含铝靶材，例如纯铝靶材或氮化铝靶材，而上述的方法100则可视为半导体设备的氮化铝成膜方法。
此外，在形成氮化铝薄膜时，上述的预溅射可包括在腔室21内通入含氮气体以及例如氩气等的惰性气体，并利用由惰性气体产生的离子撞击含铝靶材(也就是靶材T)，使得靶材T的表面由富铝(Al-rich)状态转变为过渡(Transition)状态。举例来说，在预溅射时，通入含氮气体(例如氮气)的流量范围可介于30sccm至300sccm之间，且优选地可介于100sccm至220sccm之间；通入惰性气体(例如氩气)的流量范围可介于15sccm至100sccm之间，且优选地可介于20sccm至 70sccm之间，但并不以此为限。此外，在预溅射时，对靶材T加载的溅射功率可包括功率范围介于2500瓦至4000瓦的脉冲直流电源，且功率范围优选地可介于2800瓦至3500瓦之间，但并不以此为限。在一些实施例中，在预溅射时，可在腔室21内另通入含氧气体，使得靶材T的表面具有氧掺质(亦可视为氮氧化铝，AlON)的状态。举例而言，通入含氧气体例如氧气的流量范围可介于0.5sccm至10sccm之间，且优选地可介于0.5sccm至5sccm之间，但不以此为限。
在形成氮化铝薄膜时，上述的主溅射可包括在腔室21内通入含氮气体以及惰性气体例如氩气(argon，Ar)，并使由惰性气体产生的离子(例如Ar离子)撞击含铝靶材(也就是靶材T)，并与含氮气体反应以在基板31上形成氮化铝薄膜。在一些实施例中，在主溅射时可在腔室21内另通入含氧气体，以此形成的氮化铝薄膜可包括氧掺入的氮化铝薄膜。举例来说，在主溅射时，通入含氮气体例如氮气的流量范围可介于30sccm至300sccm之间，且优选地可介于100sccm至220sccm之间；通入惰性气体例如氩气的流量范围可介于15sccm至100sccm之间，且优选地可介于20sccm至70sccm之间；通入含氧气体例如氧气的流量范围可介于0.5sccm至10sccm之间，且优选地可介于0.5sccm至5sccm之间，但并不以此为限。此外，在主溅射时，对靶材T加载的溅射功率可包括功率范围介于2500瓦至4000瓦的脉冲直流电源，且功率范围优选地可介于2800瓦至3500瓦之间，但并不以此为限。在一些实施例中，进行预溅射对靶材T加载的溅射功率等于进行主溅射时对靶材T加载的溅射功率，但不以此为限。
在一些实施例中，表面修饰工艺亦可包括在腔室21内只通入惰性气体例如氩气而不通入反应气体例如含氮气体和含氧气体，并使由惰性气体产生的离子撞击含铝制靶材(也就是靶材T)，以此达到修饰靶材T的表面的效果。例如，至少部分除去因为先前工艺而在靶材T表面形成 的氮化铝。举例来说，在表面修饰工艺时，通入惰性气体例如氩气的流量范围可介于100sccm至300sccm之间，且优选地可介于180sccm至280sccm之间，但并不以此为限。此外，在表面修饰工艺时，对靶材T加载的溅射功率可介于2500瓦至4000瓦之间，且优选地可介于2800瓦至3500瓦之间，但并不以此为限。在一些实施例中，可在预溅射与主溅射的过程中持续对靶材T加载溅射功率，也就是以不断辉(即腔室21内不起辉)的方式进行预溅射和主溅射。
如上文所述，本发明的方法在每次溅射流程时均对靶材T进行表面修饰工艺，且在不同批次的基板各自所对应的溅射流程的表面修饰工艺中采用不同的工艺参数，以此可稳定腔室21内的状况以及靶材T的状况，进而可补偿在多次溅射流程中均未对靶材T进行表面修饰工艺或只利用具有相同工艺参数的表面修饰工艺对靶材T进行处理的状况下对于成膜厚度均匀性所产生的负面影响，故可达到改善成膜质量以及提升成膜厚度均匀性等效果。举例来说，请参考下列表1与表2。表1为一对照实施例的方法(每一次溅射流程中未进行表面修饰工艺)形成氮化铝薄膜的厚度状况，且每一次溅射流程是对托盘上放置的五片基板(即，每一批次的基板包含5个基板)进行主溅射；而表2为以上述的方法100形成氮化铝薄膜的厚度状况，且每一次溅射流程亦是对托盘上放置的五片基板(即，每一批次的基板包含5个基板)进行主溅射。由表1与表2的结果可知，本发明的方法所形成氮化铝薄膜的厚度均匀性显著地优于对照实施例的方法所形成的氮化铝薄膜的厚度均匀性。此外，连续进行本发明的上述溅射流程20次，其结果显示：对于每一批次的基板而言，每个基板均具有很好的膜厚均匀性，且不同的基板之间的膜厚均匀性也很好；并且，对于不同批次的基板而言，不同批次之间的膜厚均匀性亦得到改善。换句话说，本发明的形成薄膜的方法对靶材进行的表面修饰工艺可有效地改善成膜厚度均匀性。
表1
Figure PCTCN2016100799-appb-000001
表2
Figure PCTCN2016100799-appb-000002
此外，请参阅图1、图2C与图3，图3为本发明一些实施例的电子装置的示意图。如图1、图2C与图3所示，在一些实施例中，半导体设备的氮化铝成膜方法100可用于形成电子装置30例如氮化镓基发 光二极管装置(GaN基LED)中的氮化铝缓冲层32。在一些实施例中，电子装置30可包括基板31、氮化铝缓冲层32以及氮化镓层33。氮化铝缓冲层32位于基板31上，而氮化镓层33位于氮化铝缓冲层32上。氮化铝缓冲层32可由上述的方法100形成于基板31上，而氮化镓层33则可形成于氮化铝缓冲层32上。由于氮化铝缓冲层32与基板31(例如蓝宝石基板)之间的晶格失配(lattice mismatch)以及热失配(thermal mismatch)程度相对较小，故氮化铝缓冲层32可用以改善后续于氮化铝缓冲层32上以外延生长方式形成的氮化镓层33的质量，进而达到提升电子装置30性能表现的效果。举例来说，电子装置30可包括发光二极管装置或其它适合的半导体电子装置，而当电子装置30为氮化镓基发光二极管装置时，电子装置30还可包括量子阱层34形成于氮化镓层33，此时氮化镓层33可经处理而成为一N型掺杂氮化镓层33N，而量子阱层34上可再形成一P型掺杂氮化镓层33P，但并不以此为限。在形成氮化铝缓冲层32的主溅射时通入氧气可改善后续于氮化铝缓冲层32上形成的氮化镓层33的成膜质量，而电子装置30(例如为发光二极管装置)的各种电性表现可获得改善。
综上所述，本发明的半导体设备的成膜方法是通过在针对多批次基板所进行的不同次溅射流程的表面修饰工艺中采用不同的工艺参数，以此可稳定腔室内的状况以及靶材的状况，且可补偿在溅射流程中未对靶材进行表面修饰工艺的情况下对于成膜厚度均匀性产生的负面影响，故可达到改善成膜质量以及提升成膜厚度均匀性等效果。当本发明的半导体设备的成膜方法用于形成氮化铝薄膜时，由于氮化铝薄膜的成膜质量以及厚度均匀性均有所改善，故对于后续形成在氮化铝薄膜上的氮化镓层的外延生长质量也有所提升。
前述内容概述了一些实施方式的特征，因而本领域普通技术人员可更加理解本申请文件揭示内容的各方面。本领域普通技术人员应理解可 轻易使用本申请文件揭示内容作为基础，用于设计或修饰其他工艺与结构而实现与本申请文件所述的实施方式具有相同目的和/或达到相同优点。本领域普通技术人员亦应理解此均等架构并不脱离本申请文件揭示内容的精神与范围，以及本领域普通技术人员可进行各种变化、取代与替换，而不脱离本申请文件揭示内容的精神与范围。

Claims (26)

  1. 一种半导体设备的成膜方法，其特征在于，包括：
    依序进行多次溅射流程，以分别在多批次基板上形成薄膜，其中，各所述溅射流程包括：
    将基板载入腔室内并放置于承载底座上；
    将遮蔽盘移至靶材与所述基板之间；
    在所述腔室内通入惰性气体以对所述靶材进行表面修饰工艺；
    进行预溅射，以对所述靶材的表面进行预处理；
    将所述遮蔽盘从所述靶材与所述基板之间移开，并利用所述靶材对所述基板进行主溅射以在所述基板上形成薄膜；以及
    将所述基板移出所述腔室；
    其中，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同的工艺参数，且N为正整数。
  2. 如权利要求1所述的半导体设备的成膜方法，其特征在于，所述表面修饰工艺中通入的所述惰性气体包括氩气。
  3. 如权利要求1所述的半导体设备的成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺具有第一工艺时间，且对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同于所述第一工艺时间的第二工艺时间。
  4. 如权利要求3所述的半导体设备的成膜方法，其特征在于，所述第二工艺时间为所述第一工艺时间的2至8倍。
  5. 如权利要求3所述的半导体设备的成膜方法，其特征在于，所述第一工艺时间为1～3秒，且所述第二工艺时间为6～8秒。
  6. 如权利要求3所述的半导体设备的成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有相同的溅射功率。
  7. 如权利要求1所述的半导体设备的成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同的溅射功率。
  8. 如权利要求7所述的半导体设备的成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有相同的工艺时间。
  9. 如权利要求1所述的半导体设备的成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同的工艺时间与溅射功率。
  10. 如权利要求1所述的半导体设备的成膜方法，其特征在于，在所述预溅射时通入的气体与在所述主溅射时通入的气体相同。
  11. 如权利要求1所述的半导体设备的成膜方法，其特征在于，还包括在所述预溅射以及所述主溅射的过程中持续对所述靶材加载溅射功率。
  12. 如权利要求1所述的方法，其特征在于，还包括：
    连续重复进行多次所述溅射流程，其中，连续进行的所述多次溅射流程 构成一批次溅射流程；以及
    在所述一批次溅射流程之前和/或之后，进行涂布处理，其中，所述涂布处理对所述靶材加载的功率介于2500瓦至4000瓦之间。
  13. 一种半导体设备的氮化铝成膜方法，其特征在于，包括：
    依序进行多次溅射流程，以分别在多批次基板上形成氮化铝薄膜，其中，各所述溅射流程包括：
    将基板载入腔室内并放置于承载底座上；
    将遮蔽盘移至含铝靶材与所述基板之间；
    在所述腔室内通入惰性气体以对所述含铝靶材进行表面修饰工艺；
    进行预溅射，以对所述含铝靶材的表面进行预处理，使所述含铝靶材的表面由富铝状态转变为过渡状态；
    将所述遮蔽盘从所述含铝靶材与所述基板之间移开，并在所述腔室内通入惰性气体及含氮气体且以所述含铝靶材对所述基板进行主溅射以在所述基板上形成氮化铝薄膜，以及
    将所述基板移出所述腔室；
    其中，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同的工艺参数，且N为正整数。
  14. 如权利要求13所述的半导体设备的氮化铝成膜方法，其特征在于，所述表面修饰工艺中通入的所述惰性气体包括氩气。
  15. 如权利要求13所述的半导体设备的氮化铝成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺具有第一工艺时间，且对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同于所述第一工艺时间的第二工艺时间。
  16. 如权利要求15所述的半导体设备的氮化铝成膜方法，其特征在于，所述第二工艺时间为所述第一工艺时间的2至8倍。
  17. 如权利要求16所述的半导体设备的氮化铝成膜方法，其特征在于，所述第一工艺时间为1～3秒，且所述第二工艺时间为6～8秒。
  18. 如权利要求16所述的半导体设备的氮化铝成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有相同的溅射功率。
  19. 如权利要求13所述的半导体设备的成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同的溅射功率。
  20. 如权利要求19所述的半导体设备的氮化铝成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有相同的工艺时间。
  21. 如权利要求13所述的半导体设备的成膜方法，其特征在于，对第N批次基板进行的所述溅射流程的所述表面修饰工艺与对第N+1批次基板进行的所述溅射流程的所述表面修饰工艺具有不同的工艺时间与溅射功率。
  22. 如权利要求13所述的半导体设备的氮化铝成膜方法，其特征在于，所述主溅射还包括在所述腔室内通入含氧气体，以使所述氮化铝薄膜包括氧掺质。
  23. 如权利要求13所述的半导体设备的氮化铝成膜方法，其特征在于，在所述预溅射时通入的气体与在所述主溅射时通入的气体相同。
  24. 如权利要求13所述的半导体设备的氮化铝成膜方法，其特征在于，还包括在所述预溅射以及所述主溅射的过程中持续对所述含铝靶材加载溅射功率。
  25. 如权利要求13所述的半导体设备的氮化铝成膜方法，其特征在于，进行所述预溅射时对所述含铝靶材加载的溅射功率等于进行所述主溅射时对所述含铝靶材加载的溅射功率。
  26. 如权利要求13所述的方法，其特征在于，还包括：
    连续重复进行多次所述溅射流程，连续进行的所述多次溅射流程构成一批次溅射流程；以及
    在所述一批次溅射流程之前和/或之后，进行涂布处理，其中，所述涂布处理对所述含铝靶材加载的功率介于2500瓦至4000瓦之间。
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