WO2017215058A1 - 一种阵列基板及液晶显示面板 - Google Patents

一种阵列基板及液晶显示面板 Download PDF

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Publication number
WO2017215058A1
WO2017215058A1 PCT/CN2016/089607 CN2016089607W WO2017215058A1 WO 2017215058 A1 WO2017215058 A1 WO 2017215058A1 CN 2016089607 W CN2016089607 W CN 2016089607W WO 2017215058 A1 WO2017215058 A1 WO 2017215058A1
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Prior art keywords
shorting bar
pixel electrodes
gate lines
data lines
rows
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Ceased
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PCT/CN2016/089607
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English (en)
French (fr)
Inventor
甘启明
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/127,012 priority Critical patent/US10365521B2/en
Publication of WO2017215058A1 publication Critical patent/WO2017215058A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306—Details
    • G02F1/1309—Repairing; Testing
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present invention relates to the field of panel display technologies, and in particular, to an array substrate and a liquid crystal display panel.
  • the liquid crystal display panel is the current mainstream display device.
  • the LCD panel product needs to be unit tested on the display unit inside the panel after it has been boxed. Test).
  • a unit test is performed by shorting a gate or data supply signal through a shorting bar to detect various abnormalities occurring inside the Cell.
  • FIG. 1 is a schematic structural diagram of a driving circuit used in a liquid crystal display panel.
  • the driving circuit 100 is composed of a plurality of gate lines 110, a plurality of data lines 120, and a plurality of pixel units 130.
  • Each of the pixel units 130 is formed by a gate line 110 and a data line 120.
  • the shorting bar is disposed at the periphery of the pixel unit 130, shorts the gate line 110 and the data line 120, and is subjected to unit testing after being formed into a box.
  • the invention provides an array substrate and a liquid crystal display panel capable of solving the detection requirements of the HG2D driving circuit.
  • One technical solution adopted by the present invention is to provide an array substrate, including:
  • the display area has at least two kinds of pixel electrodes and gate lines and data lines arranged in rows and columns, and one of the gate lines is connected to two rows of the pixel electrodes, and the two data lines are connected to a column of the pixels. electrode;
  • the peripheral region has a first shorting bar for testing, a second shorting bar, the first shorting bar connecting the gate lines, the second shorting bar connecting the data lines, and the same kind of pixels
  • the electrodes are connected by the second shorting bar;
  • the first shorting bar includes two conductive pads, all of the gate lines are connected to one of the conductive pads in odd rows, and all of the gate lines are connected to the other of the conductive pads in even rows;
  • the second shorting bar includes three conductive pads, and the pixel electrodes include three kinds of red, green and blue, and each of the pixel electrodes is connected through a corresponding one of the data lines and one conductive pad.
  • a third shorting bar for connecting the common electrode.
  • Another technical solution adopted by the present invention is to provide an array substrate, including:
  • the display area has at least two kinds of pixel electrodes and gate lines and data lines arranged in rows and columns, and one of the gate lines is connected to two rows of the pixel electrodes, and the two data lines are connected to a column of the pixels. electrode;
  • the peripheral region has a first shorting bar for testing, a second shorting bar, the first shorting bar connecting the gate lines, the second shorting bar connecting the data lines, and the same kind of pixels
  • the electrodes are in communication through the second shorting bar.
  • the first shorting bar includes two conductive pads, all of which are connected to one of the conductive pads in odd rows, and all of the gate lines in even rows are connected to the other of the conductive pads.
  • the second shorting bar comprises three conductive pads
  • the pixel electrodes comprise three kinds of red, green and blue, each of the pixel electrodes being connected by a corresponding one of the data lines and one conductive pad.
  • a third shorting bar is included, which is used to connect the common electrode.
  • a liquid crystal display panel including:
  • the first substrate comprises a display area and a peripheral area;
  • the display area has at least two kinds of pixel electrodes and gate lines and data lines arranged in rows and columns, and one of the gate lines is connected to two rows of the pixel electrodes, and the two data lines are connected to a column of the pixels. electrode;
  • the peripheral region has a first shorting bar for testing, a second shorting bar, the first shorting bar connecting the gate lines, the second shorting bar connecting the data lines, and the same kind of pixels
  • the electrodes are in communication through the second shorting bar.
  • the first shorting bar comprises two conductive pads, all of the gate lines are connected to one of the conductive pads in odd rows, and all of the gate lines are connected to the other of the conductive pads in even rows.
  • the second shorting bar comprises three conductive pads
  • the pixel electrodes comprise three kinds of red, green and blue, and each of the pixel electrodes is connected through a corresponding one of the data lines and one conductive pad.
  • a third shorting bar is included, and the third shorting bar is used to connect the common electrode.
  • the invention has the beneficial effects of providing a detection circuit capable of satisfying the above-mentioned HG2D driving circuit, which can meet the detection requirements of the HG2D driving circuit and can also improve the detection quality.
  • FIG. 1 is a schematic structural view of a driving structure of a conventional display panel
  • FIG. 2 is a schematic structural view of an HG2D driving circuit in an embodiment of a display panel of the present invention
  • FIG. 3 is a schematic structural view of an embodiment of an array substrate of the present invention, in which a shorting bar is shown;
  • FIG. 4 is a schematic structural view of another embodiment of the array substrate of the present invention.
  • FIG. 5 is a schematic structural view of an embodiment of a display device having an array substrate according to the present invention.
  • FIG. 2 is a schematic structural diagram of an HG2D driving circuit in an embodiment of the display panel of the present invention.
  • the HG2D driving circuit 200 is composed of a plurality of gate lines 210, a plurality of data lines 220, and a plurality of pixel electrodes 230.
  • the one gate line 210 is connected to the two rows of the pixel electrodes 230, and the two data lines 220 are connected to the column of pixel electrodes 230.
  • FIG. 3 is a schematic structural diagram of a display panel array substrate provided by the present invention.
  • the array substrate 300 includes a display area 310 and a peripheral area 320.
  • the display area 310 has at least two kinds of pixel electrodes 311, gate lines 312 and data lines 313 arranged in rows and columns.
  • the gate line 312 is used to provide a scan signal, and the data line 313 is used to provide a pixel signal.
  • One gate line 312 is connected to two rows of pixel electrodes 311, and two data lines 313 are connected to one column of pixel electrodes 311. Further, the pixel electrode 311 may include red, green, and blue pixel electrodes.
  • the peripheral area 320 has a first shorting bar 321 and a second shorting bar 322 for testing.
  • the first shorting bar 321 is connected to the gate line 312, the second shorting bar 322 is connected to the data line 313, and the same type of pixel electrode 311 is connected through the second shorting bar 322.
  • the first shorting bar 321 and the second shorting bar 322 are used to short the signals of the independent data line 313 or the gate line 312, and the signal is supplied to the pixel electrode 311 through the first shorting bar 321 and the second shorting bar 322. Unit test Test).
  • the first shorting bar 321 includes a conductive pad 324
  • the second shorting bar 322 includes three conductive pads 324. Each of the red, green and blue pixel electrodes 311 passes through a corresponding data line 313 and a conductive pad 324. Connected.
  • the above-described embodiments can satisfy the detection of the array substrate or the display panel of the HG2D driving circuit, and can satisfy the detection requirements of the HG2D driving circuit, and can also improve the detection quality.
  • the array substrate embodiment of the present invention further includes a third shorting bar 323 for connecting the common electrode.
  • the scan signal is supplied to the gate line 312 through the first shorting bar 321, so that G1, G2, and G3 are turned on at a high level, and red is added to D1 and D2 of the data line 313 through the second shorting bar 322.
  • R Pixel signal (can be any of three kinds of red, green and blue pixel signals). If the pixel electrodes 311 of the D1 and D2 columns corresponding to the R pixel signals in the display area 310 are all lit and the other places are not lit, the column R pixel electrodes 311 are normally displayed. On the other hand, if the D1 and D2 column pixel electrodes 311 corresponding to the R pixel signal in the display area 310 are not all lit, a short circuit or an open circuit occurs in the column R pixel electrode 311.
  • the scan signal is supplied to the gate line 312 through the first shorting bar 321, so that G1, G2, and G3 are turned on at a high level, and D1, D2, and D5 of the data line 313 are supplied through the second shorting bar 322, D6 adds two different pixel signals, namely a red (R) pixel signal and a blue (B) pixel signal. If only the D1, D2, D5, and D6 column pixel electrodes 311 corresponding to the R pixel signal and the B pixel signal are all lit in the display area 310, the column R pixel electrode and the B pixel electrode 311 are normally displayed.
  • the display area 310 is displayed.
  • the pixel electrode 311 is short-circuited or broken.
  • the scan signal is supplied to the gate line 312 through the first shorting bar 321, so that G1, G2, and G3 are simultaneously turned on at a high level, and D1, D2, D3, and D4 of the data line 313 are respectively added through the second shorting bar 322.
  • the same pixel signal can be used to test the solid color picture.
  • test methods of the remaining pixel electrodes 311 are the same as above, and the details are not repeated here.
  • FIG. 4 is another schematic structural diagram of a display panel array substrate provided by the present invention.
  • the array substrate 400 includes a display area 410 and a peripheral area 420.
  • the display area 410 has at least two types of pixel electrodes 411, gate lines 412, and data lines 413 disposed in rows and columns.
  • the gate line 412 is used to provide a scan signal, and the data line 413 is used to provide a pixel signal.
  • One gate line 412 is connected to two rows of pixel electrodes 411, and two data lines 413 are connected to one column of pixel electrodes 411.
  • the pixel electrode 411 includes red, green, and blue pixel electrodes.
  • the peripheral area 420 has a first shorting bar 421 and a second shorting bar 422 for testing.
  • the first shorting bar 421 is connected to the gate line 412
  • the second shorting bar 422 is connected to the data line 413
  • the same type of pixel electrode 411 is connected through the second shorting bar 422.
  • the first shorting bar 421 and the second shorting bar 422 are used to short the signals of the independent data line 413 or the gate line 412, and the signal is supplied to the pixel electrode 411 through the first shorting bar 421 and the second shorting bar 422. Unit test Test).
  • the first shorting bar 421 includes two conductive pads 424.
  • the odd-numbered rows of all the gate lines 412 are connected to one of the conductive pads 424, and the even-numbered rows of all the gate lines 412 are connected to the other of the conductive pads 424.
  • the second shorting bar 422 includes three conductive pads 424, and the pixel electrodes 411 include red, green and blue pixel electrodes, each of which is in communication with a conductive pad 424 via a corresponding data line 413.
  • the scan signal is supplied to the even row G2 of the gate line 412 through the first shorting bar 421, so that G2 is turned on at a high level, and red is added to the D1 and D2 of the data line 413 through the second shorting bar 422.
  • R Pixel signal (can be any of three kinds of red, green and blue pixel signals). If the two rows of R pixel electrodes 411 on the G2 corresponding to the R pixel signal in the display area 410 are all lit, the partial R pixel electrode 411 is normally displayed. On the other hand, if the two rows of R pixel electrodes 411 on the G2 corresponding to the R pixel signal in the display region 410 are not all lit, a short circuit or an open circuit phenomenon occurs in the portion of the R pixel electrode 411.
  • the odd-numbered rows G1 and G3 of the gate line 412 are supplied with a scan signal through the first shorting bar 421, so that G1 and G3 are turned on at a high level, and D1 of the data line 413 is supplied through the second shorting bar 422.
  • D2 plus red (R) pixel signal can be any of red, green and blue pixel signals).
  • the D1, D2, and D5, D6 of the data line 413 may be added by the second shorting bar 422.
  • Two different or the same pixel signals are used for unit testing. The test methods are the same as above, and the details are not repeated here.
  • FIG. 5 is a schematic structural diagram of a display device having the array substrate provided by the present invention.
  • the present invention provides a display device having the array substrate.
  • the display device 10 includes a first substrate 300 and a second substrate 500 disposed opposite to each other, wherein the structure of the first substrate 300 is as described above. As described in the text, the details are not repeated here.
  • the present invention provides a detection circuit capable of satisfying the above-described HG2D driving architecture.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)

Abstract

一种阵列基板（300,400）及液晶显示面板（10），该阵列基板（300,400）包括显示区（310,410）及外围区（320,420）；其中，显示区（310,410）具有行列设置的至少两种像素电极（311,411）及栅极线（312,412）、数据线（313,413）；外围区（320,420）具有用以测试的第一短路棒（321,421）、第二短路棒（322,422）；第一短路棒（321,421）连接栅极线（312,412），第二短路棒（322,422）连接数据线（313,413），并且同一种像素电极（311,411）通过第二短路棒（322,422）连通。通过上述方式，能够解决HG2D驱动电路检测需求。

Description

一种阵列基板及液晶显示面板
【技术领域】
本发明涉及面板显示技术领域，特别是涉及一种阵列基板及液晶显示面板。
【背景技术】
液晶显示面板是目前的主流显示装置。为了保证产品质量，提高成品率，在LCD面板产品经过成盒之后需要对其面板内部的显示单元进行单元测试（cell test）。通过短路棒（shorting bar）短接栅极线（gate）或数据线（data）供给信号进行单元测试，以检测Cell内部发生的各种异常。
请参阅图1，图1是液晶显示面板采用的一种驱动电路的结构示意图。
如图1所示，驱动电路100由若干栅极线110、若干数据线120和若干像素单元130组成。其中，每个像素单元130由一条栅极线110和一条数据线120围设形成。短路棒设在像素单元130的外围，短接栅极线110和数据线120，经过成盒之后进行单元测试。
【发明内容】
本发明提供一种能够解决HG2D驱动电路检测需求的阵列基板及液晶显示面板。
本发明采用的一个技术方案是：提供一种阵列基板，包括：
显示区及外围区；
其中，所述显示区具有行列设置的至少两种像素电极及栅极线、数据线，一条所述栅极线对应连接两行所述像素电极，两条所述数据线对应连接一列所述像素电极；
所述外围区具有用以测试的第一短路棒、第二短路棒，所述第一短路棒连接所述栅极线，所述第二短路棒连接所述数据线，并且同一种所述像素电极通过所述第二短路棒连通；
所述第一短路棒包括两个导电垫，奇数行所有所述栅极线连通其中一个导电垫，偶数行所有所述栅极线连通其中另一个导电垫；
所述第二短路棒包括三个导电垫，所述像素电极包括红绿蓝三种，每种所述像素电极通过相应的所述数据线和一个导电垫连通。
根据本发明一优选实施例，其中，包括第三短路棒，所述第三短路棒用于连接公共电极。
本发明采用的另一个技术方案是：提供一种阵列基板，包括：
显示区及外围区；
其中，所述显示区具有行列设置的至少两种像素电极及栅极线、数据线，一条所述栅极线对应连接两行所述像素电极，两条所述数据线对应连接一列所述像素电极；
所述外围区具有用以测试的第一短路棒、第二短路棒，所述第一短路棒连接所述栅极线，所述第二短路棒连接所述数据线，并且同一种所述像素电极通过所述第二短路棒连通。
根据本发明一优选实施例，所述第一短路棒包括两个导电垫，奇数行所有所述栅极线连通其中一个导电垫，偶数行所有所述栅极线连通其中另一个导电垫。
根据本发明一优选实施例，所述第二短路棒包括三个导电垫，所述像素电极包括红绿蓝三种，每种所述像素电极通过相应的所述数据线和一个导电垫连通。
根据本发明一优选实施例，包括第三短路棒，所述第三短路棒用于连接公共电极。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种液晶显示面板，包括：
相对设置的第一基板和第二基板，所述第一基板包括显示区及外围区；
其中，所述显示区具有行列设置的至少两种像素电极及栅极线、数据线，一条所述栅极线对应连接两行所述像素电极，两条所述数据线对应连接一列所述像素电极；
所述外围区具有用以测试的第一短路棒、第二短路棒，所述第一短路棒连接所述栅极线，所述第二短路棒连接所述数据线，并且同一种所述像素电极通过所述第二短路棒连通。
其中，所述第一短路棒包括两个导电垫，奇数行所有所述栅极线连通其中一个导电垫，偶数行所有所述栅极线连通其中另一个导电垫。
其中，所述第二短路棒包括三个导电垫，所述像素电极包括红绿蓝三种，每种所述像素电极通过相应的所述数据线和一个导电垫连通。
其中，包括第三短路棒，所述第三短路棒用于连接公共电极。
本发明的有益效果是：提供一种能够满足上述HG2D驱动电路的检测电路，能够满足HG2D驱动电路的检测需求的同时，还能提高检测质量。
【附图说明】
图1是现有显示面板一驱动架构的结构示意图；
图2是本发明显示面板一实施方式中HG2D驱动电路的结构示意图；
图3是本发明阵列基板一实施方式的结构示意图，其中显示了短路棒；
图4是本发明阵列基板另一实施方式的结构示意图；
图5是本发明具有阵列基板的显示装置一实施方式的结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图2，图2是本发明显示面板一实施方式中HG2D驱动电路的结构示意图。
如图2所示，HG2D驱动电路200由若干栅极线210、若干数据线220和若干像素电极230组成。其中，一条栅极线210对应连接两行所述像素电极230，两条数据线220对应连接一列像素电极230。
请参阅图3，图3是本发明提供的一种显示面板阵列基板的结构示意图。
如图3所示，该阵列基板300包括显示区310及外围区320。其中，显示区310具有行列设置的至少两种像素电极311、栅极线312及数据线313。
其中，栅极线312用于提供扫描信号，数据线313用于提供像素信号。一条栅极线312对应连接两行像素电极311，两条数据线313对应连接一列像素电极311。进一步地，像素电极311可以包括红绿蓝三种像素电极。
其中，外围区320具有用以测试的第一短路棒321、第二短路棒322。第一短路棒321连接所述栅极线312，第二短路棒322连接数据线313，并且同一种像素电极311通过第二短路棒322连通。其中，第一短路棒321、第二短路棒322用于将独立的数据线313或栅极线312的信号进行短接，通过第一短路棒321、第二短路棒322供给像素电极311信号进行单元测试（cell test）。其中，第一短路棒321包括一个导电垫324，第二短路棒322包括三个导电垫324，红绿蓝三种像素电极中的每种像素电极311通过相应的数据线313和一个导电垫324连通。
上述实施方式能够满足HG2D驱动电路的阵列基板或显示面板的检测，并且能够满足HG2D驱动电路的检测需求的同时，还能提高检测质量。
参阅图3，本发明阵列基板实施方式还包括第三短路棒323，第三短路棒323用于连接公共电极。
在本实施例中，通过第一短路棒321给栅极线312提供扫描信号，使G1、G2、G3高电平开启，同时通过第二短路棒322给数据线313的D1、D2加上红（R）像素信号（可为红绿蓝三种像素信号任一一种）。其中，若显示区310中满足R像素信号对应的D1、D2列像素电极311全部点亮而其他地方不亮，则该列R像素电极311显示正常。反之，若显示区310中满足R像素信号对应的D1、D2列像素电极311未全部点亮，则该列R像素电极311中出现短路或者断路。
在本实施例中，通过第一短路棒321给栅极线312提供扫描信号，使G1、G2、G3高电平开启，同时通过第二短路棒322给数据线313的D1、D2及D5、D6分别加上两种不同的像素信号，即红（R）像素信号和蓝（B）像素信号。其中，若显示区310中只有满足R像素信号和B像素信号对应的D1、D2及D5、D6列像素电极311全部点亮，则该列R像素电极和B像素电极311显示正常。反之，若显示区310中满足R像素信号和B像素信号对应的D1、D2及D5、D6列像素电极311未全部点亮或有其他行列的像素电极311被点亮，则该显示区310中像素电极311出现短路或者断路现象。
其中，通过第一短路棒321给栅极线312提供扫描信号，使G1、G2、G3同时高电平开启，同时通过第二短路棒322给数据线313的D1、D2、D3、D4分别加上相同的像素信号，可以实现纯色画面的测试。
进一步的，其余像素电极311的测试方法同上，此处不再重复赘述。
请参阅图4，图4是本发明提供的一种显示面板阵列基板的另一结构示意图。
如图4所示，该阵列基板400包括显示区410及外围区420。其中，显示区410具有行列设置的至少两种像素电极411、栅极线412及数据线413。
其中，栅极线412用于提供扫描信号，数据线413用于提供像素信号。一条栅极线412对应连接两行像素电极411，两条数据线413对应连接一列像素电极411。其中，像素电极411包括红绿蓝三种像素电极。
其中，外围区420具有用以测试的第一短路棒421、第二短路棒422。第一短路棒421连接栅极线412，第二短路棒422连接数据线413，并且同一种像素电极411通过第二短路棒422连通。其中，第一短路棒421、第二短路棒422用于将独立的数据线413或栅极线412的信号进行短接，通过第一短路棒421、第二短路棒422供给像素电极411信号进行单元测试（cell test）。其中，第一短路棒421包括两个导电垫424，奇数行所有栅极线412连通其中一个导电垫424，偶数行所有栅极线412连通其中另一个导电垫424。第二短路棒422包括三个导电垫424，像素电极411包括红绿蓝三种像素电极，每种像素电极411通过相应的数据线413和一个导电垫424连通。
在本实施例中，通过第一短路棒421给栅极线412的偶数行G2提供扫描信号，使G2高电平开启，同时通过第二短路棒422给数据线413的D1、D2加上红（R）像素信号（可为红绿蓝三种像素信号任一一种）。其中，若显示区410中满足R像素信号对应的G2上的两行R像素电极411全部点亮，则该部分R像素电极411显示正常。反之，若显示区410中满足R像素信号对应的G2上的两行R像素电极411未全部点亮，则该部分R像素电极411中出现短路或者断路现象。
在本实施例中，通过第一短路棒421给栅极线412的奇数行G1、G3提供扫描信号，使G1、G3高电平开启，同时通过第二短路棒422给数据线413的D1、D2加上红（R）像素信号（可为红绿蓝三种像素信号任一一种）。其中，若显示区410中满足R像素信号对应的G1、G3上的两行R像素电极411全部点亮，则该部分R像素电极411显示正常。反之，若显示区410中满足R像素信号对应的G1、G3上的两行R像素电极411未全部点亮，或是有满足对应的G2上的R像素电极411点亮，则该部分R像素电极411中出现短路或者断路现象。
其中，本实施例中，在第一短路棒421给栅极线412的奇数或偶数行提供扫描信号时，还可以通过第二短路棒422给数据线413的D1、D2及D5、D6加上两种不同或相同的像素信号，进行单元测试，其测试方法同上，此处不再重复赘述。
请参阅图5，图5是本发明提供的一种具有该阵列基板的显示装置的结构示意图。
如图5所示，本发明提供的一种具有该阵列基板的显示装置，该显示装置10包括，相对设置的第一基板300和第二基板500，其中所述第一基板300的结构参见上文所述，此处不再重复赘述。
综上所述，本领域技术人员容易理解，本发明提供的一种能够满足上述HG2D驱动架构的检测电路。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

  1. 一种阵列基板，其中，包括：
    显示区及外围区；
    其中，所述显示区具有行列设置的至少两种像素电极及栅极线、数据线，一条所述栅极线对应连接两行所述像素电极，两条所述数据线对应连接一列所述像素电极；
    所述外围区具有用以测试的第一短路棒、第二短路棒，所述第一短路棒连接所述栅极线，所述第二短路棒连接所述数据线，并且同一种所述像素电极通过所述第二短路棒连通；
    所述第一短路棒包括两个导电垫，奇数行所有所述栅极线连通其中一个导电垫，偶数行所有所述栅极线连通其中另一个导电垫；
    所述第二短路棒包括三个导电垫，所述像素电极包括红绿蓝三种，每种所述像素电极通过相应的所述数据线和一个导电垫连通。
  2. 根据权利要求1所述的阵列基板，其中，
    包括第三短路棒，所述第三短路棒用于连接公共电极。
  3. 一种阵列基板，其中，包括：
    显示区及外围区；
    其中，所述显示区具有行列设置的至少两种像素电极及栅极线、数据线，一条所述栅极线对应连接两行所述像素电极，两条所述数据线对应连接一列所述像素电极；
    所述外围区具有用以测试的第一短路棒、第二短路棒，所述第一短路棒连接所述栅极线，所述第二短路棒连接所述数据线，并且同一种所述像素电极通过所述第二短路棒连通。
  4. 根据权利要求3所述的阵列基板，其中，
    所述第一短路棒包括两个导电垫，奇数行所有所述栅极线连通其中一个导电垫，偶数行所有所述栅极线连通其中另一个导电垫。
  5. 根据权利要求3所述的阵列基板，其中，
    所述第二短路棒包括三个导电垫，所述像素电极包括红绿蓝三种，每种所述像素电极通过相应的所述数据线和一个导电垫连通。
  6. 根据权利要求3所述的阵列基板，其中，
    包括第三短路棒，所述第三短路棒用于连接公共电极。
  7. 一种液晶显示面板，其中，包括：
    相对设置的第一基板和第二基板，所述第一基板包括显示区及外围区；
    其中，所述显示区具有行列设置的至少两种像素电极及栅极线、数据线，一条所述栅极线对应连接两行所述像素电极，两条所述数据线对应连接一列所述像素电极；
    所述外围区具有用以测试的第一短路棒、第二短路棒，所述第一短路棒连接所述栅极线，所述第二短路棒连接所述数据线，并且同一种所述像素电极通过所述第二短路棒连通。
  8. 根据权利要求7所述的液晶显示面板，其中，
    所述第一短路棒包括两个导电垫，奇数行所有所述栅极线连通其中一个导电垫，偶数行所有所述栅极线连通其中另一个导电垫。
  9. 根据权利要求7所述的液晶显示面板，其中，
    所述第二短路棒包括三个导电垫，所述像素电极包括红绿蓝三种，每种所述像素电极通过相应的所述数据线和一个导电垫连通。
  10. 根据权利要求7所述的液晶显示面板，其中，
    包括第三短路棒，所述第三短路棒用于连接公共电极。
PCT/CN2016/089607 2016-06-16 2016-07-11 一种阵列基板及液晶显示面板 Ceased WO2017215058A1 (zh)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1734322A (zh) * 2004-08-13 2006-02-15 三星电子株式会社 阵列基板及具有所述阵列基板的主基板和液晶显示装置
CN1828396A (zh) * 2006-04-14 2006-09-06 友达光电股份有限公司 液晶显示器组件与薄膜晶体管基板及测试方法
US7336093B2 (en) * 2005-08-26 2008-02-26 Au Optronics Corporation Test circuit for flat panel display device
CN101446724A (zh) * 2008-12-16 2009-06-03 昆山龙腾光电有限公司 液晶显示装置、阵列基板及其缺陷修补方法
CN102955306A (zh) * 2011-08-30 2013-03-06 上海天马微电子有限公司 液晶显示装置及其测试方法
CN105261317A (zh) * 2015-09-17 2016-01-20 京东方科技集团股份有限公司 数据线短接不良的检测方法和检测装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101192769B1 (ko) * 2005-06-03 2012-10-18 엘지디스플레이 주식회사 액정표시장치
JP5191639B2 (ja) * 2006-09-15 2013-05-08 株式会社ジャパンディスプレイイースト 液晶表示装置
US8416170B2 (en) * 2010-07-28 2013-04-09 Shenzhen China Star Optoelectronics Technology Co., Ltd. Liquid crystal display

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1734322A (zh) * 2004-08-13 2006-02-15 三星电子株式会社 阵列基板及具有所述阵列基板的主基板和液晶显示装置
US7336093B2 (en) * 2005-08-26 2008-02-26 Au Optronics Corporation Test circuit for flat panel display device
CN1828396A (zh) * 2006-04-14 2006-09-06 友达光电股份有限公司 液晶显示器组件与薄膜晶体管基板及测试方法
CN101446724A (zh) * 2008-12-16 2009-06-03 昆山龙腾光电有限公司 液晶显示装置、阵列基板及其缺陷修补方法
CN102955306A (zh) * 2011-08-30 2013-03-06 上海天马微电子有限公司 液晶显示装置及其测试方法
CN105261317A (zh) * 2015-09-17 2016-01-20 京东方科技集团股份有限公司 数据线短接不良的检测方法和检测装置

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