WO2017206555A1 - 显示装置及其驱动方法 - Google Patents

显示装置及其驱动方法 Download PDF

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Publication number
WO2017206555A1
WO2017206555A1 PCT/CN2017/074552 CN2017074552W WO2017206555A1 WO 2017206555 A1 WO2017206555 A1 WO 2017206555A1 CN 2017074552 W CN2017074552 W CN 2017074552W WO 2017206555 A1 WO2017206555 A1 WO 2017206555A1
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Prior art keywords
unit
control unit
voltage
pole
timing control
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PCT/CN2017/074552
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English (en)
French (fr)
Inventor
张春兵
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/544,902 priority Critical patent/US20180277039A1/en
Publication of WO2017206555A1 publication Critical patent/WO2017206555A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G09G2300/0866—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes by means of changes in the pixel supply voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

Definitions

  • Embodiments of the present invention relate to the field of display technologies, and in particular, to a display device and a driving method thereof.
  • the Organic Light-Emitting Diode (OLED) display technology has self-illuminating characteristics, and the OLED display device has a large viewing angle and can save power.
  • a plurality of pixel units are included in the existing OLED display device, and each pixel unit adopts a structure such as a 3T1C.
  • each pixel unit adopts a structure such as a 3T1C.
  • the transistor is located in the pixel unit, so that it is not easy to be unmaintainable when the thin film transistor is damaged.
  • Embodiments of the present invention provide a display device and a driving method thereof for improving an aperture ratio of a pixel unit, reducing power consumption, improving product yield, and improving maintainability.
  • an embodiment of the present invention provides a display device including: a timing control unit, a controlled unit, a voltage control unit, and a plurality of sequentially arranged pixel units, and the timing control unit and the controlled unit Connected, the voltage control unit is connected to the controlled unit, and the controlled unit is connected to the pixel unit;
  • the timing control unit is configured to output a timing control signal for determining whether the controlled unit electrically connects the voltage control unit and the pixel unit;
  • the controlled unit is configured to electrically connect the voltage control unit and the pixel unit according to the timing control signal, so that a control voltage output by the voltage control unit is transmitted to each of the pixel units;
  • the pixel unit is configured to display when a control voltage is received
  • one of the controlled units is capable of electrically connecting a plurality of the pixel units to the voltage control unit.
  • each of the plurality of pixel units includes a first switching transistor, a second switching transistor, a capacitor, and a light emitting device;
  • the control pole of the first switch tube is connected to the gate line, the first pole of the first switch tube is connected to the data line, and the second pole of the first switch tube is connected to the control pole of the second switch tube ;
  • a first pole of the second switch tube is connected to the controlled unit, and a second pole of the second switch tube is connected to a first pole of the light emitting device;
  • the first end of the capacitor is connected to the second pole of the first switch tube, and the second end of the capacitor is connected to a reference power source;
  • a second pole of the light emitting device is coupled to the reference power source.
  • the controlled unit includes a third switch tube and a fourth switch tube;
  • a control pole of the third switch tube is connected to an output end of the timing control unit, a first pole of the third switch tube is connected to an output end of the voltage control unit, and a second end of the third switch tube The pole is connected to the first pole of the fourth switch tube;
  • a control pole of the fourth switching transistor is connected to an output terminal of the timing control unit, and a second pole of the fourth switching transistor is connected to a reference power source.
  • the timing control unit outputs a timing control voltage to a control pole of the third switch tube and a control pole of the fourth switch tube, and when the timing control voltage is at a first level, the third switch tube Turning off and the fourth switch is turned on to disconnect the voltage control unit and each of the pixel units; when the timing control voltage is a second level different from the first level, the third The switch tube is turned on and the fourth switch tube is turned off to electrically connect the voltage control unit and each of the pixel units.
  • the third switch transistor is a P-type metal-oxide semiconductor field effect transistor
  • the fourth switch transistor is an N-type metal-oxide semiconductor field effect transistor
  • the first level is a high level
  • the second level is a low level
  • the third switching transistor is an N-type metal-oxide semiconductor field effect transistor
  • the fourth switching transistor is a P-type metal-oxide semiconductor field effect transistor
  • the first level is a low level, the first The two levels are high.
  • the timing control unit, the controlled unit and the voltage control unit are located on a printed circuit board, and the plurality of pixel units are located in a display panel, and the printed circuit board passes through the flexible circuit board and the Display panel connection;
  • the display panel includes a plurality of interconnected connection buses, each of which is connected to a plurality of pixel units;
  • the controlled circuit is connected to each of the connection buses through the flexible circuit board.
  • an embodiment of the present invention provides a driving method of a display device, where the display device includes: a timing control unit, a controlled unit, a voltage control unit, and a plurality of sequentially arranged pixel units, and the timing control a unit is connected to the controlled unit, the voltage control unit is connected to the controlled unit, and the controlled unit is connected to each of the pixel units;
  • the method includes:
  • the timing control unit outputs a timing control signal for determining whether the controlled unit electrically connects the voltage control unit and the pixel unit;
  • the controlled unit electrically connects the voltage control unit and the pixel unit according to the timing control signal, so that a control voltage output by the voltage control unit is transmitted to each of the pixel units;
  • the pixel unit performs display when receiving a control voltage
  • the controlled unit includes a third switch tube and a fourth switch tube; a control pole of the third switch tube is connected to the timing control unit, and a first pole of the third switch tube is The voltage control unit is connected, the second pole of the third switch tube is connected to the first pole of the fourth switch tube; the control pole of the fourth switch tube is connected to the timing control unit, and the second switch tube is connected to the second The pole is connected to the reference power source;
  • the timing control unit outputs a timing control signal for determining whether the controlled unit electrically connects the voltage control unit and the pixel unit includes:
  • the timing control unit outputs a first level timing control voltage to a control pole of the third switching transistor and a control pole of the fourth switching transistor to cause the third switching transistor to be turned off and a fourth switch tube is turned on to cause the voltage control unit and each of the pixels The unit is disconnected; or
  • the timing control unit outputs a second level of timing control voltage to a control pole of the third switching transistor and a control pole of the fourth switching transistor to cause the third switching transistor to be turned on and
  • the fourth switching transistor is turned off to electrically connect the voltage control unit and each of the pixel units.
  • FIG. 1 is a schematic structural view of a pixel unit in the prior art
  • FIG. 2 is a schematic structural diagram of a display device according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic structural view of a part of components of the display device of FIG. 2;
  • FIG. 4 is a timing diagram showing the 3D display of the display device of FIG. 2;
  • FIG. 5 is a timing diagram of the display device of FIG. 2 performing 2D display
  • FIG. 6 is a flowchart of a driving method of a display device according to Embodiment 2 of the present invention.
  • FIG. 1 is a schematic diagram of a pixel unit of a 3T1C structure in the prior art.
  • the pixel unit includes a thin film transistor T1, a thin film transistor T2, a thin film transistor T3, a capacitor C, and an OLED.
  • the gate of the thin film transistor T1 is connected to the gate line Scan, and the first electrode of the thin film transistor T1 is connected to the data line Data.
  • the second electrode of the thin film transistor T1 is connected to the node D1
  • the control electrode of the thin film transistor T2 is connected to the node D1
  • the first electrode of the thin film transistor T2 is connected to the driving power source AVDD
  • the second electrode of the thin film transistor T2 is connected to the thin film transistor T3.
  • the first pole, the control electrode of the thin film transistor T3 is connected to the SW bus, the second pole of the thin film transistor T3 is connected to the first pole of the OLED, the second pole of the OLED is grounded, and the first end of the capacitor C is connected to the node D1, the capacitor C The second pole is grounded.
  • the gate electrode of the thin film transistor T3 of each of the plurality of pixel units is connected to the SW bus.
  • the SW bus In the display phase, the SW bus outputs a high level signal to the gate of the thin film transistor T3 in each pixel unit to turn on all of the plurality of pixel units T3, and the OLED emits light, thereby realizing illumination of the OLED; In the data scanning phase, the SW bus outputs a low level signal to the gate of the thin film transistor T3 in each pixel unit so that The thin film transistor T3 is all turned off. This can achieve the purpose of no crosstalk between the left and right eyes in 3D display.
  • FIG. 2 is a schematic structural diagram of a display device according to Embodiment 1 of the present invention
  • FIG. 3 is a schematic structural diagram of a part of components of the display device of FIG.
  • the display device includes: a timing control unit 11, a controlled unit 12, a voltage control unit 13, and a plurality of sequentially arranged pixel units 14, and the timing control unit 11 is connected to the controlled unit 12, and the voltage The control unit 13 is connected to the controlled unit 12, and the controlled unit 12 is connected to each of the plurality of pixel units 14.
  • the timing control unit 11 is configured to output a timing control signal for determining whether the controlled unit 12 electrically connects the voltage control unit 13 and the pixel unit 14; the controlled unit 12 is configured to control the voltage according to the timing control signal output by the timing control unit 11
  • the unit 13 and the pixel unit 14 are electrically connected such that a control voltage output from the voltage control unit 13 is transmitted to each of the pixel units 14; and the pixel unit 14 is used for display when a control voltage is received.
  • one controlled unit 12 is capable of electrically connecting a plurality of pixel units 14 with the voltage control unit 13.
  • the plurality of pixel units 14 and the voltage control unit 13 are electrically connected via one controlled unit 12.
  • all of the pixel units 14 are connected to the voltage control unit via a controlled unit 12.
  • the present invention is not limited thereto as long as it is ensured that one controlled unit 12 can electrically connect more than one pixel unit 14 with the voltage control unit 13.
  • the voltage control unit 13 can be a power management (PM) chip.
  • the scheme of the present embodiment will be described by taking the case where the controlled unit 12 is connected to one pixel unit 14 in FIG.
  • the pixel unit 14 includes a first switching transistor T1, a second switching transistor T2, a capacitor C, and a light emitting device 141.
  • the pole is connected to the gate line Gn, the first pole of the first switch transistor T1 is connected to the data line Data, the second pole of the first switch transistor T1 is connected to the node D2, and the control pole of the second switch transistor T2 is connected to the node D2,
  • the first pole of the second switch T2 is connected to the controlled unit 12, the second pole of the second switch T2 is connected to the first pole of the light emitting device 141; the first end of the capacitor C is connected to the node D2, and the second of the capacitor C is The terminal is connected to the reference power source; the second pole of the light emitting device 141 is connected to the reference power source.
  • the light emitting device 141 is an OLED; the reference power source is the ground terminal GND, in which case the second end of the capacitor C is grounded, and the second pole of the light emitting device 141 is grounded.
  • the controlled unit 12 includes a third switch tube M3 and a fourth switch tube M4.
  • the control pole of the third switch M3 is connected to the timing control unit 11, the first pole of the third switch M3 is connected to the voltage control unit 13, the second pole of the third switch M3 and the first pole of the fourth switch M4
  • the control pole of the fourth switch tube M4 is connected to the timing control unit 11, and the second pole of the fourth switch tube M4 is connected to the reference power source.
  • the reference power source is the ground terminal GND, in which case the second pole of the fourth switching transistor M4 is grounded.
  • the timing control unit 11 can implement the switching control of the third switch tube M3 and the fourth switch tube M4 through a general purpose input/output (GPIO) interface.
  • GPIO general purpose input/output
  • the timing control unit 11, the controlled unit 12, and the voltage control unit 13 are located on a printed circuit board (PCB), and the plurality of pixel units 14 are located in the display panel 15.
  • the printed circuit board PCB is connected to the display panel 15 through a flexible circuit board (FPC).
  • the display panel 15 includes a plurality of interconnected connection buses 16, each of which is coupled to a plurality of pixel units 14, and in particular, each of the connection buses 16 can be coupled to all of the pixel units 14 located in a row.
  • the controlled circuit 12 is connected to each of the connection buses 16 via a flexible circuit board FPC.
  • the display device in this embodiment can be used in a 2D display mode or a 3D display mode.
  • FIG. 4 is a timing diagram showing the 3D display of the display device of FIG. 2.
  • a frame display is started under the control of a frame start (STV) signal.
  • the gate lines G1 to Gn are progressively scanned during the scanning period.
  • the gate line Gn outputs a gate control signal to the first switching transistor T1, and the first switching transistor T1 is When the gate control signal is high, it is turned on; the data line Data charges the node D2 through the first switch T1 that is turned on to charge the capacitor C, and the voltage of the control electrode of the second switch T2 is the voltage of the node D.
  • the timing control unit 11 outputs the timing control voltage TCON-IO to the control electrode of the third switching transistor M3 and the control electrode of the fourth switching transistor M4, and the third switching transistor M3 is turned off under the control of the timing control voltage TCON-IO and The four switching transistor M4 is turned on under the control of the timing control voltage TCON-IO to turn off the voltage control unit 13 and each of the pixel units 14.
  • the third switch M3 is a P-type metal-oxide semiconductor field effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET), and the fourth switch M4 is an N-type MOSFET, and the timing control voltage is TCON-IO is a high level voltage, at which time the third switching transistor M3 is turned off under the control of the high level voltage and the fourth switching transistor M4 is turned on under the control of the high level voltage. Since the third switch M3 is turned off, each pixel unit 14 is disconnected from the voltage control unit 13, and the voltage control unit 13 cannot output the control voltage VDDH to the second switch in the pixel unit 14 through the third switch M3.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • the control voltage VDDH is a low level voltage to achieve energy saving effect.
  • the third switch M3 is an N-type MOSFET, and the fourth switch is a P-type MOSFET, and the timing control voltage is a low-level voltage, and at this time, the third switch M3 is at a low level voltage. The control is turned off and the fourth switch M4 is turned on under the control of the low level voltage, and this case is not specifically drawn.
  • the timing control unit 11 outputs a high-level timing control voltage TCON-IO to the control electrode of the third switching transistor M3 and the control electrode of the fourth switching transistor M4, and the third switching transistor M3 is The control of the timing control voltage TCON-IO is turned on and the fourth switching transistor M4 is turned off under the control of the timing control voltage TCON-IO to electrically connect the voltage control unit 13 and each of the pixel units 14.
  • the third switch M3 is a P-type MOSFET
  • the fourth switch M4 is an N-type MOSFET
  • the timing control voltage TCON-IO is a low-level voltage during the display period, and the third switch M3 is at the time.
  • the control of the low level voltage is turned on and the fourth switching transistor M4 is turned off under the control of the low level voltage. Since the third switching transistor M3 is turned on, each of the pixel units 14 is electrically connected to the voltage control unit 13, and the voltage control unit 13 simultaneously outputs the control voltage VDDH to each of the pixel units 14 through the turned-on third switching transistor M3.
  • the second switch tube T2 drives the light emitting device 141 to emit light by the second switch tube T2, so that the pixel unit 14 performs display, and at this time, the control voltage VDDH is a high level voltage.
  • the third switch M3 is an N-type MOSFET
  • the fourth switch is a P-type MOSFET, and the timing control voltage is displayed during the display period. A high level voltage, at which time the third switching transistor M3 is turned on under the control of the high level voltage and the fourth switching transistor M4 is turned off under the control of the high level voltage, which is not specifically shown.
  • the controlled unit 12 can transmit the control voltage output by the voltage control unit 13 to each of the pixel units 14 when the voltage control unit 13 and the pixel unit 14 are electrically connected, so that each pixel is simultaneously turned on.
  • the controlled unit 12 disconnects the voltage control unit 13 and the pixel unit 14 under the control of the timing control unit 11, and no longer transmits the control voltage output from the voltage control unit 13 to the pixel. Unit 14, thereby disconnecting each pixel unit 14 at the same time. As shown in FIG.
  • the display time periods of the adjacent two frames are respectively displayed on the left-eye picture and the right-eye picture, and the two display time periods are separated by the scanning time period between them.
  • FIG. 5 is a timing diagram showing the 2D display of the display device of FIG. 2.
  • one frame of picture display is started under the control of the STV signal.
  • the gate lines G1 to Gn are scanned line by line.
  • the gate line Gn outputs a gate control signal to the first switching transistor T1, and the first switching transistor T1 has a high gate control signal.
  • the data line Data charges the node D2 through the turned-on first switch tube T1 to charge the capacitor C, and the voltage of the control pole of the second switch tube T2 is the voltage of the node D.
  • the timing control unit 11 outputs a timing control voltage TCON-IO to the control electrode of the third switching transistor M3 and the control electrode of the fourth switching transistor M4, and the third switching transistor M3 is turned on under the control of the timing control voltage TCON-IO and the fourth switch
  • the tube M4 is turned off under the control of the timing control voltage TCON-IO to electrically connect the voltage control unit 13 and the pixel unit 14.
  • the third switch M3 is a P-type MOSFET
  • the fourth switch M4 is an N-type MOSFET
  • the timing control voltage TCON-IO is a low-level voltage. At this time, the third switch M3 is at a low level voltage.
  • the control is turned on and the fourth switch M4 is turned off under the control of the low level voltage.
  • the voltage control unit 13 simultaneously outputs the control voltage VDDH to the second switching transistor T2 in each of the pixel units 14 through the turned-on third switching transistor M3, and drives the light emitting device 141 to emit light by the second switching transistor T2, thereby causing the pixel unit 14 to perform It is displayed that the control voltage VDDH is a high level voltage at this time. Then, the above process is repeated to display the next frame. As shown in FIG. 5, in the 2D display mode, the control voltage VDDH is always a high level voltage, and the timing control voltage TCON-IO is always a high level voltage.
  • the display device includes a timing control unit, a controlled unit, a voltage control unit, and a plurality of pixel units, and the controlled unit is configured to use the timing control signal outputted by the timing control unit to control the voltage control unit And electrically connected to the pixel unit, so that the control voltage output by the voltage control unit is transmitted to each pixel unit.
  • the controlled unit that controls the display of the pixel unit is disposed outside the pixel unit, and one controlled unit can be controlled.
  • a plurality of pixel units eliminate the need to provide a controlled unit inside each pixel unit, so that the number of controlled units of the display device is small, and the product structure complexity is reduced, thereby improving the aperture ratio of the pixel unit, reducing power consumption, and improving the product. Yield. Since the controlled unit is located outside the pixel unit, it is easy to repair when the controlled unit is damaged, thereby improving the maintainability. In this embodiment, only two switching tubes are disposed in the pixel unit, and one switching tube is reduced in each pixel unit compared with the prior art, thereby further improving the aperture ratio of the pixel unit, reducing power consumption, and improving Product yield.
  • the display device includes: a timing control unit, a controlled unit, a voltage control unit, and a plurality of sequentially arranged pixels. a unit, the timing control unit is connected to the controlled unit, the voltage control unit is connected to the controlled unit, and the controlled unit is connected to each of the pixel units;
  • the method includes:
  • Step 101 The timing control unit outputs a timing control signal for determining whether the controlled unit electrically connects the voltage control unit and the pixel unit.
  • the controlled unit includes a third switch tube and a fourth switch tube; a control pole of the third switch tube is connected to the timing control unit, and the first pole of the third switch tube and the voltage
  • the control unit is connected, the second pole of the third switch tube is connected to the first pole of the fourth switch tube; the control pole of the fourth switch tube is connected to the timing control unit, and the second pole of the fourth switch tube Connect to the reference power supply.
  • Step 101 specifically includes:
  • the timing control unit outputs a first level timing control voltage to a control pole of the third switching transistor and a control pole of the fourth switching transistor to cause the third switching transistor to be turned off and
  • the fourth switch is turned on to disconnect the voltage control unit from each of the pixel units;
  • the timing control unit outputs a second level of timing control voltage to a control pole of the third switching transistor and a control pole of the fourth switching transistor to cause the third switching transistor to be turned on and
  • the fourth switching transistor is turned off to electrically connect the voltage control unit and each of the pixel units.
  • Step 102 The controlled unit electrically connects the voltage control unit and the pixel unit according to the timing control signal, so that a control voltage output by the voltage control unit is transmitted to each of the pixel units, where multiple The pixel unit and the voltage control unit are electrically connected via one of the controlled units.
  • Step 103 The pixel unit performs display when receiving the control voltage.
  • the driving method of the display device provided in this embodiment can be used to drive the display device provided in the first embodiment.
  • the display device refer to the first embodiment, and details are not described herein again.
  • the display device includes a timing control unit, a controlled unit, a voltage control unit and a plurality of pixel units, and the controlled unit is configured to output a timing control signal according to the timing control unit
  • the voltage control unit and the pixel unit are electrically connected, so that the control voltage output by the voltage control unit is transmitted to each pixel unit.
  • the controlled unit that controls the display of the pixel unit is disposed outside the pixel unit, and one of the The control unit can control a plurality of pixel units without setting a controlled unit inside each pixel unit, so that the number of controlled units of the display device is small, the product structure complexity is reduced, thereby improving the aperture ratio of the pixel unit and reducing the power consumption. And the product yield is improved; since the controlled unit is located outside the pixel unit, it is easy to repair when the controlled unit is damaged, thereby improving the maintainability.

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Abstract

一种显示装置及其驱动方法。该显示装置包括：时序控制单元(11)、受控单元(12)、电压控制单元(13)和多个依次排列的像素单元(14)，时序控制单元(11)与受控单元(12)连接，电压控制单元(13)与受控单元(12)连接，受控单元(12)与所述多个像素单元(14)中的每一个连接；所述时序控制单元(11)用于输出用于确定所述受控单元(12)是否将所述电压控制单元(13)和所述像素单元(14)电连接的时序控制信号；所述受控单元(12)用于根据所述时序控制信号将所述电压控制单元(13)和所述像素单元(14)电连接；所述像素单元(14)用于在接收到控制电压时进行显示，其中，一个所述受控单元(12)能够将多个所述像素单元(14)与所述电压控制单元(13)电连接。所述显示装置提高了像素单元(14)的开口率、降低了功耗、提高了产品良率以及提高了可维修性。

Description

显示装置及其驱动方法 技术领域
本发明实施例涉及显示技术领域，特别涉及一种显示装置及其驱动方法。
背景技术
有机发光二极管(Organic Light-Emitting Diode，OLED)显示技术具有自发光的特性，OLED显示装置可视角度大且能够节省电能。
现有的OLED显示装置中包括多个像素单元，每个像素单元采用诸如3T1C结构。在现有技术中，每个像素单元中均需要设置一个与OLEG直接相连接的用于控制像素单元中的OLED是否能够发光的薄膜晶体管。这导致了OLED显示装置中TFT的数量过多，产品结构复杂度增大，从而降低了像素单元的开口率、增大了功耗以及增大了制造时的产品不良的可能性；由于该薄膜晶体管位于像素单元中，因此当该薄膜晶体管出现损坏时不易不具有维修性。
发明内容
本发明实施例提供一种显示装置及其驱动方法，用于提高像素单元的开口率、降低功耗、提高产品良率以及提高可维修性。
为至少实现上述目的，本发明实施例提供了一种显示装置，包括：时序控制单元、受控单元、电压控制单元和多个依次排列的像素单元，所述时序控制单元与所述受控单元连接，所述电压控制单元与所述受控单元连接，所述受控单元与所述像素单元连接；
所述时序控制单元用于输出用于确定所述受控单元是否将所述电压控制单元和所述像素单元电连接的时序控制信号；
所述受控单元用于根据所述时序控制信号将所述电压控制单元和所述像素单元电连接，从而使得所述电压控制单元输出的控制电压传输至每个所述像素单元；
所述像素单元用于在接收到控制电压时进行显示，
其中，一个所述受控单元能够将多个所述像素单元与所述电压控制单元电连接。
可选地，所述多个像素单元中的每一个包括第一开关管、第二开关管、电容和发光器件；
所述第一开关管的控制极与栅线连接，所述第一开关管的第一极与数据线连接，所述第一开关管的第二极连接至所述第二开关管的控制极；
所述第二开关管的第一极与所述受控单元连接，所述第二开关管的第二极与所述发光器件的第一极连接；
所述电容的第一端连接至所述第一开关管的第二极，所述电容的第二端连接至参考电源；
所述发光器件的第二极连接至所述参考电源。
可选地，所述受控单元包括第三开关管和第四开关管；
所述第三开关管的控制极与所述时序控制单元的输出端连接，所述第三开关管的第一极与所述电压控制单元的输出端连接，所述第三开关管的第二极与第四开关管的第一极连接；
第四开关管的控制极与所述时序控制单元的输出端连接，所述第四开关管的第二极连接至参考电源。
可选地，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出时序控制电压，当所述时序控制电压为第一电平时，所述第三开关管关闭以及所述第四开关管开启以使所述电压控制单元和每个所述像素单元断开连接；当所述时序控制电压为不同于第一电平的第二电平时，所述第三开关管开启以及所述第四开关管关闭以使所述电压控制单元和每个所述像素单元电连接。
可选地，所述第三开关管为P型金属-氧化物半导体场效应晶体管，所述第四开关管为N型金属-氧化物半导体场效应晶体管，所述第一电平为高电平，所述第二电平为低电平；或者
所述第三开关管为N型金属-氧化物半导体场效应晶体管，所述第四开关管为P型金属-氧化物半导体场效应晶体管，所述第一电平为低电平，所述第二电平为高电平。
可选地，所述时序控制单元、所述受控单元和所述电压控制单元位于印刷线路板上，多个所述像素单元位于显示面板中，所述印刷线路板通过柔性线路板与所述显示面板连接；
所述显示面板包括多条相互连接的连接总线，每条连接总线与多个像素单元连接；
所述受控电路通过所述柔性线路板与每条连接总线连接。
为至少实现上述目的，本发明实施例提供了一种显示装置的驱动方法，所述显示装置包括：时序控制单元、受控单元、电压控制单元和多个依次排列的像素单元，所述时序控制单元与所述受控单元连接，所述电压控制单元与所述受控单元连接，所述受控单元与每个所述像素单元连接；
所述方法包括：
所述时序控制单元输出用于确定所述受控单元是否将所述电压控制单元和所述像素单元电连接的时序控制信号；
所述受控单元根据所述时序控制信号将所述电压控制单元和所述像素单元电连接，从而使得所述电压控制单元输出的控制电压传输至每个所述像素单元；
所述像素单元在接收到控制电压时进行显示，
其中，在所述受控单元根据所述时序控制信号将所述电压控制单元和所述像素单元电连接的步骤中，多个所述像素单元与所述电压控制单元经由一个所述受控单元电连接。
可选地，所述受控单元包括第三开关管和第四开关管；所述第三开关管的控制极与所述时序控制单元连接，所述第三开关管的第一极与所述电压控制单元连接，所述第三开关管的第二极与第四开关管的第一极连接；第四开关管的控制极与所述时序控制单元连接，所述第四开关管的第二极连接至参考电源；
所述时序控制单元输出用于确定所述受控单元是否将所述电压控制单元和所述像素单元电连接的时序控制信号包括：
在扫描时间段，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出第一电平的时序控制电压，以使得所述第三开关管关闭以及所述第四开关管开启，从而使所述电压控制单元和每个所述像素 单元断开连接；或者
在显示时间段，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出第二电平的时序控制电压，以使得所述第三开关管开启以及所述第四开关管关闭，从而使所述电压控制单元和每个所述像素单元电连接。
附图说明
图1为现有技术中像素单元的结构示意图；
图2为本发明实施例一提供的一种显示装置的结构示意图；
图3为图2中显示装置的部分组件的具体结构示意图；
图4为图2中显示装置进行3D显示的时序示意图；
图5为图2中显示装置进行2D显示的时序示意图；
图6为本发明实施例二提供的一种显示装置的驱动方法的流程图。
具体实施方式
为使本领域的技术人员更好地理解本发明实施例的技术方案，下面结合附图对本发明实施例提供的显示装置及其驱动方法的进行详细描述。
图1为现有技术中3T1C结构的像素单元的示意图。如图1所示，像素单元包括薄膜晶体管T1、薄膜晶体管T2、薄膜晶体管T3、电容C和OLED，薄膜晶体管T1的控制极连接至栅线Scan，薄膜晶体管T1的第一极连接至数据线Data，薄膜晶体管T1的第二极连接至节点D1，薄膜晶体管T2的控制极连接至节点D1，薄膜晶体管T2的第一极连接至驱动电源AVDD，薄膜晶体管T2的第二极连接至薄膜晶体管T3的第一极，薄膜晶体管T3的控制极连接至SW总线，薄膜晶体管T3的第二极连接至OLED的第一极，OLED的第二极接地，电容C的第一端连接至节点D1，电容C的第二极接地。在OELD显示装置中，所述多个像素单元中的每一个的薄膜晶体管T3的控制极均连接至SW总线。在显示阶段，SW总线向每个像素单元中的薄膜晶体管T3的控制极输出高电平信号以使所述多个像素单元中的全部薄膜晶体管T3开启，OLED发光，从而实现了OLED的发光；在数据扫描阶段，SW总线向每个像素单元中的薄膜晶体管T3的控制极输出低电平信号以使 薄膜晶体管T3全部关闭。这样可达到3D显示时左右眼无串扰的目的。
但是，在图1所示的现有结构中，每个像素单元中均需要设置一个控制像素单元中的OLED是否能够发光的薄膜晶体管T3，这导致了OLED显示装置中TFT的数量过多，产品结构复杂度增大，从而降低了像素单元的开口率、增大了功耗以及增大了制造时的产品不良的可能性；由于薄膜晶体管T3位于像素单元中，因此当薄膜晶体管T3出现损坏时无法维修和更换。
图2为本发明实施例一提供的一种显示装置的结构示意图，图3为图2中显示装置的部分组件的具体结构示意图。如图2和图3所示，该显示装置包括：时序控制单元11、受控单元12、电压控制单元13和多个依次排列的像素单元14，时序控制单元11与受控单元12连接，电压控制单元13与受控单元12连接，受控单元12与所述多个像素单元14中的每一个连接。
时序控制单元11用于输出用于确定受控单元12是否将电压控制单元13和像素单元14电连接的时序控制信号；受控单元12用于根据时序控制单元11输出的时序控制信号将电压控制单元13和像素单元14电连接，从而使得电压控制单元13输出的控制电压传输至每个像素单元14；像素单元14用于在接收到控制电压时进行显示。
本实施例中，一个受控单元12能够将多个像素单元14与电压控制单元13电连接。换言之，在时序控制信号的控制下，多个像素单元14与电压控制单元13经由一个受控单元12电连接。例如，如图2所示，所有像素单元14与电压控制单元经由一个受控单元12相连接。当然，本发明不限于此，只要确保一个受控单元12能够将不止一个像素单元14与电压控制单元13电连接即可。
本实施例中，电压控制单元13可以为电源管理(power management，简称：PM)芯片。
需要说明的是：图2中栅线和数据线并未具体画出。
为简明起见，图3中以受控单元12连接至一个像素单元14的情况为例对本实施例的方案进行描述。如图3所示，像素单元14包括第一开关管T1、第二开关管T2、电容C和发光器件141。第一开关管T1的控制 极与栅线Gn连接，第一开关管T1的第一极与数据线Data连接，第一开关管T1的第二极连接至节点D2；第二开关管T2的控制极连接至节点D2，第二开关管T2的第一极与受控单元12连接，第二开关管T2的第二极与发光器件141的第一极连接；电容C的第一端连接至节点D2，电容C的第二端连接至参考电源；发光器件141的第二极连接至参考电源。在图3所示的示例中，发光器件141为OLED；参考电源为接地端GND，这种情况下，电容C的第二端接地，发光器件141的第二极接地。
本实施例中，受控单元12包括第三开关管M3和第四开关管M4。第三开关管M3的控制极与时序控制单元11连接，第三开关管M3的第一极与电压控制单元13连接，第三开关管M3的第二极与第四开关管M4的第一极连接；第四开关管M4的控制极与时序控制单元11连接，第四开关管M4的第二极连接至参考电源。在图3所示的示例中，参考电源为接地端GND，这种情况下第四开关管M4的第二极接地。本实施例中，时序控制单元11可通过通用输入/输出(General Purpose Input Output，简称：GPIO)接口实现对第三开关管M3和第四开关管M4的开关控制。
如图2所示，本实施例中，时序控制单元11、受控单元12和电压控制单元13位于印刷线路板(Printed Circuit Board，简称：PCB)上，多个像素单元14位于显示面板15中，印刷线路板PCB通过柔性线路板(F1exible Printed Circuit，简称：FPC)与显示面板15连接。显示面板15包括多条相互连接的连接总线16，每条连接总线16与多个像素单元14连接，具体地，每条连接总线16可与位于一行中的所有像素单元14连接。受控电路12通过柔性线路板FPC与每条连接总线16连接。
本实施例中的显示装置可用于2D显示模式或者3D显示模式。
图4为图2中显示装置进行3D显示的时序示意图，如图2、图3和图4所示，在帧开启(Start Vertical，简称：STV)信号的控制下开始一帧画面显示。在一帧画面显示时，在扫描时间段，栅线G1至Gn进行逐行扫描，以栅线Gn为例，栅线Gn向第一开关管T1输出栅极控制信号，第一开关管T1在栅极控制信号为高电平时开启；数据线Data通过开启的第一开关管T1对节点D2进行充电以实现对电容C进行充电，第二开关管T2的控制极的电压为节点D的电压。在栅线G1至Gn进行逐行扫描的过程 中，时序控制单元11向第三开关管M3的控制极和第四开关管M4的控制极输出时序控制电压TCON-IO，第三开关管M3在时序控制电压TCON-IO的控制下关闭以及第四开关管M4在时序控制电压TCON-IO的控制下开启以使电压控制单元13和每个像素单元14关断。本实施例中，第三开关管M3为P型金属-氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor，简称：MOSFET)，第四开关管M4为N型MOSFET，时序控制电压TCON-IO为高电平电压，此时第三开关管M3在高电平电压的控制下关闭且第四开关管M4在高电平电压的控制下开启。由于第三开关管M3关闭，因此每个像素单元14均与电压控制单元13断开连接，电压控制单元13无法通过第三开关管M3将控制电压VDDH输出至像素单元14中的第二开关管T2，并且由于第四开关管M4开启，第二开关管T2的第一极通过第四开关管M4接地，因此第二开关管T2截止，从而使得像素单元14不进行显示。其中，控制电压VDDH为低电平电压可达到节能的效果。在实际应用中，可选地，第三开关管M3为N型MOSFET，第四开关管为P型MOSFET，则时序控制电压为低电平电压，此时第三开关管M3在低电平电压的控制下关闭且第四开关管M4在低电平电压的控制下开启，此种情况不再具体画出。
在该帧画面显示的显示时间段，时序控制单元11向第三开关管M3的控制极和第四开关管M4的控制极输出高电平的时序控制电压TCON-IO，第三开关管M3在时序控制电压TCON-IO的控制下开启以及第四开关管M4在时序控制电压TCON-IO的控制下关闭以使电压控制单元13和每个像素单元14电连接。本实施例中，第三开关管M3为P型MOSFET，第四开关管M4为N型MOSFET，时序控制电压TCON-IO在显示时间段为低电平电压，此时第三开关管M3在该低电平电压的控制下开启且第四开关管M4在该低电平电压的控制下关闭。由于第三开关管M3开启，因此每个像素单元14均与电压控制单元13电连接，电压控制单元13通过开启的第三开关管M3同时将控制电压VDDH输出至每个像素单元14中的第二开关管T2，由第二开关管T2驱动发光器件141发光，从而使得像素单元14进行显示，此时控制电压VDDH为高电平电压。在实际应用中，可选地，第三开关管M3为N型MOSFET，第四开关管为P型MOSFET，则时序控制电压在显示时间段为 高电平电压，此时第三开关管M3在该高电平电压的控制下开启且第四开关管M4在该高电平电压的控制下关闭，此种情况不再具体示出。
进而，重复上述过程进行下一帧画面显示。连续两帧画面中的一帧为左眼画面，另一帧为右眼画面。在3D显示模式的显示时间段，受控单元12可在电压控制单元13和像素单元14电连接时将电压控制单元13输出的控制电压传输至每个像素单元14，实现了同时开启每个像素单元；在3D显示模式的扫描时间段，受控单元12在时序控制单元11的控制下使电压控制单元13和像素单元14断开连接，不再将电压控制单元13输出的控制电压传输至像素单元14，从而同时断开每个像素单元14。如图4所示，相邻两帧画面的显示时间段分别对左眼画面和右眼画面进行显示，而两个显示时间段会被它们之间的扫描时间段分隔开。从而可达到左眼画面和右眼画面分开的目的，进而实现了3D显示无串扰。
图5为图2中显示装置进行2D显示的时序示意图，如图2、图3和图5所示，在STV信号的控制下开始一帧画面显示。在一帧画面显示时，栅线G1至Gn逐行扫描，以栅线Gn为例，栅线Gn向第一开关管T1输出栅极控制信号，第一开关管T1在栅极控制信号为高电平时开启；数据线Data通过开启的第一开关管T1对节点D2进行充电以实现对电容C进行充电，第二开关管T2的控制极的电压为节点D的电压。时序控制单元11向第三开关管M3的控制极和第四开关管M4的控制极输出时序控制电压TCON-IO，第三开关管M3在时序控制电压TCON-IO的控制下开启以及第四开关管M4在时序控制电压TCON-IO的控制下关闭以使电压控制单元13和像素单元14电连接。本实施例中，第三开关管M3为P型MOSFET，第四开关管M4为N型MOSFET，时序控制电压TCON-IO为低电平电压，此时第三开关管M3在低电平电压的控制下开启且第四开关管M4在低电平电压的控制下关闭。电压控制单元13通过开启的第三开关管M3将控制电压VDDH同时输出至每个像素单元14中的第二开关管T2，由第二开关管T2驱动发光器件141发光，从而使得像素单元14进行显示，此时控制电压VDDH为高电平电压。进而重复上述过程，进行下一帧画面的显示。如图5所示，在2D显示模式下，控制电压VDDH一直为高电平电压，时序控制电压TCON-IO一直为高电平电压。
本实施例提供的显示装置的技术方案中，显示装置包括时序控制单元、受控单元、电压控制单元和多个像素单元，受控单元用于根据时序控制单元输出的时序控制信号将电压控制单元和像素单元电连接，从而使得电压控制单元输出的控制电压传输至每个像素单元，本实施例中，将控制像素单元显示的受控单元设置于像素单元的外部，且一个受控单元可控制多个像素单元，无需在每个像素单元内部设置受控单元，使得显示装置的受控单元数量少，产品结构复杂度降低，从而提高了像素单元的开口率、降低了功耗以及提高了产品良率。由于受控单元位于像素单元的外部，因此当受控单元出现损坏时便于维修，从而提高了可维修性。本实施例中，像素单元中仅设置有两个开关管，与现有技术相比每个像素单元中减少了一个开关管，从而进一步提高了像素单元的开口率、降低了功耗以及提高了产品良率。
图6为本发明实施例二提供的一种显示装置的驱动方法的流程图，如图6所示，该显示装置包括：时序控制单元、受控单元、电压控制单元和多个依次排列的像素单元，所述时序控制单元与所述受控单元连接，所述电压控制单元与所述受控单元连接，所述受控单元与每个所述像素单元连接；
所述方法包括：
步骤101、时序控制单元输出用于确定所述受控单元是否将所述电压控制单元和所述像素单元电连接的时序控制信号。
本实施例中，受控单元包括第三开关管和第四开关管；所述第三开关管的控制极与所述时序控制单元连接，所述第三开关管的第一极与所述电压控制单元连接，所述第三开关管的第二极与第四开关管的第一极连接；第四开关管的控制极与所述时序控制单元连接，所述第四开关管的第二极连接至参考电源。
步骤101具体包括：
在扫描时间段，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出第一电平的时序控制电压，以使得所述第三开关管关闭以及所述第四开关管开启，从而使所述电压控制单元和每个所述像素单元断开连接；或者
在显示时间段，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出第二电平的时序控制电压，以使得所述第三开关管开启以及所述第四开关管关闭，从而使所述电压控制单元和每个所述像素单元电连接。
步骤102、受控单元根据所述时序控制信号将所述电压控制单元和所述像素单元电连接，从而使得所述电压控制单元输出的控制电压传输至每个所述像素单元，其中，多个所述像素单元与所述电压控制单元经由一个所述受控单元电连接。
步骤103、像素单元在接收到控制电压时进行显示。
本实施例提供的显示装置的驱动方法可用于驱动上述实施例一提供的显示装置，对显示装置的描述可参见上述实施例一，此处不再赘述。
本实施例提供的显示装置的驱动方法的技术方案中，显示装置包括时序控制单元、受控单元、电压控制单元和多个像素单元，受控单元用于根据时序控制单元输出的时序控制信号将电压控制单元和像素单元电连接，从而使得电压控制单元输出的控制电压传输至每个像素单元，本实施例中，将控制像素单元显示的受控单元设置于像素单元的外部，且一个该受控单元可控制多个像素单元，无需在每个像素单元内部设置受控单元，使得显示装置的受控单元数量少，产品结构复杂度降低，从而提高了像素单元的开口率、降低了功耗以及提高了产品良率；由于受控单元位于像素单元的外部，因此当受控单元出现损坏时便于维修，从而提高了可维修性。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (8)

  1. 一种显示装置，包括：时序控制单元、受控单元、电压控制单元和多个依次排列的像素单元，所述时序控制单元与所述受控单元连接，所述电压控制单元与所述受控单元连接，所述受控单元与所述像素单元连接；
    所述时序控制单元用于输出用于确定所述受控单元是否将所述电压控制单元和所述像素单元电连接的时序控制信号；
    所述受控单元用于根据所述时序控制信号将所述电压控制单元和所述像素单元电连接，从而使得所述电压控制单元输出的控制电压传输至每个所述像素单元；
    所述像素单元用于在接收到控制电压时进行显示，
    其中，一个所述受控单元能够将多个所述像素单元与所述电压控制单元电连接。
  2. 根据权利要求1所述的显示装置，其中，所述多个像素单元中的每一个包括第一开关管、第二开关管、电容和发光器件；
    所述第一开关管的控制极与栅线连接，所述第一开关管的第一极与数据线连接，所述第一开关管的第二极连接至所述第二开关管的控制极；
    所述第二开关管的第一极与所述受控单元连接，所述第二开关管的第二极与所述发光器件的第一极连接；
    所述电容的第一端连接至所述第一开关管的第二极，所述电容的第二端连接至参考电源；
    所述发光器件的第二极连接至所述参考电源。
  3. 根据权利要求1所述的显示装置，其中，所述受控单元包括第三开关管和第四开关管；
    所述第三开关管的控制极与所述时序控制单元的输出端连接，所述第三开关管的第一极与所述电压控制单元的输出端连接，所述第三开关管的第二极与第四开关管的第一极连接；
    第四开关管的控制极与所述时序控制单元的输出端连接，所述第四开关管的第二极连接至参考电源。
  4. 根据权利要求3所述的显示装置，其中，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出时序控制电压，当所述时序控制电压为第一电平时，所述第三开关管关闭以及所述第四开关管开启以使所述电压控制单元和每个所述像素单元断开连接；当所述时序控制电压为不同于第一电平的第二电平时，所述第三开关管开启以及所述第四开关管关闭以使所述电压控制单元和每个所述像素单元电连接。
  5. 根据权利要求4所述的显示装置，其中，所述第三开关管为P型金属-氧化物半导体场效应晶体管，所述第四开关管为N型金属-氧化物半导体场效应晶体管，所述第一电平为高电平，所述第二电平为低电平；或者
    所述第三开关管为N型金属-氧化物半导体场效应晶体管，所述第四开关管为P型金属-氧化物半导体场效应晶体管，所述第一电平为低电平，所述第二电平为高电平。
  6. 根据权利要求1所述的显示装置，其中，所述时序控制单元、所述受控单元和所述电压控制单元位于印刷线路板上，多个所述像素单元位于显示面板中，所述印刷线路板通过柔性线路板与所述显示面板连接；
    所述显示面板包括多条相互连接的连接总线，每条连接总线与多个像素单元连接；
    所述受控电路通过所述柔性线路板与每条连接总线连接。
  7. 一种显示装置的驱动方法，其中，所述显示装置包括：时序控制单元、受控单元、电压控制单元和多个依次排列的像素单元，所述时序控制单元与所述受控单元连接，所述电压控制单元与所述受控单元连接所述受控单元与所述像素单元连接；
    所述方法包括：
    所述时序控制单元输出用于确定所述受控单元是否将所述电压控制单元和所述像素单元电连接的时序控制信号；
    所述受控单元根据所述时序控制信号将所述电压控制单元和所述像素单元电连接，从而使得所述电压控制单元输出的控制电压传输至每个所述像素单元；
    所述像素单元在接收到控制电压时进行显示，
    其中，在所述受控单元根据所述时序控制信号将所述电压控制单元和所述像素单元电连接的步骤中，多个所述像素单元与所述电压控制单元经由一个所述受控单元电连接。
  8. 根据权利要求7所述的驱动方法，其中，所述受控单元包括第三开关管和第四开关管；所述第三开关管的控制极与所述时序控制单元连接，所述第三开关管的第一极与所述电压控制单元连接，所述第三开关管的第二极与第四开关管的第一极连接；第四开关管的控制极与所述时序控制单元连接，所述第四开关管的第二极连接至参考电源；
    所述时序控制单元输出用于确定所述受控单元是否将所述电压控制单元和所述像素单元电连接的时序控制信号包括：
    在扫描时间段，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出第一电平的时序控制电压，以使得所述第三开关管关闭以及所述第四开关管开启，从而使所述电压控制单元和每个所述像素单元断开连接；或者
    在显示时间段，所述时序控制单元向所述第三开关管的控制极和第四开关管的控制极输出第二电平的时序控制电压，以使得所述第三开关管开启以及所述第四开关管关闭，从而使所述电压控制单元和每个所述像素单元电连接。
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